e1000_main.c 128 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  89. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  90. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  91. /* required last entry */
  92. {0,}
  93. };
  94. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  95. int e1000_up(struct e1000_adapter *adapter);
  96. void e1000_down(struct e1000_adapter *adapter);
  97. void e1000_reset(struct e1000_adapter *adapter);
  98. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  99. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  100. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  101. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  102. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  103. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  104. struct e1000_tx_ring *txdr);
  105. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  106. struct e1000_rx_ring *rxdr);
  107. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  108. struct e1000_tx_ring *tx_ring);
  109. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  110. struct e1000_rx_ring *rx_ring);
  111. void e1000_update_stats(struct e1000_adapter *adapter);
  112. /* Local Function Prototypes */
  113. static int e1000_init_module(void);
  114. static void e1000_exit_module(void);
  115. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  116. static void __devexit e1000_remove(struct pci_dev *pdev);
  117. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  118. #ifdef CONFIG_E1000_MQ
  119. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  120. #endif
  121. static int e1000_sw_init(struct e1000_adapter *adapter);
  122. static int e1000_open(struct net_device *netdev);
  123. static int e1000_close(struct net_device *netdev);
  124. static void e1000_configure_tx(struct e1000_adapter *adapter);
  125. static void e1000_configure_rx(struct e1000_adapter *adapter);
  126. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  127. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  128. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  129. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  130. struct e1000_tx_ring *tx_ring);
  131. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring);
  133. static void e1000_set_multi(struct net_device *netdev);
  134. static void e1000_update_phy_info(unsigned long data);
  135. static void e1000_watchdog(unsigned long data);
  136. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  137. static void e1000_82547_tx_fifo_stall(unsigned long data);
  138. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  139. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  140. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  141. static int e1000_set_mac(struct net_device *netdev, void *p);
  142. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  143. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  144. struct e1000_tx_ring *tx_ring);
  145. #ifdef CONFIG_E1000_NAPI
  146. static int e1000_clean(struct net_device *poll_dev, int *budget);
  147. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  148. struct e1000_rx_ring *rx_ring,
  149. int *work_done, int work_to_do);
  150. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  151. struct e1000_rx_ring *rx_ring,
  152. int *work_done, int work_to_do);
  153. #else
  154. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  157. struct e1000_rx_ring *rx_ring);
  158. #endif
  159. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  160. struct e1000_rx_ring *rx_ring,
  161. int cleaned_count);
  162. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  163. struct e1000_rx_ring *rx_ring,
  164. int cleaned_count);
  165. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  166. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  167. int cmd);
  168. void e1000_set_ethtool_ops(struct net_device *netdev);
  169. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  170. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  171. static void e1000_tx_timeout(struct net_device *dev);
  172. static void e1000_tx_timeout_task(struct net_device *dev);
  173. static void e1000_smartspeed(struct e1000_adapter *adapter);
  174. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  175. struct sk_buff *skb);
  176. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  177. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  178. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  179. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  180. #ifdef CONFIG_PM
  181. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  182. static int e1000_resume(struct pci_dev *pdev);
  183. #endif
  184. #ifdef CONFIG_NET_POLL_CONTROLLER
  185. /* for netdump / net console */
  186. static void e1000_netpoll (struct net_device *netdev);
  187. #endif
  188. #ifdef CONFIG_E1000_MQ
  189. /* for multiple Rx queues */
  190. void e1000_rx_schedule(void *data);
  191. #endif
  192. /* Exported from other modules */
  193. extern void e1000_check_options(struct e1000_adapter *adapter);
  194. static struct pci_driver e1000_driver = {
  195. .name = e1000_driver_name,
  196. .id_table = e1000_pci_tbl,
  197. .probe = e1000_probe,
  198. .remove = __devexit_p(e1000_remove),
  199. /* Power Managment Hooks */
  200. #ifdef CONFIG_PM
  201. .suspend = e1000_suspend,
  202. .resume = e1000_resume
  203. #endif
  204. };
  205. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  206. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  207. MODULE_LICENSE("GPL");
  208. MODULE_VERSION(DRV_VERSION);
  209. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  210. module_param(debug, int, 0);
  211. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  212. /**
  213. * e1000_init_module - Driver Registration Routine
  214. *
  215. * e1000_init_module is the first routine called when the driver is
  216. * loaded. All it does is register with the PCI subsystem.
  217. **/
  218. static int __init
  219. e1000_init_module(void)
  220. {
  221. int ret;
  222. printk(KERN_INFO "%s - version %s\n",
  223. e1000_driver_string, e1000_driver_version);
  224. printk(KERN_INFO "%s\n", e1000_copyright);
  225. ret = pci_module_init(&e1000_driver);
  226. return ret;
  227. }
  228. module_init(e1000_init_module);
  229. /**
  230. * e1000_exit_module - Driver Exit Cleanup Routine
  231. *
  232. * e1000_exit_module is called just before the driver is removed
  233. * from memory.
  234. **/
  235. static void __exit
  236. e1000_exit_module(void)
  237. {
  238. pci_unregister_driver(&e1000_driver);
  239. }
  240. module_exit(e1000_exit_module);
  241. /**
  242. * e1000_irq_disable - Mask off interrupt generation on the NIC
  243. * @adapter: board private structure
  244. **/
  245. static inline void
  246. e1000_irq_disable(struct e1000_adapter *adapter)
  247. {
  248. atomic_inc(&adapter->irq_sem);
  249. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  250. E1000_WRITE_FLUSH(&adapter->hw);
  251. synchronize_irq(adapter->pdev->irq);
  252. }
  253. /**
  254. * e1000_irq_enable - Enable default interrupt generation settings
  255. * @adapter: board private structure
  256. **/
  257. static inline void
  258. e1000_irq_enable(struct e1000_adapter *adapter)
  259. {
  260. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  261. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  262. E1000_WRITE_FLUSH(&adapter->hw);
  263. }
  264. }
  265. static void
  266. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  267. {
  268. struct net_device *netdev = adapter->netdev;
  269. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  270. uint16_t old_vid = adapter->mng_vlan_id;
  271. if(adapter->vlgrp) {
  272. if(!adapter->vlgrp->vlan_devices[vid]) {
  273. if(adapter->hw.mng_cookie.status &
  274. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  275. e1000_vlan_rx_add_vid(netdev, vid);
  276. adapter->mng_vlan_id = vid;
  277. } else
  278. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  279. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  280. (vid != old_vid) &&
  281. !adapter->vlgrp->vlan_devices[old_vid])
  282. e1000_vlan_rx_kill_vid(netdev, old_vid);
  283. }
  284. }
  285. }
  286. /**
  287. * e1000_release_hw_control - release control of the h/w to f/w
  288. * @adapter: address of board private structure
  289. *
  290. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  291. * For ASF and Pass Through versions of f/w this means that the
  292. * driver is no longer loaded. For AMT version (only with 82573) i
  293. * of the f/w this means that the netowrk i/f is closed.
  294. *
  295. **/
  296. static inline void
  297. e1000_release_hw_control(struct e1000_adapter *adapter)
  298. {
  299. uint32_t ctrl_ext;
  300. uint32_t swsm;
  301. /* Let firmware taken over control of h/w */
  302. switch (adapter->hw.mac_type) {
  303. case e1000_82571:
  304. case e1000_82572:
  305. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  306. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  307. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  308. break;
  309. case e1000_82573:
  310. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  311. E1000_WRITE_REG(&adapter->hw, SWSM,
  312. swsm & ~E1000_SWSM_DRV_LOAD);
  313. default:
  314. break;
  315. }
  316. }
  317. /**
  318. * e1000_get_hw_control - get control of the h/w from f/w
  319. * @adapter: address of board private structure
  320. *
  321. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  322. * For ASF and Pass Through versions of f/w this means that
  323. * the driver is loaded. For AMT version (only with 82573)
  324. * of the f/w this means that the netowrk i/f is open.
  325. *
  326. **/
  327. static inline void
  328. e1000_get_hw_control(struct e1000_adapter *adapter)
  329. {
  330. uint32_t ctrl_ext;
  331. uint32_t swsm;
  332. /* Let firmware know the driver has taken over */
  333. switch (adapter->hw.mac_type) {
  334. case e1000_82571:
  335. case e1000_82572:
  336. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  337. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  338. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  339. break;
  340. case e1000_82573:
  341. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  342. E1000_WRITE_REG(&adapter->hw, SWSM,
  343. swsm | E1000_SWSM_DRV_LOAD);
  344. break;
  345. default:
  346. break;
  347. }
  348. }
  349. int
  350. e1000_up(struct e1000_adapter *adapter)
  351. {
  352. struct net_device *netdev = adapter->netdev;
  353. int i, err;
  354. /* hardware has been reset, we need to reload some things */
  355. /* Reset the PHY if it was previously powered down */
  356. if(adapter->hw.media_type == e1000_media_type_copper) {
  357. uint16_t mii_reg;
  358. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  359. if(mii_reg & MII_CR_POWER_DOWN)
  360. e1000_phy_reset(&adapter->hw);
  361. }
  362. e1000_set_multi(netdev);
  363. e1000_restore_vlan(adapter);
  364. e1000_configure_tx(adapter);
  365. e1000_setup_rctl(adapter);
  366. e1000_configure_rx(adapter);
  367. /* call E1000_DESC_UNUSED which always leaves
  368. * at least 1 descriptor unused to make sure
  369. * next_to_use != next_to_clean */
  370. for (i = 0; i < adapter->num_rx_queues; i++) {
  371. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  372. adapter->alloc_rx_buf(adapter, ring,
  373. E1000_DESC_UNUSED(ring));
  374. }
  375. #ifdef CONFIG_PCI_MSI
  376. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  377. adapter->have_msi = TRUE;
  378. if((err = pci_enable_msi(adapter->pdev))) {
  379. DPRINTK(PROBE, ERR,
  380. "Unable to allocate MSI interrupt Error: %d\n", err);
  381. adapter->have_msi = FALSE;
  382. }
  383. }
  384. #endif
  385. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  386. SA_SHIRQ | SA_SAMPLE_RANDOM,
  387. netdev->name, netdev))) {
  388. DPRINTK(PROBE, ERR,
  389. "Unable to allocate interrupt Error: %d\n", err);
  390. return err;
  391. }
  392. #ifdef CONFIG_E1000_MQ
  393. e1000_setup_queue_mapping(adapter);
  394. #endif
  395. adapter->tx_queue_len = netdev->tx_queue_len;
  396. mod_timer(&adapter->watchdog_timer, jiffies);
  397. #ifdef CONFIG_E1000_NAPI
  398. netif_poll_enable(netdev);
  399. #endif
  400. e1000_irq_enable(adapter);
  401. return 0;
  402. }
  403. void
  404. e1000_down(struct e1000_adapter *adapter)
  405. {
  406. struct net_device *netdev = adapter->netdev;
  407. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  408. e1000_check_mng_mode(&adapter->hw);
  409. e1000_irq_disable(adapter);
  410. #ifdef CONFIG_E1000_MQ
  411. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  412. #endif
  413. free_irq(adapter->pdev->irq, netdev);
  414. #ifdef CONFIG_PCI_MSI
  415. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  416. adapter->have_msi == TRUE)
  417. pci_disable_msi(adapter->pdev);
  418. #endif
  419. del_timer_sync(&adapter->tx_fifo_stall_timer);
  420. del_timer_sync(&adapter->watchdog_timer);
  421. del_timer_sync(&adapter->phy_info_timer);
  422. #ifdef CONFIG_E1000_NAPI
  423. netif_poll_disable(netdev);
  424. #endif
  425. netdev->tx_queue_len = adapter->tx_queue_len;
  426. adapter->link_speed = 0;
  427. adapter->link_duplex = 0;
  428. netif_carrier_off(netdev);
  429. netif_stop_queue(netdev);
  430. e1000_reset(adapter);
  431. e1000_clean_all_tx_rings(adapter);
  432. e1000_clean_all_rx_rings(adapter);
  433. /* Power down the PHY so no link is implied when interface is down *
  434. * The PHY cannot be powered down if any of the following is TRUE *
  435. * (a) WoL is enabled
  436. * (b) AMT is active
  437. * (c) SoL/IDER session is active */
  438. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  439. adapter->hw.media_type == e1000_media_type_copper &&
  440. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  441. !mng_mode_enabled &&
  442. !e1000_check_phy_reset_block(&adapter->hw)) {
  443. uint16_t mii_reg;
  444. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  445. mii_reg |= MII_CR_POWER_DOWN;
  446. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  447. mdelay(1);
  448. }
  449. }
  450. void
  451. e1000_reset(struct e1000_adapter *adapter)
  452. {
  453. uint32_t pba, manc;
  454. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  455. /* Repartition Pba for greater than 9k mtu
  456. * To take effect CTRL.RST is required.
  457. */
  458. switch (adapter->hw.mac_type) {
  459. case e1000_82547:
  460. case e1000_82547_rev_2:
  461. pba = E1000_PBA_30K;
  462. break;
  463. case e1000_82571:
  464. case e1000_82572:
  465. pba = E1000_PBA_38K;
  466. break;
  467. case e1000_82573:
  468. pba = E1000_PBA_12K;
  469. break;
  470. default:
  471. pba = E1000_PBA_48K;
  472. break;
  473. }
  474. if((adapter->hw.mac_type != e1000_82573) &&
  475. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  476. pba -= 8; /* allocate more FIFO for Tx */
  477. if(adapter->hw.mac_type == e1000_82547) {
  478. adapter->tx_fifo_head = 0;
  479. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  480. adapter->tx_fifo_size =
  481. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  482. atomic_set(&adapter->tx_fifo_stall, 0);
  483. }
  484. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  485. /* flow control settings */
  486. /* Set the FC high water mark to 90% of the FIFO size.
  487. * Required to clear last 3 LSB */
  488. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  489. adapter->hw.fc_high_water = fc_high_water_mark;
  490. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  491. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  492. adapter->hw.fc_send_xon = 1;
  493. adapter->hw.fc = adapter->hw.original_fc;
  494. /* Allow time for pending master requests to run */
  495. e1000_reset_hw(&adapter->hw);
  496. if(adapter->hw.mac_type >= e1000_82544)
  497. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  498. if(e1000_init_hw(&adapter->hw))
  499. DPRINTK(PROBE, ERR, "Hardware Error\n");
  500. e1000_update_mng_vlan(adapter);
  501. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  502. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  503. e1000_reset_adaptive(&adapter->hw);
  504. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  505. if (adapter->en_mng_pt) {
  506. manc = E1000_READ_REG(&adapter->hw, MANC);
  507. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  508. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  509. }
  510. }
  511. /**
  512. * e1000_probe - Device Initialization Routine
  513. * @pdev: PCI device information struct
  514. * @ent: entry in e1000_pci_tbl
  515. *
  516. * Returns 0 on success, negative on failure
  517. *
  518. * e1000_probe initializes an adapter identified by a pci_dev structure.
  519. * The OS initialization, configuring of the adapter private structure,
  520. * and a hardware reset occur.
  521. **/
  522. static int __devinit
  523. e1000_probe(struct pci_dev *pdev,
  524. const struct pci_device_id *ent)
  525. {
  526. struct net_device *netdev;
  527. struct e1000_adapter *adapter;
  528. unsigned long mmio_start, mmio_len;
  529. static int cards_found = 0;
  530. int i, err, pci_using_dac;
  531. uint16_t eeprom_data;
  532. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  533. if((err = pci_enable_device(pdev)))
  534. return err;
  535. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  536. pci_using_dac = 1;
  537. } else {
  538. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  539. E1000_ERR("No usable DMA configuration, aborting\n");
  540. return err;
  541. }
  542. pci_using_dac = 0;
  543. }
  544. if((err = pci_request_regions(pdev, e1000_driver_name)))
  545. return err;
  546. pci_set_master(pdev);
  547. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  548. if(!netdev) {
  549. err = -ENOMEM;
  550. goto err_alloc_etherdev;
  551. }
  552. SET_MODULE_OWNER(netdev);
  553. SET_NETDEV_DEV(netdev, &pdev->dev);
  554. pci_set_drvdata(pdev, netdev);
  555. adapter = netdev_priv(netdev);
  556. adapter->netdev = netdev;
  557. adapter->pdev = pdev;
  558. adapter->hw.back = adapter;
  559. adapter->msg_enable = (1 << debug) - 1;
  560. mmio_start = pci_resource_start(pdev, BAR_0);
  561. mmio_len = pci_resource_len(pdev, BAR_0);
  562. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  563. if(!adapter->hw.hw_addr) {
  564. err = -EIO;
  565. goto err_ioremap;
  566. }
  567. for(i = BAR_1; i <= BAR_5; i++) {
  568. if(pci_resource_len(pdev, i) == 0)
  569. continue;
  570. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  571. adapter->hw.io_base = pci_resource_start(pdev, i);
  572. break;
  573. }
  574. }
  575. netdev->open = &e1000_open;
  576. netdev->stop = &e1000_close;
  577. netdev->hard_start_xmit = &e1000_xmit_frame;
  578. netdev->get_stats = &e1000_get_stats;
  579. netdev->set_multicast_list = &e1000_set_multi;
  580. netdev->set_mac_address = &e1000_set_mac;
  581. netdev->change_mtu = &e1000_change_mtu;
  582. netdev->do_ioctl = &e1000_ioctl;
  583. e1000_set_ethtool_ops(netdev);
  584. netdev->tx_timeout = &e1000_tx_timeout;
  585. netdev->watchdog_timeo = 5 * HZ;
  586. #ifdef CONFIG_E1000_NAPI
  587. netdev->poll = &e1000_clean;
  588. netdev->weight = 64;
  589. #endif
  590. netdev->vlan_rx_register = e1000_vlan_rx_register;
  591. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  592. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  593. #ifdef CONFIG_NET_POLL_CONTROLLER
  594. netdev->poll_controller = e1000_netpoll;
  595. #endif
  596. strcpy(netdev->name, pci_name(pdev));
  597. netdev->mem_start = mmio_start;
  598. netdev->mem_end = mmio_start + mmio_len;
  599. netdev->base_addr = adapter->hw.io_base;
  600. adapter->bd_number = cards_found;
  601. /* setup the private structure */
  602. if((err = e1000_sw_init(adapter)))
  603. goto err_sw_init;
  604. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  605. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  606. if(adapter->hw.mac_type >= e1000_82543) {
  607. netdev->features = NETIF_F_SG |
  608. NETIF_F_HW_CSUM |
  609. NETIF_F_HW_VLAN_TX |
  610. NETIF_F_HW_VLAN_RX |
  611. NETIF_F_HW_VLAN_FILTER;
  612. }
  613. #ifdef NETIF_F_TSO
  614. if((adapter->hw.mac_type >= e1000_82544) &&
  615. (adapter->hw.mac_type != e1000_82547))
  616. netdev->features |= NETIF_F_TSO;
  617. #ifdef NETIF_F_TSO_IPV6
  618. if(adapter->hw.mac_type > e1000_82547_rev_2)
  619. netdev->features |= NETIF_F_TSO_IPV6;
  620. #endif
  621. #endif
  622. if(pci_using_dac)
  623. netdev->features |= NETIF_F_HIGHDMA;
  624. /* hard_start_xmit is safe against parallel locking */
  625. netdev->features |= NETIF_F_LLTX;
  626. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  627. /* before reading the EEPROM, reset the controller to
  628. * put the device in a known good starting state */
  629. e1000_reset_hw(&adapter->hw);
  630. /* make sure the EEPROM is good */
  631. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  632. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  633. err = -EIO;
  634. goto err_eeprom;
  635. }
  636. /* copy the MAC address out of the EEPROM */
  637. if(e1000_read_mac_addr(&adapter->hw))
  638. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  639. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  640. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  641. if(!is_valid_ether_addr(netdev->perm_addr)) {
  642. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  643. err = -EIO;
  644. goto err_eeprom;
  645. }
  646. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  647. e1000_get_bus_info(&adapter->hw);
  648. init_timer(&adapter->tx_fifo_stall_timer);
  649. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  650. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  651. init_timer(&adapter->watchdog_timer);
  652. adapter->watchdog_timer.function = &e1000_watchdog;
  653. adapter->watchdog_timer.data = (unsigned long) adapter;
  654. INIT_WORK(&adapter->watchdog_task,
  655. (void (*)(void *))e1000_watchdog_task, adapter);
  656. init_timer(&adapter->phy_info_timer);
  657. adapter->phy_info_timer.function = &e1000_update_phy_info;
  658. adapter->phy_info_timer.data = (unsigned long) adapter;
  659. INIT_WORK(&adapter->tx_timeout_task,
  660. (void (*)(void *))e1000_tx_timeout_task, netdev);
  661. /* we're going to reset, so assume we have no link for now */
  662. netif_carrier_off(netdev);
  663. netif_stop_queue(netdev);
  664. e1000_check_options(adapter);
  665. /* Initial Wake on LAN setting
  666. * If APM wake is enabled in the EEPROM,
  667. * enable the ACPI Magic Packet filter
  668. */
  669. switch(adapter->hw.mac_type) {
  670. case e1000_82542_rev2_0:
  671. case e1000_82542_rev2_1:
  672. case e1000_82543:
  673. break;
  674. case e1000_82544:
  675. e1000_read_eeprom(&adapter->hw,
  676. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  677. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  678. break;
  679. case e1000_82546:
  680. case e1000_82546_rev_3:
  681. case e1000_82571:
  682. if(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  683. e1000_read_eeprom(&adapter->hw,
  684. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  685. break;
  686. }
  687. /* Fall Through */
  688. default:
  689. e1000_read_eeprom(&adapter->hw,
  690. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  691. break;
  692. }
  693. if(eeprom_data & eeprom_apme_mask)
  694. adapter->wol |= E1000_WUFC_MAG;
  695. /* print bus type/speed/width info */
  696. {
  697. struct e1000_hw *hw = &adapter->hw;
  698. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  699. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  700. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  701. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  702. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  703. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  704. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  705. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  706. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  707. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  708. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  709. "32-bit"));
  710. }
  711. for (i = 0; i < 6; i++)
  712. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  713. /* reset the hardware with the new settings */
  714. e1000_reset(adapter);
  715. /* If the controller is 82573 and f/w is AMT, do not set
  716. * DRV_LOAD until the interface is up. For all other cases,
  717. * let the f/w know that the h/w is now under the control
  718. * of the driver. */
  719. if (adapter->hw.mac_type != e1000_82573 ||
  720. !e1000_check_mng_mode(&adapter->hw))
  721. e1000_get_hw_control(adapter);
  722. strcpy(netdev->name, "eth%d");
  723. if((err = register_netdev(netdev)))
  724. goto err_register;
  725. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  726. cards_found++;
  727. return 0;
  728. err_register:
  729. err_sw_init:
  730. err_eeprom:
  731. iounmap(adapter->hw.hw_addr);
  732. err_ioremap:
  733. free_netdev(netdev);
  734. err_alloc_etherdev:
  735. pci_release_regions(pdev);
  736. return err;
  737. }
  738. /**
  739. * e1000_remove - Device Removal Routine
  740. * @pdev: PCI device information struct
  741. *
  742. * e1000_remove is called by the PCI subsystem to alert the driver
  743. * that it should release a PCI device. The could be caused by a
  744. * Hot-Plug event, or because the driver is going to be removed from
  745. * memory.
  746. **/
  747. static void __devexit
  748. e1000_remove(struct pci_dev *pdev)
  749. {
  750. struct net_device *netdev = pci_get_drvdata(pdev);
  751. struct e1000_adapter *adapter = netdev_priv(netdev);
  752. uint32_t manc;
  753. #ifdef CONFIG_E1000_NAPI
  754. int i;
  755. #endif
  756. flush_scheduled_work();
  757. if(adapter->hw.mac_type >= e1000_82540 &&
  758. adapter->hw.media_type == e1000_media_type_copper) {
  759. manc = E1000_READ_REG(&adapter->hw, MANC);
  760. if(manc & E1000_MANC_SMBUS_EN) {
  761. manc |= E1000_MANC_ARP_EN;
  762. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  763. }
  764. }
  765. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  766. * would have already happened in close and is redundant. */
  767. e1000_release_hw_control(adapter);
  768. unregister_netdev(netdev);
  769. #ifdef CONFIG_E1000_NAPI
  770. for (i = 0; i < adapter->num_rx_queues; i++)
  771. __dev_put(&adapter->polling_netdev[i]);
  772. #endif
  773. if(!e1000_check_phy_reset_block(&adapter->hw))
  774. e1000_phy_hw_reset(&adapter->hw);
  775. kfree(adapter->tx_ring);
  776. kfree(adapter->rx_ring);
  777. #ifdef CONFIG_E1000_NAPI
  778. kfree(adapter->polling_netdev);
  779. #endif
  780. iounmap(adapter->hw.hw_addr);
  781. pci_release_regions(pdev);
  782. #ifdef CONFIG_E1000_MQ
  783. free_percpu(adapter->cpu_netdev);
  784. free_percpu(adapter->cpu_tx_ring);
  785. #endif
  786. free_netdev(netdev);
  787. pci_disable_device(pdev);
  788. }
  789. /**
  790. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  791. * @adapter: board private structure to initialize
  792. *
  793. * e1000_sw_init initializes the Adapter private data structure.
  794. * Fields are initialized based on PCI device information and
  795. * OS network device settings (MTU size).
  796. **/
  797. static int __devinit
  798. e1000_sw_init(struct e1000_adapter *adapter)
  799. {
  800. struct e1000_hw *hw = &adapter->hw;
  801. struct net_device *netdev = adapter->netdev;
  802. struct pci_dev *pdev = adapter->pdev;
  803. #ifdef CONFIG_E1000_NAPI
  804. int i;
  805. #endif
  806. /* PCI config space info */
  807. hw->vendor_id = pdev->vendor;
  808. hw->device_id = pdev->device;
  809. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  810. hw->subsystem_id = pdev->subsystem_device;
  811. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  812. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  813. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  814. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  815. hw->max_frame_size = netdev->mtu +
  816. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  817. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  818. /* identify the MAC */
  819. if(e1000_set_mac_type(hw)) {
  820. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  821. return -EIO;
  822. }
  823. /* initialize eeprom parameters */
  824. if(e1000_init_eeprom_params(hw)) {
  825. E1000_ERR("EEPROM initialization failed\n");
  826. return -EIO;
  827. }
  828. switch(hw->mac_type) {
  829. default:
  830. break;
  831. case e1000_82541:
  832. case e1000_82547:
  833. case e1000_82541_rev_2:
  834. case e1000_82547_rev_2:
  835. hw->phy_init_script = 1;
  836. break;
  837. }
  838. e1000_set_media_type(hw);
  839. hw->wait_autoneg_complete = FALSE;
  840. hw->tbi_compatibility_en = TRUE;
  841. hw->adaptive_ifs = TRUE;
  842. /* Copper options */
  843. if(hw->media_type == e1000_media_type_copper) {
  844. hw->mdix = AUTO_ALL_MODES;
  845. hw->disable_polarity_correction = FALSE;
  846. hw->master_slave = E1000_MASTER_SLAVE;
  847. }
  848. #ifdef CONFIG_E1000_MQ
  849. /* Number of supported queues */
  850. switch (hw->mac_type) {
  851. case e1000_82571:
  852. case e1000_82572:
  853. /* These controllers support 2 tx queues, but with a single
  854. * qdisc implementation, multiple tx queues aren't quite as
  855. * interesting. If we can find a logical way of mapping
  856. * flows to a queue, then perhaps we can up the num_tx_queue
  857. * count back to its default. Until then, we run the risk of
  858. * terrible performance due to SACK overload. */
  859. adapter->num_tx_queues = 1;
  860. adapter->num_rx_queues = 2;
  861. break;
  862. default:
  863. adapter->num_tx_queues = 1;
  864. adapter->num_rx_queues = 1;
  865. break;
  866. }
  867. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  868. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  869. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  870. adapter->num_rx_queues,
  871. ((adapter->num_rx_queues == 1)
  872. ? ((num_online_cpus() > 1)
  873. ? "(due to unsupported feature in current adapter)"
  874. : "(due to unsupported system configuration)")
  875. : ""));
  876. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  877. adapter->num_tx_queues);
  878. #else
  879. adapter->num_tx_queues = 1;
  880. adapter->num_rx_queues = 1;
  881. #endif
  882. if (e1000_alloc_queues(adapter)) {
  883. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  884. return -ENOMEM;
  885. }
  886. #ifdef CONFIG_E1000_NAPI
  887. for (i = 0; i < adapter->num_rx_queues; i++) {
  888. adapter->polling_netdev[i].priv = adapter;
  889. adapter->polling_netdev[i].poll = &e1000_clean;
  890. adapter->polling_netdev[i].weight = 64;
  891. dev_hold(&adapter->polling_netdev[i]);
  892. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  893. }
  894. spin_lock_init(&adapter->tx_queue_lock);
  895. #endif
  896. atomic_set(&adapter->irq_sem, 1);
  897. spin_lock_init(&adapter->stats_lock);
  898. return 0;
  899. }
  900. /**
  901. * e1000_alloc_queues - Allocate memory for all rings
  902. * @adapter: board private structure to initialize
  903. *
  904. * We allocate one ring per queue at run-time since we don't know the
  905. * number of queues at compile-time. The polling_netdev array is
  906. * intended for Multiqueue, but should work fine with a single queue.
  907. **/
  908. static int __devinit
  909. e1000_alloc_queues(struct e1000_adapter *adapter)
  910. {
  911. int size;
  912. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  913. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  914. if (!adapter->tx_ring)
  915. return -ENOMEM;
  916. memset(adapter->tx_ring, 0, size);
  917. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  918. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  919. if (!adapter->rx_ring) {
  920. kfree(adapter->tx_ring);
  921. return -ENOMEM;
  922. }
  923. memset(adapter->rx_ring, 0, size);
  924. #ifdef CONFIG_E1000_NAPI
  925. size = sizeof(struct net_device) * adapter->num_rx_queues;
  926. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  927. if (!adapter->polling_netdev) {
  928. kfree(adapter->tx_ring);
  929. kfree(adapter->rx_ring);
  930. return -ENOMEM;
  931. }
  932. memset(adapter->polling_netdev, 0, size);
  933. #endif
  934. #ifdef CONFIG_E1000_MQ
  935. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  936. adapter->rx_sched_call_data.info = adapter->netdev;
  937. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  938. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  939. #endif
  940. return E1000_SUCCESS;
  941. }
  942. #ifdef CONFIG_E1000_MQ
  943. static void __devinit
  944. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  945. {
  946. int i, cpu;
  947. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  948. adapter->rx_sched_call_data.info = adapter->netdev;
  949. cpus_clear(adapter->rx_sched_call_data.cpumask);
  950. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  951. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  952. lock_cpu_hotplug();
  953. i = 0;
  954. for_each_online_cpu(cpu) {
  955. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  956. /* This is incomplete because we'd like to assign separate
  957. * physical cpus to these netdev polling structures and
  958. * avoid saturating a subset of cpus.
  959. */
  960. if (i < adapter->num_rx_queues) {
  961. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  962. adapter->rx_ring[i].cpu = cpu;
  963. cpu_set(cpu, adapter->cpumask);
  964. } else
  965. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  966. i++;
  967. }
  968. unlock_cpu_hotplug();
  969. }
  970. #endif
  971. /**
  972. * e1000_open - Called when a network interface is made active
  973. * @netdev: network interface device structure
  974. *
  975. * Returns 0 on success, negative value on failure
  976. *
  977. * The open entry point is called when a network interface is made
  978. * active by the system (IFF_UP). At this point all resources needed
  979. * for transmit and receive operations are allocated, the interrupt
  980. * handler is registered with the OS, the watchdog timer is started,
  981. * and the stack is notified that the interface is ready.
  982. **/
  983. static int
  984. e1000_open(struct net_device *netdev)
  985. {
  986. struct e1000_adapter *adapter = netdev_priv(netdev);
  987. int err;
  988. /* allocate transmit descriptors */
  989. if ((err = e1000_setup_all_tx_resources(adapter)))
  990. goto err_setup_tx;
  991. /* allocate receive descriptors */
  992. if ((err = e1000_setup_all_rx_resources(adapter)))
  993. goto err_setup_rx;
  994. if((err = e1000_up(adapter)))
  995. goto err_up;
  996. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  997. if((adapter->hw.mng_cookie.status &
  998. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  999. e1000_update_mng_vlan(adapter);
  1000. }
  1001. /* If AMT is enabled, let the firmware know that the network
  1002. * interface is now open */
  1003. if (adapter->hw.mac_type == e1000_82573 &&
  1004. e1000_check_mng_mode(&adapter->hw))
  1005. e1000_get_hw_control(adapter);
  1006. return E1000_SUCCESS;
  1007. err_up:
  1008. e1000_free_all_rx_resources(adapter);
  1009. err_setup_rx:
  1010. e1000_free_all_tx_resources(adapter);
  1011. err_setup_tx:
  1012. e1000_reset(adapter);
  1013. return err;
  1014. }
  1015. /**
  1016. * e1000_close - Disables a network interface
  1017. * @netdev: network interface device structure
  1018. *
  1019. * Returns 0, this is not allowed to fail
  1020. *
  1021. * The close entry point is called when an interface is de-activated
  1022. * by the OS. The hardware is still under the drivers control, but
  1023. * needs to be disabled. A global MAC reset is issued to stop the
  1024. * hardware, and all transmit and receive resources are freed.
  1025. **/
  1026. static int
  1027. e1000_close(struct net_device *netdev)
  1028. {
  1029. struct e1000_adapter *adapter = netdev_priv(netdev);
  1030. e1000_down(adapter);
  1031. e1000_free_all_tx_resources(adapter);
  1032. e1000_free_all_rx_resources(adapter);
  1033. if((adapter->hw.mng_cookie.status &
  1034. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1035. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1036. }
  1037. /* If AMT is enabled, let the firmware know that the network
  1038. * interface is now closed */
  1039. if (adapter->hw.mac_type == e1000_82573 &&
  1040. e1000_check_mng_mode(&adapter->hw))
  1041. e1000_release_hw_control(adapter);
  1042. return 0;
  1043. }
  1044. /**
  1045. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1046. * @adapter: address of board private structure
  1047. * @start: address of beginning of memory
  1048. * @len: length of memory
  1049. **/
  1050. static inline boolean_t
  1051. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1052. void *start, unsigned long len)
  1053. {
  1054. unsigned long begin = (unsigned long) start;
  1055. unsigned long end = begin + len;
  1056. /* First rev 82545 and 82546 need to not allow any memory
  1057. * write location to cross 64k boundary due to errata 23 */
  1058. if (adapter->hw.mac_type == e1000_82545 ||
  1059. adapter->hw.mac_type == e1000_82546) {
  1060. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1061. }
  1062. return TRUE;
  1063. }
  1064. /**
  1065. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1066. * @adapter: board private structure
  1067. * @txdr: tx descriptor ring (for a specific queue) to setup
  1068. *
  1069. * Return 0 on success, negative on failure
  1070. **/
  1071. static int
  1072. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1073. struct e1000_tx_ring *txdr)
  1074. {
  1075. struct pci_dev *pdev = adapter->pdev;
  1076. int size;
  1077. size = sizeof(struct e1000_buffer) * txdr->count;
  1078. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1079. if(!txdr->buffer_info) {
  1080. DPRINTK(PROBE, ERR,
  1081. "Unable to allocate memory for the transmit descriptor ring\n");
  1082. return -ENOMEM;
  1083. }
  1084. memset(txdr->buffer_info, 0, size);
  1085. /* round up to nearest 4K */
  1086. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1087. E1000_ROUNDUP(txdr->size, 4096);
  1088. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1089. if(!txdr->desc) {
  1090. setup_tx_desc_die:
  1091. vfree(txdr->buffer_info);
  1092. DPRINTK(PROBE, ERR,
  1093. "Unable to allocate memory for the transmit descriptor ring\n");
  1094. return -ENOMEM;
  1095. }
  1096. /* Fix for errata 23, can't cross 64kB boundary */
  1097. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1098. void *olddesc = txdr->desc;
  1099. dma_addr_t olddma = txdr->dma;
  1100. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1101. "at %p\n", txdr->size, txdr->desc);
  1102. /* Try again, without freeing the previous */
  1103. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1104. if(!txdr->desc) {
  1105. /* Failed allocation, critical failure */
  1106. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1107. goto setup_tx_desc_die;
  1108. }
  1109. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1110. /* give up */
  1111. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1112. txdr->dma);
  1113. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1114. DPRINTK(PROBE, ERR,
  1115. "Unable to allocate aligned memory "
  1116. "for the transmit descriptor ring\n");
  1117. vfree(txdr->buffer_info);
  1118. return -ENOMEM;
  1119. } else {
  1120. /* Free old allocation, new allocation was successful */
  1121. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1122. }
  1123. }
  1124. memset(txdr->desc, 0, txdr->size);
  1125. txdr->next_to_use = 0;
  1126. txdr->next_to_clean = 0;
  1127. spin_lock_init(&txdr->tx_lock);
  1128. return 0;
  1129. }
  1130. /**
  1131. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1132. * (Descriptors) for all queues
  1133. * @adapter: board private structure
  1134. *
  1135. * If this function returns with an error, then it's possible one or
  1136. * more of the rings is populated (while the rest are not). It is the
  1137. * callers duty to clean those orphaned rings.
  1138. *
  1139. * Return 0 on success, negative on failure
  1140. **/
  1141. int
  1142. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1143. {
  1144. int i, err = 0;
  1145. for (i = 0; i < adapter->num_tx_queues; i++) {
  1146. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1147. if (err) {
  1148. DPRINTK(PROBE, ERR,
  1149. "Allocation for Tx Queue %u failed\n", i);
  1150. break;
  1151. }
  1152. }
  1153. return err;
  1154. }
  1155. /**
  1156. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1157. * @adapter: board private structure
  1158. *
  1159. * Configure the Tx unit of the MAC after a reset.
  1160. **/
  1161. static void
  1162. e1000_configure_tx(struct e1000_adapter *adapter)
  1163. {
  1164. uint64_t tdba;
  1165. struct e1000_hw *hw = &adapter->hw;
  1166. uint32_t tdlen, tctl, tipg, tarc;
  1167. uint32_t ipgr1, ipgr2;
  1168. /* Setup the HW Tx Head and Tail descriptor pointers */
  1169. switch (adapter->num_tx_queues) {
  1170. case 2:
  1171. tdba = adapter->tx_ring[1].dma;
  1172. tdlen = adapter->tx_ring[1].count *
  1173. sizeof(struct e1000_tx_desc);
  1174. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1175. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1176. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1177. E1000_WRITE_REG(hw, TDH1, 0);
  1178. E1000_WRITE_REG(hw, TDT1, 0);
  1179. adapter->tx_ring[1].tdh = E1000_TDH1;
  1180. adapter->tx_ring[1].tdt = E1000_TDT1;
  1181. /* Fall Through */
  1182. case 1:
  1183. default:
  1184. tdba = adapter->tx_ring[0].dma;
  1185. tdlen = adapter->tx_ring[0].count *
  1186. sizeof(struct e1000_tx_desc);
  1187. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1188. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1189. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1190. E1000_WRITE_REG(hw, TDH, 0);
  1191. E1000_WRITE_REG(hw, TDT, 0);
  1192. adapter->tx_ring[0].tdh = E1000_TDH;
  1193. adapter->tx_ring[0].tdt = E1000_TDT;
  1194. break;
  1195. }
  1196. /* Set the default values for the Tx Inter Packet Gap timer */
  1197. if (hw->media_type == e1000_media_type_fiber ||
  1198. hw->media_type == e1000_media_type_internal_serdes)
  1199. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1200. else
  1201. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1202. switch (hw->mac_type) {
  1203. case e1000_82542_rev2_0:
  1204. case e1000_82542_rev2_1:
  1205. tipg = DEFAULT_82542_TIPG_IPGT;
  1206. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1207. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1208. break;
  1209. default:
  1210. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1211. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1212. break;
  1213. }
  1214. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1215. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1216. E1000_WRITE_REG(hw, TIPG, tipg);
  1217. /* Set the Tx Interrupt Delay register */
  1218. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1219. if (hw->mac_type >= e1000_82540)
  1220. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1221. /* Program the Transmit Control Register */
  1222. tctl = E1000_READ_REG(hw, TCTL);
  1223. tctl &= ~E1000_TCTL_CT;
  1224. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1225. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1226. E1000_WRITE_REG(hw, TCTL, tctl);
  1227. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1228. tarc = E1000_READ_REG(hw, TARC0);
  1229. tarc |= ((1 << 25) | (1 << 21));
  1230. E1000_WRITE_REG(hw, TARC0, tarc);
  1231. tarc = E1000_READ_REG(hw, TARC1);
  1232. tarc |= (1 << 25);
  1233. if (tctl & E1000_TCTL_MULR)
  1234. tarc &= ~(1 << 28);
  1235. else
  1236. tarc |= (1 << 28);
  1237. E1000_WRITE_REG(hw, TARC1, tarc);
  1238. }
  1239. e1000_config_collision_dist(hw);
  1240. /* Setup Transmit Descriptor Settings for eop descriptor */
  1241. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1242. E1000_TXD_CMD_IFCS;
  1243. if (hw->mac_type < e1000_82543)
  1244. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1245. else
  1246. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1247. /* Cache if we're 82544 running in PCI-X because we'll
  1248. * need this to apply a workaround later in the send path. */
  1249. if (hw->mac_type == e1000_82544 &&
  1250. hw->bus_type == e1000_bus_type_pcix)
  1251. adapter->pcix_82544 = 1;
  1252. }
  1253. /**
  1254. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1255. * @adapter: board private structure
  1256. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1257. *
  1258. * Returns 0 on success, negative on failure
  1259. **/
  1260. static int
  1261. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1262. struct e1000_rx_ring *rxdr)
  1263. {
  1264. struct pci_dev *pdev = adapter->pdev;
  1265. int size, desc_len;
  1266. size = sizeof(struct e1000_buffer) * rxdr->count;
  1267. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1268. if (!rxdr->buffer_info) {
  1269. DPRINTK(PROBE, ERR,
  1270. "Unable to allocate memory for the receive descriptor ring\n");
  1271. return -ENOMEM;
  1272. }
  1273. memset(rxdr->buffer_info, 0, size);
  1274. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1275. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1276. if(!rxdr->ps_page) {
  1277. vfree(rxdr->buffer_info);
  1278. DPRINTK(PROBE, ERR,
  1279. "Unable to allocate memory for the receive descriptor ring\n");
  1280. return -ENOMEM;
  1281. }
  1282. memset(rxdr->ps_page, 0, size);
  1283. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1284. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1285. if(!rxdr->ps_page_dma) {
  1286. vfree(rxdr->buffer_info);
  1287. kfree(rxdr->ps_page);
  1288. DPRINTK(PROBE, ERR,
  1289. "Unable to allocate memory for the receive descriptor ring\n");
  1290. return -ENOMEM;
  1291. }
  1292. memset(rxdr->ps_page_dma, 0, size);
  1293. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1294. desc_len = sizeof(struct e1000_rx_desc);
  1295. else
  1296. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1297. /* Round up to nearest 4K */
  1298. rxdr->size = rxdr->count * desc_len;
  1299. E1000_ROUNDUP(rxdr->size, 4096);
  1300. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1301. if (!rxdr->desc) {
  1302. DPRINTK(PROBE, ERR,
  1303. "Unable to allocate memory for the receive descriptor ring\n");
  1304. setup_rx_desc_die:
  1305. vfree(rxdr->buffer_info);
  1306. kfree(rxdr->ps_page);
  1307. kfree(rxdr->ps_page_dma);
  1308. return -ENOMEM;
  1309. }
  1310. /* Fix for errata 23, can't cross 64kB boundary */
  1311. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1312. void *olddesc = rxdr->desc;
  1313. dma_addr_t olddma = rxdr->dma;
  1314. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1315. "at %p\n", rxdr->size, rxdr->desc);
  1316. /* Try again, without freeing the previous */
  1317. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1318. /* Failed allocation, critical failure */
  1319. if (!rxdr->desc) {
  1320. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1321. DPRINTK(PROBE, ERR,
  1322. "Unable to allocate memory "
  1323. "for the receive descriptor ring\n");
  1324. goto setup_rx_desc_die;
  1325. }
  1326. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1327. /* give up */
  1328. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1329. rxdr->dma);
  1330. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1331. DPRINTK(PROBE, ERR,
  1332. "Unable to allocate aligned memory "
  1333. "for the receive descriptor ring\n");
  1334. goto setup_rx_desc_die;
  1335. } else {
  1336. /* Free old allocation, new allocation was successful */
  1337. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1338. }
  1339. }
  1340. memset(rxdr->desc, 0, rxdr->size);
  1341. rxdr->next_to_clean = 0;
  1342. rxdr->next_to_use = 0;
  1343. rxdr->rx_skb_top = NULL;
  1344. rxdr->rx_skb_prev = NULL;
  1345. return 0;
  1346. }
  1347. /**
  1348. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1349. * (Descriptors) for all queues
  1350. * @adapter: board private structure
  1351. *
  1352. * If this function returns with an error, then it's possible one or
  1353. * more of the rings is populated (while the rest are not). It is the
  1354. * callers duty to clean those orphaned rings.
  1355. *
  1356. * Return 0 on success, negative on failure
  1357. **/
  1358. int
  1359. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1360. {
  1361. int i, err = 0;
  1362. for (i = 0; i < adapter->num_rx_queues; i++) {
  1363. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1364. if (err) {
  1365. DPRINTK(PROBE, ERR,
  1366. "Allocation for Rx Queue %u failed\n", i);
  1367. break;
  1368. }
  1369. }
  1370. return err;
  1371. }
  1372. /**
  1373. * e1000_setup_rctl - configure the receive control registers
  1374. * @adapter: Board private structure
  1375. **/
  1376. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1377. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1378. static void
  1379. e1000_setup_rctl(struct e1000_adapter *adapter)
  1380. {
  1381. uint32_t rctl, rfctl;
  1382. uint32_t psrctl = 0;
  1383. #ifdef CONFIG_E1000_PACKET_SPLIT
  1384. uint32_t pages = 0;
  1385. #endif
  1386. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1387. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1388. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1389. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1390. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1391. if (adapter->hw.mac_type > e1000_82543)
  1392. rctl |= E1000_RCTL_SECRC;
  1393. if (adapter->hw.tbi_compatibility_on == 1)
  1394. rctl |= E1000_RCTL_SBP;
  1395. else
  1396. rctl &= ~E1000_RCTL_SBP;
  1397. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1398. rctl &= ~E1000_RCTL_LPE;
  1399. else
  1400. rctl |= E1000_RCTL_LPE;
  1401. /* Setup buffer sizes */
  1402. if(adapter->hw.mac_type >= e1000_82571) {
  1403. /* We can now specify buffers in 1K increments.
  1404. * BSIZE and BSEX are ignored in this case. */
  1405. rctl |= adapter->rx_buffer_len << 0x11;
  1406. } else {
  1407. rctl &= ~E1000_RCTL_SZ_4096;
  1408. rctl |= E1000_RCTL_BSEX;
  1409. switch (adapter->rx_buffer_len) {
  1410. case E1000_RXBUFFER_2048:
  1411. default:
  1412. rctl |= E1000_RCTL_SZ_2048;
  1413. rctl &= ~E1000_RCTL_BSEX;
  1414. break;
  1415. case E1000_RXBUFFER_4096:
  1416. rctl |= E1000_RCTL_SZ_4096;
  1417. break;
  1418. case E1000_RXBUFFER_8192:
  1419. rctl |= E1000_RCTL_SZ_8192;
  1420. break;
  1421. case E1000_RXBUFFER_16384:
  1422. rctl |= E1000_RCTL_SZ_16384;
  1423. break;
  1424. }
  1425. }
  1426. #ifdef CONFIG_E1000_PACKET_SPLIT
  1427. /* 82571 and greater support packet-split where the protocol
  1428. * header is placed in skb->data and the packet data is
  1429. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1430. * In the case of a non-split, skb->data is linearly filled,
  1431. * followed by the page buffers. Therefore, skb->data is
  1432. * sized to hold the largest protocol header.
  1433. */
  1434. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1435. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1436. PAGE_SIZE <= 16384)
  1437. adapter->rx_ps_pages = pages;
  1438. else
  1439. adapter->rx_ps_pages = 0;
  1440. #endif
  1441. if (adapter->rx_ps_pages) {
  1442. /* Configure extra packet-split registers */
  1443. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1444. rfctl |= E1000_RFCTL_EXTEN;
  1445. /* disable IPv6 packet split support */
  1446. rfctl |= E1000_RFCTL_IPV6_DIS;
  1447. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1448. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1449. psrctl |= adapter->rx_ps_bsize0 >>
  1450. E1000_PSRCTL_BSIZE0_SHIFT;
  1451. switch (adapter->rx_ps_pages) {
  1452. case 3:
  1453. psrctl |= PAGE_SIZE <<
  1454. E1000_PSRCTL_BSIZE3_SHIFT;
  1455. case 2:
  1456. psrctl |= PAGE_SIZE <<
  1457. E1000_PSRCTL_BSIZE2_SHIFT;
  1458. case 1:
  1459. psrctl |= PAGE_SIZE >>
  1460. E1000_PSRCTL_BSIZE1_SHIFT;
  1461. break;
  1462. }
  1463. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1464. }
  1465. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1466. }
  1467. /**
  1468. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1469. * @adapter: board private structure
  1470. *
  1471. * Configure the Rx unit of the MAC after a reset.
  1472. **/
  1473. static void
  1474. e1000_configure_rx(struct e1000_adapter *adapter)
  1475. {
  1476. uint64_t rdba;
  1477. struct e1000_hw *hw = &adapter->hw;
  1478. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1479. #ifdef CONFIG_E1000_MQ
  1480. uint32_t reta, mrqc;
  1481. int i;
  1482. #endif
  1483. if (adapter->rx_ps_pages) {
  1484. rdlen = adapter->rx_ring[0].count *
  1485. sizeof(union e1000_rx_desc_packet_split);
  1486. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1487. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1488. } else {
  1489. rdlen = adapter->rx_ring[0].count *
  1490. sizeof(struct e1000_rx_desc);
  1491. adapter->clean_rx = e1000_clean_rx_irq;
  1492. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1493. }
  1494. /* disable receives while setting up the descriptors */
  1495. rctl = E1000_READ_REG(hw, RCTL);
  1496. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1497. /* set the Receive Delay Timer Register */
  1498. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1499. if (hw->mac_type >= e1000_82540) {
  1500. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1501. if(adapter->itr > 1)
  1502. E1000_WRITE_REG(hw, ITR,
  1503. 1000000000 / (adapter->itr * 256));
  1504. }
  1505. if (hw->mac_type >= e1000_82571) {
  1506. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1507. /* Reset delay timers after every interrupt */
  1508. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1509. #ifdef CONFIG_E1000_NAPI
  1510. /* Auto-Mask interrupts upon ICR read. */
  1511. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1512. #endif
  1513. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1514. E1000_WRITE_REG(hw, IAM, ~0);
  1515. E1000_WRITE_FLUSH(hw);
  1516. }
  1517. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1518. * the Base and Length of the Rx Descriptor Ring */
  1519. switch (adapter->num_rx_queues) {
  1520. #ifdef CONFIG_E1000_MQ
  1521. case 2:
  1522. rdba = adapter->rx_ring[1].dma;
  1523. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1524. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1525. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1526. E1000_WRITE_REG(hw, RDH1, 0);
  1527. E1000_WRITE_REG(hw, RDT1, 0);
  1528. adapter->rx_ring[1].rdh = E1000_RDH1;
  1529. adapter->rx_ring[1].rdt = E1000_RDT1;
  1530. /* Fall Through */
  1531. #endif
  1532. case 1:
  1533. default:
  1534. rdba = adapter->rx_ring[0].dma;
  1535. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1536. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1537. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1538. E1000_WRITE_REG(hw, RDH, 0);
  1539. E1000_WRITE_REG(hw, RDT, 0);
  1540. adapter->rx_ring[0].rdh = E1000_RDH;
  1541. adapter->rx_ring[0].rdt = E1000_RDT;
  1542. break;
  1543. }
  1544. #ifdef CONFIG_E1000_MQ
  1545. if (adapter->num_rx_queues > 1) {
  1546. uint32_t random[10];
  1547. get_random_bytes(&random[0], 40);
  1548. if (hw->mac_type <= e1000_82572) {
  1549. E1000_WRITE_REG(hw, RSSIR, 0);
  1550. E1000_WRITE_REG(hw, RSSIM, 0);
  1551. }
  1552. switch (adapter->num_rx_queues) {
  1553. case 2:
  1554. default:
  1555. reta = 0x00800080;
  1556. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1557. break;
  1558. }
  1559. /* Fill out redirection table */
  1560. for (i = 0; i < 32; i++)
  1561. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1562. /* Fill out hash function seeds */
  1563. for (i = 0; i < 10; i++)
  1564. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1565. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1566. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1567. E1000_WRITE_REG(hw, MRQC, mrqc);
  1568. }
  1569. /* Multiqueue and packet checksumming are mutually exclusive. */
  1570. if (hw->mac_type >= e1000_82571) {
  1571. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1572. rxcsum |= E1000_RXCSUM_PCSD;
  1573. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1574. }
  1575. #else
  1576. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1577. if (hw->mac_type >= e1000_82543) {
  1578. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1579. if(adapter->rx_csum == TRUE) {
  1580. rxcsum |= E1000_RXCSUM_TUOFL;
  1581. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1582. * Must be used in conjunction with packet-split. */
  1583. if ((hw->mac_type >= e1000_82571) &&
  1584. (adapter->rx_ps_pages)) {
  1585. rxcsum |= E1000_RXCSUM_IPPCSE;
  1586. }
  1587. } else {
  1588. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1589. /* don't need to clear IPPCSE as it defaults to 0 */
  1590. }
  1591. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1592. }
  1593. #endif /* CONFIG_E1000_MQ */
  1594. if (hw->mac_type == e1000_82573)
  1595. E1000_WRITE_REG(hw, ERT, 0x0100);
  1596. /* Enable Receives */
  1597. E1000_WRITE_REG(hw, RCTL, rctl);
  1598. }
  1599. /**
  1600. * e1000_free_tx_resources - Free Tx Resources per Queue
  1601. * @adapter: board private structure
  1602. * @tx_ring: Tx descriptor ring for a specific queue
  1603. *
  1604. * Free all transmit software resources
  1605. **/
  1606. static void
  1607. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1608. struct e1000_tx_ring *tx_ring)
  1609. {
  1610. struct pci_dev *pdev = adapter->pdev;
  1611. e1000_clean_tx_ring(adapter, tx_ring);
  1612. vfree(tx_ring->buffer_info);
  1613. tx_ring->buffer_info = NULL;
  1614. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1615. tx_ring->desc = NULL;
  1616. }
  1617. /**
  1618. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1619. * @adapter: board private structure
  1620. *
  1621. * Free all transmit software resources
  1622. **/
  1623. void
  1624. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1625. {
  1626. int i;
  1627. for (i = 0; i < adapter->num_tx_queues; i++)
  1628. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1629. }
  1630. static inline void
  1631. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1632. struct e1000_buffer *buffer_info)
  1633. {
  1634. if(buffer_info->dma) {
  1635. pci_unmap_page(adapter->pdev,
  1636. buffer_info->dma,
  1637. buffer_info->length,
  1638. PCI_DMA_TODEVICE);
  1639. buffer_info->dma = 0;
  1640. }
  1641. if(buffer_info->skb) {
  1642. dev_kfree_skb_any(buffer_info->skb);
  1643. buffer_info->skb = NULL;
  1644. }
  1645. }
  1646. /**
  1647. * e1000_clean_tx_ring - Free Tx Buffers
  1648. * @adapter: board private structure
  1649. * @tx_ring: ring to be cleaned
  1650. **/
  1651. static void
  1652. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1653. struct e1000_tx_ring *tx_ring)
  1654. {
  1655. struct e1000_buffer *buffer_info;
  1656. unsigned long size;
  1657. unsigned int i;
  1658. /* Free all the Tx ring sk_buffs */
  1659. for(i = 0; i < tx_ring->count; i++) {
  1660. buffer_info = &tx_ring->buffer_info[i];
  1661. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1662. }
  1663. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1664. memset(tx_ring->buffer_info, 0, size);
  1665. /* Zero out the descriptor ring */
  1666. memset(tx_ring->desc, 0, tx_ring->size);
  1667. tx_ring->next_to_use = 0;
  1668. tx_ring->next_to_clean = 0;
  1669. tx_ring->last_tx_tso = 0;
  1670. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1671. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1672. }
  1673. /**
  1674. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1675. * @adapter: board private structure
  1676. **/
  1677. static void
  1678. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1679. {
  1680. int i;
  1681. for (i = 0; i < adapter->num_tx_queues; i++)
  1682. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1683. }
  1684. /**
  1685. * e1000_free_rx_resources - Free Rx Resources
  1686. * @adapter: board private structure
  1687. * @rx_ring: ring to clean the resources from
  1688. *
  1689. * Free all receive software resources
  1690. **/
  1691. static void
  1692. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1693. struct e1000_rx_ring *rx_ring)
  1694. {
  1695. struct pci_dev *pdev = adapter->pdev;
  1696. e1000_clean_rx_ring(adapter, rx_ring);
  1697. vfree(rx_ring->buffer_info);
  1698. rx_ring->buffer_info = NULL;
  1699. kfree(rx_ring->ps_page);
  1700. rx_ring->ps_page = NULL;
  1701. kfree(rx_ring->ps_page_dma);
  1702. rx_ring->ps_page_dma = NULL;
  1703. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1704. rx_ring->desc = NULL;
  1705. }
  1706. /**
  1707. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1708. * @adapter: board private structure
  1709. *
  1710. * Free all receive software resources
  1711. **/
  1712. void
  1713. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1714. {
  1715. int i;
  1716. for (i = 0; i < adapter->num_rx_queues; i++)
  1717. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1718. }
  1719. /**
  1720. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1721. * @adapter: board private structure
  1722. * @rx_ring: ring to free buffers from
  1723. **/
  1724. static void
  1725. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1726. struct e1000_rx_ring *rx_ring)
  1727. {
  1728. struct e1000_buffer *buffer_info;
  1729. struct e1000_ps_page *ps_page;
  1730. struct e1000_ps_page_dma *ps_page_dma;
  1731. struct pci_dev *pdev = adapter->pdev;
  1732. unsigned long size;
  1733. unsigned int i, j;
  1734. /* Free all the Rx ring sk_buffs */
  1735. for(i = 0; i < rx_ring->count; i++) {
  1736. buffer_info = &rx_ring->buffer_info[i];
  1737. if(buffer_info->skb) {
  1738. ps_page = &rx_ring->ps_page[i];
  1739. ps_page_dma = &rx_ring->ps_page_dma[i];
  1740. pci_unmap_single(pdev,
  1741. buffer_info->dma,
  1742. buffer_info->length,
  1743. PCI_DMA_FROMDEVICE);
  1744. dev_kfree_skb(buffer_info->skb);
  1745. buffer_info->skb = NULL;
  1746. }
  1747. ps_page = &rx_ring->ps_page[i];
  1748. ps_page_dma = &rx_ring->ps_page_dma[i];
  1749. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1750. if (!ps_page->ps_page[j]) break;
  1751. pci_unmap_page(pdev,
  1752. ps_page_dma->ps_page_dma[j],
  1753. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1754. ps_page_dma->ps_page_dma[j] = 0;
  1755. put_page(ps_page->ps_page[j]);
  1756. ps_page->ps_page[j] = NULL;
  1757. }
  1758. }
  1759. /* there also may be some cached data in our adapter */
  1760. if (rx_ring->rx_skb_top) {
  1761. dev_kfree_skb(rx_ring->rx_skb_top);
  1762. /* rx_skb_prev will be wiped out by rx_skb_top */
  1763. rx_ring->rx_skb_top = NULL;
  1764. rx_ring->rx_skb_prev = NULL;
  1765. }
  1766. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1767. memset(rx_ring->buffer_info, 0, size);
  1768. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1769. memset(rx_ring->ps_page, 0, size);
  1770. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1771. memset(rx_ring->ps_page_dma, 0, size);
  1772. /* Zero out the descriptor ring */
  1773. memset(rx_ring->desc, 0, rx_ring->size);
  1774. rx_ring->next_to_clean = 0;
  1775. rx_ring->next_to_use = 0;
  1776. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1777. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1778. }
  1779. /**
  1780. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1781. * @adapter: board private structure
  1782. **/
  1783. static void
  1784. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1785. {
  1786. int i;
  1787. for (i = 0; i < adapter->num_rx_queues; i++)
  1788. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1789. }
  1790. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1791. * and memory write and invalidate disabled for certain operations
  1792. */
  1793. static void
  1794. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1795. {
  1796. struct net_device *netdev = adapter->netdev;
  1797. uint32_t rctl;
  1798. e1000_pci_clear_mwi(&adapter->hw);
  1799. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1800. rctl |= E1000_RCTL_RST;
  1801. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1802. E1000_WRITE_FLUSH(&adapter->hw);
  1803. mdelay(5);
  1804. if(netif_running(netdev))
  1805. e1000_clean_all_rx_rings(adapter);
  1806. }
  1807. static void
  1808. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1809. {
  1810. struct net_device *netdev = adapter->netdev;
  1811. uint32_t rctl;
  1812. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1813. rctl &= ~E1000_RCTL_RST;
  1814. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1815. E1000_WRITE_FLUSH(&adapter->hw);
  1816. mdelay(5);
  1817. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1818. e1000_pci_set_mwi(&adapter->hw);
  1819. if(netif_running(netdev)) {
  1820. e1000_configure_rx(adapter);
  1821. /* No need to loop, because 82542 supports only 1 queue */
  1822. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1823. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1824. }
  1825. }
  1826. /**
  1827. * e1000_set_mac - Change the Ethernet Address of the NIC
  1828. * @netdev: network interface device structure
  1829. * @p: pointer to an address structure
  1830. *
  1831. * Returns 0 on success, negative on failure
  1832. **/
  1833. static int
  1834. e1000_set_mac(struct net_device *netdev, void *p)
  1835. {
  1836. struct e1000_adapter *adapter = netdev_priv(netdev);
  1837. struct sockaddr *addr = p;
  1838. if(!is_valid_ether_addr(addr->sa_data))
  1839. return -EADDRNOTAVAIL;
  1840. /* 82542 2.0 needs to be in reset to write receive address registers */
  1841. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1842. e1000_enter_82542_rst(adapter);
  1843. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1844. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1845. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1846. /* With 82571 controllers, LAA may be overwritten (with the default)
  1847. * due to controller reset from the other port. */
  1848. if (adapter->hw.mac_type == e1000_82571) {
  1849. /* activate the work around */
  1850. adapter->hw.laa_is_present = 1;
  1851. /* Hold a copy of the LAA in RAR[14] This is done so that
  1852. * between the time RAR[0] gets clobbered and the time it
  1853. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1854. * of the RARs and no incoming packets directed to this port
  1855. * are dropped. Eventaully the LAA will be in RAR[0] and
  1856. * RAR[14] */
  1857. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1858. E1000_RAR_ENTRIES - 1);
  1859. }
  1860. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1861. e1000_leave_82542_rst(adapter);
  1862. return 0;
  1863. }
  1864. /**
  1865. * e1000_set_multi - Multicast and Promiscuous mode set
  1866. * @netdev: network interface device structure
  1867. *
  1868. * The set_multi entry point is called whenever the multicast address
  1869. * list or the network interface flags are updated. This routine is
  1870. * responsible for configuring the hardware for proper multicast,
  1871. * promiscuous mode, and all-multi behavior.
  1872. **/
  1873. static void
  1874. e1000_set_multi(struct net_device *netdev)
  1875. {
  1876. struct e1000_adapter *adapter = netdev_priv(netdev);
  1877. struct e1000_hw *hw = &adapter->hw;
  1878. struct dev_mc_list *mc_ptr;
  1879. uint32_t rctl;
  1880. uint32_t hash_value;
  1881. int i, rar_entries = E1000_RAR_ENTRIES;
  1882. /* reserve RAR[14] for LAA over-write work-around */
  1883. if (adapter->hw.mac_type == e1000_82571)
  1884. rar_entries--;
  1885. /* Check for Promiscuous and All Multicast modes */
  1886. rctl = E1000_READ_REG(hw, RCTL);
  1887. if(netdev->flags & IFF_PROMISC) {
  1888. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1889. } else if(netdev->flags & IFF_ALLMULTI) {
  1890. rctl |= E1000_RCTL_MPE;
  1891. rctl &= ~E1000_RCTL_UPE;
  1892. } else {
  1893. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1894. }
  1895. E1000_WRITE_REG(hw, RCTL, rctl);
  1896. /* 82542 2.0 needs to be in reset to write receive address registers */
  1897. if(hw->mac_type == e1000_82542_rev2_0)
  1898. e1000_enter_82542_rst(adapter);
  1899. /* load the first 14 multicast address into the exact filters 1-14
  1900. * RAR 0 is used for the station MAC adddress
  1901. * if there are not 14 addresses, go ahead and clear the filters
  1902. * -- with 82571 controllers only 0-13 entries are filled here
  1903. */
  1904. mc_ptr = netdev->mc_list;
  1905. for(i = 1; i < rar_entries; i++) {
  1906. if (mc_ptr) {
  1907. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1908. mc_ptr = mc_ptr->next;
  1909. } else {
  1910. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1911. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1912. }
  1913. }
  1914. /* clear the old settings from the multicast hash table */
  1915. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1916. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1917. /* load any remaining addresses into the hash table */
  1918. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1919. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1920. e1000_mta_set(hw, hash_value);
  1921. }
  1922. if(hw->mac_type == e1000_82542_rev2_0)
  1923. e1000_leave_82542_rst(adapter);
  1924. }
  1925. /* Need to wait a few seconds after link up to get diagnostic information from
  1926. * the phy */
  1927. static void
  1928. e1000_update_phy_info(unsigned long data)
  1929. {
  1930. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1931. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1932. }
  1933. /**
  1934. * e1000_82547_tx_fifo_stall - Timer Call-back
  1935. * @data: pointer to adapter cast into an unsigned long
  1936. **/
  1937. static void
  1938. e1000_82547_tx_fifo_stall(unsigned long data)
  1939. {
  1940. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1941. struct net_device *netdev = adapter->netdev;
  1942. uint32_t tctl;
  1943. if(atomic_read(&adapter->tx_fifo_stall)) {
  1944. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1945. E1000_READ_REG(&adapter->hw, TDH)) &&
  1946. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1947. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1948. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1949. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1950. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1951. E1000_WRITE_REG(&adapter->hw, TCTL,
  1952. tctl & ~E1000_TCTL_EN);
  1953. E1000_WRITE_REG(&adapter->hw, TDFT,
  1954. adapter->tx_head_addr);
  1955. E1000_WRITE_REG(&adapter->hw, TDFH,
  1956. adapter->tx_head_addr);
  1957. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1958. adapter->tx_head_addr);
  1959. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1960. adapter->tx_head_addr);
  1961. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1962. E1000_WRITE_FLUSH(&adapter->hw);
  1963. adapter->tx_fifo_head = 0;
  1964. atomic_set(&adapter->tx_fifo_stall, 0);
  1965. netif_wake_queue(netdev);
  1966. } else {
  1967. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1968. }
  1969. }
  1970. }
  1971. /**
  1972. * e1000_watchdog - Timer Call-back
  1973. * @data: pointer to adapter cast into an unsigned long
  1974. **/
  1975. static void
  1976. e1000_watchdog(unsigned long data)
  1977. {
  1978. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1979. /* Do the rest outside of interrupt context */
  1980. schedule_work(&adapter->watchdog_task);
  1981. }
  1982. static void
  1983. e1000_watchdog_task(struct e1000_adapter *adapter)
  1984. {
  1985. struct net_device *netdev = adapter->netdev;
  1986. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1987. uint32_t link;
  1988. e1000_check_for_link(&adapter->hw);
  1989. if (adapter->hw.mac_type == e1000_82573) {
  1990. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1991. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1992. e1000_update_mng_vlan(adapter);
  1993. }
  1994. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1995. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1996. link = !adapter->hw.serdes_link_down;
  1997. else
  1998. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1999. if(link) {
  2000. if(!netif_carrier_ok(netdev)) {
  2001. e1000_get_speed_and_duplex(&adapter->hw,
  2002. &adapter->link_speed,
  2003. &adapter->link_duplex);
  2004. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2005. adapter->link_speed,
  2006. adapter->link_duplex == FULL_DUPLEX ?
  2007. "Full Duplex" : "Half Duplex");
  2008. /* tweak tx_queue_len according to speed/duplex */
  2009. netdev->tx_queue_len = adapter->tx_queue_len;
  2010. adapter->tx_timeout_factor = 1;
  2011. if (adapter->link_duplex == HALF_DUPLEX) {
  2012. switch (adapter->link_speed) {
  2013. case SPEED_10:
  2014. netdev->tx_queue_len = 10;
  2015. adapter->tx_timeout_factor = 8;
  2016. break;
  2017. case SPEED_100:
  2018. netdev->tx_queue_len = 100;
  2019. break;
  2020. }
  2021. }
  2022. netif_carrier_on(netdev);
  2023. netif_wake_queue(netdev);
  2024. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2025. adapter->smartspeed = 0;
  2026. }
  2027. } else {
  2028. if(netif_carrier_ok(netdev)) {
  2029. adapter->link_speed = 0;
  2030. adapter->link_duplex = 0;
  2031. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2032. netif_carrier_off(netdev);
  2033. netif_stop_queue(netdev);
  2034. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2035. }
  2036. e1000_smartspeed(adapter);
  2037. }
  2038. e1000_update_stats(adapter);
  2039. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2040. adapter->tpt_old = adapter->stats.tpt;
  2041. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2042. adapter->colc_old = adapter->stats.colc;
  2043. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2044. adapter->gorcl_old = adapter->stats.gorcl;
  2045. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2046. adapter->gotcl_old = adapter->stats.gotcl;
  2047. e1000_update_adaptive(&adapter->hw);
  2048. #ifdef CONFIG_E1000_MQ
  2049. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2050. #endif
  2051. if (!netif_carrier_ok(netdev)) {
  2052. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2053. /* We've lost link, so the controller stops DMA,
  2054. * but we've got queued Tx work that's never going
  2055. * to get done, so reset controller to flush Tx.
  2056. * (Do the reset outside of interrupt context). */
  2057. schedule_work(&adapter->tx_timeout_task);
  2058. }
  2059. }
  2060. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2061. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2062. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2063. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2064. * else is between 2000-8000. */
  2065. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2066. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2067. adapter->gotcl - adapter->gorcl :
  2068. adapter->gorcl - adapter->gotcl) / 10000;
  2069. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2070. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2071. }
  2072. /* Cause software interrupt to ensure rx ring is cleaned */
  2073. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2074. /* Force detection of hung controller every watchdog period */
  2075. adapter->detect_tx_hung = TRUE;
  2076. /* With 82571 controllers, LAA may be overwritten due to controller
  2077. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2078. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2079. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2080. /* Reset the timer */
  2081. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2082. }
  2083. #define E1000_TX_FLAGS_CSUM 0x00000001
  2084. #define E1000_TX_FLAGS_VLAN 0x00000002
  2085. #define E1000_TX_FLAGS_TSO 0x00000004
  2086. #define E1000_TX_FLAGS_IPV4 0x00000008
  2087. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2088. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2089. static inline int
  2090. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2091. struct sk_buff *skb)
  2092. {
  2093. #ifdef NETIF_F_TSO
  2094. struct e1000_context_desc *context_desc;
  2095. struct e1000_buffer *buffer_info;
  2096. unsigned int i;
  2097. uint32_t cmd_length = 0;
  2098. uint16_t ipcse = 0, tucse, mss;
  2099. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2100. int err;
  2101. if(skb_shinfo(skb)->tso_size) {
  2102. if (skb_header_cloned(skb)) {
  2103. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2104. if (err)
  2105. return err;
  2106. }
  2107. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2108. mss = skb_shinfo(skb)->tso_size;
  2109. if(skb->protocol == ntohs(ETH_P_IP)) {
  2110. skb->nh.iph->tot_len = 0;
  2111. skb->nh.iph->check = 0;
  2112. skb->h.th->check =
  2113. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2114. skb->nh.iph->daddr,
  2115. 0,
  2116. IPPROTO_TCP,
  2117. 0);
  2118. cmd_length = E1000_TXD_CMD_IP;
  2119. ipcse = skb->h.raw - skb->data - 1;
  2120. #ifdef NETIF_F_TSO_IPV6
  2121. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  2122. skb->nh.ipv6h->payload_len = 0;
  2123. skb->h.th->check =
  2124. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2125. &skb->nh.ipv6h->daddr,
  2126. 0,
  2127. IPPROTO_TCP,
  2128. 0);
  2129. ipcse = 0;
  2130. #endif
  2131. }
  2132. ipcss = skb->nh.raw - skb->data;
  2133. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2134. tucss = skb->h.raw - skb->data;
  2135. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2136. tucse = 0;
  2137. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2138. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2139. i = tx_ring->next_to_use;
  2140. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2141. buffer_info = &tx_ring->buffer_info[i];
  2142. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2143. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2144. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2145. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2146. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2147. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2148. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2149. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2150. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2151. buffer_info->time_stamp = jiffies;
  2152. if (++i == tx_ring->count) i = 0;
  2153. tx_ring->next_to_use = i;
  2154. return 1;
  2155. }
  2156. #endif
  2157. return 0;
  2158. }
  2159. static inline boolean_t
  2160. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2161. struct sk_buff *skb)
  2162. {
  2163. struct e1000_context_desc *context_desc;
  2164. struct e1000_buffer *buffer_info;
  2165. unsigned int i;
  2166. uint8_t css;
  2167. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  2168. css = skb->h.raw - skb->data;
  2169. i = tx_ring->next_to_use;
  2170. buffer_info = &tx_ring->buffer_info[i];
  2171. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2172. context_desc->upper_setup.tcp_fields.tucss = css;
  2173. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2174. context_desc->upper_setup.tcp_fields.tucse = 0;
  2175. context_desc->tcp_seg_setup.data = 0;
  2176. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2177. buffer_info->time_stamp = jiffies;
  2178. if (unlikely(++i == tx_ring->count)) i = 0;
  2179. tx_ring->next_to_use = i;
  2180. return TRUE;
  2181. }
  2182. return FALSE;
  2183. }
  2184. #define E1000_MAX_TXD_PWR 12
  2185. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2186. static inline int
  2187. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2188. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2189. unsigned int nr_frags, unsigned int mss)
  2190. {
  2191. struct e1000_buffer *buffer_info;
  2192. unsigned int len = skb->len;
  2193. unsigned int offset = 0, size, count = 0, i;
  2194. unsigned int f;
  2195. len -= skb->data_len;
  2196. i = tx_ring->next_to_use;
  2197. while(len) {
  2198. buffer_info = &tx_ring->buffer_info[i];
  2199. size = min(len, max_per_txd);
  2200. #ifdef NETIF_F_TSO
  2201. /* Workaround for Controller erratum --
  2202. * descriptor for non-tso packet in a linear SKB that follows a
  2203. * tso gets written back prematurely before the data is fully
  2204. * DMAd to the controller */
  2205. if (!skb->data_len && tx_ring->last_tx_tso &&
  2206. !skb_shinfo(skb)->tso_size) {
  2207. tx_ring->last_tx_tso = 0;
  2208. size -= 4;
  2209. }
  2210. /* Workaround for premature desc write-backs
  2211. * in TSO mode. Append 4-byte sentinel desc */
  2212. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2213. size -= 4;
  2214. #endif
  2215. /* work-around for errata 10 and it applies
  2216. * to all controllers in PCI-X mode
  2217. * The fix is to make sure that the first descriptor of a
  2218. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2219. */
  2220. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2221. (size > 2015) && count == 0))
  2222. size = 2015;
  2223. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2224. * terminating buffers within evenly-aligned dwords. */
  2225. if(unlikely(adapter->pcix_82544 &&
  2226. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2227. size > 4))
  2228. size -= 4;
  2229. buffer_info->length = size;
  2230. buffer_info->dma =
  2231. pci_map_single(adapter->pdev,
  2232. skb->data + offset,
  2233. size,
  2234. PCI_DMA_TODEVICE);
  2235. buffer_info->time_stamp = jiffies;
  2236. len -= size;
  2237. offset += size;
  2238. count++;
  2239. if(unlikely(++i == tx_ring->count)) i = 0;
  2240. }
  2241. for(f = 0; f < nr_frags; f++) {
  2242. struct skb_frag_struct *frag;
  2243. frag = &skb_shinfo(skb)->frags[f];
  2244. len = frag->size;
  2245. offset = frag->page_offset;
  2246. while(len) {
  2247. buffer_info = &tx_ring->buffer_info[i];
  2248. size = min(len, max_per_txd);
  2249. #ifdef NETIF_F_TSO
  2250. /* Workaround for premature desc write-backs
  2251. * in TSO mode. Append 4-byte sentinel desc */
  2252. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2253. size -= 4;
  2254. #endif
  2255. /* Workaround for potential 82544 hang in PCI-X.
  2256. * Avoid terminating buffers within evenly-aligned
  2257. * dwords. */
  2258. if(unlikely(adapter->pcix_82544 &&
  2259. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2260. size > 4))
  2261. size -= 4;
  2262. buffer_info->length = size;
  2263. buffer_info->dma =
  2264. pci_map_page(adapter->pdev,
  2265. frag->page,
  2266. offset,
  2267. size,
  2268. PCI_DMA_TODEVICE);
  2269. buffer_info->time_stamp = jiffies;
  2270. len -= size;
  2271. offset += size;
  2272. count++;
  2273. if(unlikely(++i == tx_ring->count)) i = 0;
  2274. }
  2275. }
  2276. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2277. tx_ring->buffer_info[i].skb = skb;
  2278. tx_ring->buffer_info[first].next_to_watch = i;
  2279. return count;
  2280. }
  2281. static inline void
  2282. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2283. int tx_flags, int count)
  2284. {
  2285. struct e1000_tx_desc *tx_desc = NULL;
  2286. struct e1000_buffer *buffer_info;
  2287. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2288. unsigned int i;
  2289. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2290. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2291. E1000_TXD_CMD_TSE;
  2292. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2293. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2294. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2295. }
  2296. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2297. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2298. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2299. }
  2300. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2301. txd_lower |= E1000_TXD_CMD_VLE;
  2302. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2303. }
  2304. i = tx_ring->next_to_use;
  2305. while(count--) {
  2306. buffer_info = &tx_ring->buffer_info[i];
  2307. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2308. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2309. tx_desc->lower.data =
  2310. cpu_to_le32(txd_lower | buffer_info->length);
  2311. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2312. if(unlikely(++i == tx_ring->count)) i = 0;
  2313. }
  2314. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2315. /* Force memory writes to complete before letting h/w
  2316. * know there are new descriptors to fetch. (Only
  2317. * applicable for weak-ordered memory model archs,
  2318. * such as IA-64). */
  2319. wmb();
  2320. tx_ring->next_to_use = i;
  2321. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2322. }
  2323. /**
  2324. * 82547 workaround to avoid controller hang in half-duplex environment.
  2325. * The workaround is to avoid queuing a large packet that would span
  2326. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2327. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2328. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2329. * to the beginning of the Tx FIFO.
  2330. **/
  2331. #define E1000_FIFO_HDR 0x10
  2332. #define E1000_82547_PAD_LEN 0x3E0
  2333. static inline int
  2334. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2335. {
  2336. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2337. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2338. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2339. if(adapter->link_duplex != HALF_DUPLEX)
  2340. goto no_fifo_stall_required;
  2341. if(atomic_read(&adapter->tx_fifo_stall))
  2342. return 1;
  2343. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2344. atomic_set(&adapter->tx_fifo_stall, 1);
  2345. return 1;
  2346. }
  2347. no_fifo_stall_required:
  2348. adapter->tx_fifo_head += skb_fifo_len;
  2349. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2350. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2351. return 0;
  2352. }
  2353. #define MINIMUM_DHCP_PACKET_SIZE 282
  2354. static inline int
  2355. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2356. {
  2357. struct e1000_hw *hw = &adapter->hw;
  2358. uint16_t length, offset;
  2359. if(vlan_tx_tag_present(skb)) {
  2360. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2361. ( adapter->hw.mng_cookie.status &
  2362. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2363. return 0;
  2364. }
  2365. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2366. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2367. if((htons(ETH_P_IP) == eth->h_proto)) {
  2368. const struct iphdr *ip =
  2369. (struct iphdr *)((uint8_t *)skb->data+14);
  2370. if(IPPROTO_UDP == ip->protocol) {
  2371. struct udphdr *udp =
  2372. (struct udphdr *)((uint8_t *)ip +
  2373. (ip->ihl << 2));
  2374. if(ntohs(udp->dest) == 67) {
  2375. offset = (uint8_t *)udp + 8 - skb->data;
  2376. length = skb->len - offset;
  2377. return e1000_mng_write_dhcp_info(hw,
  2378. (uint8_t *)udp + 8,
  2379. length);
  2380. }
  2381. }
  2382. }
  2383. }
  2384. return 0;
  2385. }
  2386. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2387. static int
  2388. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2389. {
  2390. struct e1000_adapter *adapter = netdev_priv(netdev);
  2391. struct e1000_tx_ring *tx_ring;
  2392. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2393. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2394. unsigned int tx_flags = 0;
  2395. unsigned int len = skb->len;
  2396. unsigned long flags;
  2397. unsigned int nr_frags = 0;
  2398. unsigned int mss = 0;
  2399. int count = 0;
  2400. int tso;
  2401. unsigned int f;
  2402. len -= skb->data_len;
  2403. #ifdef CONFIG_E1000_MQ
  2404. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2405. #else
  2406. tx_ring = adapter->tx_ring;
  2407. #endif
  2408. if (unlikely(skb->len <= 0)) {
  2409. dev_kfree_skb_any(skb);
  2410. return NETDEV_TX_OK;
  2411. }
  2412. #ifdef NETIF_F_TSO
  2413. mss = skb_shinfo(skb)->tso_size;
  2414. /* The controller does a simple calculation to
  2415. * make sure there is enough room in the FIFO before
  2416. * initiating the DMA for each buffer. The calc is:
  2417. * 4 = ceil(buffer len/mss). To make sure we don't
  2418. * overrun the FIFO, adjust the max buffer len if mss
  2419. * drops. */
  2420. if(mss) {
  2421. uint8_t hdr_len;
  2422. max_per_txd = min(mss << 2, max_per_txd);
  2423. max_txd_pwr = fls(max_per_txd) - 1;
  2424. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2425. * points to just header, pull a few bytes of payload from
  2426. * frags into skb->data */
  2427. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2428. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2429. (adapter->hw.mac_type == e1000_82571 ||
  2430. adapter->hw.mac_type == e1000_82572)) {
  2431. unsigned int pull_size;
  2432. pull_size = min((unsigned int)4, skb->data_len);
  2433. if (!__pskb_pull_tail(skb, pull_size)) {
  2434. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2435. dev_kfree_skb_any(skb);
  2436. return -EFAULT;
  2437. }
  2438. len = skb->len - skb->data_len;
  2439. }
  2440. }
  2441. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2442. /* reserve a descriptor for the offload context */
  2443. count++;
  2444. count++;
  2445. #else
  2446. if(skb->ip_summed == CHECKSUM_HW)
  2447. count++;
  2448. #endif
  2449. #ifdef NETIF_F_TSO
  2450. /* Controller Erratum workaround */
  2451. if (!skb->data_len && tx_ring->last_tx_tso &&
  2452. !skb_shinfo(skb)->tso_size)
  2453. count++;
  2454. #endif
  2455. count += TXD_USE_COUNT(len, max_txd_pwr);
  2456. if(adapter->pcix_82544)
  2457. count++;
  2458. /* work-around for errata 10 and it applies to all controllers
  2459. * in PCI-X mode, so add one more descriptor to the count
  2460. */
  2461. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2462. (len > 2015)))
  2463. count++;
  2464. nr_frags = skb_shinfo(skb)->nr_frags;
  2465. for(f = 0; f < nr_frags; f++)
  2466. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2467. max_txd_pwr);
  2468. if(adapter->pcix_82544)
  2469. count += nr_frags;
  2470. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2471. e1000_transfer_dhcp_info(adapter, skb);
  2472. local_irq_save(flags);
  2473. if (!spin_trylock(&tx_ring->tx_lock)) {
  2474. /* Collision - tell upper layer to requeue */
  2475. local_irq_restore(flags);
  2476. return NETDEV_TX_LOCKED;
  2477. }
  2478. /* need: count + 2 desc gap to keep tail from touching
  2479. * head, otherwise try next time */
  2480. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2481. netif_stop_queue(netdev);
  2482. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2483. return NETDEV_TX_BUSY;
  2484. }
  2485. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2486. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2487. netif_stop_queue(netdev);
  2488. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2489. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2490. return NETDEV_TX_BUSY;
  2491. }
  2492. }
  2493. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2494. tx_flags |= E1000_TX_FLAGS_VLAN;
  2495. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2496. }
  2497. first = tx_ring->next_to_use;
  2498. tso = e1000_tso(adapter, tx_ring, skb);
  2499. if (tso < 0) {
  2500. dev_kfree_skb_any(skb);
  2501. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2502. return NETDEV_TX_OK;
  2503. }
  2504. if (likely(tso)) {
  2505. tx_ring->last_tx_tso = 1;
  2506. tx_flags |= E1000_TX_FLAGS_TSO;
  2507. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2508. tx_flags |= E1000_TX_FLAGS_CSUM;
  2509. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2510. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2511. * no longer assume, we must. */
  2512. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2513. tx_flags |= E1000_TX_FLAGS_IPV4;
  2514. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2515. e1000_tx_map(adapter, tx_ring, skb, first,
  2516. max_per_txd, nr_frags, mss));
  2517. netdev->trans_start = jiffies;
  2518. /* Make sure there is space in the ring for the next send. */
  2519. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2520. netif_stop_queue(netdev);
  2521. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2522. return NETDEV_TX_OK;
  2523. }
  2524. /**
  2525. * e1000_tx_timeout - Respond to a Tx Hang
  2526. * @netdev: network interface device structure
  2527. **/
  2528. static void
  2529. e1000_tx_timeout(struct net_device *netdev)
  2530. {
  2531. struct e1000_adapter *adapter = netdev_priv(netdev);
  2532. /* Do the reset outside of interrupt context */
  2533. schedule_work(&adapter->tx_timeout_task);
  2534. }
  2535. static void
  2536. e1000_tx_timeout_task(struct net_device *netdev)
  2537. {
  2538. struct e1000_adapter *adapter = netdev_priv(netdev);
  2539. adapter->tx_timeout_count++;
  2540. e1000_down(adapter);
  2541. e1000_up(adapter);
  2542. }
  2543. /**
  2544. * e1000_get_stats - Get System Network Statistics
  2545. * @netdev: network interface device structure
  2546. *
  2547. * Returns the address of the device statistics structure.
  2548. * The statistics are actually updated from the timer callback.
  2549. **/
  2550. static struct net_device_stats *
  2551. e1000_get_stats(struct net_device *netdev)
  2552. {
  2553. struct e1000_adapter *adapter = netdev_priv(netdev);
  2554. /* only return the current stats */
  2555. return &adapter->net_stats;
  2556. }
  2557. /**
  2558. * e1000_change_mtu - Change the Maximum Transfer Unit
  2559. * @netdev: network interface device structure
  2560. * @new_mtu: new value for maximum frame size
  2561. *
  2562. * Returns 0 on success, negative on failure
  2563. **/
  2564. static int
  2565. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2566. {
  2567. struct e1000_adapter *adapter = netdev_priv(netdev);
  2568. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2569. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2570. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2571. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2572. return -EINVAL;
  2573. }
  2574. /* Adapter-specific max frame size limits. */
  2575. switch (adapter->hw.mac_type) {
  2576. case e1000_82542_rev2_0:
  2577. case e1000_82542_rev2_1:
  2578. case e1000_82573:
  2579. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2580. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2581. return -EINVAL;
  2582. }
  2583. break;
  2584. case e1000_82571:
  2585. case e1000_82572:
  2586. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2587. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2588. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2589. return -EINVAL;
  2590. }
  2591. break;
  2592. default:
  2593. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2594. break;
  2595. }
  2596. /* since the driver code now supports splitting a packet across
  2597. * multiple descriptors, most of the fifo related limitations on
  2598. * jumbo frame traffic have gone away.
  2599. * simply use 2k descriptors for everything.
  2600. *
  2601. * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2602. * means we reserve 2 more, this pushes us to allocate from the next
  2603. * larger slab size
  2604. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2605. /* recent hardware supports 1KB granularity */
  2606. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2607. adapter->rx_buffer_len =
  2608. ((max_frame < E1000_RXBUFFER_2048) ?
  2609. max_frame : E1000_RXBUFFER_2048);
  2610. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2611. } else
  2612. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2613. netdev->mtu = new_mtu;
  2614. if(netif_running(netdev)) {
  2615. e1000_down(adapter);
  2616. e1000_up(adapter);
  2617. }
  2618. adapter->hw.max_frame_size = max_frame;
  2619. return 0;
  2620. }
  2621. /**
  2622. * e1000_update_stats - Update the board statistics counters
  2623. * @adapter: board private structure
  2624. **/
  2625. void
  2626. e1000_update_stats(struct e1000_adapter *adapter)
  2627. {
  2628. struct e1000_hw *hw = &adapter->hw;
  2629. unsigned long flags;
  2630. uint16_t phy_tmp;
  2631. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2632. spin_lock_irqsave(&adapter->stats_lock, flags);
  2633. /* these counters are modified from e1000_adjust_tbi_stats,
  2634. * called from the interrupt context, so they must only
  2635. * be written while holding adapter->stats_lock
  2636. */
  2637. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2638. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2639. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2640. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2641. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2642. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2643. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2644. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2645. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2646. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2647. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2648. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2649. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2650. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2651. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2652. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2653. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2654. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2655. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2656. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2657. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2658. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2659. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2660. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2661. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2662. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2663. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2664. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2665. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2666. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2667. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2668. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2669. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2670. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2671. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2672. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2673. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2674. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2675. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2676. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2677. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2678. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2679. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2680. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2681. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2682. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2683. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2684. /* used for adaptive IFS */
  2685. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2686. adapter->stats.tpt += hw->tx_packet_delta;
  2687. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2688. adapter->stats.colc += hw->collision_delta;
  2689. if(hw->mac_type >= e1000_82543) {
  2690. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2691. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2692. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2693. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2694. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2695. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2696. }
  2697. if(hw->mac_type > e1000_82547_rev_2) {
  2698. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2699. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2700. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2701. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2702. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2703. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2704. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2705. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2706. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2707. }
  2708. /* Fill out the OS statistics structure */
  2709. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2710. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2711. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2712. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2713. adapter->net_stats.multicast = adapter->stats.mprc;
  2714. adapter->net_stats.collisions = adapter->stats.colc;
  2715. /* Rx Errors */
  2716. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2717. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2718. adapter->stats.rlec + adapter->stats.cexterr;
  2719. adapter->net_stats.rx_dropped = 0;
  2720. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2721. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2722. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2723. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2724. /* Tx Errors */
  2725. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2726. adapter->stats.latecol;
  2727. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2728. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2729. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2730. /* Tx Dropped needs to be maintained elsewhere */
  2731. /* Phy Stats */
  2732. if(hw->media_type == e1000_media_type_copper) {
  2733. if((adapter->link_speed == SPEED_1000) &&
  2734. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2735. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2736. adapter->phy_stats.idle_errors += phy_tmp;
  2737. }
  2738. if((hw->mac_type <= e1000_82546) &&
  2739. (hw->phy_type == e1000_phy_m88) &&
  2740. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2741. adapter->phy_stats.receive_errors += phy_tmp;
  2742. }
  2743. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2744. }
  2745. #ifdef CONFIG_E1000_MQ
  2746. void
  2747. e1000_rx_schedule(void *data)
  2748. {
  2749. struct net_device *poll_dev, *netdev = data;
  2750. struct e1000_adapter *adapter = netdev->priv;
  2751. int this_cpu = get_cpu();
  2752. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2753. if (poll_dev == NULL) {
  2754. put_cpu();
  2755. return;
  2756. }
  2757. if (likely(netif_rx_schedule_prep(poll_dev)))
  2758. __netif_rx_schedule(poll_dev);
  2759. else
  2760. e1000_irq_enable(adapter);
  2761. put_cpu();
  2762. }
  2763. #endif
  2764. /**
  2765. * e1000_intr - Interrupt Handler
  2766. * @irq: interrupt number
  2767. * @data: pointer to a network interface device structure
  2768. * @pt_regs: CPU registers structure
  2769. **/
  2770. static irqreturn_t
  2771. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2772. {
  2773. struct net_device *netdev = data;
  2774. struct e1000_adapter *adapter = netdev_priv(netdev);
  2775. struct e1000_hw *hw = &adapter->hw;
  2776. uint32_t icr = E1000_READ_REG(hw, ICR);
  2777. #ifndef CONFIG_E1000_NAPI
  2778. int i;
  2779. #else
  2780. /* Interrupt Auto-Mask...upon reading ICR,
  2781. * interrupts are masked. No need for the
  2782. * IMC write, but it does mean we should
  2783. * account for it ASAP. */
  2784. if (likely(hw->mac_type >= e1000_82571))
  2785. atomic_inc(&adapter->irq_sem);
  2786. #endif
  2787. if (unlikely(!icr)) {
  2788. #ifdef CONFIG_E1000_NAPI
  2789. if (hw->mac_type >= e1000_82571)
  2790. e1000_irq_enable(adapter);
  2791. #endif
  2792. return IRQ_NONE; /* Not our interrupt */
  2793. }
  2794. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2795. hw->get_link_status = 1;
  2796. mod_timer(&adapter->watchdog_timer, jiffies);
  2797. }
  2798. #ifdef CONFIG_E1000_NAPI
  2799. if (unlikely(hw->mac_type < e1000_82571)) {
  2800. atomic_inc(&adapter->irq_sem);
  2801. E1000_WRITE_REG(hw, IMC, ~0);
  2802. E1000_WRITE_FLUSH(hw);
  2803. }
  2804. #ifdef CONFIG_E1000_MQ
  2805. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2806. /* We must setup the cpumask once count == 0 since
  2807. * each cpu bit is cleared when the work is done. */
  2808. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2809. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2810. atomic_set(&adapter->rx_sched_call_data.count,
  2811. adapter->num_rx_queues);
  2812. smp_call_async_mask(&adapter->rx_sched_call_data);
  2813. } else {
  2814. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2815. }
  2816. #else /* if !CONFIG_E1000_MQ */
  2817. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2818. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2819. else
  2820. e1000_irq_enable(adapter);
  2821. #endif /* CONFIG_E1000_MQ */
  2822. #else /* if !CONFIG_E1000_NAPI */
  2823. /* Writing IMC and IMS is needed for 82547.
  2824. Due to Hub Link bus being occupied, an interrupt
  2825. de-assertion message is not able to be sent.
  2826. When an interrupt assertion message is generated later,
  2827. two messages are re-ordered and sent out.
  2828. That causes APIC to think 82547 is in de-assertion
  2829. state, while 82547 is in assertion state, resulting
  2830. in dead lock. Writing IMC forces 82547 into
  2831. de-assertion state.
  2832. */
  2833. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2834. atomic_inc(&adapter->irq_sem);
  2835. E1000_WRITE_REG(hw, IMC, ~0);
  2836. }
  2837. for(i = 0; i < E1000_MAX_INTR; i++)
  2838. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2839. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2840. break;
  2841. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2842. e1000_irq_enable(adapter);
  2843. #endif /* CONFIG_E1000_NAPI */
  2844. return IRQ_HANDLED;
  2845. }
  2846. #ifdef CONFIG_E1000_NAPI
  2847. /**
  2848. * e1000_clean - NAPI Rx polling callback
  2849. * @adapter: board private structure
  2850. **/
  2851. static int
  2852. e1000_clean(struct net_device *poll_dev, int *budget)
  2853. {
  2854. struct e1000_adapter *adapter;
  2855. int work_to_do = min(*budget, poll_dev->quota);
  2856. int tx_cleaned, i = 0, work_done = 0;
  2857. /* Must NOT use netdev_priv macro here. */
  2858. adapter = poll_dev->priv;
  2859. /* Keep link state information with original netdev */
  2860. if (!netif_carrier_ok(adapter->netdev))
  2861. goto quit_polling;
  2862. while (poll_dev != &adapter->polling_netdev[i]) {
  2863. i++;
  2864. if (unlikely(i == adapter->num_rx_queues))
  2865. BUG();
  2866. }
  2867. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2868. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2869. &work_done, work_to_do);
  2870. *budget -= work_done;
  2871. poll_dev->quota -= work_done;
  2872. /* If no Tx and not enough Rx work done, exit the polling mode */
  2873. if((!tx_cleaned && (work_done == 0)) ||
  2874. !netif_running(adapter->netdev)) {
  2875. quit_polling:
  2876. netif_rx_complete(poll_dev);
  2877. e1000_irq_enable(adapter);
  2878. return 0;
  2879. }
  2880. return 1;
  2881. }
  2882. #endif
  2883. /**
  2884. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2885. * @adapter: board private structure
  2886. **/
  2887. static boolean_t
  2888. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2889. struct e1000_tx_ring *tx_ring)
  2890. {
  2891. struct net_device *netdev = adapter->netdev;
  2892. struct e1000_tx_desc *tx_desc, *eop_desc;
  2893. struct e1000_buffer *buffer_info;
  2894. unsigned int i, eop;
  2895. boolean_t cleaned = FALSE;
  2896. i = tx_ring->next_to_clean;
  2897. eop = tx_ring->buffer_info[i].next_to_watch;
  2898. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2899. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2900. for(cleaned = FALSE; !cleaned; ) {
  2901. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2902. buffer_info = &tx_ring->buffer_info[i];
  2903. cleaned = (i == eop);
  2904. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2905. tx_desc->buffer_addr = 0;
  2906. tx_desc->lower.data = 0;
  2907. tx_desc->upper.data = 0;
  2908. if(unlikely(++i == tx_ring->count)) i = 0;
  2909. }
  2910. #ifdef CONFIG_E1000_MQ
  2911. tx_ring->tx_stats.packets++;
  2912. #endif
  2913. eop = tx_ring->buffer_info[i].next_to_watch;
  2914. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2915. }
  2916. tx_ring->next_to_clean = i;
  2917. spin_lock(&tx_ring->tx_lock);
  2918. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2919. netif_carrier_ok(netdev)))
  2920. netif_wake_queue(netdev);
  2921. spin_unlock(&tx_ring->tx_lock);
  2922. if (adapter->detect_tx_hung) {
  2923. /* Detect a transmit hang in hardware, this serializes the
  2924. * check with the clearing of time_stamp and movement of i */
  2925. adapter->detect_tx_hung = FALSE;
  2926. if (tx_ring->buffer_info[eop].dma &&
  2927. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2928. adapter->tx_timeout_factor * HZ)
  2929. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2930. E1000_STATUS_TXOFF)) {
  2931. /* detected Tx unit hang */
  2932. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2933. " Tx Queue <%lu>\n"
  2934. " TDH <%x>\n"
  2935. " TDT <%x>\n"
  2936. " next_to_use <%x>\n"
  2937. " next_to_clean <%x>\n"
  2938. "buffer_info[next_to_clean]\n"
  2939. " time_stamp <%lx>\n"
  2940. " next_to_watch <%x>\n"
  2941. " jiffies <%lx>\n"
  2942. " next_to_watch.status <%x>\n",
  2943. (unsigned long)((tx_ring - adapter->tx_ring) /
  2944. sizeof(struct e1000_tx_ring)),
  2945. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2946. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2947. tx_ring->next_to_use,
  2948. tx_ring->next_to_clean,
  2949. tx_ring->buffer_info[eop].time_stamp,
  2950. eop,
  2951. jiffies,
  2952. eop_desc->upper.fields.status);
  2953. netif_stop_queue(netdev);
  2954. }
  2955. }
  2956. return cleaned;
  2957. }
  2958. /**
  2959. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2960. * @adapter: board private structure
  2961. * @status_err: receive descriptor status and error fields
  2962. * @csum: receive descriptor csum field
  2963. * @sk_buff: socket buffer with received data
  2964. **/
  2965. static inline void
  2966. e1000_rx_checksum(struct e1000_adapter *adapter,
  2967. uint32_t status_err, uint32_t csum,
  2968. struct sk_buff *skb)
  2969. {
  2970. uint16_t status = (uint16_t)status_err;
  2971. uint8_t errors = (uint8_t)(status_err >> 24);
  2972. skb->ip_summed = CHECKSUM_NONE;
  2973. /* 82543 or newer only */
  2974. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2975. /* Ignore Checksum bit is set */
  2976. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2977. /* TCP/UDP checksum error bit is set */
  2978. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2979. /* let the stack verify checksum errors */
  2980. adapter->hw_csum_err++;
  2981. return;
  2982. }
  2983. /* TCP/UDP Checksum has not been calculated */
  2984. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2985. if(!(status & E1000_RXD_STAT_TCPCS))
  2986. return;
  2987. } else {
  2988. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2989. return;
  2990. }
  2991. /* It must be a TCP or UDP packet with a valid checksum */
  2992. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2993. /* TCP checksum is good */
  2994. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2995. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2996. /* IP fragment with UDP payload */
  2997. /* Hardware complements the payload checksum, so we undo it
  2998. * and then put the value in host order for further stack use.
  2999. */
  3000. csum = ntohl(csum ^ 0xFFFF);
  3001. skb->csum = csum;
  3002. skb->ip_summed = CHECKSUM_HW;
  3003. }
  3004. adapter->hw_csum_good++;
  3005. }
  3006. /**
  3007. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3008. * @adapter: board private structure
  3009. **/
  3010. static boolean_t
  3011. #ifdef CONFIG_E1000_NAPI
  3012. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3013. struct e1000_rx_ring *rx_ring,
  3014. int *work_done, int work_to_do)
  3015. #else
  3016. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3017. struct e1000_rx_ring *rx_ring)
  3018. #endif
  3019. {
  3020. struct net_device *netdev = adapter->netdev;
  3021. struct pci_dev *pdev = adapter->pdev;
  3022. struct e1000_rx_desc *rx_desc;
  3023. struct e1000_buffer *buffer_info;
  3024. struct sk_buff *skb;
  3025. unsigned long flags;
  3026. uint32_t length;
  3027. uint8_t last_byte;
  3028. unsigned int i;
  3029. int cleaned_count = 0;
  3030. boolean_t cleaned = FALSE, multi_descriptor = FALSE;
  3031. i = rx_ring->next_to_clean;
  3032. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3033. while(rx_desc->status & E1000_RXD_STAT_DD) {
  3034. buffer_info = &rx_ring->buffer_info[i];
  3035. u8 status;
  3036. #ifdef CONFIG_E1000_NAPI
  3037. if(*work_done >= work_to_do)
  3038. break;
  3039. (*work_done)++;
  3040. #endif
  3041. status = rx_desc->status;
  3042. cleaned = TRUE;
  3043. cleaned_count++;
  3044. pci_unmap_single(pdev,
  3045. buffer_info->dma,
  3046. buffer_info->length,
  3047. PCI_DMA_FROMDEVICE);
  3048. skb = buffer_info->skb;
  3049. length = le16_to_cpu(rx_desc->length);
  3050. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  3051. /* All receives must fit into a single buffer */
  3052. E1000_DBG("%s: Receive packet consumed multiple"
  3053. " buffers\n", netdev->name);
  3054. dev_kfree_skb_irq(skb);
  3055. goto next_desc;
  3056. }
  3057. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3058. last_byte = *(skb->data + length - 1);
  3059. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  3060. rx_desc->errors, length, last_byte)) {
  3061. spin_lock_irqsave(&adapter->stats_lock, flags);
  3062. e1000_tbi_adjust_stats(&adapter->hw,
  3063. &adapter->stats,
  3064. length, skb->data);
  3065. spin_unlock_irqrestore(&adapter->stats_lock,
  3066. flags);
  3067. length--;
  3068. } else {
  3069. dev_kfree_skb_irq(skb);
  3070. goto next_desc;
  3071. }
  3072. }
  3073. /* code added for copybreak, this should improve
  3074. * performance for small packets with large amounts
  3075. * of reassembly being done in the stack */
  3076. #define E1000_CB_LENGTH 256
  3077. if ((length < E1000_CB_LENGTH) &&
  3078. !rx_ring->rx_skb_top &&
  3079. /* or maybe (status & E1000_RXD_STAT_EOP) && */
  3080. !multi_descriptor) {
  3081. struct sk_buff *new_skb =
  3082. dev_alloc_skb(length + NET_IP_ALIGN);
  3083. if (new_skb) {
  3084. skb_reserve(new_skb, NET_IP_ALIGN);
  3085. new_skb->dev = netdev;
  3086. memcpy(new_skb->data - NET_IP_ALIGN,
  3087. skb->data - NET_IP_ALIGN,
  3088. length + NET_IP_ALIGN);
  3089. /* save the skb in buffer_info as good */
  3090. buffer_info->skb = skb;
  3091. skb = new_skb;
  3092. skb_put(skb, length);
  3093. }
  3094. }
  3095. /* end copybreak code */
  3096. /* Receive Checksum Offload */
  3097. e1000_rx_checksum(adapter,
  3098. (uint32_t)(status) |
  3099. ((uint32_t)(rx_desc->errors) << 24),
  3100. rx_desc->csum, skb);
  3101. skb->protocol = eth_type_trans(skb, netdev);
  3102. #ifdef CONFIG_E1000_NAPI
  3103. if(unlikely(adapter->vlgrp &&
  3104. (status & E1000_RXD_STAT_VP))) {
  3105. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3106. le16_to_cpu(rx_desc->special) &
  3107. E1000_RXD_SPC_VLAN_MASK);
  3108. } else {
  3109. netif_receive_skb(skb);
  3110. }
  3111. #else /* CONFIG_E1000_NAPI */
  3112. if(unlikely(adapter->vlgrp &&
  3113. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3114. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3115. le16_to_cpu(rx_desc->special) &
  3116. E1000_RXD_SPC_VLAN_MASK);
  3117. } else {
  3118. netif_rx(skb);
  3119. }
  3120. #endif /* CONFIG_E1000_NAPI */
  3121. netdev->last_rx = jiffies;
  3122. #ifdef CONFIG_E1000_MQ
  3123. rx_ring->rx_stats.packets++;
  3124. rx_ring->rx_stats.bytes += length;
  3125. #endif
  3126. next_desc:
  3127. rx_desc->status = 0;
  3128. /* return some buffers to hardware, one at a time is too slow */
  3129. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3130. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3131. cleaned_count = 0;
  3132. }
  3133. }
  3134. rx_ring->next_to_clean = i;
  3135. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3136. if (cleaned_count)
  3137. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3138. return cleaned;
  3139. }
  3140. /**
  3141. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3142. * @adapter: board private structure
  3143. **/
  3144. static boolean_t
  3145. #ifdef CONFIG_E1000_NAPI
  3146. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3147. struct e1000_rx_ring *rx_ring,
  3148. int *work_done, int work_to_do)
  3149. #else
  3150. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3151. struct e1000_rx_ring *rx_ring)
  3152. #endif
  3153. {
  3154. union e1000_rx_desc_packet_split *rx_desc;
  3155. struct net_device *netdev = adapter->netdev;
  3156. struct pci_dev *pdev = adapter->pdev;
  3157. struct e1000_buffer *buffer_info;
  3158. struct e1000_ps_page *ps_page;
  3159. struct e1000_ps_page_dma *ps_page_dma;
  3160. struct sk_buff *skb;
  3161. unsigned int i, j;
  3162. uint32_t length, staterr;
  3163. int cleaned_count = 0;
  3164. boolean_t cleaned = FALSE;
  3165. i = rx_ring->next_to_clean;
  3166. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3167. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3168. while(staterr & E1000_RXD_STAT_DD) {
  3169. buffer_info = &rx_ring->buffer_info[i];
  3170. ps_page = &rx_ring->ps_page[i];
  3171. ps_page_dma = &rx_ring->ps_page_dma[i];
  3172. #ifdef CONFIG_E1000_NAPI
  3173. if(unlikely(*work_done >= work_to_do))
  3174. break;
  3175. (*work_done)++;
  3176. #endif
  3177. cleaned = TRUE;
  3178. cleaned_count++;
  3179. pci_unmap_single(pdev, buffer_info->dma,
  3180. buffer_info->length,
  3181. PCI_DMA_FROMDEVICE);
  3182. skb = buffer_info->skb;
  3183. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3184. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3185. " the full packet\n", netdev->name);
  3186. dev_kfree_skb_irq(skb);
  3187. goto next_desc;
  3188. }
  3189. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3190. dev_kfree_skb_irq(skb);
  3191. goto next_desc;
  3192. }
  3193. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3194. if(unlikely(!length)) {
  3195. E1000_DBG("%s: Last part of the packet spanning"
  3196. " multiple descriptors\n", netdev->name);
  3197. dev_kfree_skb_irq(skb);
  3198. goto next_desc;
  3199. }
  3200. /* Good Receive */
  3201. skb_put(skb, length);
  3202. for(j = 0; j < adapter->rx_ps_pages; j++) {
  3203. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3204. break;
  3205. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3206. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3207. ps_page_dma->ps_page_dma[j] = 0;
  3208. skb_shinfo(skb)->frags[j].page =
  3209. ps_page->ps_page[j];
  3210. ps_page->ps_page[j] = NULL;
  3211. skb_shinfo(skb)->frags[j].page_offset = 0;
  3212. skb_shinfo(skb)->frags[j].size = length;
  3213. skb_shinfo(skb)->nr_frags++;
  3214. skb->len += length;
  3215. skb->data_len += length;
  3216. }
  3217. e1000_rx_checksum(adapter, staterr,
  3218. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3219. skb->protocol = eth_type_trans(skb, netdev);
  3220. if(likely(rx_desc->wb.upper.header_status &
  3221. E1000_RXDPS_HDRSTAT_HDRSP)) {
  3222. adapter->rx_hdr_split++;
  3223. #ifdef HAVE_RX_ZERO_COPY
  3224. skb_shinfo(skb)->zero_copy = TRUE;
  3225. #endif
  3226. }
  3227. #ifdef CONFIG_E1000_NAPI
  3228. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3229. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3230. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3231. E1000_RXD_SPC_VLAN_MASK);
  3232. } else {
  3233. netif_receive_skb(skb);
  3234. }
  3235. #else /* CONFIG_E1000_NAPI */
  3236. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3237. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3238. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3239. E1000_RXD_SPC_VLAN_MASK);
  3240. } else {
  3241. netif_rx(skb);
  3242. }
  3243. #endif /* CONFIG_E1000_NAPI */
  3244. netdev->last_rx = jiffies;
  3245. #ifdef CONFIG_E1000_MQ
  3246. rx_ring->rx_stats.packets++;
  3247. rx_ring->rx_stats.bytes += length;
  3248. #endif
  3249. next_desc:
  3250. rx_desc->wb.middle.status_error &= ~0xFF;
  3251. buffer_info->skb = NULL;
  3252. /* return some buffers to hardware, one at a time is too slow */
  3253. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3254. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3255. cleaned_count = 0;
  3256. }
  3257. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3258. }
  3259. rx_ring->next_to_clean = i;
  3260. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3261. if (cleaned_count)
  3262. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3263. return cleaned;
  3264. }
  3265. /**
  3266. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3267. * @adapter: address of board private structure
  3268. **/
  3269. static void
  3270. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3271. struct e1000_rx_ring *rx_ring,
  3272. int cleaned_count)
  3273. {
  3274. struct net_device *netdev = adapter->netdev;
  3275. struct pci_dev *pdev = adapter->pdev;
  3276. struct e1000_rx_desc *rx_desc;
  3277. struct e1000_buffer *buffer_info;
  3278. struct sk_buff *skb;
  3279. unsigned int i;
  3280. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3281. i = rx_ring->next_to_use;
  3282. buffer_info = &rx_ring->buffer_info[i];
  3283. while (cleaned_count--) {
  3284. if (!(skb = buffer_info->skb))
  3285. skb = dev_alloc_skb(bufsz);
  3286. else {
  3287. skb_trim(skb, 0);
  3288. goto map_skb;
  3289. }
  3290. if(unlikely(!skb)) {
  3291. /* Better luck next round */
  3292. adapter->alloc_rx_buff_failed++;
  3293. break;
  3294. }
  3295. /* Fix for errata 23, can't cross 64kB boundary */
  3296. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3297. struct sk_buff *oldskb = skb;
  3298. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3299. "at %p\n", bufsz, skb->data);
  3300. /* Try again, without freeing the previous */
  3301. skb = dev_alloc_skb(bufsz);
  3302. /* Failed allocation, critical failure */
  3303. if (!skb) {
  3304. dev_kfree_skb(oldskb);
  3305. break;
  3306. }
  3307. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3308. /* give up */
  3309. dev_kfree_skb(skb);
  3310. dev_kfree_skb(oldskb);
  3311. break; /* while !buffer_info->skb */
  3312. } else {
  3313. /* Use new allocation */
  3314. dev_kfree_skb(oldskb);
  3315. }
  3316. }
  3317. /* Make buffer alignment 2 beyond a 16 byte boundary
  3318. * this will result in a 16 byte aligned IP header after
  3319. * the 14 byte MAC header is removed
  3320. */
  3321. skb_reserve(skb, NET_IP_ALIGN);
  3322. skb->dev = netdev;
  3323. buffer_info->skb = skb;
  3324. buffer_info->length = adapter->rx_buffer_len;
  3325. map_skb:
  3326. buffer_info->dma = pci_map_single(pdev,
  3327. skb->data,
  3328. adapter->rx_buffer_len,
  3329. PCI_DMA_FROMDEVICE);
  3330. /* Fix for errata 23, can't cross 64kB boundary */
  3331. if (!e1000_check_64k_bound(adapter,
  3332. (void *)(unsigned long)buffer_info->dma,
  3333. adapter->rx_buffer_len)) {
  3334. DPRINTK(RX_ERR, ERR,
  3335. "dma align check failed: %u bytes at %p\n",
  3336. adapter->rx_buffer_len,
  3337. (void *)(unsigned long)buffer_info->dma);
  3338. dev_kfree_skb(skb);
  3339. buffer_info->skb = NULL;
  3340. pci_unmap_single(pdev, buffer_info->dma,
  3341. adapter->rx_buffer_len,
  3342. PCI_DMA_FROMDEVICE);
  3343. break; /* while !buffer_info->skb */
  3344. }
  3345. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3346. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3347. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3348. /* Force memory writes to complete before letting h/w
  3349. * know there are new descriptors to fetch. (Only
  3350. * applicable for weak-ordered memory model archs,
  3351. * such as IA-64). */
  3352. wmb();
  3353. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3354. }
  3355. if(unlikely(++i == rx_ring->count)) i = 0;
  3356. buffer_info = &rx_ring->buffer_info[i];
  3357. }
  3358. rx_ring->next_to_use = i;
  3359. }
  3360. /**
  3361. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3362. * @adapter: address of board private structure
  3363. **/
  3364. static void
  3365. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3366. struct e1000_rx_ring *rx_ring,
  3367. int cleaned_count)
  3368. {
  3369. struct net_device *netdev = adapter->netdev;
  3370. struct pci_dev *pdev = adapter->pdev;
  3371. union e1000_rx_desc_packet_split *rx_desc;
  3372. struct e1000_buffer *buffer_info;
  3373. struct e1000_ps_page *ps_page;
  3374. struct e1000_ps_page_dma *ps_page_dma;
  3375. struct sk_buff *skb;
  3376. unsigned int i, j;
  3377. i = rx_ring->next_to_use;
  3378. buffer_info = &rx_ring->buffer_info[i];
  3379. ps_page = &rx_ring->ps_page[i];
  3380. ps_page_dma = &rx_ring->ps_page_dma[i];
  3381. while (cleaned_count--) {
  3382. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3383. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3384. if (j < adapter->rx_ps_pages) {
  3385. if (likely(!ps_page->ps_page[j])) {
  3386. ps_page->ps_page[j] =
  3387. alloc_page(GFP_ATOMIC);
  3388. if (unlikely(!ps_page->ps_page[j]))
  3389. goto no_buffers;
  3390. ps_page_dma->ps_page_dma[j] =
  3391. pci_map_page(pdev,
  3392. ps_page->ps_page[j],
  3393. 0, PAGE_SIZE,
  3394. PCI_DMA_FROMDEVICE);
  3395. }
  3396. /* Refresh the desc even if buffer_addrs didn't
  3397. * change because each write-back erases
  3398. * this info.
  3399. */
  3400. rx_desc->read.buffer_addr[j+1] =
  3401. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3402. } else
  3403. rx_desc->read.buffer_addr[j+1] = ~0;
  3404. }
  3405. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3406. if(unlikely(!skb))
  3407. break;
  3408. /* Make buffer alignment 2 beyond a 16 byte boundary
  3409. * this will result in a 16 byte aligned IP header after
  3410. * the 14 byte MAC header is removed
  3411. */
  3412. skb_reserve(skb, NET_IP_ALIGN);
  3413. skb->dev = netdev;
  3414. buffer_info->skb = skb;
  3415. buffer_info->length = adapter->rx_ps_bsize0;
  3416. buffer_info->dma = pci_map_single(pdev, skb->data,
  3417. adapter->rx_ps_bsize0,
  3418. PCI_DMA_FROMDEVICE);
  3419. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3420. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3421. /* Force memory writes to complete before letting h/w
  3422. * know there are new descriptors to fetch. (Only
  3423. * applicable for weak-ordered memory model archs,
  3424. * such as IA-64). */
  3425. wmb();
  3426. /* Hardware increments by 16 bytes, but packet split
  3427. * descriptors are 32 bytes...so we increment tail
  3428. * twice as much.
  3429. */
  3430. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3431. }
  3432. if(unlikely(++i == rx_ring->count)) i = 0;
  3433. buffer_info = &rx_ring->buffer_info[i];
  3434. ps_page = &rx_ring->ps_page[i];
  3435. ps_page_dma = &rx_ring->ps_page_dma[i];
  3436. }
  3437. no_buffers:
  3438. rx_ring->next_to_use = i;
  3439. }
  3440. /**
  3441. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3442. * @adapter:
  3443. **/
  3444. static void
  3445. e1000_smartspeed(struct e1000_adapter *adapter)
  3446. {
  3447. uint16_t phy_status;
  3448. uint16_t phy_ctrl;
  3449. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3450. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3451. return;
  3452. if(adapter->smartspeed == 0) {
  3453. /* If Master/Slave config fault is asserted twice,
  3454. * we assume back-to-back */
  3455. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3456. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3457. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3458. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3459. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3460. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3461. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3462. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3463. phy_ctrl);
  3464. adapter->smartspeed++;
  3465. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3466. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3467. &phy_ctrl)) {
  3468. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3469. MII_CR_RESTART_AUTO_NEG);
  3470. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3471. phy_ctrl);
  3472. }
  3473. }
  3474. return;
  3475. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3476. /* If still no link, perhaps using 2/3 pair cable */
  3477. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3478. phy_ctrl |= CR_1000T_MS_ENABLE;
  3479. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3480. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3481. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3482. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3483. MII_CR_RESTART_AUTO_NEG);
  3484. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3485. }
  3486. }
  3487. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3488. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3489. adapter->smartspeed = 0;
  3490. }
  3491. /**
  3492. * e1000_ioctl -
  3493. * @netdev:
  3494. * @ifreq:
  3495. * @cmd:
  3496. **/
  3497. static int
  3498. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3499. {
  3500. switch (cmd) {
  3501. case SIOCGMIIPHY:
  3502. case SIOCGMIIREG:
  3503. case SIOCSMIIREG:
  3504. return e1000_mii_ioctl(netdev, ifr, cmd);
  3505. default:
  3506. return -EOPNOTSUPP;
  3507. }
  3508. }
  3509. /**
  3510. * e1000_mii_ioctl -
  3511. * @netdev:
  3512. * @ifreq:
  3513. * @cmd:
  3514. **/
  3515. static int
  3516. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3517. {
  3518. struct e1000_adapter *adapter = netdev_priv(netdev);
  3519. struct mii_ioctl_data *data = if_mii(ifr);
  3520. int retval;
  3521. uint16_t mii_reg;
  3522. uint16_t spddplx;
  3523. unsigned long flags;
  3524. if(adapter->hw.media_type != e1000_media_type_copper)
  3525. return -EOPNOTSUPP;
  3526. switch (cmd) {
  3527. case SIOCGMIIPHY:
  3528. data->phy_id = adapter->hw.phy_addr;
  3529. break;
  3530. case SIOCGMIIREG:
  3531. if(!capable(CAP_NET_ADMIN))
  3532. return -EPERM;
  3533. spin_lock_irqsave(&adapter->stats_lock, flags);
  3534. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3535. &data->val_out)) {
  3536. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3537. return -EIO;
  3538. }
  3539. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3540. break;
  3541. case SIOCSMIIREG:
  3542. if(!capable(CAP_NET_ADMIN))
  3543. return -EPERM;
  3544. if(data->reg_num & ~(0x1F))
  3545. return -EFAULT;
  3546. mii_reg = data->val_in;
  3547. spin_lock_irqsave(&adapter->stats_lock, flags);
  3548. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3549. mii_reg)) {
  3550. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3551. return -EIO;
  3552. }
  3553. if(adapter->hw.phy_type == e1000_phy_m88) {
  3554. switch (data->reg_num) {
  3555. case PHY_CTRL:
  3556. if(mii_reg & MII_CR_POWER_DOWN)
  3557. break;
  3558. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3559. adapter->hw.autoneg = 1;
  3560. adapter->hw.autoneg_advertised = 0x2F;
  3561. } else {
  3562. if (mii_reg & 0x40)
  3563. spddplx = SPEED_1000;
  3564. else if (mii_reg & 0x2000)
  3565. spddplx = SPEED_100;
  3566. else
  3567. spddplx = SPEED_10;
  3568. spddplx += (mii_reg & 0x100)
  3569. ? FULL_DUPLEX :
  3570. HALF_DUPLEX;
  3571. retval = e1000_set_spd_dplx(adapter,
  3572. spddplx);
  3573. if(retval) {
  3574. spin_unlock_irqrestore(
  3575. &adapter->stats_lock,
  3576. flags);
  3577. return retval;
  3578. }
  3579. }
  3580. if(netif_running(adapter->netdev)) {
  3581. e1000_down(adapter);
  3582. e1000_up(adapter);
  3583. } else
  3584. e1000_reset(adapter);
  3585. break;
  3586. case M88E1000_PHY_SPEC_CTRL:
  3587. case M88E1000_EXT_PHY_SPEC_CTRL:
  3588. if(e1000_phy_reset(&adapter->hw)) {
  3589. spin_unlock_irqrestore(
  3590. &adapter->stats_lock, flags);
  3591. return -EIO;
  3592. }
  3593. break;
  3594. }
  3595. } else {
  3596. switch (data->reg_num) {
  3597. case PHY_CTRL:
  3598. if(mii_reg & MII_CR_POWER_DOWN)
  3599. break;
  3600. if(netif_running(adapter->netdev)) {
  3601. e1000_down(adapter);
  3602. e1000_up(adapter);
  3603. } else
  3604. e1000_reset(adapter);
  3605. break;
  3606. }
  3607. }
  3608. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3609. break;
  3610. default:
  3611. return -EOPNOTSUPP;
  3612. }
  3613. return E1000_SUCCESS;
  3614. }
  3615. void
  3616. e1000_pci_set_mwi(struct e1000_hw *hw)
  3617. {
  3618. struct e1000_adapter *adapter = hw->back;
  3619. int ret_val = pci_set_mwi(adapter->pdev);
  3620. if(ret_val)
  3621. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3622. }
  3623. void
  3624. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3625. {
  3626. struct e1000_adapter *adapter = hw->back;
  3627. pci_clear_mwi(adapter->pdev);
  3628. }
  3629. void
  3630. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3631. {
  3632. struct e1000_adapter *adapter = hw->back;
  3633. pci_read_config_word(adapter->pdev, reg, value);
  3634. }
  3635. void
  3636. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3637. {
  3638. struct e1000_adapter *adapter = hw->back;
  3639. pci_write_config_word(adapter->pdev, reg, *value);
  3640. }
  3641. uint32_t
  3642. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3643. {
  3644. return inl(port);
  3645. }
  3646. void
  3647. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3648. {
  3649. outl(value, port);
  3650. }
  3651. static void
  3652. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3653. {
  3654. struct e1000_adapter *adapter = netdev_priv(netdev);
  3655. uint32_t ctrl, rctl;
  3656. e1000_irq_disable(adapter);
  3657. adapter->vlgrp = grp;
  3658. if(grp) {
  3659. /* enable VLAN tag insert/strip */
  3660. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3661. ctrl |= E1000_CTRL_VME;
  3662. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3663. /* enable VLAN receive filtering */
  3664. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3665. rctl |= E1000_RCTL_VFE;
  3666. rctl &= ~E1000_RCTL_CFIEN;
  3667. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3668. e1000_update_mng_vlan(adapter);
  3669. } else {
  3670. /* disable VLAN tag insert/strip */
  3671. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3672. ctrl &= ~E1000_CTRL_VME;
  3673. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3674. /* disable VLAN filtering */
  3675. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3676. rctl &= ~E1000_RCTL_VFE;
  3677. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3678. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3679. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3680. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3681. }
  3682. }
  3683. e1000_irq_enable(adapter);
  3684. }
  3685. static void
  3686. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3687. {
  3688. struct e1000_adapter *adapter = netdev_priv(netdev);
  3689. uint32_t vfta, index;
  3690. if((adapter->hw.mng_cookie.status &
  3691. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3692. (vid == adapter->mng_vlan_id))
  3693. return;
  3694. /* add VID to filter table */
  3695. index = (vid >> 5) & 0x7F;
  3696. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3697. vfta |= (1 << (vid & 0x1F));
  3698. e1000_write_vfta(&adapter->hw, index, vfta);
  3699. }
  3700. static void
  3701. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3702. {
  3703. struct e1000_adapter *adapter = netdev_priv(netdev);
  3704. uint32_t vfta, index;
  3705. e1000_irq_disable(adapter);
  3706. if(adapter->vlgrp)
  3707. adapter->vlgrp->vlan_devices[vid] = NULL;
  3708. e1000_irq_enable(adapter);
  3709. if((adapter->hw.mng_cookie.status &
  3710. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3711. (vid == adapter->mng_vlan_id)) {
  3712. /* release control to f/w */
  3713. e1000_release_hw_control(adapter);
  3714. return;
  3715. }
  3716. /* remove VID from filter table */
  3717. index = (vid >> 5) & 0x7F;
  3718. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3719. vfta &= ~(1 << (vid & 0x1F));
  3720. e1000_write_vfta(&adapter->hw, index, vfta);
  3721. }
  3722. static void
  3723. e1000_restore_vlan(struct e1000_adapter *adapter)
  3724. {
  3725. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3726. if(adapter->vlgrp) {
  3727. uint16_t vid;
  3728. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3729. if(!adapter->vlgrp->vlan_devices[vid])
  3730. continue;
  3731. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3732. }
  3733. }
  3734. }
  3735. int
  3736. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3737. {
  3738. adapter->hw.autoneg = 0;
  3739. /* Fiber NICs only allow 1000 gbps Full duplex */
  3740. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3741. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3742. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3743. return -EINVAL;
  3744. }
  3745. switch(spddplx) {
  3746. case SPEED_10 + DUPLEX_HALF:
  3747. adapter->hw.forced_speed_duplex = e1000_10_half;
  3748. break;
  3749. case SPEED_10 + DUPLEX_FULL:
  3750. adapter->hw.forced_speed_duplex = e1000_10_full;
  3751. break;
  3752. case SPEED_100 + DUPLEX_HALF:
  3753. adapter->hw.forced_speed_duplex = e1000_100_half;
  3754. break;
  3755. case SPEED_100 + DUPLEX_FULL:
  3756. adapter->hw.forced_speed_duplex = e1000_100_full;
  3757. break;
  3758. case SPEED_1000 + DUPLEX_FULL:
  3759. adapter->hw.autoneg = 1;
  3760. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3761. break;
  3762. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3763. default:
  3764. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3765. return -EINVAL;
  3766. }
  3767. return 0;
  3768. }
  3769. #ifdef CONFIG_PM
  3770. static int
  3771. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3772. {
  3773. struct net_device *netdev = pci_get_drvdata(pdev);
  3774. struct e1000_adapter *adapter = netdev_priv(netdev);
  3775. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3776. uint32_t wufc = adapter->wol;
  3777. int retval = 0;
  3778. netif_device_detach(netdev);
  3779. if(netif_running(netdev))
  3780. e1000_down(adapter);
  3781. status = E1000_READ_REG(&adapter->hw, STATUS);
  3782. if(status & E1000_STATUS_LU)
  3783. wufc &= ~E1000_WUFC_LNKC;
  3784. if(wufc) {
  3785. e1000_setup_rctl(adapter);
  3786. e1000_set_multi(netdev);
  3787. /* turn on all-multi mode if wake on multicast is enabled */
  3788. if(adapter->wol & E1000_WUFC_MC) {
  3789. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3790. rctl |= E1000_RCTL_MPE;
  3791. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3792. }
  3793. if(adapter->hw.mac_type >= e1000_82540) {
  3794. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3795. /* advertise wake from D3Cold */
  3796. #define E1000_CTRL_ADVD3WUC 0x00100000
  3797. /* phy power management enable */
  3798. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3799. ctrl |= E1000_CTRL_ADVD3WUC |
  3800. E1000_CTRL_EN_PHY_PWR_MGMT;
  3801. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3802. }
  3803. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3804. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3805. /* keep the laser running in D3 */
  3806. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3807. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3808. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3809. }
  3810. /* Allow time for pending master requests to run */
  3811. e1000_disable_pciex_master(&adapter->hw);
  3812. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3813. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3814. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3815. if (retval)
  3816. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3817. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3818. if (retval)
  3819. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3820. } else {
  3821. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3822. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3823. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3824. if (retval)
  3825. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3826. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3827. if (retval)
  3828. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3829. }
  3830. pci_save_state(pdev);
  3831. if(adapter->hw.mac_type >= e1000_82540 &&
  3832. adapter->hw.media_type == e1000_media_type_copper) {
  3833. manc = E1000_READ_REG(&adapter->hw, MANC);
  3834. if(manc & E1000_MANC_SMBUS_EN) {
  3835. manc |= E1000_MANC_ARP_EN;
  3836. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3837. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3838. if (retval)
  3839. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3840. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3841. if (retval)
  3842. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3843. }
  3844. }
  3845. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3846. * would have already happened in close and is redundant. */
  3847. e1000_release_hw_control(adapter);
  3848. pci_disable_device(pdev);
  3849. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3850. if (retval)
  3851. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3852. return 0;
  3853. }
  3854. static int
  3855. e1000_resume(struct pci_dev *pdev)
  3856. {
  3857. struct net_device *netdev = pci_get_drvdata(pdev);
  3858. struct e1000_adapter *adapter = netdev_priv(netdev);
  3859. int retval;
  3860. uint32_t manc, ret_val;
  3861. retval = pci_set_power_state(pdev, PCI_D0);
  3862. if (retval)
  3863. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3864. ret_val = pci_enable_device(pdev);
  3865. pci_set_master(pdev);
  3866. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3867. if (retval)
  3868. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3869. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3870. if (retval)
  3871. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3872. e1000_reset(adapter);
  3873. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3874. if(netif_running(netdev))
  3875. e1000_up(adapter);
  3876. netif_device_attach(netdev);
  3877. if(adapter->hw.mac_type >= e1000_82540 &&
  3878. adapter->hw.media_type == e1000_media_type_copper) {
  3879. manc = E1000_READ_REG(&adapter->hw, MANC);
  3880. manc &= ~(E1000_MANC_ARP_EN);
  3881. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3882. }
  3883. /* If the controller is 82573 and f/w is AMT, do not set
  3884. * DRV_LOAD until the interface is up. For all other cases,
  3885. * let the f/w know that the h/w is now under the control
  3886. * of the driver. */
  3887. if (adapter->hw.mac_type != e1000_82573 ||
  3888. !e1000_check_mng_mode(&adapter->hw))
  3889. e1000_get_hw_control(adapter);
  3890. return 0;
  3891. }
  3892. #endif
  3893. #ifdef CONFIG_NET_POLL_CONTROLLER
  3894. /*
  3895. * Polling 'interrupt' - used by things like netconsole to send skbs
  3896. * without having to re-enable interrupts. It's not called while
  3897. * the interrupt routine is executing.
  3898. */
  3899. static void
  3900. e1000_netpoll(struct net_device *netdev)
  3901. {
  3902. struct e1000_adapter *adapter = netdev_priv(netdev);
  3903. disable_irq(adapter->pdev->irq);
  3904. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3905. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3906. #ifndef CONFIG_E1000_NAPI
  3907. adapter->clean_rx(adapter, adapter->rx_ring);
  3908. #endif
  3909. enable_irq(adapter->pdev->irq);
  3910. }
  3911. #endif
  3912. /* e1000_main.c */