ice1724.c 69 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <asm/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/mpu401.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /*
  96. * default rates, default clock routines
  97. */
  98. /* check whether the clock mode is spdif-in */
  99. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  100. {
  101. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  102. }
  103. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  104. {
  105. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  106. }
  107. /*
  108. * ac97 section
  109. */
  110. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  111. {
  112. unsigned char old_cmd;
  113. int tm;
  114. for (tm = 0; tm < 0x10000; tm++) {
  115. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  116. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  117. continue;
  118. if (!(old_cmd & VT1724_AC97_READY))
  119. continue;
  120. return old_cmd;
  121. }
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  123. return old_cmd;
  124. }
  125. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  126. {
  127. int tm;
  128. for (tm = 0; tm < 0x10000; tm++)
  129. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  130. return 0;
  131. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  132. return -EIO;
  133. }
  134. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  135. unsigned short reg,
  136. unsigned short val)
  137. {
  138. struct snd_ice1712 *ice = ac97->private_data;
  139. unsigned char old_cmd;
  140. old_cmd = snd_vt1724_ac97_ready(ice);
  141. old_cmd &= ~VT1724_AC97_ID_MASK;
  142. old_cmd |= ac97->num;
  143. outb(reg, ICEMT1724(ice, AC97_INDEX));
  144. outw(val, ICEMT1724(ice, AC97_DATA));
  145. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  146. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  147. }
  148. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  149. {
  150. struct snd_ice1712 *ice = ac97->private_data;
  151. unsigned char old_cmd;
  152. old_cmd = snd_vt1724_ac97_ready(ice);
  153. old_cmd &= ~VT1724_AC97_ID_MASK;
  154. old_cmd |= ac97->num;
  155. outb(reg, ICEMT1724(ice, AC97_INDEX));
  156. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  157. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  158. return ~0;
  159. return inw(ICEMT1724(ice, AC97_DATA));
  160. }
  161. /*
  162. * GPIO operations
  163. */
  164. /* set gpio direction 0 = read, 1 = write */
  165. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  168. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  169. }
  170. /* set the gpio mask (0 = writable) */
  171. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  172. {
  173. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  174. if (! ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  175. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  176. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  177. }
  178. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. outw(data, ICEREG1724(ice, GPIO_DATA));
  181. if (! ice->vt1720)
  182. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  183. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  184. }
  185. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  186. {
  187. unsigned int data;
  188. if (! ice->vt1720)
  189. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  190. else
  191. data = 0;
  192. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  193. return data;
  194. }
  195. /*
  196. * MPU401 accessor
  197. */
  198. static unsigned char snd_vt1724_mpu401_read(struct snd_mpu401 *mpu,
  199. unsigned long addr)
  200. {
  201. /* fix status bits to the standard position */
  202. /* only RX_EMPTY and TX_FULL are checked */
  203. if (addr == MPU401C(mpu))
  204. return (inb(addr) & 0x0c) << 4;
  205. else
  206. return inb(addr);
  207. }
  208. static void snd_vt1724_mpu401_write(struct snd_mpu401 *mpu,
  209. unsigned char data, unsigned long addr)
  210. {
  211. if (addr == MPU401C(mpu)) {
  212. if (data == MPU401_ENTER_UART)
  213. outb(0x01, addr);
  214. /* what else? */
  215. } else
  216. outb(data, addr);
  217. }
  218. /*
  219. * Interrupt handler
  220. */
  221. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  222. {
  223. struct snd_ice1712 *ice = dev_id;
  224. unsigned char status;
  225. unsigned char status_mask =
  226. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  227. int handled = 0;
  228. #ifdef CONFIG_SND_DEBUG
  229. int timeout = 0;
  230. #endif
  231. while (1) {
  232. status = inb(ICEREG1724(ice, IRQSTAT));
  233. status &= status_mask;
  234. if (status == 0)
  235. break;
  236. #ifdef CONFIG_SND_DEBUG
  237. if (++timeout > 10) {
  238. printk(KERN_ERR
  239. "ice1724: Too long irq loop, status = 0x%x\n",
  240. status);
  241. break;
  242. }
  243. #endif
  244. handled = 1;
  245. if (status & VT1724_IRQ_MPU_TX) {
  246. if (ice->rmidi[0])
  247. snd_mpu401_uart_interrupt_tx(irq,
  248. ice->rmidi[0]->private_data);
  249. else /* disable TX to be sure */
  250. outb(inb(ICEREG1724(ice, IRQMASK)) |
  251. VT1724_IRQ_MPU_TX,
  252. ICEREG1724(ice, IRQMASK));
  253. /* Due to mysterical reasons, MPU_TX is always
  254. * generated (and can't be cleared) when a PCM
  255. * playback is going. So let's ignore at the
  256. * next loop.
  257. */
  258. status_mask &= ~VT1724_IRQ_MPU_TX;
  259. }
  260. if (status & VT1724_IRQ_MPU_RX) {
  261. if (ice->rmidi[0])
  262. snd_mpu401_uart_interrupt(irq,
  263. ice->rmidi[0]->private_data);
  264. else /* disable RX to be sure */
  265. outb(inb(ICEREG1724(ice, IRQMASK)) |
  266. VT1724_IRQ_MPU_RX,
  267. ICEREG1724(ice, IRQMASK));
  268. }
  269. /* ack MPU irq */
  270. outb(status, ICEREG1724(ice, IRQSTAT));
  271. if (status & VT1724_IRQ_MTPCM) {
  272. /*
  273. * Multi-track PCM
  274. * PCM assignment are:
  275. * Playback DMA0 (M/C) = playback_pro_substream
  276. * Playback DMA1 = playback_con_substream_ds[0]
  277. * Playback DMA2 = playback_con_substream_ds[1]
  278. * Playback DMA3 = playback_con_substream_ds[2]
  279. * Playback DMA4 (SPDIF) = playback_con_substream
  280. * Record DMA0 = capture_pro_substream
  281. * Record DMA1 = capture_con_substream
  282. */
  283. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  284. if (mtstat & VT1724_MULTI_PDMA0) {
  285. if (ice->playback_pro_substream)
  286. snd_pcm_period_elapsed(ice->playback_pro_substream);
  287. }
  288. if (mtstat & VT1724_MULTI_RDMA0) {
  289. if (ice->capture_pro_substream)
  290. snd_pcm_period_elapsed(ice->capture_pro_substream);
  291. }
  292. if (mtstat & VT1724_MULTI_PDMA1) {
  293. if (ice->playback_con_substream_ds[0])
  294. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  295. }
  296. if (mtstat & VT1724_MULTI_PDMA2) {
  297. if (ice->playback_con_substream_ds[1])
  298. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  299. }
  300. if (mtstat & VT1724_MULTI_PDMA3) {
  301. if (ice->playback_con_substream_ds[2])
  302. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  303. }
  304. if (mtstat & VT1724_MULTI_PDMA4) {
  305. if (ice->playback_con_substream)
  306. snd_pcm_period_elapsed(ice->playback_con_substream);
  307. }
  308. if (mtstat & VT1724_MULTI_RDMA1) {
  309. if (ice->capture_con_substream)
  310. snd_pcm_period_elapsed(ice->capture_con_substream);
  311. }
  312. /* ack anyway to avoid freeze */
  313. outb(mtstat, ICEMT1724(ice, IRQ));
  314. /* ought to really handle this properly */
  315. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  316. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  317. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  318. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  319. /* If I don't do this, I get machine lockup due to continual interrupts */
  320. }
  321. }
  322. }
  323. return IRQ_RETVAL(handled);
  324. }
  325. /*
  326. * PCM code - professional part (multitrack)
  327. */
  328. static unsigned int rates[] = {
  329. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  330. 32000, 44100, 48000, 64000, 88200, 96000,
  331. 176400, 192000,
  332. };
  333. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  334. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  335. .list = rates,
  336. .mask = 0,
  337. };
  338. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  339. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  340. .list = rates,
  341. .mask = 0,
  342. };
  343. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  344. .count = ARRAY_SIZE(rates),
  345. .list = rates,
  346. .mask = 0,
  347. };
  348. struct vt1724_pcm_reg {
  349. unsigned int addr; /* ADDR register offset */
  350. unsigned int size; /* SIZE register offset */
  351. unsigned int count; /* COUNT register offset */
  352. unsigned int start; /* start & pause bit */
  353. };
  354. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  355. {
  356. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  357. unsigned char what;
  358. unsigned char old;
  359. struct snd_pcm_substream *s;
  360. what = 0;
  361. snd_pcm_group_for_each_entry(s, substream) {
  362. if (snd_pcm_substream_chip(s) == ice) {
  363. const struct vt1724_pcm_reg *reg;
  364. reg = s->runtime->private_data;
  365. what |= reg->start;
  366. snd_pcm_trigger_done(s, substream);
  367. }
  368. }
  369. switch (cmd) {
  370. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  371. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  372. spin_lock(&ice->reg_lock);
  373. old = inb(ICEMT1724(ice, DMA_PAUSE));
  374. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  375. old |= what;
  376. else
  377. old &= ~what;
  378. outb(old, ICEMT1724(ice, DMA_PAUSE));
  379. spin_unlock(&ice->reg_lock);
  380. break;
  381. case SNDRV_PCM_TRIGGER_START:
  382. case SNDRV_PCM_TRIGGER_STOP:
  383. spin_lock(&ice->reg_lock);
  384. old = inb(ICEMT1724(ice, DMA_CONTROL));
  385. if (cmd == SNDRV_PCM_TRIGGER_START)
  386. old |= what;
  387. else
  388. old &= ~what;
  389. outb(old, ICEMT1724(ice, DMA_CONTROL));
  390. spin_unlock(&ice->reg_lock);
  391. break;
  392. default:
  393. return -EINVAL;
  394. }
  395. return 0;
  396. }
  397. /*
  398. */
  399. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  400. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  401. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  402. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  403. static const unsigned int stdclock_rate_list[16] = {
  404. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  405. 22050, 11025, 88200, 176400, 0, 192000, 64000
  406. };
  407. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  408. {
  409. unsigned int rate;
  410. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  411. return rate;
  412. }
  413. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  414. {
  415. int i;
  416. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  417. if (stdclock_rate_list[i] == rate) {
  418. outb(i, ICEMT1724(ice, RATE));
  419. return;
  420. }
  421. }
  422. }
  423. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  424. unsigned int rate)
  425. {
  426. unsigned char val, old;
  427. /* check MT02 */
  428. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  429. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  430. if (rate > 96000)
  431. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  432. else
  433. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  434. if (val != old) {
  435. outb(val, ICEMT1724(ice, I2S_FORMAT));
  436. /* master clock changed */
  437. return 1;
  438. }
  439. }
  440. /* no change in master clock */
  441. return 0;
  442. }
  443. static void snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  444. int force)
  445. {
  446. unsigned long flags;
  447. unsigned char mclk_change;
  448. unsigned int i, old_rate;
  449. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  450. return;
  451. spin_lock_irqsave(&ice->reg_lock, flags);
  452. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  453. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  454. /* running? we cannot change the rate now... */
  455. spin_unlock_irqrestore(&ice->reg_lock, flags);
  456. return;
  457. }
  458. if (!force && is_pro_rate_locked(ice)) {
  459. spin_unlock_irqrestore(&ice->reg_lock, flags);
  460. return;
  461. }
  462. old_rate = ice->get_rate(ice);
  463. if (force || (old_rate != rate))
  464. ice->set_rate(ice, rate);
  465. else if (rate == ice->cur_rate) {
  466. spin_unlock_irqrestore(&ice->reg_lock, flags);
  467. return;
  468. }
  469. ice->cur_rate = rate;
  470. /* setting master clock */
  471. mclk_change = ice->set_mclk(ice, rate);
  472. spin_unlock_irqrestore(&ice->reg_lock, flags);
  473. if (mclk_change && ice->gpio.i2s_mclk_changed)
  474. ice->gpio.i2s_mclk_changed(ice);
  475. if (ice->gpio.set_pro_rate)
  476. ice->gpio.set_pro_rate(ice, rate);
  477. /* set up codecs */
  478. for (i = 0; i < ice->akm_codecs; i++) {
  479. if (ice->akm[i].ops.set_rate_val)
  480. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  481. }
  482. if (ice->spdif.ops.setup_rate)
  483. ice->spdif.ops.setup_rate(ice, rate);
  484. }
  485. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  486. struct snd_pcm_hw_params *hw_params)
  487. {
  488. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  489. int i, chs;
  490. chs = params_channels(hw_params);
  491. mutex_lock(&ice->open_mutex);
  492. /* mark surround channels */
  493. if (substream == ice->playback_pro_substream) {
  494. /* PDMA0 can be multi-channel up to 8 */
  495. chs = chs / 2 - 1;
  496. for (i = 0; i < chs; i++) {
  497. if (ice->pcm_reserved[i] &&
  498. ice->pcm_reserved[i] != substream) {
  499. mutex_unlock(&ice->open_mutex);
  500. return -EBUSY;
  501. }
  502. ice->pcm_reserved[i] = substream;
  503. }
  504. for (; i < 3; i++) {
  505. if (ice->pcm_reserved[i] == substream)
  506. ice->pcm_reserved[i] = NULL;
  507. }
  508. } else {
  509. for (i = 0; i < 3; i++) {
  510. /* check individual playback stream */
  511. if (ice->playback_con_substream_ds[i] == substream) {
  512. if (ice->pcm_reserved[i] &&
  513. ice->pcm_reserved[i] != substream) {
  514. mutex_unlock(&ice->open_mutex);
  515. return -EBUSY;
  516. }
  517. ice->pcm_reserved[i] = substream;
  518. break;
  519. }
  520. }
  521. }
  522. mutex_unlock(&ice->open_mutex);
  523. snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  524. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  525. }
  526. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  527. {
  528. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  529. int i;
  530. mutex_lock(&ice->open_mutex);
  531. /* unmark surround channels */
  532. for (i = 0; i < 3; i++)
  533. if (ice->pcm_reserved[i] == substream)
  534. ice->pcm_reserved[i] = NULL;
  535. mutex_unlock(&ice->open_mutex);
  536. return snd_pcm_lib_free_pages(substream);
  537. }
  538. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  539. {
  540. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  541. unsigned char val;
  542. unsigned int size;
  543. spin_lock_irq(&ice->reg_lock);
  544. val = (8 - substream->runtime->channels) >> 1;
  545. outb(val, ICEMT1724(ice, BURST));
  546. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  547. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  548. // outl(size, ICEMT1724(ice, PLAYBACK_SIZE));
  549. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  550. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  551. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  552. // outl(size, ICEMT1724(ice, PLAYBACK_COUNT));
  553. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  554. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  555. spin_unlock_irq(&ice->reg_lock);
  556. // printk("pro prepare: ch = %d, addr = 0x%x, buffer = 0x%x, period = 0x%x\n", substream->runtime->channels, (unsigned int)substream->runtime->dma_addr, snd_pcm_lib_buffer_bytes(substream), snd_pcm_lib_period_bytes(substream));
  557. return 0;
  558. }
  559. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  560. {
  561. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  562. size_t ptr;
  563. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  564. return 0;
  565. #if 0 /* read PLAYBACK_ADDR */
  566. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  567. if (ptr < substream->runtime->dma_addr) {
  568. snd_printd("ice1724: invalid negative ptr\n");
  569. return 0;
  570. }
  571. ptr -= substream->runtime->dma_addr;
  572. ptr = bytes_to_frames(substream->runtime, ptr);
  573. if (ptr >= substream->runtime->buffer_size) {
  574. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  575. (int)ptr, (int)substream->runtime->period_size);
  576. return 0;
  577. }
  578. #else /* read PLAYBACK_SIZE */
  579. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  580. ptr = (ptr + 1) << 2;
  581. ptr = bytes_to_frames(substream->runtime, ptr);
  582. if (! ptr)
  583. ;
  584. else if (ptr <= substream->runtime->buffer_size)
  585. ptr = substream->runtime->buffer_size - ptr;
  586. else {
  587. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  588. (int)ptr, (int)substream->runtime->buffer_size);
  589. ptr = 0;
  590. }
  591. #endif
  592. return ptr;
  593. }
  594. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  595. {
  596. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  597. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  598. spin_lock_irq(&ice->reg_lock);
  599. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  600. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  601. ice->profi_port + reg->size);
  602. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  603. ice->profi_port + reg->count);
  604. spin_unlock_irq(&ice->reg_lock);
  605. return 0;
  606. }
  607. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  608. {
  609. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  610. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  611. size_t ptr;
  612. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  613. return 0;
  614. #if 0 /* use ADDR register */
  615. ptr = inl(ice->profi_port + reg->addr);
  616. ptr -= substream->runtime->dma_addr;
  617. return bytes_to_frames(substream->runtime, ptr);
  618. #else /* use SIZE register */
  619. ptr = inw(ice->profi_port + reg->size);
  620. ptr = (ptr + 1) << 2;
  621. ptr = bytes_to_frames(substream->runtime, ptr);
  622. if (! ptr)
  623. ;
  624. else if (ptr <= substream->runtime->buffer_size)
  625. ptr = substream->runtime->buffer_size - ptr;
  626. else {
  627. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  628. (int)ptr, (int)substream->runtime->buffer_size);
  629. ptr = 0;
  630. }
  631. return ptr;
  632. #endif
  633. }
  634. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  635. .addr = VT1724_MT_PLAYBACK_ADDR,
  636. .size = VT1724_MT_PLAYBACK_SIZE,
  637. .count = VT1724_MT_PLAYBACK_COUNT,
  638. .start = VT1724_PDMA0_START,
  639. };
  640. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  641. .addr = VT1724_MT_CAPTURE_ADDR,
  642. .size = VT1724_MT_CAPTURE_SIZE,
  643. .count = VT1724_MT_CAPTURE_COUNT,
  644. .start = VT1724_RDMA0_START,
  645. };
  646. static const struct snd_pcm_hardware snd_vt1724_playback_pro =
  647. {
  648. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  649. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  650. SNDRV_PCM_INFO_MMAP_VALID |
  651. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  652. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  653. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  654. .rate_min = 8000,
  655. .rate_max = 192000,
  656. .channels_min = 2,
  657. .channels_max = 8,
  658. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  659. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  660. .period_bytes_max = (1UL << 21),
  661. .periods_min = 2,
  662. .periods_max = 1024,
  663. };
  664. static const struct snd_pcm_hardware snd_vt1724_spdif =
  665. {
  666. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  667. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  668. SNDRV_PCM_INFO_MMAP_VALID |
  669. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  670. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  671. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  672. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  673. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  674. SNDRV_PCM_RATE_192000),
  675. .rate_min = 32000,
  676. .rate_max = 192000,
  677. .channels_min = 2,
  678. .channels_max = 2,
  679. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  680. .period_bytes_min = 2 * 4 * 2,
  681. .period_bytes_max = (1UL << 18),
  682. .periods_min = 2,
  683. .periods_max = 1024,
  684. };
  685. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo =
  686. {
  687. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  688. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  689. SNDRV_PCM_INFO_MMAP_VALID |
  690. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  691. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  692. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  693. .rate_min = 8000,
  694. .rate_max = 192000,
  695. .channels_min = 2,
  696. .channels_max = 2,
  697. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  698. .period_bytes_min = 2 * 4 * 2,
  699. .period_bytes_max = (1UL << 18),
  700. .periods_min = 2,
  701. .periods_max = 1024,
  702. };
  703. /*
  704. * set rate constraints
  705. */
  706. static void set_std_hw_rates(struct snd_ice1712 *ice)
  707. {
  708. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  709. /* I2S */
  710. /* VT1720 doesn't support more than 96kHz */
  711. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  712. ice->hw_rates = &hw_constraints_rates_192;
  713. else
  714. ice->hw_rates = &hw_constraints_rates_96;
  715. } else {
  716. /* ACLINK */
  717. ice->hw_rates = &hw_constraints_rates_48;
  718. }
  719. }
  720. static int set_rate_constraints(struct snd_ice1712 *ice,
  721. struct snd_pcm_substream *substream)
  722. {
  723. struct snd_pcm_runtime *runtime = substream->runtime;
  724. runtime->hw.rate_min = ice->hw_rates->list[0];
  725. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  726. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  727. return snd_pcm_hw_constraint_list(runtime, 0,
  728. SNDRV_PCM_HW_PARAM_RATE,
  729. ice->hw_rates);
  730. }
  731. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  732. * actually used
  733. */
  734. #define VT1724_BUFFER_ALIGN 0x20
  735. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  736. {
  737. struct snd_pcm_runtime *runtime = substream->runtime;
  738. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  739. int chs;
  740. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  741. ice->playback_pro_substream = substream;
  742. runtime->hw = snd_vt1724_playback_pro;
  743. snd_pcm_set_sync(substream);
  744. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  745. set_rate_constraints(ice, substream);
  746. mutex_lock(&ice->open_mutex);
  747. /* calculate the currently available channels */
  748. for (chs = 0; chs < 3; chs++) {
  749. if (ice->pcm_reserved[chs])
  750. break;
  751. }
  752. chs = (chs + 1) * 2;
  753. runtime->hw.channels_max = chs;
  754. if (chs > 2) /* channels must be even */
  755. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  756. mutex_unlock(&ice->open_mutex);
  757. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  758. VT1724_BUFFER_ALIGN);
  759. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  760. VT1724_BUFFER_ALIGN);
  761. return 0;
  762. }
  763. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  764. {
  765. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  766. struct snd_pcm_runtime *runtime = substream->runtime;
  767. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  768. ice->capture_pro_substream = substream;
  769. runtime->hw = snd_vt1724_2ch_stereo;
  770. snd_pcm_set_sync(substream);
  771. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  772. set_rate_constraints(ice, substream);
  773. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  774. VT1724_BUFFER_ALIGN);
  775. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  776. VT1724_BUFFER_ALIGN);
  777. return 0;
  778. }
  779. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  780. {
  781. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  782. if (PRO_RATE_RESET)
  783. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  784. ice->playback_pro_substream = NULL;
  785. return 0;
  786. }
  787. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  788. {
  789. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  790. if (PRO_RATE_RESET)
  791. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  792. ice->capture_pro_substream = NULL;
  793. return 0;
  794. }
  795. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  796. .open = snd_vt1724_playback_pro_open,
  797. .close = snd_vt1724_playback_pro_close,
  798. .ioctl = snd_pcm_lib_ioctl,
  799. .hw_params = snd_vt1724_pcm_hw_params,
  800. .hw_free = snd_vt1724_pcm_hw_free,
  801. .prepare = snd_vt1724_playback_pro_prepare,
  802. .trigger = snd_vt1724_pcm_trigger,
  803. .pointer = snd_vt1724_playback_pro_pointer,
  804. };
  805. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  806. .open = snd_vt1724_capture_pro_open,
  807. .close = snd_vt1724_capture_pro_close,
  808. .ioctl = snd_pcm_lib_ioctl,
  809. .hw_params = snd_vt1724_pcm_hw_params,
  810. .hw_free = snd_vt1724_pcm_hw_free,
  811. .prepare = snd_vt1724_pcm_prepare,
  812. .trigger = snd_vt1724_pcm_trigger,
  813. .pointer = snd_vt1724_pcm_pointer,
  814. };
  815. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 * ice, int device)
  816. {
  817. struct snd_pcm *pcm;
  818. int err;
  819. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  820. if (err < 0)
  821. return err;
  822. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  823. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  824. pcm->private_data = ice;
  825. pcm->info_flags = 0;
  826. strcpy(pcm->name, "ICE1724");
  827. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  828. snd_dma_pci_data(ice->pci),
  829. 256*1024, 256*1024);
  830. ice->pcm_pro = pcm;
  831. return 0;
  832. }
  833. /*
  834. * SPDIF PCM
  835. */
  836. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  837. .addr = VT1724_MT_PDMA4_ADDR,
  838. .size = VT1724_MT_PDMA4_SIZE,
  839. .count = VT1724_MT_PDMA4_COUNT,
  840. .start = VT1724_PDMA4_START,
  841. };
  842. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  843. .addr = VT1724_MT_RDMA1_ADDR,
  844. .size = VT1724_MT_RDMA1_SIZE,
  845. .count = VT1724_MT_RDMA1_COUNT,
  846. .start = VT1724_RDMA1_START,
  847. };
  848. /* update spdif control bits; call with reg_lock */
  849. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  850. {
  851. unsigned char cbit, disabled;
  852. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  853. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  854. if (cbit != disabled)
  855. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  856. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  857. if (cbit != disabled)
  858. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  859. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  860. }
  861. /* update SPDIF control bits according to the given rate */
  862. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  863. {
  864. unsigned int val, nval;
  865. unsigned long flags;
  866. spin_lock_irqsave(&ice->reg_lock, flags);
  867. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  868. nval &= ~(7 << 12);
  869. switch (rate) {
  870. case 44100: break;
  871. case 48000: nval |= 2 << 12; break;
  872. case 32000: nval |= 3 << 12; break;
  873. case 88200: nval |= 4 << 12; break;
  874. case 96000: nval |= 5 << 12; break;
  875. case 192000: nval |= 6 << 12; break;
  876. case 176400: nval |= 7 << 12; break;
  877. }
  878. if (val != nval)
  879. update_spdif_bits(ice, nval);
  880. spin_unlock_irqrestore(&ice->reg_lock, flags);
  881. }
  882. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  883. {
  884. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  885. if (! ice->force_pdma4)
  886. update_spdif_rate(ice, substream->runtime->rate);
  887. return snd_vt1724_pcm_prepare(substream);
  888. }
  889. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  890. {
  891. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  892. struct snd_pcm_runtime *runtime = substream->runtime;
  893. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  894. ice->playback_con_substream = substream;
  895. if (ice->force_pdma4) {
  896. runtime->hw = snd_vt1724_2ch_stereo;
  897. set_rate_constraints(ice, substream);
  898. } else
  899. runtime->hw = snd_vt1724_spdif;
  900. snd_pcm_set_sync(substream);
  901. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  902. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  903. VT1724_BUFFER_ALIGN);
  904. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  905. VT1724_BUFFER_ALIGN);
  906. if (ice->spdif.ops.open)
  907. ice->spdif.ops.open(ice, substream);
  908. return 0;
  909. }
  910. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  911. {
  912. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  913. if (PRO_RATE_RESET)
  914. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  915. ice->playback_con_substream = NULL;
  916. if (ice->spdif.ops.close)
  917. ice->spdif.ops.close(ice, substream);
  918. return 0;
  919. }
  920. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  921. {
  922. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  923. struct snd_pcm_runtime *runtime = substream->runtime;
  924. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  925. ice->capture_con_substream = substream;
  926. if (ice->force_rdma1) {
  927. runtime->hw = snd_vt1724_2ch_stereo;
  928. set_rate_constraints(ice, substream);
  929. } else
  930. runtime->hw = snd_vt1724_spdif;
  931. snd_pcm_set_sync(substream);
  932. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  933. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  934. VT1724_BUFFER_ALIGN);
  935. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  936. VT1724_BUFFER_ALIGN);
  937. if (ice->spdif.ops.open)
  938. ice->spdif.ops.open(ice, substream);
  939. return 0;
  940. }
  941. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  942. {
  943. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  944. if (PRO_RATE_RESET)
  945. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  946. ice->capture_con_substream = NULL;
  947. if (ice->spdif.ops.close)
  948. ice->spdif.ops.close(ice, substream);
  949. return 0;
  950. }
  951. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  952. .open = snd_vt1724_playback_spdif_open,
  953. .close = snd_vt1724_playback_spdif_close,
  954. .ioctl = snd_pcm_lib_ioctl,
  955. .hw_params = snd_vt1724_pcm_hw_params,
  956. .hw_free = snd_vt1724_pcm_hw_free,
  957. .prepare = snd_vt1724_playback_spdif_prepare,
  958. .trigger = snd_vt1724_pcm_trigger,
  959. .pointer = snd_vt1724_pcm_pointer,
  960. };
  961. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  962. .open = snd_vt1724_capture_spdif_open,
  963. .close = snd_vt1724_capture_spdif_close,
  964. .ioctl = snd_pcm_lib_ioctl,
  965. .hw_params = snd_vt1724_pcm_hw_params,
  966. .hw_free = snd_vt1724_pcm_hw_free,
  967. .prepare = snd_vt1724_pcm_prepare,
  968. .trigger = snd_vt1724_pcm_trigger,
  969. .pointer = snd_vt1724_pcm_pointer,
  970. };
  971. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 * ice, int device)
  972. {
  973. char *name;
  974. struct snd_pcm *pcm;
  975. int play, capt;
  976. int err;
  977. if (ice->force_pdma4 ||
  978. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  979. play = 1;
  980. ice->has_spdif = 1;
  981. } else
  982. play = 0;
  983. if (ice->force_rdma1 ||
  984. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  985. capt = 1;
  986. ice->has_spdif = 1;
  987. } else
  988. capt = 0;
  989. if (! play && ! capt)
  990. return 0; /* no spdif device */
  991. if (ice->force_pdma4 || ice->force_rdma1)
  992. name = "ICE1724 Secondary";
  993. else
  994. name = "IEC1724 IEC958";
  995. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  996. if (err < 0)
  997. return err;
  998. if (play)
  999. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1000. &snd_vt1724_playback_spdif_ops);
  1001. if (capt)
  1002. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1003. &snd_vt1724_capture_spdif_ops);
  1004. pcm->private_data = ice;
  1005. pcm->info_flags = 0;
  1006. strcpy(pcm->name, name);
  1007. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1008. snd_dma_pci_data(ice->pci),
  1009. 64*1024, 64*1024);
  1010. ice->pcm = pcm;
  1011. return 0;
  1012. }
  1013. /*
  1014. * independent surround PCMs
  1015. */
  1016. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1017. {
  1018. .addr = VT1724_MT_PDMA1_ADDR,
  1019. .size = VT1724_MT_PDMA1_SIZE,
  1020. .count = VT1724_MT_PDMA1_COUNT,
  1021. .start = VT1724_PDMA1_START,
  1022. },
  1023. {
  1024. .addr = VT1724_MT_PDMA2_ADDR,
  1025. .size = VT1724_MT_PDMA2_SIZE,
  1026. .count = VT1724_MT_PDMA2_COUNT,
  1027. .start = VT1724_PDMA2_START,
  1028. },
  1029. {
  1030. .addr = VT1724_MT_PDMA3_ADDR,
  1031. .size = VT1724_MT_PDMA3_SIZE,
  1032. .count = VT1724_MT_PDMA3_COUNT,
  1033. .start = VT1724_PDMA3_START,
  1034. },
  1035. };
  1036. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1037. {
  1038. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1039. unsigned char val;
  1040. spin_lock_irq(&ice->reg_lock);
  1041. val = 3 - substream->number;
  1042. if (inb(ICEMT1724(ice, BURST)) < val)
  1043. outb(val, ICEMT1724(ice, BURST));
  1044. spin_unlock_irq(&ice->reg_lock);
  1045. return snd_vt1724_pcm_prepare(substream);
  1046. }
  1047. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1048. {
  1049. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1050. struct snd_pcm_runtime *runtime = substream->runtime;
  1051. mutex_lock(&ice->open_mutex);
  1052. /* already used by PDMA0? */
  1053. if (ice->pcm_reserved[substream->number]) {
  1054. mutex_unlock(&ice->open_mutex);
  1055. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1056. }
  1057. mutex_unlock(&ice->open_mutex);
  1058. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1059. ice->playback_con_substream_ds[substream->number] = substream;
  1060. runtime->hw = snd_vt1724_2ch_stereo;
  1061. snd_pcm_set_sync(substream);
  1062. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1063. set_rate_constraints(ice, substream);
  1064. return 0;
  1065. }
  1066. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1067. {
  1068. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1069. if (PRO_RATE_RESET)
  1070. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1071. ice->playback_con_substream_ds[substream->number] = NULL;
  1072. ice->pcm_reserved[substream->number] = NULL;
  1073. return 0;
  1074. }
  1075. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1076. .open = snd_vt1724_playback_indep_open,
  1077. .close = snd_vt1724_playback_indep_close,
  1078. .ioctl = snd_pcm_lib_ioctl,
  1079. .hw_params = snd_vt1724_pcm_hw_params,
  1080. .hw_free = snd_vt1724_pcm_hw_free,
  1081. .prepare = snd_vt1724_playback_indep_prepare,
  1082. .trigger = snd_vt1724_pcm_trigger,
  1083. .pointer = snd_vt1724_pcm_pointer,
  1084. };
  1085. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 * ice, int device)
  1086. {
  1087. struct snd_pcm *pcm;
  1088. int play;
  1089. int err;
  1090. play = ice->num_total_dacs / 2 - 1;
  1091. if (play <= 0)
  1092. return 0;
  1093. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1094. if (err < 0)
  1095. return err;
  1096. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1097. &snd_vt1724_playback_indep_ops);
  1098. pcm->private_data = ice;
  1099. pcm->info_flags = 0;
  1100. strcpy(pcm->name, "ICE1724 Surround PCM");
  1101. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1102. snd_dma_pci_data(ice->pci),
  1103. 64*1024, 64*1024);
  1104. ice->pcm_ds = pcm;
  1105. return 0;
  1106. }
  1107. /*
  1108. * Mixer section
  1109. */
  1110. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 * ice)
  1111. {
  1112. int err;
  1113. if (! (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1114. struct snd_ac97_bus *pbus;
  1115. struct snd_ac97_template ac97;
  1116. static struct snd_ac97_bus_ops ops = {
  1117. .write = snd_vt1724_ac97_write,
  1118. .read = snd_vt1724_ac97_read,
  1119. };
  1120. /* cold reset */
  1121. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1122. mdelay(5); /* FIXME */
  1123. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1124. if ((err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus)) < 0)
  1125. return err;
  1126. memset(&ac97, 0, sizeof(ac97));
  1127. ac97.private_data = ice;
  1128. if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0)
  1129. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1130. else
  1131. return 0;
  1132. }
  1133. /* I2S mixer only */
  1134. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1135. return 0;
  1136. }
  1137. /*
  1138. *
  1139. */
  1140. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1141. {
  1142. return (unsigned int)ice->eeprom.data[idx] | \
  1143. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1144. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1145. }
  1146. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1147. struct snd_info_buffer *buffer)
  1148. {
  1149. struct snd_ice1712 *ice = entry->private_data;
  1150. unsigned int idx;
  1151. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1152. snd_iprintf(buffer, "EEPROM:\n");
  1153. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1154. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1155. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1156. snd_iprintf(buffer, " System Config : 0x%x\n",
  1157. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1158. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1159. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1160. snd_iprintf(buffer, " I2S : 0x%x\n",
  1161. ice->eeprom.data[ICE_EEP2_I2S]);
  1162. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1163. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1164. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1165. ice->eeprom.gpiodir);
  1166. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1167. ice->eeprom.gpiomask);
  1168. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1169. ice->eeprom.gpiostate);
  1170. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1171. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1172. idx, ice->eeprom.data[idx]);
  1173. snd_iprintf(buffer, "\nRegisters:\n");
  1174. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1175. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1176. for (idx = 0x0; idx < 0x20 ; idx++)
  1177. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1178. idx, inb(ice->port+idx));
  1179. for (idx = 0x0; idx < 0x30 ; idx++)
  1180. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1181. idx, inb(ice->profi_port+idx));
  1182. }
  1183. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 * ice)
  1184. {
  1185. struct snd_info_entry *entry;
  1186. if (! snd_card_proc_new(ice->card, "ice1724", &entry))
  1187. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1188. }
  1189. /*
  1190. *
  1191. */
  1192. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1193. struct snd_ctl_elem_info *uinfo)
  1194. {
  1195. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1196. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1197. return 0;
  1198. }
  1199. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1200. struct snd_ctl_elem_value *ucontrol)
  1201. {
  1202. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1203. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1204. return 0;
  1205. }
  1206. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1207. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1208. .name = "ICE1724 EEPROM",
  1209. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1210. .info = snd_vt1724_eeprom_info,
  1211. .get = snd_vt1724_eeprom_get
  1212. };
  1213. /*
  1214. */
  1215. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1216. struct snd_ctl_elem_info *uinfo)
  1217. {
  1218. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1219. uinfo->count = 1;
  1220. return 0;
  1221. }
  1222. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1223. {
  1224. unsigned int val, rbits;
  1225. val = diga->status[0] & 0x03; /* professional, non-audio */
  1226. if (val & 0x01) {
  1227. /* professional */
  1228. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1229. IEC958_AES0_PRO_EMPHASIS_5015)
  1230. val |= 1U << 3;
  1231. rbits = (diga->status[4] >> 3) & 0x0f;
  1232. if (rbits) {
  1233. switch (rbits) {
  1234. case 2: val |= 5 << 12; break; /* 96k */
  1235. case 3: val |= 6 << 12; break; /* 192k */
  1236. case 10: val |= 4 << 12; break; /* 88.2k */
  1237. case 11: val |= 7 << 12; break; /* 176.4k */
  1238. }
  1239. } else {
  1240. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1241. case IEC958_AES0_PRO_FS_44100:
  1242. break;
  1243. case IEC958_AES0_PRO_FS_32000:
  1244. val |= 3U << 12;
  1245. break;
  1246. default:
  1247. val |= 2U << 12;
  1248. break;
  1249. }
  1250. }
  1251. } else {
  1252. /* consumer */
  1253. val |= diga->status[1] & 0x04; /* copyright */
  1254. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1255. IEC958_AES0_CON_EMPHASIS_5015)
  1256. val |= 1U << 3;
  1257. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1258. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1259. }
  1260. return val;
  1261. }
  1262. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1263. {
  1264. memset(diga->status, 0, sizeof(diga->status));
  1265. diga->status[0] = val & 0x03; /* professional, non-audio */
  1266. if (val & 0x01) {
  1267. /* professional */
  1268. if (val & (1U << 3))
  1269. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1270. switch ((val >> 12) & 0x7) {
  1271. case 0:
  1272. break;
  1273. case 2:
  1274. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1275. break;
  1276. default:
  1277. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1278. break;
  1279. }
  1280. } else {
  1281. /* consumer */
  1282. diga->status[0] |= val & (1U << 2); /* copyright */
  1283. if (val & (1U << 3))
  1284. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1285. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1286. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1287. }
  1288. }
  1289. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1290. struct snd_ctl_elem_value *ucontrol)
  1291. {
  1292. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1293. unsigned int val;
  1294. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1295. decode_spdif_bits(&ucontrol->value.iec958, val);
  1296. return 0;
  1297. }
  1298. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1299. struct snd_ctl_elem_value *ucontrol)
  1300. {
  1301. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1302. unsigned int val, old;
  1303. val = encode_spdif_bits(&ucontrol->value.iec958);
  1304. spin_lock_irq(&ice->reg_lock);
  1305. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1306. if (val != old)
  1307. update_spdif_bits(ice, val);
  1308. spin_unlock_irq(&ice->reg_lock);
  1309. return (val != old);
  1310. }
  1311. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1312. {
  1313. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1314. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1315. .info = snd_vt1724_spdif_info,
  1316. .get = snd_vt1724_spdif_default_get,
  1317. .put = snd_vt1724_spdif_default_put
  1318. };
  1319. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1320. struct snd_ctl_elem_value *ucontrol)
  1321. {
  1322. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1323. IEC958_AES0_PROFESSIONAL |
  1324. IEC958_AES0_CON_NOT_COPYRIGHT |
  1325. IEC958_AES0_CON_EMPHASIS;
  1326. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1327. IEC958_AES1_CON_CATEGORY;
  1328. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1329. return 0;
  1330. }
  1331. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1332. struct snd_ctl_elem_value *ucontrol)
  1333. {
  1334. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1335. IEC958_AES0_PROFESSIONAL |
  1336. IEC958_AES0_PRO_FS |
  1337. IEC958_AES0_PRO_EMPHASIS;
  1338. return 0;
  1339. }
  1340. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1341. {
  1342. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1343. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1344. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1345. .info = snd_vt1724_spdif_info,
  1346. .get = snd_vt1724_spdif_maskc_get,
  1347. };
  1348. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1349. {
  1350. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1351. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1352. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
  1353. .info = snd_vt1724_spdif_info,
  1354. .get = snd_vt1724_spdif_maskp_get,
  1355. };
  1356. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1357. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1358. struct snd_ctl_elem_value *ucontrol)
  1359. {
  1360. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1361. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1362. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1363. return 0;
  1364. }
  1365. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1366. struct snd_ctl_elem_value *ucontrol)
  1367. {
  1368. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1369. unsigned char old, val;
  1370. spin_lock_irq(&ice->reg_lock);
  1371. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1372. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1373. if (ucontrol->value.integer.value[0])
  1374. val |= VT1724_CFG_SPDIF_OUT_EN;
  1375. if (old != val)
  1376. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1377. spin_unlock_irq(&ice->reg_lock);
  1378. return old != val;
  1379. }
  1380. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1381. {
  1382. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1383. /* FIXME: the following conflict with IEC958 Playback Route */
  1384. // .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),
  1385. .name = SNDRV_CTL_NAME_IEC958("Output ",NONE,SWITCH),
  1386. .info = snd_vt1724_spdif_sw_info,
  1387. .get = snd_vt1724_spdif_sw_get,
  1388. .put = snd_vt1724_spdif_sw_put
  1389. };
  1390. #if 0 /* NOT USED YET */
  1391. /*
  1392. * GPIO access from extern
  1393. */
  1394. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1395. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1396. struct snd_ctl_elem_value *ucontrol)
  1397. {
  1398. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1399. int shift = kcontrol->private_value & 0xff;
  1400. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1401. snd_ice1712_save_gpio_status(ice);
  1402. ucontrol->value.integer.value[0] =
  1403. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1404. snd_ice1712_restore_gpio_status(ice);
  1405. return 0;
  1406. }
  1407. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1408. struct snd_ctl_elem_value *ucontrol)
  1409. {
  1410. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1411. int shift = kcontrol->private_value & 0xff;
  1412. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1413. unsigned int val, nval;
  1414. if (kcontrol->private_value & (1 << 31))
  1415. return -EPERM;
  1416. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1417. snd_ice1712_save_gpio_status(ice);
  1418. val = snd_ice1712_gpio_read(ice);
  1419. nval |= val & ~(1 << shift);
  1420. if (val != nval)
  1421. snd_ice1712_gpio_write(ice, nval);
  1422. snd_ice1712_restore_gpio_status(ice);
  1423. return val != nval;
  1424. }
  1425. #endif /* NOT USED YET */
  1426. /*
  1427. * rate
  1428. */
  1429. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1430. struct snd_ctl_elem_info *uinfo)
  1431. {
  1432. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1433. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1434. uinfo->count = 1;
  1435. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1436. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1437. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1438. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1439. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1440. else
  1441. sprintf(uinfo->value.enumerated.name, "%d",
  1442. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1443. return 0;
  1444. }
  1445. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1446. struct snd_ctl_elem_value *ucontrol)
  1447. {
  1448. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1449. unsigned int i, rate;
  1450. spin_lock_irq(&ice->reg_lock);
  1451. if (ice->is_spdif_master(ice)) {
  1452. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1453. } else {
  1454. rate = ice->get_rate(ice);
  1455. ucontrol->value.enumerated.item[0] = 0;
  1456. for (i = 0; i < ice->hw_rates->count; i++) {
  1457. if (ice->hw_rates->list[i] == rate) {
  1458. ucontrol->value.enumerated.item[0] = i;
  1459. break;
  1460. }
  1461. }
  1462. }
  1463. spin_unlock_irq(&ice->reg_lock);
  1464. return 0;
  1465. }
  1466. /* setting clock to external - SPDIF */
  1467. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1468. {
  1469. unsigned char oval;
  1470. unsigned char i2s_oval;
  1471. oval = inb(ICEMT1724(ice, RATE));
  1472. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1473. /* setting 256fs */
  1474. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1475. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1476. }
  1477. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1478. struct snd_ctl_elem_value *ucontrol)
  1479. {
  1480. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1481. unsigned int old_rate, new_rate;
  1482. unsigned int item = ucontrol->value.enumerated.item[0];
  1483. unsigned int spdif = ice->hw_rates->count;
  1484. if (item > spdif)
  1485. return -EINVAL;
  1486. spin_lock_irq(&ice->reg_lock);
  1487. if (ice->is_spdif_master(ice))
  1488. old_rate = 0;
  1489. else
  1490. old_rate = ice->get_rate(ice);
  1491. if (item == spdif) {
  1492. /* switching to external clock via SPDIF */
  1493. ice->set_spdif_clock(ice);
  1494. new_rate = 0;
  1495. } else {
  1496. /* internal on-card clock */
  1497. new_rate = ice->hw_rates->list[item];
  1498. ice->pro_rate_default = new_rate;
  1499. spin_unlock_irq(&ice->reg_lock);
  1500. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1501. spin_lock_irq(&ice->reg_lock);
  1502. }
  1503. spin_unlock_irq(&ice->reg_lock);
  1504. /* the first reset to the SPDIF master mode? */
  1505. if (old_rate != new_rate && !new_rate) {
  1506. /* notify akm chips as well */
  1507. unsigned int i;
  1508. if (ice->gpio.set_pro_rate)
  1509. ice->gpio.set_pro_rate(ice, 0);
  1510. for (i = 0; i < ice->akm_codecs; i++) {
  1511. if (ice->akm[i].ops.set_rate_val)
  1512. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1513. }
  1514. }
  1515. return old_rate != new_rate;
  1516. }
  1517. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1518. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1519. .name = "Multi Track Internal Clock",
  1520. .info = snd_vt1724_pro_internal_clock_info,
  1521. .get = snd_vt1724_pro_internal_clock_get,
  1522. .put = snd_vt1724_pro_internal_clock_put
  1523. };
  1524. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1525. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1526. struct snd_ctl_elem_value *ucontrol)
  1527. {
  1528. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1529. return 0;
  1530. }
  1531. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1532. struct snd_ctl_elem_value *ucontrol)
  1533. {
  1534. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1535. int change = 0, nval;
  1536. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1537. spin_lock_irq(&ice->reg_lock);
  1538. change = PRO_RATE_LOCKED != nval;
  1539. PRO_RATE_LOCKED = nval;
  1540. spin_unlock_irq(&ice->reg_lock);
  1541. return change;
  1542. }
  1543. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1544. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1545. .name = "Multi Track Rate Locking",
  1546. .info = snd_vt1724_pro_rate_locking_info,
  1547. .get = snd_vt1724_pro_rate_locking_get,
  1548. .put = snd_vt1724_pro_rate_locking_put
  1549. };
  1550. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1551. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1552. struct snd_ctl_elem_value *ucontrol)
  1553. {
  1554. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1555. return 0;
  1556. }
  1557. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1558. struct snd_ctl_elem_value *ucontrol)
  1559. {
  1560. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1561. int change = 0, nval;
  1562. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1563. spin_lock_irq(&ice->reg_lock);
  1564. change = PRO_RATE_RESET != nval;
  1565. PRO_RATE_RESET = nval;
  1566. spin_unlock_irq(&ice->reg_lock);
  1567. return change;
  1568. }
  1569. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1570. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1571. .name = "Multi Track Rate Reset",
  1572. .info = snd_vt1724_pro_rate_reset_info,
  1573. .get = snd_vt1724_pro_rate_reset_get,
  1574. .put = snd_vt1724_pro_rate_reset_put
  1575. };
  1576. /*
  1577. * routing
  1578. */
  1579. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1580. struct snd_ctl_elem_info *uinfo)
  1581. {
  1582. static char *texts[] = {
  1583. "PCM Out", /* 0 */
  1584. "H/W In 0", "H/W In 1", /* 1-2 */
  1585. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1586. };
  1587. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1588. uinfo->count = 1;
  1589. uinfo->value.enumerated.items = 5;
  1590. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1591. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1592. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1593. return 0;
  1594. }
  1595. static inline int analog_route_shift(int idx)
  1596. {
  1597. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1598. }
  1599. static inline int digital_route_shift(int idx)
  1600. {
  1601. return idx * 3;
  1602. }
  1603. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1604. {
  1605. unsigned long val;
  1606. unsigned char eitem;
  1607. static const unsigned char xlate[8] = {
  1608. 0, 255, 1, 2, 255, 255, 3, 4,
  1609. };
  1610. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1611. val >>= shift;
  1612. val &= 7; //we now have 3 bits per output
  1613. eitem = xlate[val];
  1614. if (eitem == 255) {
  1615. snd_BUG();
  1616. return 0;
  1617. }
  1618. return eitem;
  1619. }
  1620. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1621. {
  1622. unsigned int old_val, nval;
  1623. int change;
  1624. static const unsigned char xroute[8] = {
  1625. 0, /* PCM */
  1626. 2, /* PSDIN0 Left */
  1627. 3, /* PSDIN0 Right */
  1628. 6, /* SPDIN Left */
  1629. 7, /* SPDIN Right */
  1630. };
  1631. nval = xroute[val % 5];
  1632. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1633. val &= ~(0x07 << shift);
  1634. val |= nval << shift;
  1635. change = val != old_val;
  1636. if (change)
  1637. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1638. return change;
  1639. }
  1640. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1641. struct snd_ctl_elem_value *ucontrol)
  1642. {
  1643. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1644. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1645. ucontrol->value.enumerated.item[0] =
  1646. get_route_val(ice, analog_route_shift(idx));
  1647. return 0;
  1648. }
  1649. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1650. struct snd_ctl_elem_value *ucontrol)
  1651. {
  1652. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1653. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1654. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1655. analog_route_shift(idx));
  1656. }
  1657. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1658. struct snd_ctl_elem_value *ucontrol)
  1659. {
  1660. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1661. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1662. ucontrol->value.enumerated.item[0] =
  1663. get_route_val(ice, digital_route_shift(idx));
  1664. return 0;
  1665. }
  1666. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1667. struct snd_ctl_elem_value *ucontrol)
  1668. {
  1669. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1670. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1671. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1672. digital_route_shift(idx));
  1673. }
  1674. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1675. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1676. .name = "H/W Playback Route",
  1677. .info = snd_vt1724_pro_route_info,
  1678. .get = snd_vt1724_pro_route_analog_get,
  1679. .put = snd_vt1724_pro_route_analog_put,
  1680. };
  1681. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1682. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1683. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route",
  1684. .info = snd_vt1724_pro_route_info,
  1685. .get = snd_vt1724_pro_route_spdif_get,
  1686. .put = snd_vt1724_pro_route_spdif_put,
  1687. .count = 2,
  1688. };
  1689. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1690. struct snd_ctl_elem_info *uinfo)
  1691. {
  1692. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1693. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1694. uinfo->value.integer.min = 0;
  1695. uinfo->value.integer.max = 255;
  1696. return 0;
  1697. }
  1698. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1699. struct snd_ctl_elem_value *ucontrol)
  1700. {
  1701. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1702. int idx;
  1703. spin_lock_irq(&ice->reg_lock);
  1704. for (idx = 0; idx < 22; idx++) {
  1705. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1706. ucontrol->value.integer.value[idx] =
  1707. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1708. }
  1709. spin_unlock_irq(&ice->reg_lock);
  1710. return 0;
  1711. }
  1712. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1713. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1714. .name = "Multi Track Peak",
  1715. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1716. .info = snd_vt1724_pro_peak_info,
  1717. .get = snd_vt1724_pro_peak_get
  1718. };
  1719. /*
  1720. *
  1721. */
  1722. static struct snd_ice1712_card_info no_matched __devinitdata;
  1723. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1724. snd_vt1724_revo_cards,
  1725. snd_vt1724_amp_cards,
  1726. snd_vt1724_aureon_cards,
  1727. snd_vt1720_mobo_cards,
  1728. snd_vt1720_pontis_cards,
  1729. snd_vt1724_prodigy_hifi_cards,
  1730. snd_vt1724_prodigy192_cards,
  1731. snd_vt1724_juli_cards,
  1732. snd_vt1724_phase_cards,
  1733. snd_vt1724_wtm_cards,
  1734. snd_vt1724_se_cards,
  1735. NULL,
  1736. };
  1737. /*
  1738. */
  1739. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1740. {
  1741. int t = 0x10000;
  1742. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1743. ;
  1744. if (t == -1)
  1745. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1746. }
  1747. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1748. unsigned char dev, unsigned char addr)
  1749. {
  1750. unsigned char val;
  1751. mutex_lock(&ice->i2c_mutex);
  1752. wait_i2c_busy(ice);
  1753. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1754. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1755. wait_i2c_busy(ice);
  1756. val = inb(ICEREG1724(ice, I2C_DATA));
  1757. mutex_unlock(&ice->i2c_mutex);
  1758. //printk("i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1759. return val;
  1760. }
  1761. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1762. unsigned char dev, unsigned char addr, unsigned char data)
  1763. {
  1764. mutex_lock(&ice->i2c_mutex);
  1765. wait_i2c_busy(ice);
  1766. //printk("i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1767. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1768. outb(data, ICEREG1724(ice, I2C_DATA));
  1769. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1770. wait_i2c_busy(ice);
  1771. mutex_unlock(&ice->i2c_mutex);
  1772. }
  1773. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1774. const char *modelname)
  1775. {
  1776. const int dev = 0xa0; /* EEPROM device address */
  1777. unsigned int i, size;
  1778. struct snd_ice1712_card_info * const *tbl, *c;
  1779. if (! modelname || ! *modelname) {
  1780. ice->eeprom.subvendor = 0;
  1781. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1782. ice->eeprom.subvendor =
  1783. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1784. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1785. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1786. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1787. if (ice->eeprom.subvendor == 0 ||
  1788. ice->eeprom.subvendor == (unsigned int)-1) {
  1789. /* invalid subvendor from EEPROM, try the PCI
  1790. * subststem ID instead
  1791. */
  1792. u16 vendor, device;
  1793. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1794. &vendor);
  1795. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1796. ice->eeprom.subvendor =
  1797. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1798. if (ice->eeprom.subvendor == 0 ||
  1799. ice->eeprom.subvendor == (unsigned int)-1) {
  1800. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1801. return -ENXIO;
  1802. }
  1803. }
  1804. }
  1805. for (tbl = card_tables; *tbl; tbl++) {
  1806. for (c = *tbl; c->subvendor; c++) {
  1807. if (modelname && c->model &&
  1808. ! strcmp(modelname, c->model)) {
  1809. printk(KERN_INFO "ice1724: Using board model %s\n",
  1810. c->name);
  1811. ice->eeprom.subvendor = c->subvendor;
  1812. } else if (c->subvendor != ice->eeprom.subvendor)
  1813. continue;
  1814. if (! c->eeprom_size || ! c->eeprom_data)
  1815. goto found;
  1816. /* if the EEPROM is given by the driver, use it */
  1817. snd_printdd("using the defined eeprom..\n");
  1818. ice->eeprom.version = 2;
  1819. ice->eeprom.size = c->eeprom_size + 6;
  1820. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1821. goto read_skipped;
  1822. }
  1823. }
  1824. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1825. ice->eeprom.subvendor);
  1826. found:
  1827. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1828. if (ice->eeprom.size < 6)
  1829. ice->eeprom.size = 32;
  1830. else if (ice->eeprom.size > 32) {
  1831. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1832. ice->eeprom.size);
  1833. return -EIO;
  1834. }
  1835. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1836. if (ice->eeprom.version != 2)
  1837. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1838. ice->eeprom.version);
  1839. size = ice->eeprom.size - 6;
  1840. for (i = 0; i < size; i++)
  1841. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1842. read_skipped:
  1843. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1844. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1845. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1846. return 0;
  1847. }
  1848. static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1849. {
  1850. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1851. msleep(10);
  1852. outb(0, ICEREG1724(ice, CONTROL));
  1853. msleep(10);
  1854. }
  1855. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1856. {
  1857. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1858. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1859. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1860. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1861. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1862. ice->gpio.direction = ice->eeprom.gpiodir;
  1863. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1864. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1865. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1866. outb(0, ICEREG1724(ice, POWERDOWN));
  1867. return 0;
  1868. }
  1869. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1870. {
  1871. int err;
  1872. struct snd_kcontrol *kctl;
  1873. snd_assert(ice->pcm != NULL, return -EIO);
  1874. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  1875. if (err < 0)
  1876. return err;
  1877. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  1878. if (err < 0)
  1879. return err;
  1880. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  1881. if (err < 0)
  1882. return err;
  1883. kctl->id.device = ice->pcm->device;
  1884. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  1885. if (err < 0)
  1886. return err;
  1887. kctl->id.device = ice->pcm->device;
  1888. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  1889. if (err < 0)
  1890. return err;
  1891. kctl->id.device = ice->pcm->device;
  1892. #if 0 /* use default only */
  1893. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  1894. if (err < 0)
  1895. return err;
  1896. kctl->id.device = ice->pcm->device;
  1897. ice->spdif.stream_ctl = kctl;
  1898. #endif
  1899. return 0;
  1900. }
  1901. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  1902. {
  1903. int err;
  1904. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  1905. if (err < 0)
  1906. return err;
  1907. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  1908. if (err < 0)
  1909. return err;
  1910. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  1911. if (err < 0)
  1912. return err;
  1913. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  1914. if (err < 0)
  1915. return err;
  1916. if (ice->num_total_dacs > 0) {
  1917. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  1918. tmp.count = ice->num_total_dacs;
  1919. if (ice->vt1720 && tmp.count > 2)
  1920. tmp.count = 2;
  1921. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  1922. if (err < 0)
  1923. return err;
  1924. }
  1925. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  1926. if (err < 0)
  1927. return err;
  1928. return 0;
  1929. }
  1930. static int snd_vt1724_free(struct snd_ice1712 *ice)
  1931. {
  1932. if (! ice->port)
  1933. goto __hw_end;
  1934. /* mask all interrupts */
  1935. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  1936. outb(0xff, ICEREG1724(ice, IRQMASK));
  1937. /* --- */
  1938. __hw_end:
  1939. if (ice->irq >= 0)
  1940. free_irq(ice->irq, ice);
  1941. pci_release_regions(ice->pci);
  1942. snd_ice1712_akm4xxx_free(ice);
  1943. pci_disable_device(ice->pci);
  1944. kfree(ice->spec);
  1945. kfree(ice);
  1946. return 0;
  1947. }
  1948. static int snd_vt1724_dev_free(struct snd_device *device)
  1949. {
  1950. struct snd_ice1712 *ice = device->device_data;
  1951. return snd_vt1724_free(ice);
  1952. }
  1953. static int __devinit snd_vt1724_create(struct snd_card *card,
  1954. struct pci_dev *pci,
  1955. const char *modelname,
  1956. struct snd_ice1712 ** r_ice1712)
  1957. {
  1958. struct snd_ice1712 *ice;
  1959. int err;
  1960. unsigned char mask;
  1961. static struct snd_device_ops ops = {
  1962. .dev_free = snd_vt1724_dev_free,
  1963. };
  1964. *r_ice1712 = NULL;
  1965. /* enable PCI device */
  1966. if ((err = pci_enable_device(pci)) < 0)
  1967. return err;
  1968. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  1969. if (ice == NULL) {
  1970. pci_disable_device(pci);
  1971. return -ENOMEM;
  1972. }
  1973. ice->vt1724 = 1;
  1974. spin_lock_init(&ice->reg_lock);
  1975. mutex_init(&ice->gpio_mutex);
  1976. mutex_init(&ice->open_mutex);
  1977. mutex_init(&ice->i2c_mutex);
  1978. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  1979. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  1980. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  1981. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  1982. ice->card = card;
  1983. ice->pci = pci;
  1984. ice->irq = -1;
  1985. pci_set_master(pci);
  1986. snd_vt1724_proc_init(ice);
  1987. synchronize_irq(pci->irq);
  1988. if ((err = pci_request_regions(pci, "ICE1724")) < 0) {
  1989. kfree(ice);
  1990. pci_disable_device(pci);
  1991. return err;
  1992. }
  1993. ice->port = pci_resource_start(pci, 0);
  1994. ice->profi_port = pci_resource_start(pci, 1);
  1995. if (request_irq(pci->irq, snd_vt1724_interrupt,
  1996. IRQF_SHARED, "ICE1724", ice)) {
  1997. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  1998. snd_vt1724_free(ice);
  1999. return -EIO;
  2000. }
  2001. ice->irq = pci->irq;
  2002. snd_vt1724_chip_reset(ice);
  2003. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2004. snd_vt1724_free(ice);
  2005. return -EIO;
  2006. }
  2007. if (snd_vt1724_chip_init(ice) < 0) {
  2008. snd_vt1724_free(ice);
  2009. return -EIO;
  2010. }
  2011. /* unmask used interrupts */
  2012. mask = VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX;
  2013. outb(mask, ICEREG1724(ice, IRQMASK));
  2014. /* don't handle FIFO overrun/underruns (just yet),
  2015. * since they cause machine lockups
  2016. */
  2017. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2018. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) {
  2019. snd_vt1724_free(ice);
  2020. return err;
  2021. }
  2022. snd_card_set_dev(card, &pci->dev);
  2023. *r_ice1712 = ice;
  2024. return 0;
  2025. }
  2026. /*
  2027. *
  2028. * Registration
  2029. *
  2030. */
  2031. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2032. const struct pci_device_id *pci_id)
  2033. {
  2034. static int dev;
  2035. struct snd_card *card;
  2036. struct snd_ice1712 *ice;
  2037. int pcm_dev = 0, err;
  2038. struct snd_ice1712_card_info * const *tbl, *c;
  2039. if (dev >= SNDRV_CARDS)
  2040. return -ENODEV;
  2041. if (!enable[dev]) {
  2042. dev++;
  2043. return -ENOENT;
  2044. }
  2045. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  2046. if (card == NULL)
  2047. return -ENOMEM;
  2048. strcpy(card->driver, "ICE1724");
  2049. strcpy(card->shortname, "ICEnsemble ICE1724");
  2050. if ((err = snd_vt1724_create(card, pci, model[dev], &ice)) < 0) {
  2051. snd_card_free(card);
  2052. return err;
  2053. }
  2054. for (tbl = card_tables; *tbl; tbl++) {
  2055. for (c = *tbl; c->subvendor; c++) {
  2056. if (c->subvendor == ice->eeprom.subvendor) {
  2057. strcpy(card->shortname, c->name);
  2058. if (c->driver) /* specific driver? */
  2059. strcpy(card->driver, c->driver);
  2060. if (c->chip_init) {
  2061. if ((err = c->chip_init(ice)) < 0) {
  2062. snd_card_free(card);
  2063. return err;
  2064. }
  2065. }
  2066. goto __found;
  2067. }
  2068. }
  2069. }
  2070. c = &no_matched;
  2071. __found:
  2072. /*
  2073. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2074. * ICE1712 has only one for both (mixed up).
  2075. *
  2076. * Confusingly the analog PCM is named "professional" here because it
  2077. * was called so in ice1712 driver, and vt1724 driver is derived from
  2078. * ice1712 driver.
  2079. */
  2080. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2081. if (!ice->is_spdif_master)
  2082. ice->is_spdif_master = stdclock_is_spdif_master;
  2083. if (!ice->get_rate)
  2084. ice->get_rate = stdclock_get_rate;
  2085. if (!ice->set_rate)
  2086. ice->set_rate = stdclock_set_rate;
  2087. if (!ice->set_mclk)
  2088. ice->set_mclk = stdclock_set_mclk;
  2089. if (!ice->set_spdif_clock)
  2090. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2091. if (!ice->hw_rates)
  2092. set_std_hw_rates(ice);
  2093. if ((err = snd_vt1724_pcm_profi(ice, pcm_dev++)) < 0) {
  2094. snd_card_free(card);
  2095. return err;
  2096. }
  2097. if ((err = snd_vt1724_pcm_spdif(ice, pcm_dev++)) < 0) {
  2098. snd_card_free(card);
  2099. return err;
  2100. }
  2101. if ((err = snd_vt1724_pcm_indep(ice, pcm_dev++)) < 0) {
  2102. snd_card_free(card);
  2103. return err;
  2104. }
  2105. if ((err = snd_vt1724_ac97_mixer(ice)) < 0) {
  2106. snd_card_free(card);
  2107. return err;
  2108. }
  2109. if ((err = snd_vt1724_build_controls(ice)) < 0) {
  2110. snd_card_free(card);
  2111. return err;
  2112. }
  2113. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2114. if ((err = snd_vt1724_spdif_build_controls(ice)) < 0) {
  2115. snd_card_free(card);
  2116. return err;
  2117. }
  2118. }
  2119. if (c->build_controls) {
  2120. if ((err = c->build_controls(ice)) < 0) {
  2121. snd_card_free(card);
  2122. return err;
  2123. }
  2124. }
  2125. if (! c->no_mpu401) {
  2126. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2127. struct snd_mpu401 *mpu;
  2128. if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
  2129. ICEREG1724(ice, MPU_CTRL),
  2130. (MPU401_INFO_INTEGRATED |
  2131. MPU401_INFO_TX_IRQ),
  2132. ice->irq, 0,
  2133. &ice->rmidi[0])) < 0) {
  2134. snd_card_free(card);
  2135. return err;
  2136. }
  2137. mpu = ice->rmidi[0]->private_data;
  2138. mpu->read = snd_vt1724_mpu401_read;
  2139. mpu->write = snd_vt1724_mpu401_write;
  2140. /* unmask MPU RX/TX irqs */
  2141. outb(inb(ICEREG1724(ice, IRQMASK)) &
  2142. ~(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX),
  2143. ICEREG1724(ice, IRQMASK));
  2144. #if 0 /* for testing */
  2145. /* set watermarks */
  2146. outb(VT1724_MPU_RX_FIFO | 0x1,
  2147. ICEREG1724(ice, MPU_FIFO_WM));
  2148. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2149. #endif
  2150. }
  2151. }
  2152. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2153. card->shortname, ice->port, ice->irq);
  2154. if ((err = snd_card_register(card)) < 0) {
  2155. snd_card_free(card);
  2156. return err;
  2157. }
  2158. pci_set_drvdata(pci, card);
  2159. dev++;
  2160. return 0;
  2161. }
  2162. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2163. {
  2164. snd_card_free(pci_get_drvdata(pci));
  2165. pci_set_drvdata(pci, NULL);
  2166. }
  2167. static struct pci_driver driver = {
  2168. .name = "ICE1724",
  2169. .id_table = snd_vt1724_ids,
  2170. .probe = snd_vt1724_probe,
  2171. .remove = __devexit_p(snd_vt1724_remove),
  2172. };
  2173. static int __init alsa_card_ice1724_init(void)
  2174. {
  2175. return pci_register_driver(&driver);
  2176. }
  2177. static void __exit alsa_card_ice1724_exit(void)
  2178. {
  2179. pci_unregister_driver(&driver);
  2180. }
  2181. module_init(alsa_card_ice1724_init)
  2182. module_exit(alsa_card_ice1724_exit)