cs8427.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623
  1. /*
  2. * Routines for control of the CS8427 via i2c bus
  3. * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <linux/init.h>
  25. #include <sound/core.h>
  26. #include <sound/control.h>
  27. #include <sound/pcm.h>
  28. #include <sound/cs8427.h>
  29. #include <sound/asoundef.h>
  30. static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
  31. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  32. MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
  33. MODULE_LICENSE("GPL");
  34. #define CS8427_ADDR (0x20>>1) /* fixed address */
  35. struct cs8427_stream {
  36. struct snd_pcm_substream *substream;
  37. char hw_status[24]; /* hardware status */
  38. char def_status[24]; /* default status */
  39. char pcm_status[24]; /* PCM private status */
  40. char hw_udata[32];
  41. struct snd_kcontrol *pcm_ctl;
  42. };
  43. struct cs8427 {
  44. unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
  45. unsigned int rate;
  46. unsigned int reset_timeout;
  47. struct cs8427_stream playback;
  48. struct cs8427_stream capture;
  49. };
  50. static unsigned char swapbits(unsigned char val)
  51. {
  52. int bit;
  53. unsigned char res = 0;
  54. for (bit = 0; bit < 8; bit++) {
  55. res <<= 1;
  56. res |= val & 1;
  57. val >>= 1;
  58. }
  59. return res;
  60. }
  61. int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
  62. unsigned char val)
  63. {
  64. int err;
  65. unsigned char buf[2];
  66. buf[0] = reg & 0x7f;
  67. buf[1] = val;
  68. if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
  69. snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
  70. "to CS8427 (%i)\n", buf[0], buf[1], err);
  71. return err < 0 ? err : -EIO;
  72. }
  73. return 0;
  74. }
  75. EXPORT_SYMBOL(snd_cs8427_reg_write);
  76. static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
  77. {
  78. int err;
  79. unsigned char buf;
  80. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  81. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  82. "to CS8427\n", reg);
  83. return err < 0 ? err : -EIO;
  84. }
  85. if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
  86. snd_printk(KERN_ERR "unable to read register 0x%x byte "
  87. "from CS8427\n", reg);
  88. return err < 0 ? err : -EIO;
  89. }
  90. return buf;
  91. }
  92. static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
  93. {
  94. struct cs8427 *chip = device->private_data;
  95. int err;
  96. udata = udata ? CS8427_BSEL : 0;
  97. if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
  98. chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
  99. chip->regmap[CS8427_REG_CSDATABUF] |= udata;
  100. err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
  101. chip->regmap[CS8427_REG_CSDATABUF]);
  102. if (err < 0)
  103. return err;
  104. }
  105. return 0;
  106. }
  107. static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
  108. int udata,
  109. unsigned char *ndata,
  110. int count)
  111. {
  112. struct cs8427 *chip = device->private_data;
  113. char *hw_data = udata ?
  114. chip->playback.hw_udata : chip->playback.hw_status;
  115. char data[32];
  116. int err, idx;
  117. if (!memcmp(hw_data, ndata, count))
  118. return 0;
  119. if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
  120. return err;
  121. memcpy(hw_data, ndata, count);
  122. if (udata) {
  123. memset(data, 0, sizeof(data));
  124. if (memcmp(hw_data, data, count) == 0) {
  125. chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
  126. chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
  127. CS8427_EFTUI;
  128. err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
  129. chip->regmap[CS8427_REG_UDATABUF]);
  130. return err < 0 ? err : 0;
  131. }
  132. }
  133. data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
  134. for (idx = 0; idx < count; idx++)
  135. data[idx + 1] = swapbits(ndata[idx]);
  136. if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
  137. return -EIO;
  138. return 1;
  139. }
  140. static void snd_cs8427_free(struct snd_i2c_device *device)
  141. {
  142. kfree(device->private_data);
  143. }
  144. int snd_cs8427_create(struct snd_i2c_bus *bus,
  145. unsigned char addr,
  146. unsigned int reset_timeout,
  147. struct snd_i2c_device **r_cs8427)
  148. {
  149. static unsigned char initvals1[] = {
  150. CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
  151. /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
  152. TCBL=output */
  153. CS8427_SWCLK | CS8427_TCBLDIR,
  154. /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
  155. normal stereo operation */
  156. 0x00,
  157. /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
  158. Rx=>serial */
  159. CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
  160. /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
  161. output time base = OMCK, input time base = recovered input clock,
  162. recovered input clock source is ILRCK changed to AES3INPUT
  163. (workaround, see snd_cs8427_reset) */
  164. CS8427_RXDILRCK,
  165. /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
  166. 24-bit, 64*Fsi */
  167. CS8427_SIDEL | CS8427_SILRPOL,
  168. /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
  169. = I2S, 24-bit, 64*Fsi */
  170. CS8427_SODEL | CS8427_SOLRPOL,
  171. };
  172. static unsigned char initvals2[] = {
  173. CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
  174. /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
  175. biphase, parity status bits */
  176. /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
  177. 0xff, /* set everything */
  178. /* CS8427_REG_CSDATABUF:
  179. Registers 32-55 window to CS buffer
  180. Inhibit D->E transfers from overwriting first 5 bytes of CS data.
  181. Inhibit D->E transfers (all) of CS data.
  182. Allow E->F transfer of CS data.
  183. One byte mode; both A/B channels get same written CB data.
  184. A channel info is output to chip's EMPH* pin. */
  185. CS8427_CBMR | CS8427_DETCI,
  186. /* CS8427_REG_UDATABUF:
  187. Use internal buffer to transmit User (U) data.
  188. Chip's U pin is an output.
  189. Transmit all O's for user data.
  190. Inhibit D->E transfers.
  191. Inhibit E->F transfers. */
  192. CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
  193. };
  194. int err;
  195. struct cs8427 *chip;
  196. struct snd_i2c_device *device;
  197. unsigned char buf[24];
  198. if ((err = snd_i2c_device_create(bus, "CS8427",
  199. CS8427_ADDR | (addr & 7),
  200. &device)) < 0)
  201. return err;
  202. chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
  203. if (chip == NULL) {
  204. snd_i2c_device_free(device);
  205. return -ENOMEM;
  206. }
  207. device->private_free = snd_cs8427_free;
  208. snd_i2c_lock(bus);
  209. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  210. if (err != CS8427_VER8427A) {
  211. /* give second chance */
  212. snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
  213. "let me try again...\n", err);
  214. err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
  215. }
  216. if (err != CS8427_VER8427A) {
  217. snd_i2c_unlock(bus);
  218. snd_printk(KERN_ERR "unable to find CS8427 signature "
  219. "(expected 0x%x, read 0x%x),\n",
  220. CS8427_VER8427A, err);
  221. snd_printk(KERN_ERR " initialization is not completed\n");
  222. return -EFAULT;
  223. }
  224. /* turn off run bit while making changes to configuration */
  225. err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
  226. if (err < 0)
  227. goto __fail;
  228. /* send initial values */
  229. memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
  230. if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
  231. err = err < 0 ? err : -EIO;
  232. goto __fail;
  233. }
  234. /* Turn off CS8427 interrupt stuff that is not used in hardware */
  235. memset(buf, 0, 7);
  236. /* from address 9 to 15 */
  237. buf[0] = 9; /* register */
  238. if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
  239. goto __fail;
  240. /* send transfer initialization sequence */
  241. memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
  242. if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
  243. err = err < 0 ? err : -EIO;
  244. goto __fail;
  245. }
  246. /* write default channel status bytes */
  247. buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
  248. buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
  249. buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
  250. buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
  251. memset(buf + 4, 0, 24 - 4);
  252. if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
  253. goto __fail;
  254. memcpy(chip->playback.def_status, buf, 24);
  255. memcpy(chip->playback.pcm_status, buf, 24);
  256. snd_i2c_unlock(bus);
  257. /* turn on run bit and rock'n'roll */
  258. if (reset_timeout < 1)
  259. reset_timeout = 1;
  260. chip->reset_timeout = reset_timeout;
  261. snd_cs8427_reset(device);
  262. #if 0 // it's nice for read tests
  263. {
  264. char buf[128];
  265. int xx;
  266. buf[0] = 0x81;
  267. snd_i2c_sendbytes(device, buf, 1);
  268. snd_i2c_readbytes(device, buf, 127);
  269. for (xx = 0; xx < 127; xx++)
  270. printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
  271. }
  272. #endif
  273. if (r_cs8427)
  274. *r_cs8427 = device;
  275. return 0;
  276. __fail:
  277. snd_i2c_unlock(bus);
  278. snd_i2c_device_free(device);
  279. return err < 0 ? err : -EIO;
  280. }
  281. EXPORT_SYMBOL(snd_cs8427_create);
  282. /*
  283. * Reset the chip using run bit, also lock PLL using ILRCK and
  284. * put back AES3INPUT. This workaround is described in latest
  285. * CS8427 datasheet, otherwise TXDSERIAL will not work.
  286. */
  287. static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
  288. {
  289. struct cs8427 *chip;
  290. unsigned long end_time;
  291. int data, aes3input = 0;
  292. snd_assert(cs8427, return);
  293. chip = cs8427->private_data;
  294. snd_i2c_lock(cs8427->bus);
  295. if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
  296. CS8427_RXDAES3INPUT) /* AES3 bit is set */
  297. aes3input = 1;
  298. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
  299. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  300. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  301. udelay(200);
  302. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
  303. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  304. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  305. udelay(200);
  306. snd_i2c_unlock(cs8427->bus);
  307. end_time = jiffies + chip->reset_timeout;
  308. while (time_after_eq(end_time, jiffies)) {
  309. snd_i2c_lock(cs8427->bus);
  310. data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
  311. snd_i2c_unlock(cs8427->bus);
  312. if (!(data & CS8427_UNLOCK))
  313. break;
  314. schedule_timeout_uninterruptible(1);
  315. }
  316. snd_i2c_lock(cs8427->bus);
  317. chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
  318. if (aes3input)
  319. chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
  320. snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
  321. chip->regmap[CS8427_REG_CLOCKSOURCE]);
  322. snd_i2c_unlock(cs8427->bus);
  323. }
  324. static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
  325. struct snd_ctl_elem_info *uinfo)
  326. {
  327. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  328. uinfo->count = 1;
  329. uinfo->value.integer.min = 0;
  330. uinfo->value.integer.max = 255;
  331. return 0;
  332. }
  333. static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
  334. struct snd_ctl_elem_value *ucontrol)
  335. {
  336. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  337. int data;
  338. snd_i2c_lock(device->bus);
  339. data = snd_cs8427_reg_read(device, kcontrol->private_value);
  340. snd_i2c_unlock(device->bus);
  341. if (data < 0)
  342. return data;
  343. ucontrol->value.integer.value[0] = data;
  344. return 0;
  345. }
  346. static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
  347. struct snd_ctl_elem_info *uinfo)
  348. {
  349. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  350. uinfo->count = 10;
  351. return 0;
  352. }
  353. static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
  354. struct snd_ctl_elem_value *ucontrol)
  355. {
  356. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  357. unsigned char reg = CS8427_REG_QSUBCODE;
  358. int err;
  359. snd_i2c_lock(device->bus);
  360. if ((err = snd_i2c_sendbytes(device, &reg, 1)) != 1) {
  361. snd_printk(KERN_ERR "unable to send register 0x%x byte "
  362. "to CS8427\n", reg);
  363. snd_i2c_unlock(device->bus);
  364. return err < 0 ? err : -EIO;
  365. }
  366. err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
  367. if (err != 10) {
  368. snd_printk(KERN_ERR "unable to read Q-subcode bytes "
  369. "from CS8427\n");
  370. snd_i2c_unlock(device->bus);
  371. return err < 0 ? err : -EIO;
  372. }
  373. snd_i2c_unlock(device->bus);
  374. return 0;
  375. }
  376. static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
  377. struct snd_ctl_elem_info *uinfo)
  378. {
  379. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  380. uinfo->count = 1;
  381. return 0;
  382. }
  383. static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
  384. struct snd_ctl_elem_value *ucontrol)
  385. {
  386. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  387. struct cs8427 *chip = device->private_data;
  388. snd_i2c_lock(device->bus);
  389. memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
  390. snd_i2c_unlock(device->bus);
  391. return 0;
  392. }
  393. static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
  394. struct snd_ctl_elem_value *ucontrol)
  395. {
  396. struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
  397. struct cs8427 *chip = device->private_data;
  398. unsigned char *status = kcontrol->private_value ?
  399. chip->playback.pcm_status : chip->playback.def_status;
  400. struct snd_pcm_runtime *runtime = chip->playback.substream ?
  401. chip->playback.substream->runtime : NULL;
  402. int err, change;
  403. snd_i2c_lock(device->bus);
  404. change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
  405. memcpy(status, ucontrol->value.iec958.status, 24);
  406. if (change && (kcontrol->private_value ?
  407. runtime != NULL : runtime == NULL)) {
  408. err = snd_cs8427_send_corudata(device, 0, status, 24);
  409. if (err < 0)
  410. change = err;
  411. }
  412. snd_i2c_unlock(device->bus);
  413. return change;
  414. }
  415. static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
  416. struct snd_ctl_elem_info *uinfo)
  417. {
  418. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  419. uinfo->count = 1;
  420. return 0;
  421. }
  422. static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
  423. struct snd_ctl_elem_value *ucontrol)
  424. {
  425. memset(ucontrol->value.iec958.status, 0xff, 24);
  426. return 0;
  427. }
  428. static struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
  429. {
  430. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  431. .info = snd_cs8427_in_status_info,
  432. .name = "IEC958 CS8427 Input Status",
  433. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  434. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  435. .get = snd_cs8427_in_status_get,
  436. .private_value = 15,
  437. },
  438. {
  439. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  440. .info = snd_cs8427_in_status_info,
  441. .name = "IEC958 CS8427 Error Status",
  442. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  443. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  444. .get = snd_cs8427_in_status_get,
  445. .private_value = 16,
  446. },
  447. {
  448. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  449. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  450. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  451. .info = snd_cs8427_spdif_mask_info,
  452. .get = snd_cs8427_spdif_mask_get,
  453. },
  454. {
  455. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  456. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  457. .info = snd_cs8427_spdif_info,
  458. .get = snd_cs8427_spdif_get,
  459. .put = snd_cs8427_spdif_put,
  460. .private_value = 0
  461. },
  462. {
  463. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  464. SNDRV_CTL_ELEM_ACCESS_INACTIVE),
  465. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  466. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  467. .info = snd_cs8427_spdif_info,
  468. .get = snd_cs8427_spdif_get,
  469. .put = snd_cs8427_spdif_put,
  470. .private_value = 1
  471. },
  472. {
  473. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  474. .info = snd_cs8427_qsubcode_info,
  475. .name = "IEC958 Q-subcode Capture Default",
  476. .access = (SNDRV_CTL_ELEM_ACCESS_READ |
  477. SNDRV_CTL_ELEM_ACCESS_VOLATILE),
  478. .get = snd_cs8427_qsubcode_get
  479. }};
  480. int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
  481. struct snd_pcm_substream *play_substream,
  482. struct snd_pcm_substream *cap_substream)
  483. {
  484. struct cs8427 *chip = cs8427->private_data;
  485. struct snd_kcontrol *kctl;
  486. unsigned int idx;
  487. int err;
  488. snd_assert(play_substream && cap_substream, return -EINVAL);
  489. for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
  490. kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
  491. if (kctl == NULL)
  492. return -ENOMEM;
  493. kctl->id.device = play_substream->pcm->device;
  494. kctl->id.subdevice = play_substream->number;
  495. err = snd_ctl_add(cs8427->bus->card, kctl);
  496. if (err < 0)
  497. return err;
  498. if (! strcmp(kctl->id.name,
  499. SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
  500. chip->playback.pcm_ctl = kctl;
  501. }
  502. chip->playback.substream = play_substream;
  503. chip->capture.substream = cap_substream;
  504. snd_assert(chip->playback.pcm_ctl, return -EIO);
  505. return 0;
  506. }
  507. EXPORT_SYMBOL(snd_cs8427_iec958_build);
  508. int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
  509. {
  510. struct cs8427 *chip;
  511. snd_assert(cs8427, return -ENXIO);
  512. chip = cs8427->private_data;
  513. if (active)
  514. memcpy(chip->playback.pcm_status,
  515. chip->playback.def_status, 24);
  516. chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  517. snd_ctl_notify(cs8427->bus->card,
  518. SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
  519. &chip->playback.pcm_ctl->id);
  520. return 0;
  521. }
  522. EXPORT_SYMBOL(snd_cs8427_iec958_active);
  523. int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
  524. {
  525. struct cs8427 *chip;
  526. char *status;
  527. int err, reset;
  528. snd_assert(cs8427, return -ENXIO);
  529. chip = cs8427->private_data;
  530. status = chip->playback.pcm_status;
  531. snd_i2c_lock(cs8427->bus);
  532. if (status[0] & IEC958_AES0_PROFESSIONAL) {
  533. status[0] &= ~IEC958_AES0_PRO_FS;
  534. switch (rate) {
  535. case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
  536. case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
  537. case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
  538. default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
  539. }
  540. } else {
  541. status[3] &= ~IEC958_AES3_CON_FS;
  542. switch (rate) {
  543. case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
  544. case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
  545. case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
  546. }
  547. }
  548. err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
  549. if (err > 0)
  550. snd_ctl_notify(cs8427->bus->card,
  551. SNDRV_CTL_EVENT_MASK_VALUE,
  552. &chip->playback.pcm_ctl->id);
  553. reset = chip->rate != rate;
  554. chip->rate = rate;
  555. snd_i2c_unlock(cs8427->bus);
  556. if (reset)
  557. snd_cs8427_reset(cs8427);
  558. return err < 0 ? err : 0;
  559. }
  560. EXPORT_SYMBOL(snd_cs8427_iec958_pcm);
  561. static int __init alsa_cs8427_module_init(void)
  562. {
  563. return 0;
  564. }
  565. static void __exit alsa_cs8427_module_exit(void)
  566. {
  567. }
  568. module_init(alsa_cs8427_module_init)
  569. module_exit(alsa_cs8427_module_exit)