swiotlb.c 23 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/string.h>
  24. #include <linux/types.h>
  25. #include <linux/ctype.h>
  26. #include <asm/io.h>
  27. #include <asm/dma.h>
  28. #include <asm/scatterlist.h>
  29. #include <linux/init.h>
  30. #include <linux/bootmem.h>
  31. #define OFFSET(val,align) ((unsigned long) \
  32. ( (val) & ( (align) - 1)))
  33. #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
  34. #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
  35. /*
  36. * Maximum allowable number of contiguous slabs to map,
  37. * must be a power of 2. What is the appropriate value ?
  38. * The complexity of {map,unmap}_single is linearly dependent on this value.
  39. */
  40. #define IO_TLB_SEGSIZE 128
  41. /*
  42. * log of the size of each IO TLB slab. The number of slabs is command line
  43. * controllable.
  44. */
  45. #define IO_TLB_SHIFT 11
  46. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  47. /*
  48. * Minimum IO TLB size to bother booting with. Systems with mainly
  49. * 64bit capable cards will only lightly use the swiotlb. If we can't
  50. * allocate a contiguous 1MB, we're probably in trouble anyway.
  51. */
  52. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  53. /*
  54. * Enumeration for sync targets
  55. */
  56. enum dma_sync_target {
  57. SYNC_FOR_CPU = 0,
  58. SYNC_FOR_DEVICE = 1,
  59. };
  60. int swiotlb_force;
  61. /*
  62. * Used to do a quick range check in swiotlb_unmap_single and
  63. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  64. * API.
  65. */
  66. static char *io_tlb_start, *io_tlb_end;
  67. /*
  68. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  69. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  70. */
  71. static unsigned long io_tlb_nslabs;
  72. /*
  73. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  74. */
  75. static unsigned long io_tlb_overflow = 32*1024;
  76. void *io_tlb_overflow_buffer;
  77. /*
  78. * This is a free list describing the number of free entries available from
  79. * each index
  80. */
  81. static unsigned int *io_tlb_list;
  82. static unsigned int io_tlb_index;
  83. /*
  84. * We need to save away the original address corresponding to a mapped entry
  85. * for the sync operations.
  86. */
  87. static unsigned char **io_tlb_orig_addr;
  88. /*
  89. * Protect the above data structures in the map and unmap calls
  90. */
  91. static DEFINE_SPINLOCK(io_tlb_lock);
  92. static int __init
  93. setup_io_tlb_npages(char *str)
  94. {
  95. if (isdigit(*str)) {
  96. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  97. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  98. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  99. }
  100. if (*str == ',')
  101. ++str;
  102. if (!strcmp(str, "force"))
  103. swiotlb_force = 1;
  104. return 1;
  105. }
  106. __setup("swiotlb=", setup_io_tlb_npages);
  107. /* make io_tlb_overflow tunable too? */
  108. /*
  109. * Statically reserve bounce buffer space and initialize bounce buffer data
  110. * structures for the software IO TLB used to implement the DMA API.
  111. */
  112. void __init
  113. swiotlb_init_with_default_size(size_t default_size)
  114. {
  115. unsigned long i, bytes;
  116. if (!io_tlb_nslabs) {
  117. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  118. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  119. }
  120. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  121. /*
  122. * Get IO TLB memory from the low pages
  123. */
  124. io_tlb_start = alloc_bootmem_low_pages(bytes);
  125. if (!io_tlb_start)
  126. panic("Cannot allocate SWIOTLB buffer");
  127. io_tlb_end = io_tlb_start + bytes;
  128. /*
  129. * Allocate and initialize the free list array. This array is used
  130. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  131. * between io_tlb_start and io_tlb_end.
  132. */
  133. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  134. for (i = 0; i < io_tlb_nslabs; i++)
  135. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  136. io_tlb_index = 0;
  137. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
  138. /*
  139. * Get the overflow emergency buffer
  140. */
  141. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  142. if (!io_tlb_overflow_buffer)
  143. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  144. printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
  145. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  146. }
  147. void __init
  148. swiotlb_init(void)
  149. {
  150. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  151. }
  152. /*
  153. * Systems with larger DMA zones (those that don't support ISA) can
  154. * initialize the swiotlb later using the slab allocator if needed.
  155. * This should be just like above, but with some error catching.
  156. */
  157. int
  158. swiotlb_late_init_with_default_size(size_t default_size)
  159. {
  160. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  161. unsigned int order;
  162. if (!io_tlb_nslabs) {
  163. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  164. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  165. }
  166. /*
  167. * Get IO TLB memory from the low pages
  168. */
  169. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  170. io_tlb_nslabs = SLABS_PER_PAGE << order;
  171. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  172. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  173. io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  174. order);
  175. if (io_tlb_start)
  176. break;
  177. order--;
  178. }
  179. if (!io_tlb_start)
  180. goto cleanup1;
  181. if (order != get_order(bytes)) {
  182. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  183. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  184. io_tlb_nslabs = SLABS_PER_PAGE << order;
  185. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  186. }
  187. io_tlb_end = io_tlb_start + bytes;
  188. memset(io_tlb_start, 0, bytes);
  189. /*
  190. * Allocate and initialize the free list array. This array is used
  191. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  192. * between io_tlb_start and io_tlb_end.
  193. */
  194. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  195. get_order(io_tlb_nslabs * sizeof(int)));
  196. if (!io_tlb_list)
  197. goto cleanup2;
  198. for (i = 0; i < io_tlb_nslabs; i++)
  199. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  200. io_tlb_index = 0;
  201. io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
  202. get_order(io_tlb_nslabs * sizeof(char *)));
  203. if (!io_tlb_orig_addr)
  204. goto cleanup3;
  205. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
  206. /*
  207. * Get the overflow emergency buffer
  208. */
  209. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  210. get_order(io_tlb_overflow));
  211. if (!io_tlb_overflow_buffer)
  212. goto cleanup4;
  213. printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
  214. "0x%lx\n", bytes >> 20,
  215. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  216. return 0;
  217. cleanup4:
  218. free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
  219. sizeof(char *)));
  220. io_tlb_orig_addr = NULL;
  221. cleanup3:
  222. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  223. sizeof(int)));
  224. io_tlb_list = NULL;
  225. cleanup2:
  226. io_tlb_end = NULL;
  227. free_pages((unsigned long)io_tlb_start, order);
  228. io_tlb_start = NULL;
  229. cleanup1:
  230. io_tlb_nslabs = req_nslabs;
  231. return -ENOMEM;
  232. }
  233. static int
  234. address_needs_mapping(struct device *hwdev, dma_addr_t addr)
  235. {
  236. dma_addr_t mask = 0xffffffff;
  237. /* If the device has a mask, use it, otherwise default to 32 bits */
  238. if (hwdev && hwdev->dma_mask)
  239. mask = *hwdev->dma_mask;
  240. return (addr & ~mask) != 0;
  241. }
  242. static inline unsigned int is_span_boundary(unsigned int index,
  243. unsigned int nslots,
  244. unsigned long offset_slots,
  245. unsigned long max_slots)
  246. {
  247. unsigned long offset = (offset_slots + index) & (max_slots - 1);
  248. return offset + nslots > max_slots;
  249. }
  250. /*
  251. * Allocates bounce buffer and returns its kernel virtual address.
  252. */
  253. static void *
  254. map_single(struct device *hwdev, char *buffer, size_t size, int dir)
  255. {
  256. unsigned long flags;
  257. char *dma_addr;
  258. unsigned int nslots, stride, index, wrap;
  259. int i;
  260. unsigned long start_dma_addr;
  261. unsigned long mask;
  262. unsigned long offset_slots;
  263. unsigned long max_slots;
  264. mask = dma_get_seg_boundary(hwdev);
  265. start_dma_addr = virt_to_bus(io_tlb_start) & mask;
  266. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  267. max_slots = mask + 1
  268. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  269. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  270. /*
  271. * For mappings greater than a page, we limit the stride (and
  272. * hence alignment) to a page size.
  273. */
  274. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  275. if (size > PAGE_SIZE)
  276. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  277. else
  278. stride = 1;
  279. BUG_ON(!nslots);
  280. /*
  281. * Find suitable number of IO TLB entries size that will fit this
  282. * request and allocate a buffer from that IO TLB pool.
  283. */
  284. spin_lock_irqsave(&io_tlb_lock, flags);
  285. {
  286. index = ALIGN(io_tlb_index, stride);
  287. if (index >= io_tlb_nslabs)
  288. index = 0;
  289. wrap = index;
  290. do {
  291. while (is_span_boundary(index, nslots, offset_slots,
  292. max_slots)) {
  293. index += stride;
  294. if (index >= io_tlb_nslabs)
  295. index = 0;
  296. if (index == wrap)
  297. goto not_found;
  298. }
  299. /*
  300. * If we find a slot that indicates we have 'nslots'
  301. * number of contiguous buffers, we allocate the
  302. * buffers from that slot and mark the entries as '0'
  303. * indicating unavailable.
  304. */
  305. if (io_tlb_list[index] >= nslots) {
  306. int count = 0;
  307. for (i = index; i < (int) (index + nslots); i++)
  308. io_tlb_list[i] = 0;
  309. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  310. io_tlb_list[i] = ++count;
  311. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  312. /*
  313. * Update the indices to avoid searching in
  314. * the next round.
  315. */
  316. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  317. ? (index + nslots) : 0);
  318. goto found;
  319. }
  320. index += stride;
  321. if (index >= io_tlb_nslabs)
  322. index = 0;
  323. } while (index != wrap);
  324. not_found:
  325. spin_unlock_irqrestore(&io_tlb_lock, flags);
  326. return NULL;
  327. }
  328. found:
  329. spin_unlock_irqrestore(&io_tlb_lock, flags);
  330. /*
  331. * Save away the mapping from the original address to the DMA address.
  332. * This is needed when we sync the memory. Then we sync the buffer if
  333. * needed.
  334. */
  335. for (i = 0; i < nslots; i++)
  336. io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
  337. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  338. memcpy(dma_addr, buffer, size);
  339. return dma_addr;
  340. }
  341. /*
  342. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  343. */
  344. static void
  345. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  346. {
  347. unsigned long flags;
  348. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  349. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  350. char *buffer = io_tlb_orig_addr[index];
  351. /*
  352. * First, sync the memory before unmapping the entry
  353. */
  354. if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  355. /*
  356. * bounce... copy the data back into the original buffer * and
  357. * delete the bounce buffer.
  358. */
  359. memcpy(buffer, dma_addr, size);
  360. /*
  361. * Return the buffer to the free list by setting the corresponding
  362. * entries to indicate the number of contigous entries available.
  363. * While returning the entries to the free list, we merge the entries
  364. * with slots below and above the pool being returned.
  365. */
  366. spin_lock_irqsave(&io_tlb_lock, flags);
  367. {
  368. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  369. io_tlb_list[index + nslots] : 0);
  370. /*
  371. * Step 1: return the slots to the free list, merging the
  372. * slots with superceeding slots
  373. */
  374. for (i = index + nslots - 1; i >= index; i--)
  375. io_tlb_list[i] = ++count;
  376. /*
  377. * Step 2: merge the returned slots with the preceding slots,
  378. * if available (non zero)
  379. */
  380. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  381. io_tlb_list[i] = ++count;
  382. }
  383. spin_unlock_irqrestore(&io_tlb_lock, flags);
  384. }
  385. static void
  386. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  387. int dir, int target)
  388. {
  389. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  390. char *buffer = io_tlb_orig_addr[index];
  391. buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  392. switch (target) {
  393. case SYNC_FOR_CPU:
  394. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  395. memcpy(buffer, dma_addr, size);
  396. else
  397. BUG_ON(dir != DMA_TO_DEVICE);
  398. break;
  399. case SYNC_FOR_DEVICE:
  400. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  401. memcpy(dma_addr, buffer, size);
  402. else
  403. BUG_ON(dir != DMA_FROM_DEVICE);
  404. break;
  405. default:
  406. BUG();
  407. }
  408. }
  409. void *
  410. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  411. dma_addr_t *dma_handle, gfp_t flags)
  412. {
  413. dma_addr_t dev_addr;
  414. void *ret;
  415. int order = get_order(size);
  416. /*
  417. * XXX fix me: the DMA API should pass us an explicit DMA mask
  418. * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
  419. * bit range instead of a 16MB one).
  420. */
  421. flags |= GFP_DMA;
  422. ret = (void *)__get_free_pages(flags, order);
  423. if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
  424. /*
  425. * The allocated memory isn't reachable by the device.
  426. * Fall back on swiotlb_map_single().
  427. */
  428. free_pages((unsigned long) ret, order);
  429. ret = NULL;
  430. }
  431. if (!ret) {
  432. /*
  433. * We are either out of memory or the device can't DMA
  434. * to GFP_DMA memory; fall back on
  435. * swiotlb_map_single(), which will grab memory from
  436. * the lowest available address range.
  437. */
  438. dma_addr_t handle;
  439. handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
  440. if (swiotlb_dma_mapping_error(handle))
  441. return NULL;
  442. ret = bus_to_virt(handle);
  443. }
  444. memset(ret, 0, size);
  445. dev_addr = virt_to_bus(ret);
  446. /* Confirm address can be DMA'd by device */
  447. if (address_needs_mapping(hwdev, dev_addr)) {
  448. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  449. (unsigned long long)*hwdev->dma_mask,
  450. (unsigned long long)dev_addr);
  451. panic("swiotlb_alloc_coherent: allocated memory is out of "
  452. "range for device");
  453. }
  454. *dma_handle = dev_addr;
  455. return ret;
  456. }
  457. void
  458. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  459. dma_addr_t dma_handle)
  460. {
  461. WARN_ON(irqs_disabled());
  462. if (!(vaddr >= (void *)io_tlb_start
  463. && vaddr < (void *)io_tlb_end))
  464. free_pages((unsigned long) vaddr, get_order(size));
  465. else
  466. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  467. swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
  468. }
  469. static void
  470. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  471. {
  472. /*
  473. * Ran out of IOMMU space for this operation. This is very bad.
  474. * Unfortunately the drivers cannot handle this operation properly.
  475. * unless they check for dma_mapping_error (most don't)
  476. * When the mapping is small enough return a static buffer to limit
  477. * the damage, or panic when the transfer is too big.
  478. */
  479. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  480. "device %s\n", size, dev ? dev->bus_id : "?");
  481. if (size > io_tlb_overflow && do_panic) {
  482. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  483. panic("DMA: Memory would be corrupted\n");
  484. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  485. panic("DMA: Random memory would be DMAed\n");
  486. }
  487. }
  488. /*
  489. * Map a single buffer of the indicated size for DMA in streaming mode. The
  490. * physical address to use is returned.
  491. *
  492. * Once the device is given the dma address, the device owns this memory until
  493. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  494. */
  495. dma_addr_t
  496. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  497. {
  498. dma_addr_t dev_addr = virt_to_bus(ptr);
  499. void *map;
  500. BUG_ON(dir == DMA_NONE);
  501. /*
  502. * If the pointer passed in happens to be in the device's DMA window,
  503. * we can safely return the device addr and not worry about bounce
  504. * buffering it.
  505. */
  506. if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
  507. return dev_addr;
  508. /*
  509. * Oh well, have to allocate and map a bounce buffer.
  510. */
  511. map = map_single(hwdev, ptr, size, dir);
  512. if (!map) {
  513. swiotlb_full(hwdev, size, dir, 1);
  514. map = io_tlb_overflow_buffer;
  515. }
  516. dev_addr = virt_to_bus(map);
  517. /*
  518. * Ensure that the address returned is DMA'ble
  519. */
  520. if (address_needs_mapping(hwdev, dev_addr))
  521. panic("map_single: bounce buffer is not DMA'ble");
  522. return dev_addr;
  523. }
  524. /*
  525. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  526. * match what was provided for in a previous swiotlb_map_single call. All
  527. * other usages are undefined.
  528. *
  529. * After this call, reads by the cpu to the buffer are guaranteed to see
  530. * whatever the device wrote there.
  531. */
  532. void
  533. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  534. int dir)
  535. {
  536. char *dma_addr = bus_to_virt(dev_addr);
  537. BUG_ON(dir == DMA_NONE);
  538. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  539. unmap_single(hwdev, dma_addr, size, dir);
  540. else if (dir == DMA_FROM_DEVICE)
  541. dma_mark_clean(dma_addr, size);
  542. }
  543. /*
  544. * Make physical memory consistent for a single streaming mode DMA translation
  545. * after a transfer.
  546. *
  547. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  548. * using the cpu, yet do not wish to teardown the dma mapping, you must
  549. * call this function before doing so. At the next point you give the dma
  550. * address back to the card, you must first perform a
  551. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  552. */
  553. static void
  554. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  555. size_t size, int dir, int target)
  556. {
  557. char *dma_addr = bus_to_virt(dev_addr);
  558. BUG_ON(dir == DMA_NONE);
  559. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  560. sync_single(hwdev, dma_addr, size, dir, target);
  561. else if (dir == DMA_FROM_DEVICE)
  562. dma_mark_clean(dma_addr, size);
  563. }
  564. void
  565. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  566. size_t size, int dir)
  567. {
  568. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  569. }
  570. void
  571. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  572. size_t size, int dir)
  573. {
  574. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  575. }
  576. /*
  577. * Same as above, but for a sub-range of the mapping.
  578. */
  579. static void
  580. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  581. unsigned long offset, size_t size,
  582. int dir, int target)
  583. {
  584. char *dma_addr = bus_to_virt(dev_addr) + offset;
  585. BUG_ON(dir == DMA_NONE);
  586. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  587. sync_single(hwdev, dma_addr, size, dir, target);
  588. else if (dir == DMA_FROM_DEVICE)
  589. dma_mark_clean(dma_addr, size);
  590. }
  591. void
  592. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  593. unsigned long offset, size_t size, int dir)
  594. {
  595. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  596. SYNC_FOR_CPU);
  597. }
  598. void
  599. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  600. unsigned long offset, size_t size, int dir)
  601. {
  602. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  603. SYNC_FOR_DEVICE);
  604. }
  605. /*
  606. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  607. * This is the scatter-gather version of the above swiotlb_map_single
  608. * interface. Here the scatter gather list elements are each tagged with the
  609. * appropriate dma address and length. They are obtained via
  610. * sg_dma_{address,length}(SG).
  611. *
  612. * NOTE: An implementation may be able to use a smaller number of
  613. * DMA address/length pairs than there are SG table elements.
  614. * (for example via virtual mapping capabilities)
  615. * The routine returns the number of addr/length pairs actually
  616. * used, at most nents.
  617. *
  618. * Device ownership issues as mentioned above for swiotlb_map_single are the
  619. * same here.
  620. */
  621. int
  622. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  623. int dir)
  624. {
  625. struct scatterlist *sg;
  626. void *addr;
  627. dma_addr_t dev_addr;
  628. int i;
  629. BUG_ON(dir == DMA_NONE);
  630. for_each_sg(sgl, sg, nelems, i) {
  631. addr = SG_ENT_VIRT_ADDRESS(sg);
  632. dev_addr = virt_to_bus(addr);
  633. if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
  634. void *map = map_single(hwdev, addr, sg->length, dir);
  635. if (!map) {
  636. /* Don't panic here, we expect map_sg users
  637. to do proper error handling. */
  638. swiotlb_full(hwdev, sg->length, dir, 0);
  639. swiotlb_unmap_sg(hwdev, sgl, i, dir);
  640. sgl[0].dma_length = 0;
  641. return 0;
  642. }
  643. sg->dma_address = virt_to_bus(map);
  644. } else
  645. sg->dma_address = dev_addr;
  646. sg->dma_length = sg->length;
  647. }
  648. return nelems;
  649. }
  650. /*
  651. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  652. * concerning calls here are the same as for swiotlb_unmap_single() above.
  653. */
  654. void
  655. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  656. int dir)
  657. {
  658. struct scatterlist *sg;
  659. int i;
  660. BUG_ON(dir == DMA_NONE);
  661. for_each_sg(sgl, sg, nelems, i) {
  662. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  663. unmap_single(hwdev, bus_to_virt(sg->dma_address),
  664. sg->dma_length, dir);
  665. else if (dir == DMA_FROM_DEVICE)
  666. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  667. }
  668. }
  669. /*
  670. * Make physical memory consistent for a set of streaming mode DMA translations
  671. * after a transfer.
  672. *
  673. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  674. * and usage.
  675. */
  676. static void
  677. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  678. int nelems, int dir, int target)
  679. {
  680. struct scatterlist *sg;
  681. int i;
  682. BUG_ON(dir == DMA_NONE);
  683. for_each_sg(sgl, sg, nelems, i) {
  684. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  685. sync_single(hwdev, bus_to_virt(sg->dma_address),
  686. sg->dma_length, dir, target);
  687. else if (dir == DMA_FROM_DEVICE)
  688. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  689. }
  690. }
  691. void
  692. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  693. int nelems, int dir)
  694. {
  695. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  696. }
  697. void
  698. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  699. int nelems, int dir)
  700. {
  701. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  702. }
  703. int
  704. swiotlb_dma_mapping_error(dma_addr_t dma_addr)
  705. {
  706. return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
  707. }
  708. /*
  709. * Return whether the given device DMA address mask can be supported
  710. * properly. For example, if your device can only drive the low 24-bits
  711. * during bus mastering, then you would pass 0x00ffffff as the mask to
  712. * this function.
  713. */
  714. int
  715. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  716. {
  717. return virt_to_bus(io_tlb_end - 1) <= mask;
  718. }
  719. EXPORT_SYMBOL(swiotlb_map_single);
  720. EXPORT_SYMBOL(swiotlb_unmap_single);
  721. EXPORT_SYMBOL(swiotlb_map_sg);
  722. EXPORT_SYMBOL(swiotlb_unmap_sg);
  723. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  724. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  725. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  726. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  727. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  728. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  729. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  730. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  731. EXPORT_SYMBOL(swiotlb_free_coherent);
  732. EXPORT_SYMBOL(swiotlb_dma_supported);