io_32.h 9.3 KB

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  1. #ifndef _ASM_IO_H
  2. #define _ASM_IO_H
  3. #include <linux/string.h>
  4. #include <linux/compiler.h>
  5. /*
  6. * This file contains the definitions for the x86 IO instructions
  7. * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  8. * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  9. * versions of the single-IO instructions (inb_p/inw_p/..).
  10. *
  11. * This file is not meant to be obfuscating: it's just complicated
  12. * to (a) handle it all in a way that makes gcc able to optimize it
  13. * as well as possible and (b) trying to avoid writing the same thing
  14. * over and over again with slight variations and possibly making a
  15. * mistake somewhere.
  16. */
  17. /*
  18. * Thanks to James van Artsdalen for a better timing-fix than
  19. * the two short jumps: using outb's to a nonexistent port seems
  20. * to guarantee better timings even on fast machines.
  21. *
  22. * On the other hand, I'd like to be sure of a non-existent port:
  23. * I feel a bit unsafe about using 0x80 (should be safe, though)
  24. *
  25. * Linus
  26. */
  27. /*
  28. * Bit simplified and optimized by Jan Hubicka
  29. * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  30. *
  31. * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  32. * isa_read[wl] and isa_write[wl] fixed
  33. * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  34. */
  35. #define IO_SPACE_LIMIT 0xffff
  36. #define XQUAD_PORTIO_BASE 0xfe400000
  37. #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
  38. #ifdef __KERNEL__
  39. #include <asm-generic/iomap.h>
  40. #include <linux/vmalloc.h>
  41. /*
  42. * Convert a virtual cached pointer to an uncached pointer
  43. */
  44. #define xlate_dev_kmem_ptr(p) p
  45. /**
  46. * virt_to_phys - map virtual addresses to physical
  47. * @address: address to remap
  48. *
  49. * The returned physical address is the physical (CPU) mapping for
  50. * the memory address given. It is only valid to use this function on
  51. * addresses directly mapped or allocated via kmalloc.
  52. *
  53. * This function does not give bus mappings for DMA transfers. In
  54. * almost all conceivable cases a device driver should not be using
  55. * this function
  56. */
  57. static inline unsigned long virt_to_phys(volatile void *address)
  58. {
  59. return __pa(address);
  60. }
  61. /**
  62. * phys_to_virt - map physical address to virtual
  63. * @address: address to remap
  64. *
  65. * The returned virtual address is a current CPU mapping for
  66. * the memory address given. It is only valid to use this function on
  67. * addresses that have a kernel mapping
  68. *
  69. * This function does not handle bus mappings for DMA transfers. In
  70. * almost all conceivable cases a device driver should not be using
  71. * this function
  72. */
  73. static inline void *phys_to_virt(unsigned long address)
  74. {
  75. return __va(address);
  76. }
  77. /*
  78. * Change "struct page" to physical address.
  79. */
  80. #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  81. /**
  82. * ioremap - map bus memory into CPU space
  83. * @offset: bus address of the memory
  84. * @size: size of the resource to map
  85. *
  86. * ioremap performs a platform specific sequence of operations to
  87. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  88. * writew/writel functions and the other mmio helpers. The returned
  89. * address is not guaranteed to be usable directly as a virtual
  90. * address.
  91. *
  92. * If the area you are trying to map is a PCI BAR you should have a
  93. * look at pci_iomap().
  94. */
  95. extern void __iomem *ioremap_nocache(resource_size_t offset, unsigned long size);
  96. extern void __iomem *ioremap_cache(resource_size_t offset, unsigned long size);
  97. /*
  98. * The default ioremap() behavior is non-cached:
  99. */
  100. static inline void __iomem *ioremap(resource_size_t offset, unsigned long size)
  101. {
  102. return ioremap_nocache(offset, size);
  103. }
  104. extern void iounmap(volatile void __iomem *addr);
  105. /*
  106. * early_ioremap() and early_iounmap() are for temporary early boot-time
  107. * mappings, before the real ioremap() is functional.
  108. * A boot-time mapping is currently limited to at most 16 pages.
  109. */
  110. extern void early_ioremap_init(void);
  111. extern void early_ioremap_clear(void);
  112. extern void early_ioremap_reset(void);
  113. extern void *early_ioremap(unsigned long offset, unsigned long size);
  114. extern void early_iounmap(void *addr, unsigned long size);
  115. extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
  116. /* Use early IO mappings for DMI because it's initialized early */
  117. #define dmi_ioremap early_ioremap
  118. #define dmi_iounmap early_iounmap
  119. #define dmi_alloc alloc_bootmem
  120. /*
  121. * ISA I/O bus memory addresses are 1:1 with the physical address.
  122. */
  123. #define isa_virt_to_bus virt_to_phys
  124. #define isa_page_to_bus page_to_phys
  125. #define isa_bus_to_virt phys_to_virt
  126. /*
  127. * However PCI ones are not necessarily 1:1 and therefore these interfaces
  128. * are forbidden in portable PCI drivers.
  129. *
  130. * Allow them on x86 for legacy drivers, though.
  131. */
  132. #define virt_to_bus virt_to_phys
  133. #define bus_to_virt phys_to_virt
  134. /*
  135. * readX/writeX() are used to access memory mapped devices. On some
  136. * architectures the memory mapped IO stuff needs to be accessed
  137. * differently. On the x86 architecture, we just read/write the
  138. * memory location directly.
  139. */
  140. static inline unsigned char readb(const volatile void __iomem *addr)
  141. {
  142. return *(volatile unsigned char __force *)addr;
  143. }
  144. static inline unsigned short readw(const volatile void __iomem *addr)
  145. {
  146. return *(volatile unsigned short __force *)addr;
  147. }
  148. static inline unsigned int readl(const volatile void __iomem *addr)
  149. {
  150. return *(volatile unsigned int __force *) addr;
  151. }
  152. #define readb_relaxed(addr) readb(addr)
  153. #define readw_relaxed(addr) readw(addr)
  154. #define readl_relaxed(addr) readl(addr)
  155. #define __raw_readb readb
  156. #define __raw_readw readw
  157. #define __raw_readl readl
  158. static inline void writeb(unsigned char b, volatile void __iomem *addr)
  159. {
  160. *(volatile unsigned char __force *)addr = b;
  161. }
  162. static inline void writew(unsigned short b, volatile void __iomem *addr)
  163. {
  164. *(volatile unsigned short __force *)addr = b;
  165. }
  166. static inline void writel(unsigned int b, volatile void __iomem *addr)
  167. {
  168. *(volatile unsigned int __force *)addr = b;
  169. }
  170. #define __raw_writeb writeb
  171. #define __raw_writew writew
  172. #define __raw_writel writel
  173. #define mmiowb()
  174. static inline void
  175. memset_io(volatile void __iomem *addr, unsigned char val, int count)
  176. {
  177. memset((void __force *)addr, val, count);
  178. }
  179. static inline void
  180. memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
  181. {
  182. __memcpy(dst, (const void __force *)src, count);
  183. }
  184. static inline void
  185. memcpy_toio(volatile void __iomem *dst, const void *src, int count)
  186. {
  187. __memcpy((void __force *)dst, src, count);
  188. }
  189. /*
  190. * ISA space is 'always mapped' on a typical x86 system, no need to
  191. * explicitly ioremap() it. The fact that the ISA IO space is mapped
  192. * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
  193. * are physical addresses. The following constant pointer can be
  194. * used as the IO-area pointer (it can be iounmapped as well, so the
  195. * analogy with PCI is quite large):
  196. */
  197. #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
  198. /*
  199. * Cache management
  200. *
  201. * This needed for two cases
  202. * 1. Out of order aware processors
  203. * 2. Accidentally out of order processors (PPro errata #51)
  204. */
  205. #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
  206. static inline void flush_write_buffers(void)
  207. {
  208. asm volatile("lock; addl $0,0(%%esp)": : :"memory");
  209. }
  210. #else
  211. #define flush_write_buffers() do { } while (0)
  212. #endif
  213. #endif /* __KERNEL__ */
  214. extern void native_io_delay(void);
  215. extern int io_delay_type;
  216. extern void io_delay_init(void);
  217. #if defined(CONFIG_PARAVIRT)
  218. #include <asm/paravirt.h>
  219. #else
  220. static inline void slow_down_io(void)
  221. {
  222. native_io_delay();
  223. #ifdef REALLY_SLOW_IO
  224. native_io_delay();
  225. native_io_delay();
  226. native_io_delay();
  227. #endif
  228. }
  229. #endif
  230. #define __BUILDIO(bwl, bw, type) \
  231. static inline void out##bwl(unsigned type value, int port) \
  232. { \
  233. out##bwl##_local(value, port); \
  234. } \
  235. \
  236. static inline unsigned type in##bwl(int port) \
  237. { \
  238. return in##bwl##_local(port); \
  239. }
  240. #define BUILDIO(bwl, bw, type) \
  241. static inline void out##bwl##_local(unsigned type value, int port) \
  242. { \
  243. asm volatile("out" #bwl " %" #bw "0, %w1" \
  244. : : "a"(value), "Nd"(port)); \
  245. } \
  246. \
  247. static inline unsigned type in##bwl##_local(int port) \
  248. { \
  249. unsigned type value; \
  250. asm volatile("in" #bwl " %w1, %" #bw "0" \
  251. : "=a"(value) : "Nd"(port)); \
  252. return value; \
  253. } \
  254. \
  255. static inline void out##bwl##_local_p(unsigned type value, int port) \
  256. { \
  257. out##bwl##_local(value, port); \
  258. slow_down_io(); \
  259. } \
  260. \
  261. static inline unsigned type in##bwl##_local_p(int port) \
  262. { \
  263. unsigned type value = in##bwl##_local(port); \
  264. slow_down_io(); \
  265. return value; \
  266. } \
  267. \
  268. __BUILDIO(bwl, bw, type) \
  269. \
  270. static inline void out##bwl##_p(unsigned type value, int port) \
  271. { \
  272. out##bwl(value, port); \
  273. slow_down_io(); \
  274. } \
  275. \
  276. static inline unsigned type in##bwl##_p(int port) \
  277. { \
  278. unsigned type value = in##bwl(port); \
  279. slow_down_io(); \
  280. return value; \
  281. } \
  282. \
  283. static inline void outs##bwl(int port, const void *addr, unsigned long count) \
  284. { \
  285. asm volatile("rep; outs" #bwl \
  286. : "+S"(addr), "+c"(count) : "d"(port)); \
  287. } \
  288. \
  289. static inline void ins##bwl(int port, void *addr, unsigned long count) \
  290. { \
  291. asm volatile("rep; ins" #bwl \
  292. : "+D"(addr), "+c"(count) : "d"(port)); \
  293. }
  294. BUILDIO(b, b, char)
  295. BUILDIO(w, w, short)
  296. BUILDIO(l, , int)
  297. #endif