hpwdt.c 17 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/kernel.h>
  22. #include <linux/miscdevice.h>
  23. #include <linux/mm.h>
  24. #include <linux/module.h>
  25. #include <linux/kdebug.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/notifier.h>
  28. #include <linux/pci.h>
  29. #include <linux/pci_ids.h>
  30. #include <linux/reboot.h>
  31. #include <linux/sched.h>
  32. #include <linux/timer.h>
  33. #include <linux/types.h>
  34. #include <linux/uaccess.h>
  35. #include <linux/watchdog.h>
  36. #include <linux/dmi.h>
  37. #include <linux/efi.h>
  38. #include <linux/string.h>
  39. #include <linux/bootmem.h>
  40. #include <linux/slab.h>
  41. #include <asm/dmi.h>
  42. #include <asm/desc.h>
  43. #include <asm/kdebug.h>
  44. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  45. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  46. #define PCI_BIOS32_PARAGRAPH_LEN 16
  47. #define PCI_ROM_BASE1 0x000F0000
  48. #define ROM_SIZE 0x10000
  49. struct bios32_service_dir {
  50. u32 signature;
  51. u32 entry_point;
  52. u8 revision;
  53. u8 length;
  54. u8 checksum;
  55. u8 reserved[5];
  56. };
  57. /* type 212 */
  58. struct smbios_cru64_info {
  59. u8 type;
  60. u8 byte_length;
  61. u16 handle;
  62. u32 signature;
  63. u64 physical_address;
  64. u32 double_length;
  65. u32 double_offset;
  66. };
  67. #define SMBIOS_CRU64_INFORMATION 212
  68. struct cmn_registers {
  69. union {
  70. struct {
  71. u8 ral;
  72. u8 rah;
  73. u16 rea2;
  74. };
  75. u32 reax;
  76. } u1;
  77. union {
  78. struct {
  79. u8 rbl;
  80. u8 rbh;
  81. u8 reb2l;
  82. u8 reb2h;
  83. };
  84. u32 rebx;
  85. } u2;
  86. union {
  87. struct {
  88. u8 rcl;
  89. u8 rch;
  90. u16 rec2;
  91. };
  92. u32 recx;
  93. } u3;
  94. union {
  95. struct {
  96. u8 rdl;
  97. u8 rdh;
  98. u16 red2;
  99. };
  100. u32 redx;
  101. } u4;
  102. u32 resi;
  103. u32 redi;
  104. u16 rds;
  105. u16 res;
  106. u32 reflags;
  107. } __attribute__((packed));
  108. #define DEFAULT_MARGIN 30
  109. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  110. static unsigned int reload; /* the computed soft_margin */
  111. static int nowayout = WATCHDOG_NOWAYOUT;
  112. static char expect_release;
  113. static unsigned long hpwdt_is_open;
  114. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  115. static unsigned long __iomem *hpwdt_timer_reg;
  116. static unsigned long __iomem *hpwdt_timer_con;
  117. static DEFINE_SPINLOCK(rom_lock);
  118. static void *cru_rom_addr;
  119. static struct cmn_registers cmn_regs;
  120. static struct pci_device_id hpwdt_devices[] = {
  121. {
  122. .vendor = PCI_VENDOR_ID_COMPAQ,
  123. .device = 0xB203,
  124. .subvendor = PCI_ANY_ID,
  125. .subdevice = PCI_ANY_ID,
  126. },
  127. {0}, /* terminate list */
  128. };
  129. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  130. #ifndef CONFIG_X86_64
  131. /* --32 Bit Bios------------------------------------------------------------ */
  132. #define HPWDT_ARCH 32
  133. static void asminline_call(struct cmn_registers *pi86Regs,
  134. unsigned long *pRomEntry)
  135. {
  136. asm("pushl %ebp \n\t"
  137. "movl %esp, %ebp \n\t"
  138. "pusha \n\t"
  139. "pushf \n\t"
  140. "push %es \n\t"
  141. "push %ds \n\t"
  142. "pop %es \n\t"
  143. "movl 8(%ebp),%eax \n\t"
  144. "movl 4(%eax),%ebx \n\t"
  145. "movl 8(%eax),%ecx \n\t"
  146. "movl 12(%eax),%edx \n\t"
  147. "movl 16(%eax),%esi \n\t"
  148. "movl 20(%eax),%edi \n\t"
  149. "movl (%eax),%eax \n\t"
  150. "push %cs \n\t"
  151. "call *12(%ebp) \n\t"
  152. "pushf \n\t"
  153. "pushl %eax \n\t"
  154. "movl 8(%ebp),%eax \n\t"
  155. "movl %ebx,4(%eax) \n\t"
  156. "movl %ecx,8(%eax) \n\t"
  157. "movl %edx,12(%eax) \n\t"
  158. "movl %esi,16(%eax) \n\t"
  159. "movl %edi,20(%eax) \n\t"
  160. "movw %ds,24(%eax) \n\t"
  161. "movw %es,26(%eax) \n\t"
  162. "popl %ebx \n\t"
  163. "movl %ebx,(%eax) \n\t"
  164. "popl %ebx \n\t"
  165. "movl %ebx,28(%eax) \n\t"
  166. "pop %es \n\t"
  167. "popf \n\t"
  168. "popa \n\t"
  169. "leave \n\t" "ret");
  170. }
  171. /*
  172. * cru_detect
  173. *
  174. * Routine Description:
  175. * This function uses the 32-bit BIOS Service Directory record to
  176. * search for a $CRU record.
  177. *
  178. * Return Value:
  179. * 0 : SUCCESS
  180. * <0 : FAILURE
  181. */
  182. static int __devinit cru_detect(unsigned long map_entry,
  183. unsigned long map_offset)
  184. {
  185. void *bios32_map;
  186. unsigned long *bios32_entrypoint;
  187. unsigned long cru_physical_address;
  188. unsigned long cru_length;
  189. unsigned long physical_bios_base = 0;
  190. unsigned long physical_bios_offset = 0;
  191. int retval = -ENODEV;
  192. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  193. if (bios32_map == NULL)
  194. return -ENODEV;
  195. bios32_entrypoint = bios32_map + map_offset;
  196. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  197. asminline_call(&cmn_regs, bios32_entrypoint);
  198. if (cmn_regs.u1.ral != 0) {
  199. printk(KERN_WARNING
  200. "hpwdt: Call succeeded but with an error: 0x%x\n",
  201. cmn_regs.u1.ral);
  202. } else {
  203. physical_bios_base = cmn_regs.u2.rebx;
  204. physical_bios_offset = cmn_regs.u4.redx;
  205. cru_length = cmn_regs.u3.recx;
  206. cru_physical_address =
  207. physical_bios_base + physical_bios_offset;
  208. /* If the values look OK, then map it in. */
  209. if ((physical_bios_base + physical_bios_offset)) {
  210. cru_rom_addr =
  211. ioremap(cru_physical_address, cru_length);
  212. if (cru_rom_addr)
  213. retval = 0;
  214. }
  215. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  216. physical_bios_base);
  217. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  218. physical_bios_offset);
  219. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  220. cru_length);
  221. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
  222. (unsigned int)&cru_rom_addr);
  223. }
  224. iounmap(bios32_map);
  225. return retval;
  226. }
  227. /*
  228. * bios_checksum
  229. */
  230. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  231. {
  232. char sum = 0;
  233. int i;
  234. /*
  235. * calculate checksum of size bytes. This should add up
  236. * to zero if we have a valid header.
  237. */
  238. for (i = 0; i < len; i++)
  239. sum += ptr[i];
  240. return ((sum == 0) && (len > 0));
  241. }
  242. /*
  243. * bios32_present
  244. *
  245. * Routine Description:
  246. * This function finds the 32-bit BIOS Service Directory
  247. *
  248. * Return Value:
  249. * 0 : SUCCESS
  250. * <0 : FAILURE
  251. */
  252. static int __devinit bios32_present(const char __iomem *p)
  253. {
  254. struct bios32_service_dir *bios_32_ptr;
  255. int length;
  256. unsigned long map_entry, map_offset;
  257. bios_32_ptr = (struct bios32_service_dir *) p;
  258. /*
  259. * Search for signature by checking equal to the swizzled value
  260. * instead of calling another routine to perform a strcmp.
  261. */
  262. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  263. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  264. if (bios_checksum(p, length)) {
  265. /*
  266. * According to the spec, we're looking for the
  267. * first 4KB-aligned address below the entrypoint
  268. * listed in the header. The Service Directory code
  269. * is guaranteed to occupy no more than 2 4KB pages.
  270. */
  271. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  272. map_offset = bios_32_ptr->entry_point - map_entry;
  273. return cru_detect(map_entry, map_offset);
  274. }
  275. }
  276. return -ENODEV;
  277. }
  278. static int __devinit detect_cru_service(void)
  279. {
  280. char __iomem *p, *q;
  281. int rc = -1;
  282. /*
  283. * Search from 0x0f0000 through 0x0fffff, inclusive.
  284. */
  285. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  286. if (p == NULL)
  287. return -ENOMEM;
  288. for (q = p; q < p + ROM_SIZE; q += 16) {
  289. rc = bios32_present(q);
  290. if (!rc)
  291. break;
  292. }
  293. iounmap(p);
  294. return rc;
  295. }
  296. #else
  297. /* --64 Bit Bios------------------------------------------------------------ */
  298. #define HPWDT_ARCH 64
  299. static void asminline_call(struct cmn_registers *pi86Regs,
  300. unsigned long *pRomEntry)
  301. {
  302. asm("pushq %rbp \n\t"
  303. "movq %rsp, %rbp \n\t"
  304. "pushq %rax \n\t"
  305. "pushq %rbx \n\t"
  306. "pushq %rdx \n\t"
  307. "pushq %r12 \n\t"
  308. "pushq %r9 \n\t"
  309. "movq %rsi, %r12 \n\t"
  310. "movq %rdi, %r9 \n\t"
  311. "movl 4(%r9),%ebx \n\t"
  312. "movl 8(%r9),%ecx \n\t"
  313. "movl 12(%r9),%edx \n\t"
  314. "movl 16(%r9),%esi \n\t"
  315. "movl 20(%r9),%edi \n\t"
  316. "movl (%r9),%eax \n\t"
  317. "call *%r12 \n\t"
  318. "pushfq \n\t"
  319. "popq %r12 \n\t"
  320. "popfq \n\t"
  321. "movl %eax, (%r9) \n\t"
  322. "movl %ebx, 4(%r9) \n\t"
  323. "movl %ecx, 8(%r9) \n\t"
  324. "movl %edx, 12(%r9) \n\t"
  325. "movl %esi, 16(%r9) \n\t"
  326. "movl %edi, 20(%r9) \n\t"
  327. "movq %r12, %rax \n\t"
  328. "movl %eax, 28(%r9) \n\t"
  329. "popq %r9 \n\t"
  330. "popq %r12 \n\t"
  331. "popq %rdx \n\t"
  332. "popq %rbx \n\t"
  333. "popq %rax \n\t"
  334. "leave \n\t" "ret");
  335. }
  336. /*
  337. * dmi_find_cru
  338. *
  339. * Routine Description:
  340. * This function checks whether or not a SMBIOS/DMI record is
  341. * the 64bit CRU info or not
  342. */
  343. static void __devinit dmi_find_cru(const struct dmi_header *dm)
  344. {
  345. struct smbios_cru64_info *smbios_cru64_ptr;
  346. unsigned long cru_physical_address;
  347. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  348. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  349. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  350. cru_physical_address =
  351. smbios_cru64_ptr->physical_address +
  352. smbios_cru64_ptr->double_offset;
  353. cru_rom_addr = ioremap(cru_physical_address,
  354. smbios_cru64_ptr->double_length);
  355. }
  356. }
  357. }
  358. static int __devinit detect_cru_service(void)
  359. {
  360. cru_rom_addr = NULL;
  361. dmi_walk(dmi_find_cru);
  362. /* if cru_rom_addr has been set then we found a CRU service */
  363. return ((cru_rom_addr != NULL)? 0: -ENODEV);
  364. }
  365. /* ------------------------------------------------------------------------- */
  366. #endif
  367. /*
  368. * NMI Handler
  369. */
  370. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  371. void *data)
  372. {
  373. static unsigned long rom_pl;
  374. static int die_nmi_called;
  375. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  376. return NOTIFY_OK;
  377. spin_lock_irqsave(&rom_lock, rom_pl);
  378. if (!die_nmi_called)
  379. asminline_call(&cmn_regs, cru_rom_addr);
  380. die_nmi_called = 1;
  381. spin_unlock_irqrestore(&rom_lock, rom_pl);
  382. if (cmn_regs.u1.ral == 0) {
  383. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  384. "but unable to determine source.\n");
  385. } else {
  386. panic("An NMI occurred, please see the Integrated "
  387. "Management Log for details.\n");
  388. }
  389. return NOTIFY_STOP;
  390. }
  391. /*
  392. * Watchdog operations
  393. */
  394. static void hpwdt_start(void)
  395. {
  396. reload = (soft_margin * 1000) / 128;
  397. iowrite16(reload, hpwdt_timer_reg);
  398. iowrite16(0x85, hpwdt_timer_con);
  399. }
  400. static void hpwdt_stop(void)
  401. {
  402. unsigned long data;
  403. data = ioread16(hpwdt_timer_con);
  404. data &= 0xFE;
  405. iowrite16(data, hpwdt_timer_con);
  406. }
  407. static void hpwdt_ping(void)
  408. {
  409. iowrite16(reload, hpwdt_timer_reg);
  410. }
  411. static int hpwdt_change_timer(int new_margin)
  412. {
  413. /* Arbitrary, can't find the card's limits */
  414. if (new_margin < 30 || new_margin > 600) {
  415. printk(KERN_WARNING
  416. "hpwdt: New value passed in is invalid: %d seconds.\n",
  417. new_margin);
  418. return -EINVAL;
  419. }
  420. soft_margin = new_margin;
  421. printk(KERN_DEBUG
  422. "hpwdt: New timer passed in is %d seconds.\n",
  423. new_margin);
  424. reload = (soft_margin * 1000) / 128;
  425. return 0;
  426. }
  427. /*
  428. * /dev/watchdog handling
  429. */
  430. static int hpwdt_open(struct inode *inode, struct file *file)
  431. {
  432. /* /dev/watchdog can only be opened once */
  433. if (test_and_set_bit(0, &hpwdt_is_open))
  434. return -EBUSY;
  435. /* Start the watchdog */
  436. hpwdt_start();
  437. hpwdt_ping();
  438. return nonseekable_open(inode, file);
  439. }
  440. static int hpwdt_release(struct inode *inode, struct file *file)
  441. {
  442. /* Stop the watchdog */
  443. if (expect_release == 42) {
  444. hpwdt_stop();
  445. } else {
  446. printk(KERN_CRIT
  447. "hpwdt: Unexpected close, not stopping watchdog!\n");
  448. hpwdt_ping();
  449. }
  450. expect_release = 0;
  451. /* /dev/watchdog is being closed, make sure it can be re-opened */
  452. clear_bit(0, &hpwdt_is_open);
  453. return 0;
  454. }
  455. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  456. size_t len, loff_t *ppos)
  457. {
  458. /* See if we got the magic character 'V' and reload the timer */
  459. if (len) {
  460. if (!nowayout) {
  461. size_t i;
  462. /* note: just in case someone wrote the magic character
  463. * five months ago... */
  464. expect_release = 0;
  465. /* scan to see whether or not we got the magic char. */
  466. for (i = 0; i != len; i++) {
  467. char c;
  468. if (get_user(c, data+i))
  469. return -EFAULT;
  470. if (c == 'V')
  471. expect_release = 42;
  472. }
  473. }
  474. /* someone wrote to us, we should reload the timer */
  475. hpwdt_ping();
  476. }
  477. return len;
  478. }
  479. static struct watchdog_info ident = {
  480. .options = WDIOF_SETTIMEOUT |
  481. WDIOF_KEEPALIVEPING |
  482. WDIOF_MAGICCLOSE,
  483. .identity = "HP iLO2 HW Watchdog Timer",
  484. };
  485. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  486. unsigned long arg)
  487. {
  488. void __user *argp = (void __user *)arg;
  489. int __user *p = argp;
  490. int new_margin;
  491. int ret = -ENOTTY;
  492. switch (cmd) {
  493. case WDIOC_GETSUPPORT:
  494. ret = 0;
  495. if (copy_to_user(argp, &ident, sizeof(ident)))
  496. ret = -EFAULT;
  497. break;
  498. case WDIOC_GETSTATUS:
  499. case WDIOC_GETBOOTSTATUS:
  500. ret = put_user(0, p);
  501. break;
  502. case WDIOC_KEEPALIVE:
  503. hpwdt_ping();
  504. ret = 0;
  505. break;
  506. case WDIOC_SETTIMEOUT:
  507. ret = get_user(new_margin, p);
  508. if (ret)
  509. break;
  510. ret = hpwdt_change_timer(new_margin);
  511. if (ret)
  512. break;
  513. hpwdt_ping();
  514. /* Fall */
  515. case WDIOC_GETTIMEOUT:
  516. ret = put_user(soft_margin, p);
  517. break;
  518. }
  519. return ret;
  520. }
  521. /*
  522. * Kernel interfaces
  523. */
  524. static struct file_operations hpwdt_fops = {
  525. .owner = THIS_MODULE,
  526. .llseek = no_llseek,
  527. .write = hpwdt_write,
  528. .unlocked_ioctl = hpwdt_ioctl,
  529. .open = hpwdt_open,
  530. .release = hpwdt_release,
  531. };
  532. static struct miscdevice hpwdt_miscdev = {
  533. .minor = WATCHDOG_MINOR,
  534. .name = "watchdog",
  535. .fops = &hpwdt_fops,
  536. };
  537. static struct notifier_block die_notifier = {
  538. .notifier_call = hpwdt_pretimeout,
  539. .priority = 0x7FFFFFFF,
  540. };
  541. /*
  542. * Init & Exit
  543. */
  544. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  545. const struct pci_device_id *ent)
  546. {
  547. int retval;
  548. /*
  549. * First let's find out if we are on an iLO2 server. We will
  550. * not run on a legacy ASM box.
  551. */
  552. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  553. dev_warn(&dev->dev,
  554. "This server does not have an iLO2 ASIC.\n");
  555. return -ENODEV;
  556. }
  557. if (pci_enable_device(dev)) {
  558. dev_warn(&dev->dev,
  559. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  560. ent->vendor, ent->device);
  561. return -ENODEV;
  562. }
  563. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  564. if (!pci_mem_addr) {
  565. dev_warn(&dev->dev,
  566. "Unable to detect the iLO2 server memory.\n");
  567. retval = -ENOMEM;
  568. goto error_pci_iomap;
  569. }
  570. hpwdt_timer_reg = pci_mem_addr + 0x70;
  571. hpwdt_timer_con = pci_mem_addr + 0x72;
  572. /* Make sure that we have a valid soft_margin */
  573. if (hpwdt_change_timer(soft_margin))
  574. hpwdt_change_timer(DEFAULT_MARGIN);
  575. /*
  576. * We need to map the ROM to get the CRU service.
  577. * For 32 bit Operating Systems we need to go through the 32 Bit
  578. * BIOS Service Directory
  579. * For 64 bit Operating Systems we get that service through SMBIOS.
  580. */
  581. retval = detect_cru_service();
  582. if (retval < 0) {
  583. dev_warn(&dev->dev,
  584. "Unable to detect the %d Bit CRU Service.\n",
  585. HPWDT_ARCH);
  586. goto error_get_cru;
  587. }
  588. /*
  589. * We know this is the only CRU call we need to make so lets keep as
  590. * few instructions as possible once the NMI comes in.
  591. */
  592. cmn_regs.u1.rah = 0x0D;
  593. cmn_regs.u1.ral = 0x02;
  594. retval = register_die_notifier(&die_notifier);
  595. if (retval != 0) {
  596. dev_warn(&dev->dev,
  597. "Unable to register a die notifier (err=%d).\n",
  598. retval);
  599. goto error_die_notifier;
  600. }
  601. retval = misc_register(&hpwdt_miscdev);
  602. if (retval < 0) {
  603. dev_warn(&dev->dev,
  604. "Unable to register miscdev on minor=%d (err=%d).\n",
  605. WATCHDOG_MINOR, retval);
  606. goto error_misc_register;
  607. }
  608. printk(KERN_INFO
  609. "hp Watchdog Timer Driver: 1.00"
  610. ", timer margin: %d seconds( nowayout=%d).\n",
  611. soft_margin, nowayout);
  612. return 0;
  613. error_misc_register:
  614. unregister_die_notifier(&die_notifier);
  615. error_die_notifier:
  616. if (cru_rom_addr)
  617. iounmap(cru_rom_addr);
  618. error_get_cru:
  619. pci_iounmap(dev, pci_mem_addr);
  620. error_pci_iomap:
  621. pci_disable_device(dev);
  622. return retval;
  623. }
  624. static void __devexit hpwdt_exit(struct pci_dev *dev)
  625. {
  626. if (!nowayout)
  627. hpwdt_stop();
  628. misc_deregister(&hpwdt_miscdev);
  629. unregister_die_notifier(&die_notifier);
  630. if (cru_rom_addr)
  631. iounmap(cru_rom_addr);
  632. pci_iounmap(dev, pci_mem_addr);
  633. pci_disable_device(dev);
  634. }
  635. static struct pci_driver hpwdt_driver = {
  636. .name = "hpwdt",
  637. .id_table = hpwdt_devices,
  638. .probe = hpwdt_init_one,
  639. .remove = __devexit_p(hpwdt_exit),
  640. };
  641. static void __exit hpwdt_cleanup(void)
  642. {
  643. pci_unregister_driver(&hpwdt_driver);
  644. }
  645. static int __init hpwdt_init(void)
  646. {
  647. return pci_register_driver(&hpwdt_driver);
  648. }
  649. MODULE_AUTHOR("Tom Mingarelli");
  650. MODULE_DESCRIPTION("hp watchdog driver");
  651. MODULE_LICENSE("GPL");
  652. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  653. module_param(soft_margin, int, 0);
  654. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  655. module_param(nowayout, int, 0);
  656. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  657. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  658. module_init(hpwdt_init);
  659. module_exit(hpwdt_cleanup);