atmel_lcdfb.c 26 KB

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  1. /*
  2. * Driver for AT91/AT32 LCD Controller
  3. *
  4. * Copyright (C) 2007 Atmel Corporation
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file COPYING in the main directory of this archive for
  8. * more details.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/platform_device.h>
  12. #include <linux/dma-mapping.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/clk.h>
  15. #include <linux/fb.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/backlight.h>
  19. #include <asm/arch/board.h>
  20. #include <asm/arch/cpu.h>
  21. #include <asm/arch/gpio.h>
  22. #include <video/atmel_lcdc.h>
  23. #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg))
  24. #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg))
  25. /* configurable parameters */
  26. #define ATMEL_LCDC_CVAL_DEFAULT 0xc8
  27. #define ATMEL_LCDC_DMA_BURST_LEN 8
  28. #if defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91CAP9)
  29. #define ATMEL_LCDC_FIFO_SIZE 2048
  30. #else
  31. #define ATMEL_LCDC_FIFO_SIZE 512
  32. #endif
  33. #if defined(CONFIG_ARCH_AT91)
  34. #define ATMEL_LCDFB_FBINFO_DEFAULT FBINFO_DEFAULT
  35. static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  36. struct fb_var_screeninfo *var)
  37. {
  38. }
  39. #elif defined(CONFIG_AVR32)
  40. #define ATMEL_LCDFB_FBINFO_DEFAULT (FBINFO_DEFAULT \
  41. | FBINFO_PARTIAL_PAN_OK \
  42. | FBINFO_HWACCEL_XPAN \
  43. | FBINFO_HWACCEL_YPAN)
  44. static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo,
  45. struct fb_var_screeninfo *var)
  46. {
  47. u32 dma2dcfg;
  48. u32 pixeloff;
  49. pixeloff = (var->xoffset * var->bits_per_pixel) & 0x1f;
  50. dma2dcfg = ((var->xres_virtual - var->xres) * var->bits_per_pixel) / 8;
  51. dma2dcfg |= pixeloff << ATMEL_LCDC_PIXELOFF_OFFSET;
  52. lcdc_writel(sinfo, ATMEL_LCDC_DMA2DCFG, dma2dcfg);
  53. /* Update configuration */
  54. lcdc_writel(sinfo, ATMEL_LCDC_DMACON,
  55. lcdc_readl(sinfo, ATMEL_LCDC_DMACON)
  56. | ATMEL_LCDC_DMAUPDT);
  57. }
  58. #endif
  59. static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8
  60. | ATMEL_LCDC_POL_POSITIVE
  61. | ATMEL_LCDC_ENA_PWMENABLE;
  62. #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC
  63. /* some bl->props field just changed */
  64. static int atmel_bl_update_status(struct backlight_device *bl)
  65. {
  66. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  67. int power = sinfo->bl_power;
  68. int brightness = bl->props.brightness;
  69. /* REVISIT there may be a meaningful difference between
  70. * fb_blank and power ... there seem to be some cases
  71. * this doesn't handle correctly.
  72. */
  73. if (bl->props.fb_blank != sinfo->bl_power)
  74. power = bl->props.fb_blank;
  75. else if (bl->props.power != sinfo->bl_power)
  76. power = bl->props.power;
  77. if (brightness < 0 && power == FB_BLANK_UNBLANK)
  78. brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  79. else if (power != FB_BLANK_UNBLANK)
  80. brightness = 0;
  81. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness);
  82. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR,
  83. brightness ? contrast_ctr : 0);
  84. bl->props.fb_blank = bl->props.power = sinfo->bl_power = power;
  85. return 0;
  86. }
  87. static int atmel_bl_get_brightness(struct backlight_device *bl)
  88. {
  89. struct atmel_lcdfb_info *sinfo = bl_get_data(bl);
  90. return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL);
  91. }
  92. static struct backlight_ops atmel_lcdc_bl_ops = {
  93. .update_status = atmel_bl_update_status,
  94. .get_brightness = atmel_bl_get_brightness,
  95. };
  96. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  97. {
  98. struct backlight_device *bl;
  99. sinfo->bl_power = FB_BLANK_UNBLANK;
  100. if (sinfo->backlight)
  101. return;
  102. bl = backlight_device_register("backlight", &sinfo->pdev->dev,
  103. sinfo, &atmel_lcdc_bl_ops);
  104. if (IS_ERR(sinfo->backlight)) {
  105. dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n",
  106. PTR_ERR(bl));
  107. return;
  108. }
  109. sinfo->backlight = bl;
  110. bl->props.power = FB_BLANK_UNBLANK;
  111. bl->props.fb_blank = FB_BLANK_UNBLANK;
  112. bl->props.max_brightness = 0xff;
  113. bl->props.brightness = atmel_bl_get_brightness(bl);
  114. }
  115. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  116. {
  117. if (sinfo->backlight)
  118. backlight_device_unregister(sinfo->backlight);
  119. }
  120. #else
  121. static void init_backlight(struct atmel_lcdfb_info *sinfo)
  122. {
  123. dev_warn(&sinfo->pdev->dev, "backlight control is not available\n");
  124. }
  125. static void exit_backlight(struct atmel_lcdfb_info *sinfo)
  126. {
  127. }
  128. #endif
  129. static void init_contrast(struct atmel_lcdfb_info *sinfo)
  130. {
  131. /* have some default contrast/backlight settings */
  132. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr);
  133. lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT);
  134. if (sinfo->lcdcon_is_backlight)
  135. init_backlight(sinfo);
  136. }
  137. static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = {
  138. .type = FB_TYPE_PACKED_PIXELS,
  139. .visual = FB_VISUAL_TRUECOLOR,
  140. .xpanstep = 0,
  141. .ypanstep = 0,
  142. .ywrapstep = 0,
  143. .accel = FB_ACCEL_NONE,
  144. };
  145. static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2)
  146. {
  147. unsigned long value;
  148. if (!(cpu_is_at91sam9261() || cpu_is_at32ap7000()))
  149. return xres;
  150. value = xres;
  151. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) {
  152. /* STN display */
  153. if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) {
  154. value *= 3;
  155. }
  156. if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4
  157. || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8
  158. && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL ))
  159. value = DIV_ROUND_UP(value, 4);
  160. else
  161. value = DIV_ROUND_UP(value, 8);
  162. }
  163. return value;
  164. }
  165. static void atmel_lcdfb_update_dma(struct fb_info *info,
  166. struct fb_var_screeninfo *var)
  167. {
  168. struct atmel_lcdfb_info *sinfo = info->par;
  169. struct fb_fix_screeninfo *fix = &info->fix;
  170. unsigned long dma_addr;
  171. dma_addr = (fix->smem_start + var->yoffset * fix->line_length
  172. + var->xoffset * var->bits_per_pixel / 8);
  173. dma_addr &= ~3UL;
  174. /* Set framebuffer DMA base address and pixel offset */
  175. lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr);
  176. atmel_lcdfb_update_dma2d(sinfo, var);
  177. }
  178. static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo)
  179. {
  180. struct fb_info *info = sinfo->info;
  181. dma_free_writecombine(info->device, info->fix.smem_len,
  182. info->screen_base, info->fix.smem_start);
  183. }
  184. /**
  185. * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory
  186. * @sinfo: the frame buffer to allocate memory for
  187. */
  188. static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo)
  189. {
  190. struct fb_info *info = sinfo->info;
  191. struct fb_var_screeninfo *var = &info->var;
  192. info->fix.smem_len = (var->xres_virtual * var->yres_virtual
  193. * ((var->bits_per_pixel + 7) / 8));
  194. info->screen_base = dma_alloc_writecombine(info->device, info->fix.smem_len,
  195. (dma_addr_t *)&info->fix.smem_start, GFP_KERNEL);
  196. if (!info->screen_base) {
  197. return -ENOMEM;
  198. }
  199. return 0;
  200. }
  201. /**
  202. * atmel_lcdfb_check_var - Validates a var passed in.
  203. * @var: frame buffer variable screen structure
  204. * @info: frame buffer structure that represents a single frame buffer
  205. *
  206. * Checks to see if the hardware supports the state requested by
  207. * var passed in. This function does not alter the hardware
  208. * state!!! This means the data stored in struct fb_info and
  209. * struct atmel_lcdfb_info do not change. This includes the var
  210. * inside of struct fb_info. Do NOT change these. This function
  211. * can be called on its own if we intent to only test a mode and
  212. * not actually set it. The stuff in modedb.c is a example of
  213. * this. If the var passed in is slightly off by what the
  214. * hardware can support then we alter the var PASSED in to what
  215. * we can do. If the hardware doesn't support mode change a
  216. * -EINVAL will be returned by the upper layers. You don't need
  217. * to implement this function then. If you hardware doesn't
  218. * support changing the resolution then this function is not
  219. * needed. In this case the driver would just provide a var that
  220. * represents the static state the screen is in.
  221. *
  222. * Returns negative errno on error, or zero on success.
  223. */
  224. static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var,
  225. struct fb_info *info)
  226. {
  227. struct device *dev = info->device;
  228. struct atmel_lcdfb_info *sinfo = info->par;
  229. unsigned long clk_value_khz;
  230. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  231. dev_dbg(dev, "%s:\n", __func__);
  232. dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres);
  233. dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock));
  234. dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel);
  235. dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz);
  236. if ((PICOS2KHZ(var->pixclock) * var->bits_per_pixel / 8) > clk_value_khz) {
  237. dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock));
  238. return -EINVAL;
  239. }
  240. /* Force same alignment for each line */
  241. var->xres = (var->xres + 3) & ~3UL;
  242. var->xres_virtual = (var->xres_virtual + 3) & ~3UL;
  243. var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0;
  244. var->transp.msb_right = 0;
  245. var->transp.offset = var->transp.length = 0;
  246. var->xoffset = var->yoffset = 0;
  247. /* Saturate vertical and horizontal timings at maximum values */
  248. var->vsync_len = min_t(u32, var->vsync_len,
  249. (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1);
  250. var->upper_margin = min_t(u32, var->upper_margin,
  251. ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET);
  252. var->lower_margin = min_t(u32, var->lower_margin,
  253. ATMEL_LCDC_VFP);
  254. var->right_margin = min_t(u32, var->right_margin,
  255. (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1);
  256. var->hsync_len = min_t(u32, var->hsync_len,
  257. (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1);
  258. var->left_margin = min_t(u32, var->left_margin,
  259. ATMEL_LCDC_HBP + 1);
  260. /* Some parameters can't be zero */
  261. var->vsync_len = max_t(u32, var->vsync_len, 1);
  262. var->right_margin = max_t(u32, var->right_margin, 1);
  263. var->hsync_len = max_t(u32, var->hsync_len, 1);
  264. var->left_margin = max_t(u32, var->left_margin, 1);
  265. switch (var->bits_per_pixel) {
  266. case 1:
  267. case 2:
  268. case 4:
  269. case 8:
  270. var->red.offset = var->green.offset = var->blue.offset = 0;
  271. var->red.length = var->green.length = var->blue.length
  272. = var->bits_per_pixel;
  273. break;
  274. case 15:
  275. case 16:
  276. var->red.offset = 0;
  277. var->green.offset = 5;
  278. var->blue.offset = 10;
  279. var->red.length = var->green.length = var->blue.length = 5;
  280. break;
  281. case 32:
  282. var->transp.offset = 24;
  283. var->transp.length = 8;
  284. /* fall through */
  285. case 24:
  286. var->red.offset = 0;
  287. var->green.offset = 8;
  288. var->blue.offset = 16;
  289. var->red.length = var->green.length = var->blue.length = 8;
  290. break;
  291. default:
  292. dev_err(dev, "color depth %d not supported\n",
  293. var->bits_per_pixel);
  294. return -EINVAL;
  295. }
  296. return 0;
  297. }
  298. /**
  299. * atmel_lcdfb_set_par - Alters the hardware state.
  300. * @info: frame buffer structure that represents a single frame buffer
  301. *
  302. * Using the fb_var_screeninfo in fb_info we set the resolution
  303. * of the this particular framebuffer. This function alters the
  304. * par AND the fb_fix_screeninfo stored in fb_info. It doesn't
  305. * not alter var in fb_info since we are using that data. This
  306. * means we depend on the data in var inside fb_info to be
  307. * supported by the hardware. atmel_lcdfb_check_var is always called
  308. * before atmel_lcdfb_set_par to ensure this. Again if you can't
  309. * change the resolution you don't need this function.
  310. *
  311. */
  312. static int atmel_lcdfb_set_par(struct fb_info *info)
  313. {
  314. struct atmel_lcdfb_info *sinfo = info->par;
  315. unsigned long hozval_linesz;
  316. unsigned long value;
  317. unsigned long clk_value_khz;
  318. unsigned long bits_per_line;
  319. dev_dbg(info->device, "%s:\n", __func__);
  320. dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n",
  321. info->var.xres, info->var.yres,
  322. info->var.xres_virtual, info->var.yres_virtual);
  323. /* Turn off the LCD controller and the DMA controller */
  324. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET);
  325. /* Wait for the LCDC core to become idle */
  326. while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY)
  327. msleep(10);
  328. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0);
  329. if (info->var.bits_per_pixel == 1)
  330. info->fix.visual = FB_VISUAL_MONO01;
  331. else if (info->var.bits_per_pixel <= 8)
  332. info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
  333. else
  334. info->fix.visual = FB_VISUAL_TRUECOLOR;
  335. bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel;
  336. info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8);
  337. /* Re-initialize the DMA engine... */
  338. dev_dbg(info->device, " * update DMA engine\n");
  339. atmel_lcdfb_update_dma(info, &info->var);
  340. /* ...set frame size and burst length = 8 words (?) */
  341. value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32;
  342. value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET);
  343. lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value);
  344. /* Now, the LCDC core... */
  345. /* Set pixel clock */
  346. clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
  347. value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
  348. value = (value / 2) - 1;
  349. dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", value);
  350. if (value <= 0) {
  351. dev_notice(info->device, "Bypassing pixel clock divider\n");
  352. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
  353. } else {
  354. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, value << ATMEL_LCDC_CLKVAL_OFFSET);
  355. info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1)));
  356. dev_dbg(info->device, " updated pixclk: %lu KHz\n",
  357. PICOS2KHZ(info->var.pixclock));
  358. }
  359. /* Initialize control register 2 */
  360. value = sinfo->default_lcdcon2;
  361. if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT))
  362. value |= ATMEL_LCDC_INVLINE_INVERTED;
  363. if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT))
  364. value |= ATMEL_LCDC_INVFRAME_INVERTED;
  365. switch (info->var.bits_per_pixel) {
  366. case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break;
  367. case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break;
  368. case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break;
  369. case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break;
  370. case 15: /* fall through */
  371. case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break;
  372. case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break;
  373. case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break;
  374. default: BUG(); break;
  375. }
  376. dev_dbg(info->device, " * LCDCON2 = %08lx\n", value);
  377. lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value);
  378. /* Vertical timing */
  379. value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET;
  380. value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET;
  381. value |= info->var.lower_margin;
  382. dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value);
  383. lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value);
  384. /* Horizontal timing */
  385. value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET;
  386. value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET;
  387. value |= (info->var.left_margin - 1);
  388. dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value);
  389. lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value);
  390. /* Horizontal value (aka line size) */
  391. hozval_linesz = compute_hozval(info->var.xres,
  392. lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2));
  393. /* Display size */
  394. value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET;
  395. value |= info->var.yres - 1;
  396. dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value);
  397. lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value);
  398. /* FIFO Threshold: Use formula from data sheet */
  399. value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3);
  400. lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value);
  401. /* Toggle LCD_MODE every frame */
  402. lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0);
  403. /* Disable all interrupts */
  404. lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL);
  405. /* ...wait for DMA engine to become idle... */
  406. while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY)
  407. msleep(10);
  408. dev_dbg(info->device, " * re-enable DMA engine\n");
  409. /* ...and enable it with updated configuration */
  410. lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon);
  411. dev_dbg(info->device, " * re-enable LCDC core\n");
  412. lcdc_writel(sinfo, ATMEL_LCDC_PWRCON,
  413. (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR);
  414. dev_dbg(info->device, " * DONE\n");
  415. return 0;
  416. }
  417. static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf)
  418. {
  419. chan &= 0xffff;
  420. chan >>= 16 - bf->length;
  421. return chan << bf->offset;
  422. }
  423. /**
  424. * atmel_lcdfb_setcolreg - Optional function. Sets a color register.
  425. * @regno: Which register in the CLUT we are programming
  426. * @red: The red value which can be up to 16 bits wide
  427. * @green: The green value which can be up to 16 bits wide
  428. * @blue: The blue value which can be up to 16 bits wide.
  429. * @transp: If supported the alpha value which can be up to 16 bits wide.
  430. * @info: frame buffer info structure
  431. *
  432. * Set a single color register. The values supplied have a 16 bit
  433. * magnitude which needs to be scaled in this function for the hardware.
  434. * Things to take into consideration are how many color registers, if
  435. * any, are supported with the current color visual. With truecolor mode
  436. * no color palettes are supported. Here a psuedo palette is created
  437. * which we store the value in pseudo_palette in struct fb_info. For
  438. * pseudocolor mode we have a limited color palette. To deal with this
  439. * we can program what color is displayed for a particular pixel value.
  440. * DirectColor is similar in that we can program each color field. If
  441. * we have a static colormap we don't need to implement this function.
  442. *
  443. * Returns negative errno on error, or zero on success. In an
  444. * ideal world, this would have been the case, but as it turns
  445. * out, the other drivers return 1 on failure, so that's what
  446. * we're going to do.
  447. */
  448. static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red,
  449. unsigned int green, unsigned int blue,
  450. unsigned int transp, struct fb_info *info)
  451. {
  452. struct atmel_lcdfb_info *sinfo = info->par;
  453. unsigned int val;
  454. u32 *pal;
  455. int ret = 1;
  456. if (info->var.grayscale)
  457. red = green = blue = (19595 * red + 38470 * green
  458. + 7471 * blue) >> 16;
  459. switch (info->fix.visual) {
  460. case FB_VISUAL_TRUECOLOR:
  461. if (regno < 16) {
  462. pal = info->pseudo_palette;
  463. val = chan_to_field(red, &info->var.red);
  464. val |= chan_to_field(green, &info->var.green);
  465. val |= chan_to_field(blue, &info->var.blue);
  466. pal[regno] = val;
  467. ret = 0;
  468. }
  469. break;
  470. case FB_VISUAL_PSEUDOCOLOR:
  471. if (regno < 256) {
  472. val = ((red >> 11) & 0x001f);
  473. val |= ((green >> 6) & 0x03e0);
  474. val |= ((blue >> 1) & 0x7c00);
  475. /*
  476. * TODO: intensity bit. Maybe something like
  477. * ~(red[10] ^ green[10] ^ blue[10]) & 1
  478. */
  479. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  480. ret = 0;
  481. }
  482. break;
  483. case FB_VISUAL_MONO01:
  484. if (regno < 2) {
  485. val = (regno == 0) ? 0x00 : 0x1F;
  486. lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val);
  487. ret = 0;
  488. }
  489. break;
  490. }
  491. return ret;
  492. }
  493. static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var,
  494. struct fb_info *info)
  495. {
  496. dev_dbg(info->device, "%s\n", __func__);
  497. atmel_lcdfb_update_dma(info, var);
  498. return 0;
  499. }
  500. static struct fb_ops atmel_lcdfb_ops = {
  501. .owner = THIS_MODULE,
  502. .fb_check_var = atmel_lcdfb_check_var,
  503. .fb_set_par = atmel_lcdfb_set_par,
  504. .fb_setcolreg = atmel_lcdfb_setcolreg,
  505. .fb_pan_display = atmel_lcdfb_pan_display,
  506. .fb_fillrect = cfb_fillrect,
  507. .fb_copyarea = cfb_copyarea,
  508. .fb_imageblit = cfb_imageblit,
  509. };
  510. static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id)
  511. {
  512. struct fb_info *info = dev_id;
  513. struct atmel_lcdfb_info *sinfo = info->par;
  514. u32 status;
  515. status = lcdc_readl(sinfo, ATMEL_LCDC_ISR);
  516. lcdc_writel(sinfo, ATMEL_LCDC_IDR, status);
  517. return IRQ_HANDLED;
  518. }
  519. static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo)
  520. {
  521. struct fb_info *info = sinfo->info;
  522. int ret = 0;
  523. memset_io(info->screen_base, 0, info->fix.smem_len);
  524. info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
  525. dev_info(info->device,
  526. "%luKiB frame buffer at %08lx (mapped at %p)\n",
  527. (unsigned long)info->fix.smem_len / 1024,
  528. (unsigned long)info->fix.smem_start,
  529. info->screen_base);
  530. /* Allocate colormap */
  531. ret = fb_alloc_cmap(&info->cmap, 256, 0);
  532. if (ret < 0)
  533. dev_err(info->device, "Alloc color map failed\n");
  534. return ret;
  535. }
  536. static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo)
  537. {
  538. if (sinfo->bus_clk)
  539. clk_enable(sinfo->bus_clk);
  540. clk_enable(sinfo->lcdc_clk);
  541. }
  542. static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo)
  543. {
  544. if (sinfo->bus_clk)
  545. clk_disable(sinfo->bus_clk);
  546. clk_disable(sinfo->lcdc_clk);
  547. }
  548. static int __init atmel_lcdfb_probe(struct platform_device *pdev)
  549. {
  550. struct device *dev = &pdev->dev;
  551. struct fb_info *info;
  552. struct atmel_lcdfb_info *sinfo;
  553. struct atmel_lcdfb_info *pdata_sinfo;
  554. struct resource *regs = NULL;
  555. struct resource *map = NULL;
  556. int ret;
  557. dev_dbg(dev, "%s BEGIN\n", __func__);
  558. ret = -ENOMEM;
  559. info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev);
  560. if (!info) {
  561. dev_err(dev, "cannot allocate memory\n");
  562. goto out;
  563. }
  564. sinfo = info->par;
  565. if (dev->platform_data) {
  566. pdata_sinfo = (struct atmel_lcdfb_info *)dev->platform_data;
  567. sinfo->default_bpp = pdata_sinfo->default_bpp;
  568. sinfo->default_dmacon = pdata_sinfo->default_dmacon;
  569. sinfo->default_lcdcon2 = pdata_sinfo->default_lcdcon2;
  570. sinfo->default_monspecs = pdata_sinfo->default_monspecs;
  571. sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control;
  572. sinfo->guard_time = pdata_sinfo->guard_time;
  573. sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight;
  574. } else {
  575. dev_err(dev, "cannot get default configuration\n");
  576. goto free_info;
  577. }
  578. sinfo->info = info;
  579. sinfo->pdev = pdev;
  580. strcpy(info->fix.id, sinfo->pdev->name);
  581. info->flags = ATMEL_LCDFB_FBINFO_DEFAULT;
  582. info->pseudo_palette = sinfo->pseudo_palette;
  583. info->fbops = &atmel_lcdfb_ops;
  584. memcpy(&info->monspecs, sinfo->default_monspecs, sizeof(info->monspecs));
  585. info->fix = atmel_lcdfb_fix;
  586. /* Enable LCDC Clocks */
  587. if (cpu_is_at91sam9261() || cpu_is_at32ap7000()) {
  588. sinfo->bus_clk = clk_get(dev, "hck1");
  589. if (IS_ERR(sinfo->bus_clk)) {
  590. ret = PTR_ERR(sinfo->bus_clk);
  591. goto free_info;
  592. }
  593. }
  594. sinfo->lcdc_clk = clk_get(dev, "lcdc_clk");
  595. if (IS_ERR(sinfo->lcdc_clk)) {
  596. ret = PTR_ERR(sinfo->lcdc_clk);
  597. goto put_bus_clk;
  598. }
  599. atmel_lcdfb_start_clock(sinfo);
  600. ret = fb_find_mode(&info->var, info, NULL, info->monspecs.modedb,
  601. info->monspecs.modedb_len, info->monspecs.modedb,
  602. sinfo->default_bpp);
  603. if (!ret) {
  604. dev_err(dev, "no suitable video mode found\n");
  605. goto stop_clk;
  606. }
  607. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  608. if (!regs) {
  609. dev_err(dev, "resources unusable\n");
  610. ret = -ENXIO;
  611. goto stop_clk;
  612. }
  613. sinfo->irq_base = platform_get_irq(pdev, 0);
  614. if (sinfo->irq_base < 0) {
  615. dev_err(dev, "unable to get irq\n");
  616. ret = sinfo->irq_base;
  617. goto stop_clk;
  618. }
  619. /* Initialize video memory */
  620. map = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  621. if (map) {
  622. /* use a pre-allocated memory buffer */
  623. info->fix.smem_start = map->start;
  624. info->fix.smem_len = map->end - map->start + 1;
  625. if (!request_mem_region(info->fix.smem_start,
  626. info->fix.smem_len, pdev->name)) {
  627. ret = -EBUSY;
  628. goto stop_clk;
  629. }
  630. info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
  631. if (!info->screen_base)
  632. goto release_intmem;
  633. } else {
  634. /* alocate memory buffer */
  635. ret = atmel_lcdfb_alloc_video_memory(sinfo);
  636. if (ret < 0) {
  637. dev_err(dev, "cannot allocate framebuffer: %d\n", ret);
  638. goto stop_clk;
  639. }
  640. }
  641. /* LCDC registers */
  642. info->fix.mmio_start = regs->start;
  643. info->fix.mmio_len = regs->end - regs->start + 1;
  644. if (!request_mem_region(info->fix.mmio_start,
  645. info->fix.mmio_len, pdev->name)) {
  646. ret = -EBUSY;
  647. goto free_fb;
  648. }
  649. sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len);
  650. if (!sinfo->mmio) {
  651. dev_err(dev, "cannot map LCDC registers\n");
  652. goto release_mem;
  653. }
  654. /* Initialize PWM for contrast or backlight ("off") */
  655. init_contrast(sinfo);
  656. /* interrupt */
  657. ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info);
  658. if (ret) {
  659. dev_err(dev, "request_irq failed: %d\n", ret);
  660. goto unmap_mmio;
  661. }
  662. ret = atmel_lcdfb_init_fbinfo(sinfo);
  663. if (ret < 0) {
  664. dev_err(dev, "init fbinfo failed: %d\n", ret);
  665. goto unregister_irqs;
  666. }
  667. /*
  668. * This makes sure that our colour bitfield
  669. * descriptors are correctly initialised.
  670. */
  671. atmel_lcdfb_check_var(&info->var, info);
  672. ret = fb_set_var(info, &info->var);
  673. if (ret) {
  674. dev_warn(dev, "unable to set display parameters\n");
  675. goto free_cmap;
  676. }
  677. dev_set_drvdata(dev, info);
  678. /*
  679. * Tell the world that we're ready to go
  680. */
  681. ret = register_framebuffer(info);
  682. if (ret < 0) {
  683. dev_err(dev, "failed to register framebuffer device: %d\n", ret);
  684. goto free_cmap;
  685. }
  686. /* Power up the LCDC screen */
  687. if (sinfo->atmel_lcdfb_power_control)
  688. sinfo->atmel_lcdfb_power_control(1);
  689. dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %lu\n",
  690. info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base);
  691. return 0;
  692. free_cmap:
  693. fb_dealloc_cmap(&info->cmap);
  694. unregister_irqs:
  695. free_irq(sinfo->irq_base, info);
  696. unmap_mmio:
  697. exit_backlight(sinfo);
  698. iounmap(sinfo->mmio);
  699. release_mem:
  700. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  701. free_fb:
  702. if (map)
  703. iounmap(info->screen_base);
  704. else
  705. atmel_lcdfb_free_video_memory(sinfo);
  706. release_intmem:
  707. if (map)
  708. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  709. stop_clk:
  710. atmel_lcdfb_stop_clock(sinfo);
  711. clk_put(sinfo->lcdc_clk);
  712. put_bus_clk:
  713. if (sinfo->bus_clk)
  714. clk_put(sinfo->bus_clk);
  715. free_info:
  716. framebuffer_release(info);
  717. out:
  718. dev_dbg(dev, "%s FAILED\n", __func__);
  719. return ret;
  720. }
  721. static int __exit atmel_lcdfb_remove(struct platform_device *pdev)
  722. {
  723. struct device *dev = &pdev->dev;
  724. struct fb_info *info = dev_get_drvdata(dev);
  725. struct atmel_lcdfb_info *sinfo = info->par;
  726. if (!sinfo)
  727. return 0;
  728. exit_backlight(sinfo);
  729. if (sinfo->atmel_lcdfb_power_control)
  730. sinfo->atmel_lcdfb_power_control(0);
  731. unregister_framebuffer(info);
  732. atmel_lcdfb_stop_clock(sinfo);
  733. clk_put(sinfo->lcdc_clk);
  734. if (sinfo->bus_clk)
  735. clk_put(sinfo->bus_clk);
  736. fb_dealloc_cmap(&info->cmap);
  737. free_irq(sinfo->irq_base, info);
  738. iounmap(sinfo->mmio);
  739. release_mem_region(info->fix.mmio_start, info->fix.mmio_len);
  740. if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) {
  741. iounmap(info->screen_base);
  742. release_mem_region(info->fix.smem_start, info->fix.smem_len);
  743. } else {
  744. atmel_lcdfb_free_video_memory(sinfo);
  745. }
  746. dev_set_drvdata(dev, NULL);
  747. framebuffer_release(info);
  748. return 0;
  749. }
  750. static struct platform_driver atmel_lcdfb_driver = {
  751. .remove = __exit_p(atmel_lcdfb_remove),
  752. // FIXME need suspend, resume
  753. .driver = {
  754. .name = "atmel_lcdfb",
  755. .owner = THIS_MODULE,
  756. },
  757. };
  758. static int __init atmel_lcdfb_init(void)
  759. {
  760. return platform_driver_probe(&atmel_lcdfb_driver, atmel_lcdfb_probe);
  761. }
  762. static void __exit atmel_lcdfb_exit(void)
  763. {
  764. platform_driver_unregister(&atmel_lcdfb_driver);
  765. }
  766. module_init(atmel_lcdfb_init);
  767. module_exit(atmel_lcdfb_exit);
  768. MODULE_DESCRIPTION("AT91/AT32 LCD Controller framebuffer driver");
  769. MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
  770. MODULE_LICENSE("GPL");