mpc52xx_uart.c 37 KB

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  1. /*
  2. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  3. *
  4. * FIXME According to the usermanual the status bits in the status register
  5. * are only updated when the peripherals access the FIFO and not when the
  6. * CPU access them. So since we use this bits to know when we stop writing
  7. * and reading, they may not be updated in-time and a race condition may
  8. * exists. But I haven't be able to prove this and I don't care. But if
  9. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  10. * registers should be used in addition.
  11. * Update: Actually, they seem updated ... At least the bits we use.
  12. *
  13. *
  14. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  15. *
  16. * Some of the code has been inspired/copied from the 2.4 code written
  17. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  18. *
  19. * Copyright (C) 2008 Freescale Semiconductor Inc.
  20. * John Rigby <jrigby@gmail.com>
  21. * Added support for MPC5121
  22. * Copyright (C) 2006 Secret Lab Technologies Ltd.
  23. * Grant Likely <grant.likely@secretlab.ca>
  24. * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
  25. * Copyright (C) 2003 MontaVista, Software, Inc.
  26. *
  27. * This file is licensed under the terms of the GNU General Public License
  28. * version 2. This program is licensed "as is" without any warranty of any
  29. * kind, whether express or implied.
  30. */
  31. /* Platform device Usage :
  32. *
  33. * Since PSCs can have multiple function, the correct driver for each one
  34. * is selected by calling mpc52xx_match_psc_function(...). The function
  35. * handled by this driver is "uart".
  36. *
  37. * The driver init all necessary registers to place the PSC in uart mode without
  38. * DCD. However, the pin multiplexing aren't changed and should be set either
  39. * by the bootloader or in the platform init code.
  40. *
  41. * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
  42. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  43. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  44. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  45. * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
  46. * will be mapped to.
  47. */
  48. /* OF Platform device Usage :
  49. *
  50. * This driver is only used for PSCs configured in uart mode. The device
  51. * tree will have a node for each PSC in uart mode w/ device_type = "serial"
  52. * and "mpc52xx-psc-uart" in the compatible string
  53. *
  54. * By default, PSC devices are enumerated in the order they are found. However
  55. * a particular PSC number can be forces by adding 'device_no = <port#>'
  56. * to the device node.
  57. *
  58. * The driver init all necessary registers to place the PSC in uart mode without
  59. * DCD. However, the pin multiplexing aren't changed and should be set either
  60. * by the bootloader or in the platform init code.
  61. */
  62. #undef DEBUG
  63. #include <linux/device.h>
  64. #include <linux/module.h>
  65. #include <linux/tty.h>
  66. #include <linux/serial.h>
  67. #include <linux/sysrq.h>
  68. #include <linux/console.h>
  69. #include <linux/delay.h>
  70. #include <linux/io.h>
  71. #if defined(CONFIG_PPC_MERGE)
  72. #include <linux/of.h>
  73. #include <linux/of_platform.h>
  74. #else
  75. #include <linux/platform_device.h>
  76. #endif
  77. #include <asm/mpc52xx.h>
  78. #include <asm/mpc512x.h>
  79. #include <asm/mpc52xx_psc.h>
  80. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  81. #define SUPPORT_SYSRQ
  82. #endif
  83. #include <linux/serial_core.h>
  84. /* We've been assigned a range on the "Low-density serial ports" major */
  85. #define SERIAL_PSC_MAJOR 204
  86. #define SERIAL_PSC_MINOR 148
  87. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  88. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  89. /* Rem: - We use the read_status_mask as a shadow of
  90. * psc->mpc52xx_psc_imr
  91. * - It's important that is array is all zero on start as we
  92. * use it to know if it's initialized or not ! If it's not sure
  93. * it's cleared, then a memset(...,0,...) should be added to
  94. * the console_init
  95. */
  96. #if defined(CONFIG_PPC_MERGE)
  97. /* lookup table for matching device nodes to index numbers */
  98. static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
  99. static void mpc52xx_uart_of_enumerate(void);
  100. #endif
  101. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  102. /* Forward declaration of the interruption handling routine */
  103. static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
  104. /* Simple macro to test if a port is console or not. This one is taken
  105. * for serial_core.c and maybe should be moved to serial_core.h ? */
  106. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  107. #define uart_console(port) \
  108. ((port)->cons && (port)->cons->index == (port)->line)
  109. #else
  110. #define uart_console(port) (0)
  111. #endif
  112. /* ======================================================================== */
  113. /* PSC fifo operations for isolating differences between 52xx and 512x */
  114. /* ======================================================================== */
  115. struct psc_ops {
  116. void (*fifo_init)(struct uart_port *port);
  117. int (*raw_rx_rdy)(struct uart_port *port);
  118. int (*raw_tx_rdy)(struct uart_port *port);
  119. int (*rx_rdy)(struct uart_port *port);
  120. int (*tx_rdy)(struct uart_port *port);
  121. int (*tx_empty)(struct uart_port *port);
  122. void (*stop_rx)(struct uart_port *port);
  123. void (*start_tx)(struct uart_port *port);
  124. void (*stop_tx)(struct uart_port *port);
  125. void (*rx_clr_irq)(struct uart_port *port);
  126. void (*tx_clr_irq)(struct uart_port *port);
  127. void (*write_char)(struct uart_port *port, unsigned char c);
  128. unsigned char (*read_char)(struct uart_port *port);
  129. void (*cw_disable_ints)(struct uart_port *port);
  130. void (*cw_restore_ints)(struct uart_port *port);
  131. unsigned long (*getuartclk)(void *p);
  132. };
  133. #ifdef CONFIG_PPC_MPC52xx
  134. #define FIFO_52xx(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
  135. static void mpc52xx_psc_fifo_init(struct uart_port *port)
  136. {
  137. struct mpc52xx_psc __iomem *psc = PSC(port);
  138. struct mpc52xx_psc_fifo __iomem *fifo = FIFO_52xx(port);
  139. /* /32 prescaler */
  140. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00);
  141. out_8(&fifo->rfcntl, 0x00);
  142. out_be16(&fifo->rfalarm, 0x1ff);
  143. out_8(&fifo->tfcntl, 0x07);
  144. out_be16(&fifo->tfalarm, 0x80);
  145. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  146. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  147. }
  148. static int mpc52xx_psc_raw_rx_rdy(struct uart_port *port)
  149. {
  150. return in_be16(&PSC(port)->mpc52xx_psc_status)
  151. & MPC52xx_PSC_SR_RXRDY;
  152. }
  153. static int mpc52xx_psc_raw_tx_rdy(struct uart_port *port)
  154. {
  155. return in_be16(&PSC(port)->mpc52xx_psc_status)
  156. & MPC52xx_PSC_SR_TXRDY;
  157. }
  158. static int mpc52xx_psc_rx_rdy(struct uart_port *port)
  159. {
  160. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  161. & port->read_status_mask
  162. & MPC52xx_PSC_IMR_RXRDY;
  163. }
  164. static int mpc52xx_psc_tx_rdy(struct uart_port *port)
  165. {
  166. return in_be16(&PSC(port)->mpc52xx_psc_isr)
  167. & port->read_status_mask
  168. & MPC52xx_PSC_IMR_TXRDY;
  169. }
  170. static int mpc52xx_psc_tx_empty(struct uart_port *port)
  171. {
  172. return in_be16(&PSC(port)->mpc52xx_psc_status)
  173. & MPC52xx_PSC_SR_TXEMP;
  174. }
  175. static void mpc52xx_psc_start_tx(struct uart_port *port)
  176. {
  177. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  178. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  179. }
  180. static void mpc52xx_psc_stop_tx(struct uart_port *port)
  181. {
  182. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  183. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  184. }
  185. static void mpc52xx_psc_stop_rx(struct uart_port *port)
  186. {
  187. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  188. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  189. }
  190. static void mpc52xx_psc_rx_clr_irq(struct uart_port *port)
  191. {
  192. }
  193. static void mpc52xx_psc_tx_clr_irq(struct uart_port *port)
  194. {
  195. }
  196. static void mpc52xx_psc_write_char(struct uart_port *port, unsigned char c)
  197. {
  198. out_8(&PSC(port)->mpc52xx_psc_buffer_8, c);
  199. }
  200. static unsigned char mpc52xx_psc_read_char(struct uart_port *port)
  201. {
  202. return in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  203. }
  204. static void mpc52xx_psc_cw_disable_ints(struct uart_port *port)
  205. {
  206. out_be16(&PSC(port)->mpc52xx_psc_imr, 0);
  207. }
  208. static void mpc52xx_psc_cw_restore_ints(struct uart_port *port)
  209. {
  210. out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
  211. }
  212. /* Search for bus-frequency property in this node or a parent */
  213. static unsigned long mpc52xx_getuartclk(void *p)
  214. {
  215. #if defined(CONFIG_PPC_MERGE)
  216. /*
  217. * 5200 UARTs have a / 32 prescaler
  218. * but the generic serial code assumes 16
  219. * so return ipb freq / 2
  220. */
  221. return mpc52xx_find_ipb_freq(p) / 2;
  222. #else
  223. pr_debug("unexpected call to mpc52xx_getuartclk with arch/ppc\n");
  224. return NULL;
  225. #endif
  226. }
  227. static struct psc_ops mpc52xx_psc_ops = {
  228. .fifo_init = mpc52xx_psc_fifo_init,
  229. .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy,
  230. .raw_tx_rdy = mpc52xx_psc_raw_tx_rdy,
  231. .rx_rdy = mpc52xx_psc_rx_rdy,
  232. .tx_rdy = mpc52xx_psc_tx_rdy,
  233. .tx_empty = mpc52xx_psc_tx_empty,
  234. .stop_rx = mpc52xx_psc_stop_rx,
  235. .start_tx = mpc52xx_psc_start_tx,
  236. .stop_tx = mpc52xx_psc_stop_tx,
  237. .rx_clr_irq = mpc52xx_psc_rx_clr_irq,
  238. .tx_clr_irq = mpc52xx_psc_tx_clr_irq,
  239. .write_char = mpc52xx_psc_write_char,
  240. .read_char = mpc52xx_psc_read_char,
  241. .cw_disable_ints = mpc52xx_psc_cw_disable_ints,
  242. .cw_restore_ints = mpc52xx_psc_cw_restore_ints,
  243. .getuartclk = mpc52xx_getuartclk,
  244. };
  245. #endif /* CONFIG_MPC52xx */
  246. #ifdef CONFIG_PPC_MPC512x
  247. #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1))
  248. static void mpc512x_psc_fifo_init(struct uart_port *port)
  249. {
  250. out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE);
  251. out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
  252. out_be32(&FIFO_512x(port)->txalarm, 1);
  253. out_be32(&FIFO_512x(port)->tximr, 0);
  254. out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_RESET_SLICE);
  255. out_be32(&FIFO_512x(port)->rxcmd, MPC512x_PSC_FIFO_ENABLE_SLICE);
  256. out_be32(&FIFO_512x(port)->rxalarm, 1);
  257. out_be32(&FIFO_512x(port)->rximr, 0);
  258. out_be32(&FIFO_512x(port)->tximr, MPC512x_PSC_FIFO_ALARM);
  259. out_be32(&FIFO_512x(port)->rximr, MPC512x_PSC_FIFO_ALARM);
  260. }
  261. static int mpc512x_psc_raw_rx_rdy(struct uart_port *port)
  262. {
  263. return !(in_be32(&FIFO_512x(port)->rxsr) & MPC512x_PSC_FIFO_EMPTY);
  264. }
  265. static int mpc512x_psc_raw_tx_rdy(struct uart_port *port)
  266. {
  267. return !(in_be32(&FIFO_512x(port)->txsr) & MPC512x_PSC_FIFO_FULL);
  268. }
  269. static int mpc512x_psc_rx_rdy(struct uart_port *port)
  270. {
  271. return in_be32(&FIFO_512x(port)->rxsr)
  272. & in_be32(&FIFO_512x(port)->rximr)
  273. & MPC512x_PSC_FIFO_ALARM;
  274. }
  275. static int mpc512x_psc_tx_rdy(struct uart_port *port)
  276. {
  277. return in_be32(&FIFO_512x(port)->txsr)
  278. & in_be32(&FIFO_512x(port)->tximr)
  279. & MPC512x_PSC_FIFO_ALARM;
  280. }
  281. static int mpc512x_psc_tx_empty(struct uart_port *port)
  282. {
  283. return in_be32(&FIFO_512x(port)->txsr)
  284. & MPC512x_PSC_FIFO_EMPTY;
  285. }
  286. static void mpc512x_psc_stop_rx(struct uart_port *port)
  287. {
  288. unsigned long rx_fifo_imr;
  289. rx_fifo_imr = in_be32(&FIFO_512x(port)->rximr);
  290. rx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
  291. out_be32(&FIFO_512x(port)->rximr, rx_fifo_imr);
  292. }
  293. static void mpc512x_psc_start_tx(struct uart_port *port)
  294. {
  295. unsigned long tx_fifo_imr;
  296. tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
  297. tx_fifo_imr |= MPC512x_PSC_FIFO_ALARM;
  298. out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
  299. }
  300. static void mpc512x_psc_stop_tx(struct uart_port *port)
  301. {
  302. unsigned long tx_fifo_imr;
  303. tx_fifo_imr = in_be32(&FIFO_512x(port)->tximr);
  304. tx_fifo_imr &= ~MPC512x_PSC_FIFO_ALARM;
  305. out_be32(&FIFO_512x(port)->tximr, tx_fifo_imr);
  306. }
  307. static void mpc512x_psc_rx_clr_irq(struct uart_port *port)
  308. {
  309. out_be32(&FIFO_512x(port)->rxisr, in_be32(&FIFO_512x(port)->rxisr));
  310. }
  311. static void mpc512x_psc_tx_clr_irq(struct uart_port *port)
  312. {
  313. out_be32(&FIFO_512x(port)->txisr, in_be32(&FIFO_512x(port)->txisr));
  314. }
  315. static void mpc512x_psc_write_char(struct uart_port *port, unsigned char c)
  316. {
  317. out_8(&FIFO_512x(port)->txdata_8, c);
  318. }
  319. static unsigned char mpc512x_psc_read_char(struct uart_port *port)
  320. {
  321. return in_8(&FIFO_512x(port)->rxdata_8);
  322. }
  323. static void mpc512x_psc_cw_disable_ints(struct uart_port *port)
  324. {
  325. port->read_status_mask =
  326. in_be32(&FIFO_512x(port)->tximr) << 16 |
  327. in_be32(&FIFO_512x(port)->rximr);
  328. out_be32(&FIFO_512x(port)->tximr, 0);
  329. out_be32(&FIFO_512x(port)->rximr, 0);
  330. }
  331. static void mpc512x_psc_cw_restore_ints(struct uart_port *port)
  332. {
  333. out_be32(&FIFO_512x(port)->tximr,
  334. (port->read_status_mask >> 16) & 0x7f);
  335. out_be32(&FIFO_512x(port)->rximr, port->read_status_mask & 0x7f);
  336. }
  337. static unsigned long mpc512x_getuartclk(void *p)
  338. {
  339. return mpc512x_find_ips_freq(p);
  340. }
  341. static struct psc_ops mpc512x_psc_ops = {
  342. .fifo_init = mpc512x_psc_fifo_init,
  343. .raw_rx_rdy = mpc512x_psc_raw_rx_rdy,
  344. .raw_tx_rdy = mpc512x_psc_raw_tx_rdy,
  345. .rx_rdy = mpc512x_psc_rx_rdy,
  346. .tx_rdy = mpc512x_psc_tx_rdy,
  347. .tx_empty = mpc512x_psc_tx_empty,
  348. .stop_rx = mpc512x_psc_stop_rx,
  349. .start_tx = mpc512x_psc_start_tx,
  350. .stop_tx = mpc512x_psc_stop_tx,
  351. .rx_clr_irq = mpc512x_psc_rx_clr_irq,
  352. .tx_clr_irq = mpc512x_psc_tx_clr_irq,
  353. .write_char = mpc512x_psc_write_char,
  354. .read_char = mpc512x_psc_read_char,
  355. .cw_disable_ints = mpc512x_psc_cw_disable_ints,
  356. .cw_restore_ints = mpc512x_psc_cw_restore_ints,
  357. .getuartclk = mpc512x_getuartclk,
  358. };
  359. #endif
  360. static struct psc_ops *psc_ops;
  361. /* ======================================================================== */
  362. /* UART operations */
  363. /* ======================================================================== */
  364. static unsigned int
  365. mpc52xx_uart_tx_empty(struct uart_port *port)
  366. {
  367. return psc_ops->tx_empty(port) ? TIOCSER_TEMT : 0;
  368. }
  369. static void
  370. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  371. {
  372. /* Not implemented */
  373. }
  374. static unsigned int
  375. mpc52xx_uart_get_mctrl(struct uart_port *port)
  376. {
  377. /* Not implemented */
  378. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  379. }
  380. static void
  381. mpc52xx_uart_stop_tx(struct uart_port *port)
  382. {
  383. /* port->lock taken by caller */
  384. psc_ops->stop_tx(port);
  385. }
  386. static void
  387. mpc52xx_uart_start_tx(struct uart_port *port)
  388. {
  389. /* port->lock taken by caller */
  390. psc_ops->start_tx(port);
  391. }
  392. static void
  393. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  394. {
  395. unsigned long flags;
  396. spin_lock_irqsave(&port->lock, flags);
  397. port->x_char = ch;
  398. if (ch) {
  399. /* Make sure tx interrupts are on */
  400. /* Truly necessary ??? They should be anyway */
  401. psc_ops->start_tx(port);
  402. }
  403. spin_unlock_irqrestore(&port->lock, flags);
  404. }
  405. static void
  406. mpc52xx_uart_stop_rx(struct uart_port *port)
  407. {
  408. /* port->lock taken by caller */
  409. psc_ops->stop_rx(port);
  410. }
  411. static void
  412. mpc52xx_uart_enable_ms(struct uart_port *port)
  413. {
  414. /* Not implemented */
  415. }
  416. static void
  417. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  418. {
  419. unsigned long flags;
  420. spin_lock_irqsave(&port->lock, flags);
  421. if (ctl == -1)
  422. out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
  423. else
  424. out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
  425. spin_unlock_irqrestore(&port->lock, flags);
  426. }
  427. static int
  428. mpc52xx_uart_startup(struct uart_port *port)
  429. {
  430. struct mpc52xx_psc __iomem *psc = PSC(port);
  431. int ret;
  432. /* Request IRQ */
  433. ret = request_irq(port->irq, mpc52xx_uart_int,
  434. IRQF_DISABLED | IRQF_SAMPLE_RANDOM | IRQF_SHARED,
  435. "mpc52xx_psc_uart", port);
  436. if (ret)
  437. return ret;
  438. /* Reset/activate the port, clear and enable interrupts */
  439. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  440. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  441. out_be32(&psc->sicr, 0); /* UART mode DCD ignored */
  442. psc_ops->fifo_init(port);
  443. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  444. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  445. return 0;
  446. }
  447. static void
  448. mpc52xx_uart_shutdown(struct uart_port *port)
  449. {
  450. struct mpc52xx_psc __iomem *psc = PSC(port);
  451. /* Shut down the port. Leave TX active if on a console port */
  452. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  453. if (!uart_console(port))
  454. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  455. port->read_status_mask = 0;
  456. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  457. /* Release interrupt */
  458. free_irq(port->irq, port);
  459. }
  460. static void
  461. mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
  462. struct ktermios *old)
  463. {
  464. struct mpc52xx_psc __iomem *psc = PSC(port);
  465. unsigned long flags;
  466. unsigned char mr1, mr2;
  467. unsigned short ctr;
  468. unsigned int j, baud, quot;
  469. /* Prepare what we're gonna write */
  470. mr1 = 0;
  471. switch (new->c_cflag & CSIZE) {
  472. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  473. break;
  474. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  475. break;
  476. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  477. break;
  478. case CS8:
  479. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  480. }
  481. if (new->c_cflag & PARENB) {
  482. mr1 |= (new->c_cflag & PARODD) ?
  483. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  484. } else
  485. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  486. mr2 = 0;
  487. if (new->c_cflag & CSTOPB)
  488. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  489. else
  490. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  491. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  492. MPC52xx_PSC_MODE_ONE_STOP;
  493. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  494. quot = uart_get_divisor(port, baud);
  495. ctr = quot & 0xffff;
  496. /* Get the lock */
  497. spin_lock_irqsave(&port->lock, flags);
  498. /* Update the per-port timeout */
  499. uart_update_timeout(port, new->c_cflag, baud);
  500. /* Do our best to flush TX & RX, so we don't loose anything */
  501. /* But we don't wait indefinitly ! */
  502. j = 5000000; /* Maximum wait */
  503. /* FIXME Can't receive chars since set_termios might be called at early
  504. * boot for the console, all stuff is not yet ready to receive at that
  505. * time and that just makes the kernel oops */
  506. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  507. while (!mpc52xx_uart_tx_empty(port) && --j)
  508. udelay(1);
  509. if (!j)
  510. printk(KERN_ERR "mpc52xx_uart.c: "
  511. "Unable to flush RX & TX fifos in-time in set_termios."
  512. "Some chars may have been lost.\n");
  513. /* Reset the TX & RX */
  514. out_8(&psc->command, MPC52xx_PSC_RST_RX);
  515. out_8(&psc->command, MPC52xx_PSC_RST_TX);
  516. /* Send new mode settings */
  517. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  518. out_8(&psc->mode, mr1);
  519. out_8(&psc->mode, mr2);
  520. out_8(&psc->ctur, ctr >> 8);
  521. out_8(&psc->ctlr, ctr & 0xff);
  522. /* Reenable TX & RX */
  523. out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
  524. out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
  525. /* We're all set, release the lock */
  526. spin_unlock_irqrestore(&port->lock, flags);
  527. }
  528. static const char *
  529. mpc52xx_uart_type(struct uart_port *port)
  530. {
  531. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  532. }
  533. static void
  534. mpc52xx_uart_release_port(struct uart_port *port)
  535. {
  536. /* remapped by us ? */
  537. if (port->flags & UPF_IOREMAP) {
  538. iounmap(port->membase);
  539. port->membase = NULL;
  540. }
  541. release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
  542. }
  543. static int
  544. mpc52xx_uart_request_port(struct uart_port *port)
  545. {
  546. int err;
  547. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  548. port->membase = ioremap(port->mapbase,
  549. sizeof(struct mpc52xx_psc));
  550. if (!port->membase)
  551. return -EINVAL;
  552. err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
  553. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  554. if (err && (port->flags & UPF_IOREMAP)) {
  555. iounmap(port->membase);
  556. port->membase = NULL;
  557. }
  558. return err;
  559. }
  560. static void
  561. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  562. {
  563. if ((flags & UART_CONFIG_TYPE)
  564. && (mpc52xx_uart_request_port(port) == 0))
  565. port->type = PORT_MPC52xx;
  566. }
  567. static int
  568. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  569. {
  570. if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
  571. return -EINVAL;
  572. if ((ser->irq != port->irq) ||
  573. (ser->io_type != SERIAL_IO_MEM) ||
  574. (ser->baud_base != port->uartclk) ||
  575. (ser->iomem_base != (void *)port->mapbase) ||
  576. (ser->hub6 != 0))
  577. return -EINVAL;
  578. return 0;
  579. }
  580. static struct uart_ops mpc52xx_uart_ops = {
  581. .tx_empty = mpc52xx_uart_tx_empty,
  582. .set_mctrl = mpc52xx_uart_set_mctrl,
  583. .get_mctrl = mpc52xx_uart_get_mctrl,
  584. .stop_tx = mpc52xx_uart_stop_tx,
  585. .start_tx = mpc52xx_uart_start_tx,
  586. .send_xchar = mpc52xx_uart_send_xchar,
  587. .stop_rx = mpc52xx_uart_stop_rx,
  588. .enable_ms = mpc52xx_uart_enable_ms,
  589. .break_ctl = mpc52xx_uart_break_ctl,
  590. .startup = mpc52xx_uart_startup,
  591. .shutdown = mpc52xx_uart_shutdown,
  592. .set_termios = mpc52xx_uart_set_termios,
  593. /* .pm = mpc52xx_uart_pm, Not supported yet */
  594. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  595. .type = mpc52xx_uart_type,
  596. .release_port = mpc52xx_uart_release_port,
  597. .request_port = mpc52xx_uart_request_port,
  598. .config_port = mpc52xx_uart_config_port,
  599. .verify_port = mpc52xx_uart_verify_port
  600. };
  601. /* ======================================================================== */
  602. /* Interrupt handling */
  603. /* ======================================================================== */
  604. static inline int
  605. mpc52xx_uart_int_rx_chars(struct uart_port *port)
  606. {
  607. struct tty_struct *tty = port->info->tty;
  608. unsigned char ch, flag;
  609. unsigned short status;
  610. /* While we can read, do so ! */
  611. while (psc_ops->raw_rx_rdy(port)) {
  612. /* Get the char */
  613. ch = psc_ops->read_char(port);
  614. /* Handle sysreq char */
  615. #ifdef SUPPORT_SYSRQ
  616. if (uart_handle_sysrq_char(port, ch)) {
  617. port->sysrq = 0;
  618. continue;
  619. }
  620. #endif
  621. /* Store it */
  622. flag = TTY_NORMAL;
  623. port->icount.rx++;
  624. status = in_be16(&PSC(port)->mpc52xx_psc_status);
  625. if (status & (MPC52xx_PSC_SR_PE |
  626. MPC52xx_PSC_SR_FE |
  627. MPC52xx_PSC_SR_RB)) {
  628. if (status & MPC52xx_PSC_SR_RB) {
  629. flag = TTY_BREAK;
  630. uart_handle_break(port);
  631. } else if (status & MPC52xx_PSC_SR_PE)
  632. flag = TTY_PARITY;
  633. else if (status & MPC52xx_PSC_SR_FE)
  634. flag = TTY_FRAME;
  635. /* Clear error condition */
  636. out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
  637. }
  638. tty_insert_flip_char(tty, ch, flag);
  639. if (status & MPC52xx_PSC_SR_OE) {
  640. /*
  641. * Overrun is special, since it's
  642. * reported immediately, and doesn't
  643. * affect the current character
  644. */
  645. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  646. }
  647. }
  648. tty_flip_buffer_push(tty);
  649. return psc_ops->raw_rx_rdy(port);
  650. }
  651. static inline int
  652. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  653. {
  654. struct circ_buf *xmit = &port->info->xmit;
  655. /* Process out of band chars */
  656. if (port->x_char) {
  657. psc_ops->write_char(port, port->x_char);
  658. port->icount.tx++;
  659. port->x_char = 0;
  660. return 1;
  661. }
  662. /* Nothing to do ? */
  663. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  664. mpc52xx_uart_stop_tx(port);
  665. return 0;
  666. }
  667. /* Send chars */
  668. while (psc_ops->raw_tx_rdy(port)) {
  669. psc_ops->write_char(port, xmit->buf[xmit->tail]);
  670. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  671. port->icount.tx++;
  672. if (uart_circ_empty(xmit))
  673. break;
  674. }
  675. /* Wake up */
  676. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  677. uart_write_wakeup(port);
  678. /* Maybe we're done after all */
  679. if (uart_circ_empty(xmit)) {
  680. mpc52xx_uart_stop_tx(port);
  681. return 0;
  682. }
  683. return 1;
  684. }
  685. static irqreturn_t
  686. mpc52xx_uart_int(int irq, void *dev_id)
  687. {
  688. struct uart_port *port = dev_id;
  689. unsigned long pass = ISR_PASS_LIMIT;
  690. unsigned int keepgoing;
  691. spin_lock(&port->lock);
  692. /* While we have stuff to do, we continue */
  693. do {
  694. /* If we don't find anything to do, we stop */
  695. keepgoing = 0;
  696. psc_ops->rx_clr_irq(port);
  697. if (psc_ops->rx_rdy(port))
  698. keepgoing |= mpc52xx_uart_int_rx_chars(port);
  699. psc_ops->tx_clr_irq(port);
  700. if (psc_ops->tx_rdy(port))
  701. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  702. /* Limit number of iteration */
  703. if (!(--pass))
  704. keepgoing = 0;
  705. } while (keepgoing);
  706. spin_unlock(&port->lock);
  707. return IRQ_HANDLED;
  708. }
  709. /* ======================================================================== */
  710. /* Console ( if applicable ) */
  711. /* ======================================================================== */
  712. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  713. static void __init
  714. mpc52xx_console_get_options(struct uart_port *port,
  715. int *baud, int *parity, int *bits, int *flow)
  716. {
  717. struct mpc52xx_psc __iomem *psc = PSC(port);
  718. unsigned char mr1;
  719. pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
  720. /* Read the mode registers */
  721. out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
  722. mr1 = in_8(&psc->mode);
  723. /* CT{U,L}R are write-only ! */
  724. *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  725. #if !defined(CONFIG_PPC_MERGE)
  726. if (__res.bi_baudrate)
  727. *baud = __res.bi_baudrate;
  728. #endif
  729. /* Parse them */
  730. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  731. case MPC52xx_PSC_MODE_5_BITS:
  732. *bits = 5;
  733. break;
  734. case MPC52xx_PSC_MODE_6_BITS:
  735. *bits = 6;
  736. break;
  737. case MPC52xx_PSC_MODE_7_BITS:
  738. *bits = 7;
  739. break;
  740. case MPC52xx_PSC_MODE_8_BITS:
  741. default:
  742. *bits = 8;
  743. }
  744. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  745. *parity = 'n';
  746. else
  747. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  748. }
  749. static void
  750. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  751. {
  752. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  753. unsigned int i, j;
  754. /* Disable interrupts */
  755. psc_ops->cw_disable_ints(port);
  756. /* Wait the TX buffer to be empty */
  757. j = 5000000; /* Maximum wait */
  758. while (!mpc52xx_uart_tx_empty(port) && --j)
  759. udelay(1);
  760. /* Write all the chars */
  761. for (i = 0; i < count; i++, s++) {
  762. /* Line return handling */
  763. if (*s == '\n')
  764. psc_ops->write_char(port, '\r');
  765. /* Send the char */
  766. psc_ops->write_char(port, *s);
  767. /* Wait the TX buffer to be empty */
  768. j = 20000; /* Maximum wait */
  769. while (!mpc52xx_uart_tx_empty(port) && --j)
  770. udelay(1);
  771. }
  772. /* Restore interrupt state */
  773. psc_ops->cw_restore_ints(port);
  774. }
  775. #if !defined(CONFIG_PPC_MERGE)
  776. static int __init
  777. mpc52xx_console_setup(struct console *co, char *options)
  778. {
  779. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  780. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  781. int bits = 8;
  782. int parity = 'n';
  783. int flow = 'n';
  784. if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
  785. return -EINVAL;
  786. /* Basic port init. Needed since we use some uart_??? func before
  787. * real init for early access */
  788. spin_lock_init(&port->lock);
  789. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  790. port->ops = &mpc52xx_uart_ops;
  791. port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
  792. /* We ioremap ourself */
  793. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  794. if (port->membase == NULL)
  795. return -EINVAL;
  796. /* Setup the port parameters accoding to options */
  797. if (options)
  798. uart_parse_options(options, &baud, &parity, &bits, &flow);
  799. else
  800. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  801. return uart_set_options(port, co, baud, parity, bits, flow);
  802. }
  803. #else
  804. static int __init
  805. mpc52xx_console_setup(struct console *co, char *options)
  806. {
  807. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  808. struct device_node *np = mpc52xx_uart_nodes[co->index];
  809. unsigned int uartclk;
  810. struct resource res;
  811. int ret;
  812. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  813. int bits = 8;
  814. int parity = 'n';
  815. int flow = 'n';
  816. pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
  817. co, co->index, options);
  818. if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
  819. pr_debug("PSC%x out of range\n", co->index);
  820. return -EINVAL;
  821. }
  822. if (!np) {
  823. pr_debug("PSC%x not found in device tree\n", co->index);
  824. return -EINVAL;
  825. }
  826. pr_debug("Console on ttyPSC%x is %s\n",
  827. co->index, mpc52xx_uart_nodes[co->index]->full_name);
  828. /* Fetch register locations */
  829. ret = of_address_to_resource(np, 0, &res);
  830. if (ret) {
  831. pr_debug("Could not get resources for PSC%x\n", co->index);
  832. return ret;
  833. }
  834. uartclk = psc_ops->getuartclk(np);
  835. if (uartclk == 0) {
  836. pr_debug("Could not find uart clock frequency!\n");
  837. return -EINVAL;
  838. }
  839. /* Basic port init. Needed since we use some uart_??? func before
  840. * real init for early access */
  841. spin_lock_init(&port->lock);
  842. port->uartclk = uartclk;
  843. port->ops = &mpc52xx_uart_ops;
  844. port->mapbase = res.start;
  845. port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
  846. port->irq = irq_of_parse_and_map(np, 0);
  847. if (port->membase == NULL)
  848. return -EINVAL;
  849. pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
  850. (void *)port->mapbase, port->membase,
  851. port->irq, port->uartclk);
  852. /* Setup the port parameters accoding to options */
  853. if (options)
  854. uart_parse_options(options, &baud, &parity, &bits, &flow);
  855. else
  856. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  857. pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
  858. baud, bits, parity, flow);
  859. return uart_set_options(port, co, baud, parity, bits, flow);
  860. }
  861. #endif /* defined(CONFIG_PPC_MERGE) */
  862. static struct uart_driver mpc52xx_uart_driver;
  863. static struct console mpc52xx_console = {
  864. .name = "ttyPSC",
  865. .write = mpc52xx_console_write,
  866. .device = uart_console_device,
  867. .setup = mpc52xx_console_setup,
  868. .flags = CON_PRINTBUFFER,
  869. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0) */
  870. .data = &mpc52xx_uart_driver,
  871. };
  872. static int __init
  873. mpc52xx_console_init(void)
  874. {
  875. #if defined(CONFIG_PPC_MERGE)
  876. mpc52xx_uart_of_enumerate();
  877. #endif
  878. register_console(&mpc52xx_console);
  879. return 0;
  880. }
  881. console_initcall(mpc52xx_console_init);
  882. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  883. #else
  884. #define MPC52xx_PSC_CONSOLE NULL
  885. #endif
  886. /* ======================================================================== */
  887. /* UART Driver */
  888. /* ======================================================================== */
  889. static struct uart_driver mpc52xx_uart_driver = {
  890. .driver_name = "mpc52xx_psc_uart",
  891. .dev_name = "ttyPSC",
  892. .major = SERIAL_PSC_MAJOR,
  893. .minor = SERIAL_PSC_MINOR,
  894. .nr = MPC52xx_PSC_MAXNUM,
  895. .cons = MPC52xx_PSC_CONSOLE,
  896. };
  897. #if !defined(CONFIG_PPC_MERGE)
  898. /* ======================================================================== */
  899. /* Platform Driver */
  900. /* ======================================================================== */
  901. static int __devinit
  902. mpc52xx_uart_probe(struct platform_device *dev)
  903. {
  904. struct resource *res = dev->resource;
  905. struct uart_port *port = NULL;
  906. int i, idx, ret;
  907. /* Check validity & presence */
  908. idx = dev->id;
  909. if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
  910. return -EINVAL;
  911. if (!mpc52xx_match_psc_function(idx, "uart"))
  912. return -ENODEV;
  913. /* Init the port structure */
  914. port = &mpc52xx_uart_ports[idx];
  915. spin_lock_init(&port->lock);
  916. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  917. port->fifosize = 512;
  918. port->iotype = UPIO_MEM;
  919. port->flags = UPF_BOOT_AUTOCONF |
  920. (uart_console(port) ? 0 : UPF_IOREMAP);
  921. port->line = idx;
  922. port->ops = &mpc52xx_uart_ops;
  923. port->dev = &dev->dev;
  924. /* Search for IRQ and mapbase */
  925. for (i = 0 ; i < dev->num_resources ; i++, res++) {
  926. if (res->flags & IORESOURCE_MEM)
  927. port->mapbase = res->start;
  928. else if (res->flags & IORESOURCE_IRQ)
  929. port->irq = res->start;
  930. }
  931. if (!port->irq || !port->mapbase)
  932. return -EINVAL;
  933. /* Add the port to the uart sub-system */
  934. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  935. if (!ret)
  936. platform_set_drvdata(dev, (void *)port);
  937. return ret;
  938. }
  939. static int
  940. mpc52xx_uart_remove(struct platform_device *dev)
  941. {
  942. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  943. platform_set_drvdata(dev, NULL);
  944. if (port)
  945. uart_remove_one_port(&mpc52xx_uart_driver, port);
  946. return 0;
  947. }
  948. #ifdef CONFIG_PM
  949. static int
  950. mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
  951. {
  952. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  953. if (port)
  954. uart_suspend_port(&mpc52xx_uart_driver, port);
  955. return 0;
  956. }
  957. static int
  958. mpc52xx_uart_resume(struct platform_device *dev)
  959. {
  960. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  961. if (port)
  962. uart_resume_port(&mpc52xx_uart_driver, port);
  963. return 0;
  964. }
  965. #endif
  966. /* work with hotplug and coldplug */
  967. MODULE_ALIAS("platform:mpc52xx-psc");
  968. static struct platform_driver mpc52xx_uart_platform_driver = {
  969. .probe = mpc52xx_uart_probe,
  970. .remove = mpc52xx_uart_remove,
  971. #ifdef CONFIG_PM
  972. .suspend = mpc52xx_uart_suspend,
  973. .resume = mpc52xx_uart_resume,
  974. #endif
  975. .driver = {
  976. .owner = THIS_MODULE,
  977. .name = "mpc52xx-psc",
  978. },
  979. };
  980. #endif /* !defined(CONFIG_PPC_MERGE) */
  981. #if defined(CONFIG_PPC_MERGE)
  982. /* ======================================================================== */
  983. /* OF Platform Driver */
  984. /* ======================================================================== */
  985. static struct of_device_id mpc52xx_uart_of_match[] = {
  986. #ifdef CONFIG_PPC_MPC52xx
  987. { .compatible = "fsl,mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
  988. /* binding used by old lite5200 device trees: */
  989. { .compatible = "mpc5200-psc-uart", .data = &mpc52xx_psc_ops, },
  990. /* binding used by efika: */
  991. { .compatible = "mpc5200-serial", .data = &mpc52xx_psc_ops, },
  992. #endif
  993. #ifdef CONFIG_PPC_MPC512x
  994. { .compatible = "fsl,mpc5121-psc-uart", .data = &mpc512x_psc_ops, },
  995. {},
  996. #endif
  997. };
  998. static int __devinit
  999. mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
  1000. {
  1001. int idx = -1;
  1002. unsigned int uartclk;
  1003. struct uart_port *port = NULL;
  1004. struct resource res;
  1005. int ret;
  1006. dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
  1007. /* Check validity & presence */
  1008. for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
  1009. if (mpc52xx_uart_nodes[idx] == op->node)
  1010. break;
  1011. if (idx >= MPC52xx_PSC_MAXNUM)
  1012. return -EINVAL;
  1013. pr_debug("Found %s assigned to ttyPSC%x\n",
  1014. mpc52xx_uart_nodes[idx]->full_name, idx);
  1015. uartclk = psc_ops->getuartclk(op->node);
  1016. if (uartclk == 0) {
  1017. dev_dbg(&op->dev, "Could not find uart clock frequency!\n");
  1018. return -EINVAL;
  1019. }
  1020. /* Init the port structure */
  1021. port = &mpc52xx_uart_ports[idx];
  1022. spin_lock_init(&port->lock);
  1023. port->uartclk = uartclk;
  1024. port->fifosize = 512;
  1025. port->iotype = UPIO_MEM;
  1026. port->flags = UPF_BOOT_AUTOCONF |
  1027. (uart_console(port) ? 0 : UPF_IOREMAP);
  1028. port->line = idx;
  1029. port->ops = &mpc52xx_uart_ops;
  1030. port->dev = &op->dev;
  1031. /* Search for IRQ and mapbase */
  1032. ret = of_address_to_resource(op->node, 0, &res);
  1033. if (ret)
  1034. return ret;
  1035. port->mapbase = res.start;
  1036. port->irq = irq_of_parse_and_map(op->node, 0);
  1037. dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
  1038. (void *)port->mapbase, port->irq, port->uartclk);
  1039. if ((port->irq == NO_IRQ) || !port->mapbase) {
  1040. printk(KERN_ERR "Could not allocate resources for PSC\n");
  1041. return -EINVAL;
  1042. }
  1043. /* Add the port to the uart sub-system */
  1044. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  1045. if (!ret)
  1046. dev_set_drvdata(&op->dev, (void *)port);
  1047. return ret;
  1048. }
  1049. static int
  1050. mpc52xx_uart_of_remove(struct of_device *op)
  1051. {
  1052. struct uart_port *port = dev_get_drvdata(&op->dev);
  1053. dev_set_drvdata(&op->dev, NULL);
  1054. if (port) {
  1055. uart_remove_one_port(&mpc52xx_uart_driver, port);
  1056. irq_dispose_mapping(port->irq);
  1057. }
  1058. return 0;
  1059. }
  1060. #ifdef CONFIG_PM
  1061. static int
  1062. mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
  1063. {
  1064. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  1065. if (port)
  1066. uart_suspend_port(&mpc52xx_uart_driver, port);
  1067. return 0;
  1068. }
  1069. static int
  1070. mpc52xx_uart_of_resume(struct of_device *op)
  1071. {
  1072. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  1073. if (port)
  1074. uart_resume_port(&mpc52xx_uart_driver, port);
  1075. return 0;
  1076. }
  1077. #endif
  1078. static void
  1079. mpc52xx_uart_of_assign(struct device_node *np, int idx)
  1080. {
  1081. int free_idx = -1;
  1082. int i;
  1083. /* Find the first free node */
  1084. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  1085. if (mpc52xx_uart_nodes[i] == NULL) {
  1086. free_idx = i;
  1087. break;
  1088. }
  1089. }
  1090. if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
  1091. idx = free_idx;
  1092. if (idx < 0)
  1093. return; /* No free slot; abort */
  1094. of_node_get(np);
  1095. /* If the slot is already occupied, then swap slots */
  1096. if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
  1097. mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
  1098. mpc52xx_uart_nodes[idx] = np;
  1099. }
  1100. static void
  1101. mpc52xx_uart_of_enumerate(void)
  1102. {
  1103. static int enum_done;
  1104. struct device_node *np;
  1105. const unsigned int *devno;
  1106. const struct of_device_id *match;
  1107. int i;
  1108. if (enum_done)
  1109. return;
  1110. for_each_node_by_type(np, "serial") {
  1111. match = of_match_node(mpc52xx_uart_of_match, np);
  1112. if (!match)
  1113. continue;
  1114. psc_ops = match->data;
  1115. /* Is a particular device number requested? */
  1116. devno = of_get_property(np, "port-number", NULL);
  1117. mpc52xx_uart_of_assign(np, devno ? *devno : -1);
  1118. }
  1119. enum_done = 1;
  1120. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  1121. if (mpc52xx_uart_nodes[i])
  1122. pr_debug("%s assigned to ttyPSC%x\n",
  1123. mpc52xx_uart_nodes[i]->full_name, i);
  1124. }
  1125. }
  1126. MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
  1127. static struct of_platform_driver mpc52xx_uart_of_driver = {
  1128. .match_table = mpc52xx_uart_of_match,
  1129. .probe = mpc52xx_uart_of_probe,
  1130. .remove = mpc52xx_uart_of_remove,
  1131. #ifdef CONFIG_PM
  1132. .suspend = mpc52xx_uart_of_suspend,
  1133. .resume = mpc52xx_uart_of_resume,
  1134. #endif
  1135. .driver = {
  1136. .name = "mpc52xx-psc-uart",
  1137. },
  1138. };
  1139. #endif /* defined(CONFIG_PPC_MERGE) */
  1140. /* ======================================================================== */
  1141. /* Module */
  1142. /* ======================================================================== */
  1143. static int __init
  1144. mpc52xx_uart_init(void)
  1145. {
  1146. int ret;
  1147. printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
  1148. ret = uart_register_driver(&mpc52xx_uart_driver);
  1149. if (ret) {
  1150. printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
  1151. __FILE__, ret);
  1152. return ret;
  1153. }
  1154. #if defined(CONFIG_PPC_MERGE)
  1155. mpc52xx_uart_of_enumerate();
  1156. ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
  1157. if (ret) {
  1158. printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
  1159. __FILE__, ret);
  1160. uart_unregister_driver(&mpc52xx_uart_driver);
  1161. return ret;
  1162. }
  1163. #else
  1164. psc_ops = &mpc52xx_psc_ops;
  1165. ret = platform_driver_register(&mpc52xx_uart_platform_driver);
  1166. if (ret) {
  1167. printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
  1168. __FILE__, ret);
  1169. uart_unregister_driver(&mpc52xx_uart_driver);
  1170. return ret;
  1171. }
  1172. #endif
  1173. return 0;
  1174. }
  1175. static void __exit
  1176. mpc52xx_uart_exit(void)
  1177. {
  1178. #if defined(CONFIG_PPC_MERGE)
  1179. of_unregister_platform_driver(&mpc52xx_uart_of_driver);
  1180. #else
  1181. platform_driver_unregister(&mpc52xx_uart_platform_driver);
  1182. #endif
  1183. uart_unregister_driver(&mpc52xx_uart_driver);
  1184. }
  1185. module_init(mpc52xx_uart_init);
  1186. module_exit(mpc52xx_uart_exit);
  1187. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  1188. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  1189. MODULE_LICENSE("GPL");