bfin_5xx.c 31 KB

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  1. /*
  2. * Blackfin On-Chip Serial Driver
  3. *
  4. * Copyright 2006-2007 Analog Devices Inc.
  5. *
  6. * Enter bugs at http://blackfin.uclinux.org/
  7. *
  8. * Licensed under the GPL-2 or later.
  9. */
  10. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  11. #define SUPPORT_SYSRQ
  12. #endif
  13. #include <linux/module.h>
  14. #include <linux/ioport.h>
  15. #include <linux/init.h>
  16. #include <linux/console.h>
  17. #include <linux/sysrq.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/tty.h>
  20. #include <linux/tty_flip.h>
  21. #include <linux/serial_core.h>
  22. #ifdef CONFIG_KGDB_UART
  23. #include <linux/kgdb.h>
  24. #include <asm/irq_regs.h>
  25. #endif
  26. #include <asm/gpio.h>
  27. #include <asm/mach/bfin_serial_5xx.h>
  28. #ifdef CONFIG_SERIAL_BFIN_DMA
  29. #include <linux/dma-mapping.h>
  30. #include <asm/io.h>
  31. #include <asm/irq.h>
  32. #include <asm/cacheflush.h>
  33. #endif
  34. /* UART name and device definitions */
  35. #define BFIN_SERIAL_NAME "ttyBF"
  36. #define BFIN_SERIAL_MAJOR 204
  37. #define BFIN_SERIAL_MINOR 64
  38. /*
  39. * Setup for console. Argument comes from the menuconfig
  40. */
  41. #define DMA_RX_XCOUNT 512
  42. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  43. #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
  44. #ifdef CONFIG_SERIAL_BFIN_DMA
  45. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  46. #else
  47. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  48. #endif
  49. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  50. /*
  51. * interrupts are disabled on entry
  52. */
  53. static void bfin_serial_stop_tx(struct uart_port *port)
  54. {
  55. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  56. struct circ_buf *xmit = &uart->port.info->xmit;
  57. #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
  58. unsigned short ier;
  59. #endif
  60. while (!(UART_GET_LSR(uart) & TEMT))
  61. cpu_relax();
  62. #ifdef CONFIG_SERIAL_BFIN_DMA
  63. disable_dma(uart->tx_dma_channel);
  64. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  65. uart->port.icount.tx += uart->tx_count;
  66. uart->tx_count = 0;
  67. uart->tx_done = 1;
  68. #else
  69. #ifdef CONFIG_BF54x
  70. /* Clear TFI bit */
  71. UART_PUT_LSR(uart, TFI);
  72. UART_CLEAR_IER(uart, ETBEI);
  73. #else
  74. ier = UART_GET_IER(uart);
  75. ier &= ~ETBEI;
  76. UART_PUT_IER(uart, ier);
  77. #endif
  78. #endif
  79. }
  80. /*
  81. * port is locked and interrupts are disabled
  82. */
  83. static void bfin_serial_start_tx(struct uart_port *port)
  84. {
  85. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  86. #ifdef CONFIG_SERIAL_BFIN_DMA
  87. if (uart->tx_done)
  88. bfin_serial_dma_tx_chars(uart);
  89. #else
  90. #ifdef CONFIG_BF54x
  91. UART_SET_IER(uart, ETBEI);
  92. #else
  93. unsigned short ier;
  94. ier = UART_GET_IER(uart);
  95. ier |= ETBEI;
  96. UART_PUT_IER(uart, ier);
  97. #endif
  98. bfin_serial_tx_chars(uart);
  99. #endif
  100. }
  101. /*
  102. * Interrupts are enabled
  103. */
  104. static void bfin_serial_stop_rx(struct uart_port *port)
  105. {
  106. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  107. #ifdef CONFIG_KGDB_UART
  108. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  109. #endif
  110. #ifdef CONFIG_BF54x
  111. UART_CLEAR_IER(uart, ERBFI);
  112. #else
  113. unsigned short ier;
  114. ier = UART_GET_IER(uart);
  115. ier &= ~ERBFI;
  116. UART_PUT_IER(uart, ier);
  117. #endif
  118. #ifdef CONFIG_KGDB_UART
  119. }
  120. #endif
  121. }
  122. /*
  123. * Set the modem control timer to fire immediately.
  124. */
  125. static void bfin_serial_enable_ms(struct uart_port *port)
  126. {
  127. }
  128. #ifdef CONFIG_KGDB_UART
  129. static int kgdb_entry_state;
  130. void kgdb_put_debug_char(int chr)
  131. {
  132. struct bfin_serial_port *uart;
  133. if (CONFIG_KGDB_UART_PORT < 0
  134. || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
  135. uart = &bfin_serial_ports[0];
  136. else
  137. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  138. while (!(UART_GET_LSR(uart) & THRE)) {
  139. SSYNC();
  140. }
  141. #ifndef CONFIG_BF54x
  142. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  143. SSYNC();
  144. #endif
  145. UART_PUT_CHAR(uart, (unsigned char)chr);
  146. SSYNC();
  147. }
  148. int kgdb_get_debug_char(void)
  149. {
  150. struct bfin_serial_port *uart;
  151. unsigned char chr;
  152. if (CONFIG_KGDB_UART_PORT < 0
  153. || CONFIG_KGDB_UART_PORT >= BFIN_UART_NR_PORTS)
  154. uart = &bfin_serial_ports[0];
  155. else
  156. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  157. while(!(UART_GET_LSR(uart) & DR)) {
  158. SSYNC();
  159. }
  160. #ifndef CONFIG_BF54x
  161. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  162. SSYNC();
  163. #endif
  164. chr = UART_GET_CHAR(uart);
  165. SSYNC();
  166. return chr;
  167. }
  168. #endif
  169. #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
  170. # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
  171. # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
  172. #else
  173. # define UART_GET_ANOMALY_THRESHOLD(uart) 0
  174. # define UART_SET_ANOMALY_THRESHOLD(uart, v)
  175. #endif
  176. #ifdef CONFIG_SERIAL_BFIN_PIO
  177. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  178. {
  179. struct tty_struct *tty = uart->port.info->tty;
  180. unsigned int status, ch, flg;
  181. static struct timeval anomaly_start = { .tv_sec = 0 };
  182. #ifdef CONFIG_KGDB_UART
  183. struct pt_regs *regs = get_irq_regs();
  184. #endif
  185. status = UART_GET_LSR(uart);
  186. UART_CLEAR_LSR(uart);
  187. ch = UART_GET_CHAR(uart);
  188. uart->port.icount.rx++;
  189. #ifdef CONFIG_KGDB_UART
  190. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  191. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  192. kgdb_breakkey_pressed(regs);
  193. return;
  194. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  195. kgdb_entry_state = 1;
  196. } else if (kgdb_entry_state == 1 && ch == 'q') {
  197. kgdb_entry_state = 0;
  198. kgdb_breakkey_pressed(regs);
  199. return;
  200. } else if (ch == 0x3) {/* Ctrl + C */
  201. kgdb_entry_state = 0;
  202. kgdb_breakkey_pressed(regs);
  203. return;
  204. } else {
  205. kgdb_entry_state = 0;
  206. }
  207. }
  208. #endif
  209. if (ANOMALY_05000363) {
  210. /* The BF533 (and BF561) family of processors have a nice anomaly
  211. * where they continuously generate characters for a "single" break.
  212. * We have to basically ignore this flood until the "next" valid
  213. * character comes across. Due to the nature of the flood, it is
  214. * not possible to reliably catch bytes that are sent too quickly
  215. * after this break. So application code talking to the Blackfin
  216. * which sends a break signal must allow at least 1.5 character
  217. * times after the end of the break for things to stabilize. This
  218. * timeout was picked as it must absolutely be larger than 1
  219. * character time +/- some percent. So 1.5 sounds good. All other
  220. * Blackfin families operate properly. Woo.
  221. */
  222. if (anomaly_start.tv_sec) {
  223. struct timeval curr;
  224. suseconds_t usecs;
  225. if ((~ch & (~ch + 1)) & 0xff)
  226. goto known_good_char;
  227. do_gettimeofday(&curr);
  228. if (curr.tv_sec - anomaly_start.tv_sec > 1)
  229. goto known_good_char;
  230. usecs = 0;
  231. if (curr.tv_sec != anomaly_start.tv_sec)
  232. usecs += USEC_PER_SEC;
  233. usecs += curr.tv_usec - anomaly_start.tv_usec;
  234. if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
  235. goto known_good_char;
  236. if (ch)
  237. anomaly_start.tv_sec = 0;
  238. else
  239. anomaly_start = curr;
  240. return;
  241. known_good_char:
  242. anomaly_start.tv_sec = 0;
  243. }
  244. }
  245. if (status & BI) {
  246. if (ANOMALY_05000363)
  247. if (bfin_revid() < 5)
  248. do_gettimeofday(&anomaly_start);
  249. uart->port.icount.brk++;
  250. if (uart_handle_break(&uart->port))
  251. goto ignore_char;
  252. status &= ~(PE | FE);
  253. }
  254. if (status & PE)
  255. uart->port.icount.parity++;
  256. if (status & OE)
  257. uart->port.icount.overrun++;
  258. if (status & FE)
  259. uart->port.icount.frame++;
  260. status &= uart->port.read_status_mask;
  261. if (status & BI)
  262. flg = TTY_BREAK;
  263. else if (status & PE)
  264. flg = TTY_PARITY;
  265. else if (status & FE)
  266. flg = TTY_FRAME;
  267. else
  268. flg = TTY_NORMAL;
  269. if (uart_handle_sysrq_char(&uart->port, ch))
  270. goto ignore_char;
  271. uart_insert_char(&uart->port, status, OE, ch, flg);
  272. ignore_char:
  273. tty_flip_buffer_push(tty);
  274. }
  275. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  276. {
  277. struct circ_buf *xmit = &uart->port.info->xmit;
  278. if (uart->port.x_char) {
  279. UART_PUT_CHAR(uart, uart->port.x_char);
  280. uart->port.icount.tx++;
  281. uart->port.x_char = 0;
  282. }
  283. /*
  284. * Check the modem control lines before
  285. * transmitting anything.
  286. */
  287. bfin_serial_mctrl_check(uart);
  288. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  289. bfin_serial_stop_tx(&uart->port);
  290. return;
  291. }
  292. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  293. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  294. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  295. uart->port.icount.tx++;
  296. SSYNC();
  297. }
  298. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  299. uart_write_wakeup(&uart->port);
  300. if (uart_circ_empty(xmit))
  301. bfin_serial_stop_tx(&uart->port);
  302. }
  303. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  304. {
  305. struct bfin_serial_port *uart = dev_id;
  306. spin_lock(&uart->port.lock);
  307. while (UART_GET_LSR(uart) & DR)
  308. bfin_serial_rx_chars(uart);
  309. spin_unlock(&uart->port.lock);
  310. return IRQ_HANDLED;
  311. }
  312. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  313. {
  314. struct bfin_serial_port *uart = dev_id;
  315. spin_lock(&uart->port.lock);
  316. if (UART_GET_LSR(uart) & THRE)
  317. bfin_serial_tx_chars(uart);
  318. spin_unlock(&uart->port.lock);
  319. return IRQ_HANDLED;
  320. }
  321. #endif
  322. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  323. static void bfin_serial_do_work(struct work_struct *work)
  324. {
  325. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  326. bfin_serial_mctrl_check(uart);
  327. }
  328. #endif
  329. #ifdef CONFIG_SERIAL_BFIN_DMA
  330. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  331. {
  332. struct circ_buf *xmit = &uart->port.info->xmit;
  333. unsigned short ier;
  334. uart->tx_done = 0;
  335. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  336. uart->tx_count = 0;
  337. uart->tx_done = 1;
  338. return;
  339. }
  340. if (uart->port.x_char) {
  341. UART_PUT_CHAR(uart, uart->port.x_char);
  342. uart->port.icount.tx++;
  343. uart->port.x_char = 0;
  344. }
  345. /*
  346. * Check the modem control lines before
  347. * transmitting anything.
  348. */
  349. bfin_serial_mctrl_check(uart);
  350. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  351. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  352. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  353. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  354. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  355. set_dma_config(uart->tx_dma_channel,
  356. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  357. INTR_ON_BUF,
  358. DIMENSION_LINEAR,
  359. DATA_SIZE_8,
  360. DMA_SYNC_RESTART));
  361. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  362. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  363. set_dma_x_modify(uart->tx_dma_channel, 1);
  364. enable_dma(uart->tx_dma_channel);
  365. #ifdef CONFIG_BF54x
  366. UART_SET_IER(uart, ETBEI);
  367. #else
  368. ier = UART_GET_IER(uart);
  369. ier |= ETBEI;
  370. UART_PUT_IER(uart, ier);
  371. #endif
  372. }
  373. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  374. {
  375. struct tty_struct *tty = uart->port.info->tty;
  376. int i, flg, status;
  377. status = UART_GET_LSR(uart);
  378. UART_CLEAR_LSR(uart);
  379. uart->port.icount.rx +=
  380. CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
  381. UART_XMIT_SIZE);
  382. if (status & BI) {
  383. uart->port.icount.brk++;
  384. if (uart_handle_break(&uart->port))
  385. goto dma_ignore_char;
  386. status &= ~(PE | FE);
  387. }
  388. if (status & PE)
  389. uart->port.icount.parity++;
  390. if (status & OE)
  391. uart->port.icount.overrun++;
  392. if (status & FE)
  393. uart->port.icount.frame++;
  394. status &= uart->port.read_status_mask;
  395. if (status & BI)
  396. flg = TTY_BREAK;
  397. else if (status & PE)
  398. flg = TTY_PARITY;
  399. else if (status & FE)
  400. flg = TTY_FRAME;
  401. else
  402. flg = TTY_NORMAL;
  403. for (i = uart->rx_dma_buf.tail; i != uart->rx_dma_buf.head; i++) {
  404. if (i >= UART_XMIT_SIZE)
  405. i = 0;
  406. if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  407. uart_insert_char(&uart->port, status, OE,
  408. uart->rx_dma_buf.buf[i], flg);
  409. }
  410. dma_ignore_char:
  411. tty_flip_buffer_push(tty);
  412. }
  413. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  414. {
  415. int x_pos, pos;
  416. uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
  417. x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
  418. uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
  419. if (uart->rx_dma_nrows == DMA_RX_YCOUNT)
  420. uart->rx_dma_nrows = 0;
  421. x_pos = DMA_RX_XCOUNT - x_pos;
  422. if (x_pos == DMA_RX_XCOUNT)
  423. x_pos = 0;
  424. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  425. if (pos != uart->rx_dma_buf.tail) {
  426. uart->rx_dma_buf.head = pos;
  427. bfin_serial_dma_rx_chars(uart);
  428. uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
  429. }
  430. mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
  431. }
  432. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  433. {
  434. struct bfin_serial_port *uart = dev_id;
  435. struct circ_buf *xmit = &uart->port.info->xmit;
  436. unsigned short ier;
  437. spin_lock(&uart->port.lock);
  438. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  439. disable_dma(uart->tx_dma_channel);
  440. clear_dma_irqstat(uart->tx_dma_channel);
  441. #ifdef CONFIG_BF54x
  442. UART_CLEAR_IER(uart, ETBEI);
  443. #else
  444. ier = UART_GET_IER(uart);
  445. ier &= ~ETBEI;
  446. UART_PUT_IER(uart, ier);
  447. #endif
  448. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  449. uart->port.icount.tx += uart->tx_count;
  450. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  451. uart_write_wakeup(&uart->port);
  452. bfin_serial_dma_tx_chars(uart);
  453. }
  454. spin_unlock(&uart->port.lock);
  455. return IRQ_HANDLED;
  456. }
  457. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  458. {
  459. struct bfin_serial_port *uart = dev_id;
  460. unsigned short irqstat;
  461. spin_lock(&uart->port.lock);
  462. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  463. clear_dma_irqstat(uart->rx_dma_channel);
  464. spin_unlock(&uart->port.lock);
  465. mod_timer(&(uart->rx_dma_timer), jiffies);
  466. return IRQ_HANDLED;
  467. }
  468. #endif
  469. /*
  470. * Return TIOCSER_TEMT when transmitter is not busy.
  471. */
  472. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  473. {
  474. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  475. unsigned short lsr;
  476. lsr = UART_GET_LSR(uart);
  477. if (lsr & TEMT)
  478. return TIOCSER_TEMT;
  479. else
  480. return 0;
  481. }
  482. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  483. {
  484. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  485. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  486. if (uart->cts_pin < 0)
  487. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  488. # ifdef BF54x
  489. if (UART_GET_MSR(uart) & CTS)
  490. # else
  491. if (gpio_get_value(uart->cts_pin))
  492. # endif
  493. return TIOCM_DSR | TIOCM_CAR;
  494. else
  495. #endif
  496. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  497. }
  498. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  499. {
  500. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  501. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  502. if (uart->rts_pin < 0)
  503. return;
  504. if (mctrl & TIOCM_RTS)
  505. # ifdef BF54x
  506. UART_PUT_MCR(uart, UART_GET_MCR(uart) & ~MRTS);
  507. # else
  508. gpio_set_value(uart->rts_pin, 0);
  509. # endif
  510. else
  511. # ifdef BF54x
  512. UART_PUT_MCR(uart, UART_GET_MCR(uart) | MRTS);
  513. # else
  514. gpio_set_value(uart->rts_pin, 1);
  515. # endif
  516. #endif
  517. }
  518. /*
  519. * Handle any change of modem status signal since we were last called.
  520. */
  521. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  522. {
  523. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  524. unsigned int status;
  525. struct uart_info *info = uart->port.info;
  526. struct tty_struct *tty = info->tty;
  527. status = bfin_serial_get_mctrl(&uart->port);
  528. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  529. if (!(status & TIOCM_CTS)) {
  530. tty->hw_stopped = 1;
  531. schedule_work(&uart->cts_workqueue);
  532. } else {
  533. tty->hw_stopped = 0;
  534. }
  535. #endif
  536. }
  537. /*
  538. * Interrupts are always disabled.
  539. */
  540. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  541. {
  542. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  543. u16 lcr = UART_GET_LCR(uart);
  544. if (break_state)
  545. lcr |= SB;
  546. else
  547. lcr &= ~SB;
  548. UART_PUT_LCR(uart, lcr);
  549. SSYNC();
  550. }
  551. static int bfin_serial_startup(struct uart_port *port)
  552. {
  553. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  554. #ifdef CONFIG_SERIAL_BFIN_DMA
  555. dma_addr_t dma_handle;
  556. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  557. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  558. return -EBUSY;
  559. }
  560. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  561. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  562. free_dma(uart->rx_dma_channel);
  563. return -EBUSY;
  564. }
  565. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  566. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  567. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  568. uart->rx_dma_buf.head = 0;
  569. uart->rx_dma_buf.tail = 0;
  570. uart->rx_dma_nrows = 0;
  571. set_dma_config(uart->rx_dma_channel,
  572. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  573. INTR_ON_ROW, DIMENSION_2D,
  574. DATA_SIZE_8,
  575. DMA_SYNC_RESTART));
  576. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  577. set_dma_x_modify(uart->rx_dma_channel, 1);
  578. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  579. set_dma_y_modify(uart->rx_dma_channel, 1);
  580. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  581. enable_dma(uart->rx_dma_channel);
  582. uart->rx_dma_timer.data = (unsigned long)(uart);
  583. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  584. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  585. add_timer(&(uart->rx_dma_timer));
  586. #else
  587. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  588. "BFIN_UART_RX", uart)) {
  589. # ifdef CONFIG_KGDB_UART
  590. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  591. # endif
  592. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  593. return -EBUSY;
  594. # ifdef CONFIG_KGDB_UART
  595. }
  596. # endif
  597. }
  598. if (request_irq
  599. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  600. "BFIN_UART_TX", uart)) {
  601. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  602. free_irq(uart->port.irq, uart);
  603. return -EBUSY;
  604. }
  605. #endif
  606. #ifdef CONFIG_BF54x
  607. UART_SET_IER(uart, ERBFI);
  608. #else
  609. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  610. #endif
  611. return 0;
  612. }
  613. static void bfin_serial_shutdown(struct uart_port *port)
  614. {
  615. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  616. #ifdef CONFIG_SERIAL_BFIN_DMA
  617. disable_dma(uart->tx_dma_channel);
  618. free_dma(uart->tx_dma_channel);
  619. disable_dma(uart->rx_dma_channel);
  620. free_dma(uart->rx_dma_channel);
  621. del_timer(&(uart->rx_dma_timer));
  622. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  623. #else
  624. #ifdef CONFIG_KGDB_UART
  625. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  626. #endif
  627. free_irq(uart->port.irq, uart);
  628. free_irq(uart->port.irq+1, uart);
  629. #endif
  630. }
  631. static void
  632. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  633. struct ktermios *old)
  634. {
  635. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  636. unsigned long flags;
  637. unsigned int baud, quot;
  638. unsigned short val, ier, lcr = 0;
  639. switch (termios->c_cflag & CSIZE) {
  640. case CS8:
  641. lcr = WLS(8);
  642. break;
  643. case CS7:
  644. lcr = WLS(7);
  645. break;
  646. case CS6:
  647. lcr = WLS(6);
  648. break;
  649. case CS5:
  650. lcr = WLS(5);
  651. break;
  652. default:
  653. printk(KERN_ERR "%s: word lengh not supported\n",
  654. __FUNCTION__);
  655. }
  656. if (termios->c_cflag & CSTOPB)
  657. lcr |= STB;
  658. if (termios->c_cflag & PARENB)
  659. lcr |= PEN;
  660. if (!(termios->c_cflag & PARODD))
  661. lcr |= EPS;
  662. if (termios->c_cflag & CMSPAR)
  663. lcr |= STP;
  664. port->read_status_mask = OE;
  665. if (termios->c_iflag & INPCK)
  666. port->read_status_mask |= (FE | PE);
  667. if (termios->c_iflag & (BRKINT | PARMRK))
  668. port->read_status_mask |= BI;
  669. /*
  670. * Characters to ignore
  671. */
  672. port->ignore_status_mask = 0;
  673. if (termios->c_iflag & IGNPAR)
  674. port->ignore_status_mask |= FE | PE;
  675. if (termios->c_iflag & IGNBRK) {
  676. port->ignore_status_mask |= BI;
  677. /*
  678. * If we're ignoring parity and break indicators,
  679. * ignore overruns too (for real raw support).
  680. */
  681. if (termios->c_iflag & IGNPAR)
  682. port->ignore_status_mask |= OE;
  683. }
  684. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  685. quot = uart_get_divisor(port, baud);
  686. spin_lock_irqsave(&uart->port.lock, flags);
  687. UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
  688. /* Disable UART */
  689. ier = UART_GET_IER(uart);
  690. #ifdef CONFIG_BF54x
  691. UART_CLEAR_IER(uart, 0xF);
  692. #else
  693. UART_PUT_IER(uart, 0);
  694. #endif
  695. #ifndef CONFIG_BF54x
  696. /* Set DLAB in LCR to Access DLL and DLH */
  697. val = UART_GET_LCR(uart);
  698. val |= DLAB;
  699. UART_PUT_LCR(uart, val);
  700. SSYNC();
  701. #endif
  702. UART_PUT_DLL(uart, quot & 0xFF);
  703. SSYNC();
  704. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  705. SSYNC();
  706. #ifndef CONFIG_BF54x
  707. /* Clear DLAB in LCR to Access THR RBR IER */
  708. val = UART_GET_LCR(uart);
  709. val &= ~DLAB;
  710. UART_PUT_LCR(uart, val);
  711. SSYNC();
  712. #endif
  713. UART_PUT_LCR(uart, lcr);
  714. /* Enable UART */
  715. #ifdef CONFIG_BF54x
  716. UART_SET_IER(uart, ier);
  717. #else
  718. UART_PUT_IER(uart, ier);
  719. #endif
  720. val = UART_GET_GCTL(uart);
  721. val |= UCEN;
  722. UART_PUT_GCTL(uart, val);
  723. spin_unlock_irqrestore(&uart->port.lock, flags);
  724. }
  725. static const char *bfin_serial_type(struct uart_port *port)
  726. {
  727. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  728. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  729. }
  730. /*
  731. * Release the memory region(s) being used by 'port'.
  732. */
  733. static void bfin_serial_release_port(struct uart_port *port)
  734. {
  735. }
  736. /*
  737. * Request the memory region(s) being used by 'port'.
  738. */
  739. static int bfin_serial_request_port(struct uart_port *port)
  740. {
  741. return 0;
  742. }
  743. /*
  744. * Configure/autoconfigure the port.
  745. */
  746. static void bfin_serial_config_port(struct uart_port *port, int flags)
  747. {
  748. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  749. if (flags & UART_CONFIG_TYPE &&
  750. bfin_serial_request_port(&uart->port) == 0)
  751. uart->port.type = PORT_BFIN;
  752. }
  753. /*
  754. * Verify the new serial_struct (for TIOCSSERIAL).
  755. * The only change we allow are to the flags and type, and
  756. * even then only between PORT_BFIN and PORT_UNKNOWN
  757. */
  758. static int
  759. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  760. {
  761. return 0;
  762. }
  763. /*
  764. * Enable the IrDA function if tty->ldisc.num is N_IRDA.
  765. * In other cases, disable IrDA function.
  766. */
  767. static void bfin_set_ldisc(struct tty_struct *tty)
  768. {
  769. int line = tty->index;
  770. unsigned short val;
  771. if (line >= tty->driver->num)
  772. return;
  773. switch (tty->ldisc.num) {
  774. case N_IRDA:
  775. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  776. val |= (IREN | RPOLC);
  777. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  778. break;
  779. default:
  780. val = UART_GET_GCTL(&bfin_serial_ports[line]);
  781. val &= ~(IREN | RPOLC);
  782. UART_PUT_GCTL(&bfin_serial_ports[line], val);
  783. }
  784. }
  785. static struct uart_ops bfin_serial_pops = {
  786. .tx_empty = bfin_serial_tx_empty,
  787. .set_mctrl = bfin_serial_set_mctrl,
  788. .get_mctrl = bfin_serial_get_mctrl,
  789. .stop_tx = bfin_serial_stop_tx,
  790. .start_tx = bfin_serial_start_tx,
  791. .stop_rx = bfin_serial_stop_rx,
  792. .enable_ms = bfin_serial_enable_ms,
  793. .break_ctl = bfin_serial_break_ctl,
  794. .startup = bfin_serial_startup,
  795. .shutdown = bfin_serial_shutdown,
  796. .set_termios = bfin_serial_set_termios,
  797. .type = bfin_serial_type,
  798. .release_port = bfin_serial_release_port,
  799. .request_port = bfin_serial_request_port,
  800. .config_port = bfin_serial_config_port,
  801. .verify_port = bfin_serial_verify_port,
  802. };
  803. static void __init bfin_serial_init_ports(void)
  804. {
  805. static int first = 1;
  806. int i;
  807. if (!first)
  808. return;
  809. first = 0;
  810. for (i = 0; i < nr_ports; i++) {
  811. bfin_serial_ports[i].port.uartclk = get_sclk();
  812. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  813. bfin_serial_ports[i].port.line = i;
  814. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  815. bfin_serial_ports[i].port.membase =
  816. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  817. bfin_serial_ports[i].port.mapbase =
  818. bfin_serial_resource[i].uart_base_addr;
  819. bfin_serial_ports[i].port.irq =
  820. bfin_serial_resource[i].uart_irq;
  821. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  822. #ifdef CONFIG_SERIAL_BFIN_DMA
  823. bfin_serial_ports[i].tx_done = 1;
  824. bfin_serial_ports[i].tx_count = 0;
  825. bfin_serial_ports[i].tx_dma_channel =
  826. bfin_serial_resource[i].uart_tx_dma_channel;
  827. bfin_serial_ports[i].rx_dma_channel =
  828. bfin_serial_resource[i].uart_rx_dma_channel;
  829. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  830. #endif
  831. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  832. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  833. bfin_serial_ports[i].cts_pin =
  834. bfin_serial_resource[i].uart_cts_pin;
  835. bfin_serial_ports[i].rts_pin =
  836. bfin_serial_resource[i].uart_rts_pin;
  837. #endif
  838. bfin_serial_hw_init(&bfin_serial_ports[i]);
  839. }
  840. }
  841. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  842. /*
  843. * If the port was already initialised (eg, by a boot loader),
  844. * try to determine the current setup.
  845. */
  846. static void __init
  847. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  848. int *parity, int *bits)
  849. {
  850. unsigned short status;
  851. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  852. if (status == (ERBFI | ETBEI)) {
  853. /* ok, the port was enabled */
  854. unsigned short lcr, val;
  855. unsigned short dlh, dll;
  856. lcr = UART_GET_LCR(uart);
  857. *parity = 'n';
  858. if (lcr & PEN) {
  859. if (lcr & EPS)
  860. *parity = 'e';
  861. else
  862. *parity = 'o';
  863. }
  864. switch (lcr & 0x03) {
  865. case 0: *bits = 5; break;
  866. case 1: *bits = 6; break;
  867. case 2: *bits = 7; break;
  868. case 3: *bits = 8; break;
  869. }
  870. #ifndef CONFIG_BF54x
  871. /* Set DLAB in LCR to Access DLL and DLH */
  872. val = UART_GET_LCR(uart);
  873. val |= DLAB;
  874. UART_PUT_LCR(uart, val);
  875. #endif
  876. dll = UART_GET_DLL(uart);
  877. dlh = UART_GET_DLH(uart);
  878. #ifndef CONFIG_BF54x
  879. /* Clear DLAB in LCR to Access THR RBR IER */
  880. val = UART_GET_LCR(uart);
  881. val &= ~DLAB;
  882. UART_PUT_LCR(uart, val);
  883. #endif
  884. *baud = get_sclk() / (16*(dll | dlh << 8));
  885. }
  886. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  887. }
  888. #endif
  889. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  890. static struct uart_driver bfin_serial_reg;
  891. static int __init
  892. bfin_serial_console_setup(struct console *co, char *options)
  893. {
  894. struct bfin_serial_port *uart;
  895. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  896. int baud = 57600;
  897. int bits = 8;
  898. int parity = 'n';
  899. # ifdef CONFIG_SERIAL_BFIN_CTSRTS
  900. int flow = 'r';
  901. # else
  902. int flow = 'n';
  903. # endif
  904. # endif
  905. /*
  906. * Check whether an invalid uart number has been specified, and
  907. * if so, search for the first available port that does have
  908. * console support.
  909. */
  910. if (co->index == -1 || co->index >= nr_ports)
  911. co->index = 0;
  912. uart = &bfin_serial_ports[co->index];
  913. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  914. if (options)
  915. uart_parse_options(options, &baud, &parity, &bits, &flow);
  916. else
  917. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  918. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  919. # else
  920. return 0;
  921. # endif
  922. }
  923. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  924. defined (CONFIG_EARLY_PRINTK) */
  925. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  926. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  927. {
  928. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  929. while (!(UART_GET_LSR(uart) & THRE))
  930. barrier();
  931. UART_PUT_CHAR(uart, ch);
  932. SSYNC();
  933. }
  934. /*
  935. * Interrupts are disabled on entering
  936. */
  937. static void
  938. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  939. {
  940. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  941. int flags = 0;
  942. spin_lock_irqsave(&uart->port.lock, flags);
  943. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  944. spin_unlock_irqrestore(&uart->port.lock, flags);
  945. }
  946. static struct console bfin_serial_console = {
  947. .name = BFIN_SERIAL_NAME,
  948. .write = bfin_serial_console_write,
  949. .device = uart_console_device,
  950. .setup = bfin_serial_console_setup,
  951. .flags = CON_PRINTBUFFER,
  952. .index = -1,
  953. .data = &bfin_serial_reg,
  954. };
  955. static int __init bfin_serial_rs_console_init(void)
  956. {
  957. bfin_serial_init_ports();
  958. register_console(&bfin_serial_console);
  959. #ifdef CONFIG_KGDB_UART
  960. kgdb_entry_state = 0;
  961. init_kgdb_uart();
  962. #endif
  963. return 0;
  964. }
  965. console_initcall(bfin_serial_rs_console_init);
  966. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  967. #else
  968. #define BFIN_SERIAL_CONSOLE NULL
  969. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  970. #ifdef CONFIG_EARLY_PRINTK
  971. static __init void early_serial_putc(struct uart_port *port, int ch)
  972. {
  973. unsigned timeout = 0xffff;
  974. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  975. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  976. cpu_relax();
  977. UART_PUT_CHAR(uart, ch);
  978. }
  979. static __init void early_serial_write(struct console *con, const char *s,
  980. unsigned int n)
  981. {
  982. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  983. unsigned int i;
  984. for (i = 0; i < n; i++, s++) {
  985. if (*s == '\n')
  986. early_serial_putc(&uart->port, '\r');
  987. early_serial_putc(&uart->port, *s);
  988. }
  989. }
  990. static struct __init console bfin_early_serial_console = {
  991. .name = "early_BFuart",
  992. .write = early_serial_write,
  993. .device = uart_console_device,
  994. .flags = CON_PRINTBUFFER,
  995. .setup = bfin_serial_console_setup,
  996. .index = -1,
  997. .data = &bfin_serial_reg,
  998. };
  999. struct console __init *bfin_earlyserial_init(unsigned int port,
  1000. unsigned int cflag)
  1001. {
  1002. struct bfin_serial_port *uart;
  1003. struct ktermios t;
  1004. if (port == -1 || port >= nr_ports)
  1005. port = 0;
  1006. bfin_serial_init_ports();
  1007. bfin_early_serial_console.index = port;
  1008. uart = &bfin_serial_ports[port];
  1009. t.c_cflag = cflag;
  1010. t.c_iflag = 0;
  1011. t.c_oflag = 0;
  1012. t.c_lflag = ICANON;
  1013. t.c_line = port;
  1014. bfin_serial_set_termios(&uart->port, &t, &t);
  1015. return &bfin_early_serial_console;
  1016. }
  1017. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  1018. static struct uart_driver bfin_serial_reg = {
  1019. .owner = THIS_MODULE,
  1020. .driver_name = "bfin-uart",
  1021. .dev_name = BFIN_SERIAL_NAME,
  1022. .major = BFIN_SERIAL_MAJOR,
  1023. .minor = BFIN_SERIAL_MINOR,
  1024. .nr = BFIN_UART_NR_PORTS,
  1025. .cons = BFIN_SERIAL_CONSOLE,
  1026. };
  1027. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  1028. {
  1029. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1030. if (uart)
  1031. uart_suspend_port(&bfin_serial_reg, &uart->port);
  1032. return 0;
  1033. }
  1034. static int bfin_serial_resume(struct platform_device *dev)
  1035. {
  1036. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1037. if (uart)
  1038. uart_resume_port(&bfin_serial_reg, &uart->port);
  1039. return 0;
  1040. }
  1041. static int bfin_serial_probe(struct platform_device *dev)
  1042. {
  1043. struct resource *res = dev->resource;
  1044. int i;
  1045. for (i = 0; i < dev->num_resources; i++, res++)
  1046. if (res->flags & IORESOURCE_MEM)
  1047. break;
  1048. if (i < dev->num_resources) {
  1049. for (i = 0; i < nr_ports; i++, res++) {
  1050. if (bfin_serial_ports[i].port.mapbase != res->start)
  1051. continue;
  1052. bfin_serial_ports[i].port.dev = &dev->dev;
  1053. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1054. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  1055. }
  1056. }
  1057. return 0;
  1058. }
  1059. static int bfin_serial_remove(struct platform_device *pdev)
  1060. {
  1061. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1062. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1063. gpio_free(uart->cts_pin);
  1064. gpio_free(uart->rts_pin);
  1065. #endif
  1066. platform_set_drvdata(pdev, NULL);
  1067. if (uart)
  1068. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1069. return 0;
  1070. }
  1071. static struct platform_driver bfin_serial_driver = {
  1072. .probe = bfin_serial_probe,
  1073. .remove = bfin_serial_remove,
  1074. .suspend = bfin_serial_suspend,
  1075. .resume = bfin_serial_resume,
  1076. .driver = {
  1077. .name = "bfin-uart",
  1078. .owner = THIS_MODULE,
  1079. },
  1080. };
  1081. static int __init bfin_serial_init(void)
  1082. {
  1083. int ret;
  1084. #ifdef CONFIG_KGDB_UART
  1085. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  1086. struct ktermios t;
  1087. #endif
  1088. pr_info("Serial: Blackfin serial driver\n");
  1089. bfin_serial_init_ports();
  1090. ret = uart_register_driver(&bfin_serial_reg);
  1091. if (ret == 0) {
  1092. bfin_serial_reg.tty_driver->set_ldisc = bfin_set_ldisc;
  1093. ret = platform_driver_register(&bfin_serial_driver);
  1094. if (ret) {
  1095. pr_debug("uart register failed\n");
  1096. uart_unregister_driver(&bfin_serial_reg);
  1097. }
  1098. }
  1099. #ifdef CONFIG_KGDB_UART
  1100. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  1101. request_irq(uart->port.irq, bfin_serial_rx_int,
  1102. IRQF_DISABLED, "BFIN_UART_RX", uart);
  1103. pr_info("Request irq for kgdb uart port\n");
  1104. #ifdef CONFIG_BF54x
  1105. UART_SET_IER(uart, ERBFI);
  1106. #else
  1107. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  1108. #endif
  1109. SSYNC();
  1110. t.c_cflag = CS8|B57600;
  1111. t.c_iflag = 0;
  1112. t.c_oflag = 0;
  1113. t.c_lflag = ICANON;
  1114. t.c_line = CONFIG_KGDB_UART_PORT;
  1115. bfin_serial_set_termios(&uart->port, &t, &t);
  1116. }
  1117. #endif
  1118. return ret;
  1119. }
  1120. static void __exit bfin_serial_exit(void)
  1121. {
  1122. platform_driver_unregister(&bfin_serial_driver);
  1123. uart_unregister_driver(&bfin_serial_reg);
  1124. }
  1125. module_init(bfin_serial_init);
  1126. module_exit(bfin_serial_exit);
  1127. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1128. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1129. MODULE_LICENSE("GPL");
  1130. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
  1131. MODULE_ALIAS("platform:bfin-uart");