atmel_serial.c 38 KB

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  1. /*
  2. * linux/drivers/char/atmel_serial.c
  3. *
  4. * Driver for Atmel AT91 / AT32 Serial ports
  5. * Copyright (C) 2003 Rick Bronson
  6. *
  7. * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
  8. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  9. *
  10. * DMA support added by Chip Coldwell.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/tty.h>
  29. #include <linux/ioport.h>
  30. #include <linux/slab.h>
  31. #include <linux/init.h>
  32. #include <linux/serial.h>
  33. #include <linux/clk.h>
  34. #include <linux/console.h>
  35. #include <linux/sysrq.h>
  36. #include <linux/tty_flip.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/atmel_pdc.h>
  40. #include <linux/atmel_serial.h>
  41. #include <asm/io.h>
  42. #include <asm/mach/serial_at91.h>
  43. #include <asm/arch/board.h>
  44. #ifdef CONFIG_ARM
  45. #include <asm/arch/cpu.h>
  46. #include <asm/arch/gpio.h>
  47. #endif
  48. #define PDC_BUFFER_SIZE 512
  49. /* Revisit: We should calculate this based on the actual port settings */
  50. #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
  51. #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  52. #define SUPPORT_SYSRQ
  53. #endif
  54. #include <linux/serial_core.h>
  55. #ifdef CONFIG_SERIAL_ATMEL_TTYAT
  56. /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
  57. * should coexist with the 8250 driver, such as if we have an external 16C550
  58. * UART. */
  59. #define SERIAL_ATMEL_MAJOR 204
  60. #define MINOR_START 154
  61. #define ATMEL_DEVICENAME "ttyAT"
  62. #else
  63. /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
  64. * name, but it is legally reserved for the 8250 driver. */
  65. #define SERIAL_ATMEL_MAJOR TTY_MAJOR
  66. #define MINOR_START 64
  67. #define ATMEL_DEVICENAME "ttyS"
  68. #endif
  69. #define ATMEL_ISR_PASS_LIMIT 256
  70. /* UART registers. CR is write-only, hence no GET macro */
  71. #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
  72. #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
  73. #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
  74. #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
  75. #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
  76. #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
  77. #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
  78. #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
  79. #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
  80. #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
  81. #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
  82. #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
  83. /* PDC registers */
  84. #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
  85. #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
  86. #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
  87. #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
  88. #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
  89. #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
  90. #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
  91. #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
  92. #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
  93. #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
  94. #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
  95. static int (*atmel_open_hook)(struct uart_port *);
  96. static void (*atmel_close_hook)(struct uart_port *);
  97. struct atmel_dma_buffer {
  98. unsigned char *buf;
  99. dma_addr_t dma_addr;
  100. unsigned int dma_size;
  101. unsigned int ofs;
  102. };
  103. struct atmel_uart_char {
  104. u16 status;
  105. u16 ch;
  106. };
  107. #define ATMEL_SERIAL_RINGSIZE 1024
  108. /*
  109. * We wrap our port structure around the generic uart_port.
  110. */
  111. struct atmel_uart_port {
  112. struct uart_port uart; /* uart */
  113. struct clk *clk; /* uart clock */
  114. unsigned short suspended; /* is port suspended? */
  115. int break_active; /* break being received */
  116. short use_dma_rx; /* enable PDC receiver */
  117. short pdc_rx_idx; /* current PDC RX buffer */
  118. struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
  119. short use_dma_tx; /* enable PDC transmitter */
  120. struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
  121. struct tasklet_struct tasklet;
  122. unsigned int irq_status;
  123. unsigned int irq_status_prev;
  124. struct circ_buf rx_ring;
  125. };
  126. static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
  127. #ifdef SUPPORT_SYSRQ
  128. static struct console atmel_console;
  129. #endif
  130. static inline struct atmel_uart_port *
  131. to_atmel_uart_port(struct uart_port *uart)
  132. {
  133. return container_of(uart, struct atmel_uart_port, uart);
  134. }
  135. #ifdef CONFIG_SERIAL_ATMEL_PDC
  136. static bool atmel_use_dma_rx(struct uart_port *port)
  137. {
  138. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  139. return atmel_port->use_dma_rx;
  140. }
  141. static bool atmel_use_dma_tx(struct uart_port *port)
  142. {
  143. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  144. return atmel_port->use_dma_tx;
  145. }
  146. #else
  147. static bool atmel_use_dma_rx(struct uart_port *port)
  148. {
  149. return false;
  150. }
  151. static bool atmel_use_dma_tx(struct uart_port *port)
  152. {
  153. return false;
  154. }
  155. #endif
  156. /*
  157. * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
  158. */
  159. static u_int atmel_tx_empty(struct uart_port *port)
  160. {
  161. return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
  162. }
  163. /*
  164. * Set state of the modem control output lines
  165. */
  166. static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
  167. {
  168. unsigned int control = 0;
  169. unsigned int mode;
  170. #ifdef CONFIG_ARCH_AT91RM9200
  171. if (cpu_is_at91rm9200()) {
  172. /*
  173. * AT91RM9200 Errata #39: RTS0 is not internally connected
  174. * to PA21. We need to drive the pin manually.
  175. */
  176. if (port->mapbase == AT91RM9200_BASE_US0) {
  177. if (mctrl & TIOCM_RTS)
  178. at91_set_gpio_value(AT91_PIN_PA21, 0);
  179. else
  180. at91_set_gpio_value(AT91_PIN_PA21, 1);
  181. }
  182. }
  183. #endif
  184. if (mctrl & TIOCM_RTS)
  185. control |= ATMEL_US_RTSEN;
  186. else
  187. control |= ATMEL_US_RTSDIS;
  188. if (mctrl & TIOCM_DTR)
  189. control |= ATMEL_US_DTREN;
  190. else
  191. control |= ATMEL_US_DTRDIS;
  192. UART_PUT_CR(port, control);
  193. /* Local loopback mode? */
  194. mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
  195. if (mctrl & TIOCM_LOOP)
  196. mode |= ATMEL_US_CHMODE_LOC_LOOP;
  197. else
  198. mode |= ATMEL_US_CHMODE_NORMAL;
  199. UART_PUT_MR(port, mode);
  200. }
  201. /*
  202. * Get state of the modem control input lines
  203. */
  204. static u_int atmel_get_mctrl(struct uart_port *port)
  205. {
  206. unsigned int status, ret = 0;
  207. status = UART_GET_CSR(port);
  208. /*
  209. * The control signals are active low.
  210. */
  211. if (!(status & ATMEL_US_DCD))
  212. ret |= TIOCM_CD;
  213. if (!(status & ATMEL_US_CTS))
  214. ret |= TIOCM_CTS;
  215. if (!(status & ATMEL_US_DSR))
  216. ret |= TIOCM_DSR;
  217. if (!(status & ATMEL_US_RI))
  218. ret |= TIOCM_RI;
  219. return ret;
  220. }
  221. /*
  222. * Stop transmitting.
  223. */
  224. static void atmel_stop_tx(struct uart_port *port)
  225. {
  226. if (atmel_use_dma_tx(port)) {
  227. /* disable PDC transmit */
  228. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  229. UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  230. } else
  231. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  232. }
  233. /*
  234. * Start transmitting.
  235. */
  236. static void atmel_start_tx(struct uart_port *port)
  237. {
  238. if (atmel_use_dma_tx(port)) {
  239. if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
  240. /* The transmitter is already running. Yes, we
  241. really need this.*/
  242. return;
  243. UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  244. /* re-enable PDC transmit */
  245. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  246. } else
  247. UART_PUT_IER(port, ATMEL_US_TXRDY);
  248. }
  249. /*
  250. * Stop receiving - port is in process of being closed.
  251. */
  252. static void atmel_stop_rx(struct uart_port *port)
  253. {
  254. if (atmel_use_dma_rx(port)) {
  255. /* disable PDC receive */
  256. UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
  257. UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  258. } else
  259. UART_PUT_IDR(port, ATMEL_US_RXRDY);
  260. }
  261. /*
  262. * Enable modem status interrupts
  263. */
  264. static void atmel_enable_ms(struct uart_port *port)
  265. {
  266. UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
  267. | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
  268. }
  269. /*
  270. * Control the transmission of a break signal
  271. */
  272. static void atmel_break_ctl(struct uart_port *port, int break_state)
  273. {
  274. if (break_state != 0)
  275. UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
  276. else
  277. UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
  278. }
  279. /*
  280. * Stores the incoming character in the ring buffer
  281. */
  282. static void
  283. atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
  284. unsigned int ch)
  285. {
  286. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  287. struct circ_buf *ring = &atmel_port->rx_ring;
  288. struct atmel_uart_char *c;
  289. if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
  290. /* Buffer overflow, ignore char */
  291. return;
  292. c = &((struct atmel_uart_char *)ring->buf)[ring->head];
  293. c->status = status;
  294. c->ch = ch;
  295. /* Make sure the character is stored before we update head. */
  296. smp_wmb();
  297. ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  298. }
  299. /*
  300. * Deal with parity, framing and overrun errors.
  301. */
  302. static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
  303. {
  304. /* clear error */
  305. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  306. if (status & ATMEL_US_RXBRK) {
  307. /* ignore side-effect */
  308. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  309. port->icount.brk++;
  310. }
  311. if (status & ATMEL_US_PARE)
  312. port->icount.parity++;
  313. if (status & ATMEL_US_FRAME)
  314. port->icount.frame++;
  315. if (status & ATMEL_US_OVRE)
  316. port->icount.overrun++;
  317. }
  318. /*
  319. * Characters received (called from interrupt handler)
  320. */
  321. static void atmel_rx_chars(struct uart_port *port)
  322. {
  323. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  324. unsigned int status, ch;
  325. status = UART_GET_CSR(port);
  326. while (status & ATMEL_US_RXRDY) {
  327. ch = UART_GET_CHAR(port);
  328. /*
  329. * note that the error handling code is
  330. * out of the main execution path
  331. */
  332. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  333. | ATMEL_US_OVRE | ATMEL_US_RXBRK)
  334. || atmel_port->break_active)) {
  335. /* clear error */
  336. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  337. if (status & ATMEL_US_RXBRK
  338. && !atmel_port->break_active) {
  339. atmel_port->break_active = 1;
  340. UART_PUT_IER(port, ATMEL_US_RXBRK);
  341. } else {
  342. /*
  343. * This is either the end-of-break
  344. * condition or we've received at
  345. * least one character without RXBRK
  346. * being set. In both cases, the next
  347. * RXBRK will indicate start-of-break.
  348. */
  349. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  350. status &= ~ATMEL_US_RXBRK;
  351. atmel_port->break_active = 0;
  352. }
  353. }
  354. atmel_buffer_rx_char(port, status, ch);
  355. status = UART_GET_CSR(port);
  356. }
  357. tasklet_schedule(&atmel_port->tasklet);
  358. }
  359. /*
  360. * Transmit characters (called from tasklet with TXRDY interrupt
  361. * disabled)
  362. */
  363. static void atmel_tx_chars(struct uart_port *port)
  364. {
  365. struct circ_buf *xmit = &port->info->xmit;
  366. if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  367. UART_PUT_CHAR(port, port->x_char);
  368. port->icount.tx++;
  369. port->x_char = 0;
  370. }
  371. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  372. return;
  373. while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  374. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  375. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  376. port->icount.tx++;
  377. if (uart_circ_empty(xmit))
  378. break;
  379. }
  380. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  381. uart_write_wakeup(port);
  382. if (!uart_circ_empty(xmit))
  383. UART_PUT_IER(port, ATMEL_US_TXRDY);
  384. }
  385. /*
  386. * receive interrupt handler.
  387. */
  388. static void
  389. atmel_handle_receive(struct uart_port *port, unsigned int pending)
  390. {
  391. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  392. if (atmel_use_dma_rx(port)) {
  393. /*
  394. * PDC receive. Just schedule the tasklet and let it
  395. * figure out the details.
  396. *
  397. * TODO: We're not handling error flags correctly at
  398. * the moment.
  399. */
  400. if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
  401. UART_PUT_IDR(port, (ATMEL_US_ENDRX
  402. | ATMEL_US_TIMEOUT));
  403. tasklet_schedule(&atmel_port->tasklet);
  404. }
  405. if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
  406. ATMEL_US_FRAME | ATMEL_US_PARE))
  407. atmel_pdc_rxerr(port, pending);
  408. }
  409. /* Interrupt receive */
  410. if (pending & ATMEL_US_RXRDY)
  411. atmel_rx_chars(port);
  412. else if (pending & ATMEL_US_RXBRK) {
  413. /*
  414. * End of break detected. If it came along with a
  415. * character, atmel_rx_chars will handle it.
  416. */
  417. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  418. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  419. atmel_port->break_active = 0;
  420. }
  421. }
  422. /*
  423. * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
  424. */
  425. static void
  426. atmel_handle_transmit(struct uart_port *port, unsigned int pending)
  427. {
  428. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  429. if (atmel_use_dma_tx(port)) {
  430. /* PDC transmit */
  431. if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
  432. UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  433. tasklet_schedule(&atmel_port->tasklet);
  434. }
  435. } else {
  436. /* Interrupt transmit */
  437. if (pending & ATMEL_US_TXRDY) {
  438. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  439. tasklet_schedule(&atmel_port->tasklet);
  440. }
  441. }
  442. }
  443. /*
  444. * status flags interrupt handler.
  445. */
  446. static void
  447. atmel_handle_status(struct uart_port *port, unsigned int pending,
  448. unsigned int status)
  449. {
  450. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  451. if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
  452. | ATMEL_US_CTSIC)) {
  453. atmel_port->irq_status = status;
  454. tasklet_schedule(&atmel_port->tasklet);
  455. }
  456. }
  457. /*
  458. * Interrupt handler
  459. */
  460. static irqreturn_t atmel_interrupt(int irq, void *dev_id)
  461. {
  462. struct uart_port *port = dev_id;
  463. unsigned int status, pending, pass_counter = 0;
  464. do {
  465. status = UART_GET_CSR(port);
  466. pending = status & UART_GET_IMR(port);
  467. if (!pending)
  468. break;
  469. atmel_handle_receive(port, pending);
  470. atmel_handle_status(port, pending, status);
  471. atmel_handle_transmit(port, pending);
  472. } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
  473. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  474. }
  475. /*
  476. * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
  477. */
  478. static void atmel_tx_dma(struct uart_port *port)
  479. {
  480. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  481. struct circ_buf *xmit = &port->info->xmit;
  482. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  483. int count;
  484. /* nothing left to transmit? */
  485. if (UART_GET_TCR(port))
  486. return;
  487. xmit->tail += pdc->ofs;
  488. xmit->tail &= UART_XMIT_SIZE - 1;
  489. port->icount.tx += pdc->ofs;
  490. pdc->ofs = 0;
  491. /* more to transmit - setup next transfer */
  492. /* disable PDC transmit */
  493. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  494. if (!uart_circ_empty(xmit)) {
  495. dma_sync_single_for_device(port->dev,
  496. pdc->dma_addr,
  497. pdc->dma_size,
  498. DMA_TO_DEVICE);
  499. count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  500. pdc->ofs = count;
  501. UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
  502. UART_PUT_TCR(port, count);
  503. /* re-enable PDC transmit and interrupts */
  504. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  505. UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  506. }
  507. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  508. uart_write_wakeup(port);
  509. }
  510. static void atmel_rx_from_ring(struct uart_port *port)
  511. {
  512. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  513. struct circ_buf *ring = &atmel_port->rx_ring;
  514. unsigned int flg;
  515. unsigned int status;
  516. while (ring->head != ring->tail) {
  517. struct atmel_uart_char c;
  518. /* Make sure c is loaded after head. */
  519. smp_rmb();
  520. c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
  521. ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  522. port->icount.rx++;
  523. status = c.status;
  524. flg = TTY_NORMAL;
  525. /*
  526. * note that the error handling code is
  527. * out of the main execution path
  528. */
  529. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  530. | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
  531. if (status & ATMEL_US_RXBRK) {
  532. /* ignore side-effect */
  533. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  534. port->icount.brk++;
  535. if (uart_handle_break(port))
  536. continue;
  537. }
  538. if (status & ATMEL_US_PARE)
  539. port->icount.parity++;
  540. if (status & ATMEL_US_FRAME)
  541. port->icount.frame++;
  542. if (status & ATMEL_US_OVRE)
  543. port->icount.overrun++;
  544. status &= port->read_status_mask;
  545. if (status & ATMEL_US_RXBRK)
  546. flg = TTY_BREAK;
  547. else if (status & ATMEL_US_PARE)
  548. flg = TTY_PARITY;
  549. else if (status & ATMEL_US_FRAME)
  550. flg = TTY_FRAME;
  551. }
  552. if (uart_handle_sysrq_char(port, c.ch))
  553. continue;
  554. uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
  555. }
  556. /*
  557. * Drop the lock here since it might end up calling
  558. * uart_start(), which takes the lock.
  559. */
  560. spin_unlock(&port->lock);
  561. tty_flip_buffer_push(port->info->tty);
  562. spin_lock(&port->lock);
  563. }
  564. static void atmel_rx_from_dma(struct uart_port *port)
  565. {
  566. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  567. struct tty_struct *tty = port->info->tty;
  568. struct atmel_dma_buffer *pdc;
  569. int rx_idx = atmel_port->pdc_rx_idx;
  570. unsigned int head;
  571. unsigned int tail;
  572. unsigned int count;
  573. do {
  574. /* Reset the UART timeout early so that we don't miss one */
  575. UART_PUT_CR(port, ATMEL_US_STTTO);
  576. pdc = &atmel_port->pdc_rx[rx_idx];
  577. head = UART_GET_RPR(port) - pdc->dma_addr;
  578. tail = pdc->ofs;
  579. /* If the PDC has switched buffers, RPR won't contain
  580. * any address within the current buffer. Since head
  581. * is unsigned, we just need a one-way comparison to
  582. * find out.
  583. *
  584. * In this case, we just need to consume the entire
  585. * buffer and resubmit it for DMA. This will clear the
  586. * ENDRX bit as well, so that we can safely re-enable
  587. * all interrupts below.
  588. */
  589. head = min(head, pdc->dma_size);
  590. if (likely(head != tail)) {
  591. dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
  592. pdc->dma_size, DMA_FROM_DEVICE);
  593. /*
  594. * head will only wrap around when we recycle
  595. * the DMA buffer, and when that happens, we
  596. * explicitly set tail to 0. So head will
  597. * always be greater than tail.
  598. */
  599. count = head - tail;
  600. tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
  601. dma_sync_single_for_device(port->dev, pdc->dma_addr,
  602. pdc->dma_size, DMA_FROM_DEVICE);
  603. port->icount.rx += count;
  604. pdc->ofs = head;
  605. }
  606. /*
  607. * If the current buffer is full, we need to check if
  608. * the next one contains any additional data.
  609. */
  610. if (head >= pdc->dma_size) {
  611. pdc->ofs = 0;
  612. UART_PUT_RNPR(port, pdc->dma_addr);
  613. UART_PUT_RNCR(port, pdc->dma_size);
  614. rx_idx = !rx_idx;
  615. atmel_port->pdc_rx_idx = rx_idx;
  616. }
  617. } while (head >= pdc->dma_size);
  618. /*
  619. * Drop the lock here since it might end up calling
  620. * uart_start(), which takes the lock.
  621. */
  622. spin_unlock(&port->lock);
  623. tty_flip_buffer_push(tty);
  624. spin_lock(&port->lock);
  625. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  626. }
  627. /*
  628. * tasklet handling tty stuff outside the interrupt handler.
  629. */
  630. static void atmel_tasklet_func(unsigned long data)
  631. {
  632. struct uart_port *port = (struct uart_port *)data;
  633. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  634. unsigned int status;
  635. unsigned int status_change;
  636. /* The interrupt handler does not take the lock */
  637. spin_lock(&port->lock);
  638. if (atmel_use_dma_tx(port))
  639. atmel_tx_dma(port);
  640. else
  641. atmel_tx_chars(port);
  642. status = atmel_port->irq_status;
  643. status_change = status ^ atmel_port->irq_status_prev;
  644. if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
  645. | ATMEL_US_DCD | ATMEL_US_CTS)) {
  646. /* TODO: All reads to CSR will clear these interrupts! */
  647. if (status_change & ATMEL_US_RI)
  648. port->icount.rng++;
  649. if (status_change & ATMEL_US_DSR)
  650. port->icount.dsr++;
  651. if (status_change & ATMEL_US_DCD)
  652. uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
  653. if (status_change & ATMEL_US_CTS)
  654. uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
  655. wake_up_interruptible(&port->info->delta_msr_wait);
  656. atmel_port->irq_status_prev = status;
  657. }
  658. if (atmel_use_dma_rx(port))
  659. atmel_rx_from_dma(port);
  660. else
  661. atmel_rx_from_ring(port);
  662. spin_unlock(&port->lock);
  663. }
  664. /*
  665. * Perform initialization and enable port for reception
  666. */
  667. static int atmel_startup(struct uart_port *port)
  668. {
  669. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  670. struct tty_struct *tty = port->info->tty;
  671. int retval;
  672. /*
  673. * Ensure that no interrupts are enabled otherwise when
  674. * request_irq() is called we could get stuck trying to
  675. * handle an unexpected interrupt
  676. */
  677. UART_PUT_IDR(port, -1);
  678. /*
  679. * Allocate the IRQ
  680. */
  681. retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
  682. tty ? tty->name : "atmel_serial", port);
  683. if (retval) {
  684. printk("atmel_serial: atmel_startup - Can't get irq\n");
  685. return retval;
  686. }
  687. /*
  688. * Initialize DMA (if necessary)
  689. */
  690. if (atmel_use_dma_rx(port)) {
  691. int i;
  692. for (i = 0; i < 2; i++) {
  693. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  694. pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
  695. if (pdc->buf == NULL) {
  696. if (i != 0) {
  697. dma_unmap_single(port->dev,
  698. atmel_port->pdc_rx[0].dma_addr,
  699. PDC_BUFFER_SIZE,
  700. DMA_FROM_DEVICE);
  701. kfree(atmel_port->pdc_rx[0].buf);
  702. }
  703. free_irq(port->irq, port);
  704. return -ENOMEM;
  705. }
  706. pdc->dma_addr = dma_map_single(port->dev,
  707. pdc->buf,
  708. PDC_BUFFER_SIZE,
  709. DMA_FROM_DEVICE);
  710. pdc->dma_size = PDC_BUFFER_SIZE;
  711. pdc->ofs = 0;
  712. }
  713. atmel_port->pdc_rx_idx = 0;
  714. UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
  715. UART_PUT_RCR(port, PDC_BUFFER_SIZE);
  716. UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
  717. UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
  718. }
  719. if (atmel_use_dma_tx(port)) {
  720. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  721. struct circ_buf *xmit = &port->info->xmit;
  722. pdc->buf = xmit->buf;
  723. pdc->dma_addr = dma_map_single(port->dev,
  724. pdc->buf,
  725. UART_XMIT_SIZE,
  726. DMA_TO_DEVICE);
  727. pdc->dma_size = UART_XMIT_SIZE;
  728. pdc->ofs = 0;
  729. }
  730. /*
  731. * If there is a specific "open" function (to register
  732. * control line interrupts)
  733. */
  734. if (atmel_open_hook) {
  735. retval = atmel_open_hook(port);
  736. if (retval) {
  737. free_irq(port->irq, port);
  738. return retval;
  739. }
  740. }
  741. /*
  742. * Finally, enable the serial port
  743. */
  744. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  745. /* enable xmit & rcvr */
  746. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  747. if (atmel_use_dma_rx(port)) {
  748. /* set UART timeout */
  749. UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
  750. UART_PUT_CR(port, ATMEL_US_STTTO);
  751. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  752. /* enable PDC controller */
  753. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  754. } else {
  755. /* enable receive only */
  756. UART_PUT_IER(port, ATMEL_US_RXRDY);
  757. }
  758. return 0;
  759. }
  760. /*
  761. * Disable the port
  762. */
  763. static void atmel_shutdown(struct uart_port *port)
  764. {
  765. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  766. /*
  767. * Ensure everything is stopped.
  768. */
  769. atmel_stop_rx(port);
  770. atmel_stop_tx(port);
  771. /*
  772. * Shut-down the DMA.
  773. */
  774. if (atmel_use_dma_rx(port)) {
  775. int i;
  776. for (i = 0; i < 2; i++) {
  777. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  778. dma_unmap_single(port->dev,
  779. pdc->dma_addr,
  780. pdc->dma_size,
  781. DMA_FROM_DEVICE);
  782. kfree(pdc->buf);
  783. }
  784. }
  785. if (atmel_use_dma_tx(port)) {
  786. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  787. dma_unmap_single(port->dev,
  788. pdc->dma_addr,
  789. pdc->dma_size,
  790. DMA_TO_DEVICE);
  791. }
  792. /*
  793. * Disable all interrupts, port and break condition.
  794. */
  795. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  796. UART_PUT_IDR(port, -1);
  797. /*
  798. * Free the interrupt
  799. */
  800. free_irq(port->irq, port);
  801. /*
  802. * If there is a specific "close" function (to unregister
  803. * control line interrupts)
  804. */
  805. if (atmel_close_hook)
  806. atmel_close_hook(port);
  807. }
  808. /*
  809. * Power / Clock management.
  810. */
  811. static void atmel_serial_pm(struct uart_port *port, unsigned int state,
  812. unsigned int oldstate)
  813. {
  814. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  815. switch (state) {
  816. case 0:
  817. /*
  818. * Enable the peripheral clock for this serial port.
  819. * This is called on uart_open() or a resume event.
  820. */
  821. clk_enable(atmel_port->clk);
  822. break;
  823. case 3:
  824. /*
  825. * Disable the peripheral clock for this serial port.
  826. * This is called on uart_close() or a suspend event.
  827. */
  828. clk_disable(atmel_port->clk);
  829. break;
  830. default:
  831. printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
  832. }
  833. }
  834. /*
  835. * Change the port parameters
  836. */
  837. static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
  838. struct ktermios *old)
  839. {
  840. unsigned long flags;
  841. unsigned int mode, imr, quot, baud;
  842. /* Get current mode register */
  843. mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
  844. | ATMEL_US_NBSTOP | ATMEL_US_PAR);
  845. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  846. quot = uart_get_divisor(port, baud);
  847. if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
  848. quot /= 8;
  849. mode |= ATMEL_US_USCLKS_MCK_DIV8;
  850. }
  851. /* byte size */
  852. switch (termios->c_cflag & CSIZE) {
  853. case CS5:
  854. mode |= ATMEL_US_CHRL_5;
  855. break;
  856. case CS6:
  857. mode |= ATMEL_US_CHRL_6;
  858. break;
  859. case CS7:
  860. mode |= ATMEL_US_CHRL_7;
  861. break;
  862. default:
  863. mode |= ATMEL_US_CHRL_8;
  864. break;
  865. }
  866. /* stop bits */
  867. if (termios->c_cflag & CSTOPB)
  868. mode |= ATMEL_US_NBSTOP_2;
  869. /* parity */
  870. if (termios->c_cflag & PARENB) {
  871. /* Mark or Space parity */
  872. if (termios->c_cflag & CMSPAR) {
  873. if (termios->c_cflag & PARODD)
  874. mode |= ATMEL_US_PAR_MARK;
  875. else
  876. mode |= ATMEL_US_PAR_SPACE;
  877. } else if (termios->c_cflag & PARODD)
  878. mode |= ATMEL_US_PAR_ODD;
  879. else
  880. mode |= ATMEL_US_PAR_EVEN;
  881. } else
  882. mode |= ATMEL_US_PAR_NONE;
  883. spin_lock_irqsave(&port->lock, flags);
  884. port->read_status_mask = ATMEL_US_OVRE;
  885. if (termios->c_iflag & INPCK)
  886. port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  887. if (termios->c_iflag & (BRKINT | PARMRK))
  888. port->read_status_mask |= ATMEL_US_RXBRK;
  889. if (atmel_use_dma_rx(port))
  890. /* need to enable error interrupts */
  891. UART_PUT_IER(port, port->read_status_mask);
  892. /*
  893. * Characters to ignore
  894. */
  895. port->ignore_status_mask = 0;
  896. if (termios->c_iflag & IGNPAR)
  897. port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  898. if (termios->c_iflag & IGNBRK) {
  899. port->ignore_status_mask |= ATMEL_US_RXBRK;
  900. /*
  901. * If we're ignoring parity and break indicators,
  902. * ignore overruns too (for real raw support).
  903. */
  904. if (termios->c_iflag & IGNPAR)
  905. port->ignore_status_mask |= ATMEL_US_OVRE;
  906. }
  907. /* TODO: Ignore all characters if CREAD is set.*/
  908. /* update the per-port timeout */
  909. uart_update_timeout(port, termios->c_cflag, baud);
  910. /* save/disable interrupts and drain transmitter */
  911. imr = UART_GET_IMR(port);
  912. UART_PUT_IDR(port, -1);
  913. while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
  914. cpu_relax();
  915. /* disable receiver and transmitter */
  916. UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
  917. /* set the parity, stop bits and data size */
  918. UART_PUT_MR(port, mode);
  919. /* set the baud rate */
  920. UART_PUT_BRGR(port, quot);
  921. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  922. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  923. /* restore interrupts */
  924. UART_PUT_IER(port, imr);
  925. /* CTS flow-control and modem-status interrupts */
  926. if (UART_ENABLE_MS(port, termios->c_cflag))
  927. port->ops->enable_ms(port);
  928. spin_unlock_irqrestore(&port->lock, flags);
  929. }
  930. /*
  931. * Return string describing the specified port
  932. */
  933. static const char *atmel_type(struct uart_port *port)
  934. {
  935. return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
  936. }
  937. /*
  938. * Release the memory region(s) being used by 'port'.
  939. */
  940. static void atmel_release_port(struct uart_port *port)
  941. {
  942. struct platform_device *pdev = to_platform_device(port->dev);
  943. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  944. release_mem_region(port->mapbase, size);
  945. if (port->flags & UPF_IOREMAP) {
  946. iounmap(port->membase);
  947. port->membase = NULL;
  948. }
  949. }
  950. /*
  951. * Request the memory region(s) being used by 'port'.
  952. */
  953. static int atmel_request_port(struct uart_port *port)
  954. {
  955. struct platform_device *pdev = to_platform_device(port->dev);
  956. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  957. if (!request_mem_region(port->mapbase, size, "atmel_serial"))
  958. return -EBUSY;
  959. if (port->flags & UPF_IOREMAP) {
  960. port->membase = ioremap(port->mapbase, size);
  961. if (port->membase == NULL) {
  962. release_mem_region(port->mapbase, size);
  963. return -ENOMEM;
  964. }
  965. }
  966. return 0;
  967. }
  968. /*
  969. * Configure/autoconfigure the port.
  970. */
  971. static void atmel_config_port(struct uart_port *port, int flags)
  972. {
  973. if (flags & UART_CONFIG_TYPE) {
  974. port->type = PORT_ATMEL;
  975. atmel_request_port(port);
  976. }
  977. }
  978. /*
  979. * Verify the new serial_struct (for TIOCSSERIAL).
  980. */
  981. static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
  982. {
  983. int ret = 0;
  984. if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
  985. ret = -EINVAL;
  986. if (port->irq != ser->irq)
  987. ret = -EINVAL;
  988. if (ser->io_type != SERIAL_IO_MEM)
  989. ret = -EINVAL;
  990. if (port->uartclk / 16 != ser->baud_base)
  991. ret = -EINVAL;
  992. if ((void *)port->mapbase != ser->iomem_base)
  993. ret = -EINVAL;
  994. if (port->iobase != ser->port)
  995. ret = -EINVAL;
  996. if (ser->hub6 != 0)
  997. ret = -EINVAL;
  998. return ret;
  999. }
  1000. static struct uart_ops atmel_pops = {
  1001. .tx_empty = atmel_tx_empty,
  1002. .set_mctrl = atmel_set_mctrl,
  1003. .get_mctrl = atmel_get_mctrl,
  1004. .stop_tx = atmel_stop_tx,
  1005. .start_tx = atmel_start_tx,
  1006. .stop_rx = atmel_stop_rx,
  1007. .enable_ms = atmel_enable_ms,
  1008. .break_ctl = atmel_break_ctl,
  1009. .startup = atmel_startup,
  1010. .shutdown = atmel_shutdown,
  1011. .set_termios = atmel_set_termios,
  1012. .type = atmel_type,
  1013. .release_port = atmel_release_port,
  1014. .request_port = atmel_request_port,
  1015. .config_port = atmel_config_port,
  1016. .verify_port = atmel_verify_port,
  1017. .pm = atmel_serial_pm,
  1018. };
  1019. /*
  1020. * Configure the port from the platform device resource info.
  1021. */
  1022. static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
  1023. struct platform_device *pdev)
  1024. {
  1025. struct uart_port *port = &atmel_port->uart;
  1026. struct atmel_uart_data *data = pdev->dev.platform_data;
  1027. port->iotype = UPIO_MEM;
  1028. port->flags = UPF_BOOT_AUTOCONF;
  1029. port->ops = &atmel_pops;
  1030. port->fifosize = 1;
  1031. port->line = pdev->id;
  1032. port->dev = &pdev->dev;
  1033. port->mapbase = pdev->resource[0].start;
  1034. port->irq = pdev->resource[1].start;
  1035. tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
  1036. (unsigned long)port);
  1037. memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
  1038. if (data->regs)
  1039. /* Already mapped by setup code */
  1040. port->membase = data->regs;
  1041. else {
  1042. port->flags |= UPF_IOREMAP;
  1043. port->membase = NULL;
  1044. }
  1045. /* for console, the clock could already be configured */
  1046. if (!atmel_port->clk) {
  1047. atmel_port->clk = clk_get(&pdev->dev, "usart");
  1048. clk_enable(atmel_port->clk);
  1049. port->uartclk = clk_get_rate(atmel_port->clk);
  1050. }
  1051. atmel_port->use_dma_rx = data->use_dma_rx;
  1052. atmel_port->use_dma_tx = data->use_dma_tx;
  1053. if (atmel_use_dma_tx(port))
  1054. port->fifosize = PDC_BUFFER_SIZE;
  1055. }
  1056. /*
  1057. * Register board-specific modem-control line handlers.
  1058. */
  1059. void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
  1060. {
  1061. if (fns->enable_ms)
  1062. atmel_pops.enable_ms = fns->enable_ms;
  1063. if (fns->get_mctrl)
  1064. atmel_pops.get_mctrl = fns->get_mctrl;
  1065. if (fns->set_mctrl)
  1066. atmel_pops.set_mctrl = fns->set_mctrl;
  1067. atmel_open_hook = fns->open;
  1068. atmel_close_hook = fns->close;
  1069. atmel_pops.pm = fns->pm;
  1070. atmel_pops.set_wake = fns->set_wake;
  1071. }
  1072. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1073. static void atmel_console_putchar(struct uart_port *port, int ch)
  1074. {
  1075. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1076. cpu_relax();
  1077. UART_PUT_CHAR(port, ch);
  1078. }
  1079. /*
  1080. * Interrupts are disabled on entering
  1081. */
  1082. static void atmel_console_write(struct console *co, const char *s, u_int count)
  1083. {
  1084. struct uart_port *port = &atmel_ports[co->index].uart;
  1085. unsigned int status, imr;
  1086. unsigned int pdc_tx;
  1087. /*
  1088. * First, save IMR and then disable interrupts
  1089. */
  1090. imr = UART_GET_IMR(port);
  1091. UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
  1092. /* Store PDC transmit status and disable it */
  1093. pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
  1094. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  1095. uart_console_write(port, s, count, atmel_console_putchar);
  1096. /*
  1097. * Finally, wait for transmitter to become empty
  1098. * and restore IMR
  1099. */
  1100. do {
  1101. status = UART_GET_CSR(port);
  1102. } while (!(status & ATMEL_US_TXRDY));
  1103. /* Restore PDC transmit status */
  1104. if (pdc_tx)
  1105. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  1106. /* set interrupts back the way they were */
  1107. UART_PUT_IER(port, imr);
  1108. }
  1109. /*
  1110. * If the port was already initialised (eg, by a boot loader),
  1111. * try to determine the current setup.
  1112. */
  1113. static void __init atmel_console_get_options(struct uart_port *port, int *baud,
  1114. int *parity, int *bits)
  1115. {
  1116. unsigned int mr, quot;
  1117. /*
  1118. * If the baud rate generator isn't running, the port wasn't
  1119. * initialized by the boot loader.
  1120. */
  1121. quot = UART_GET_BRGR(port);
  1122. if (!quot)
  1123. return;
  1124. mr = UART_GET_MR(port) & ATMEL_US_CHRL;
  1125. if (mr == ATMEL_US_CHRL_8)
  1126. *bits = 8;
  1127. else
  1128. *bits = 7;
  1129. mr = UART_GET_MR(port) & ATMEL_US_PAR;
  1130. if (mr == ATMEL_US_PAR_EVEN)
  1131. *parity = 'e';
  1132. else if (mr == ATMEL_US_PAR_ODD)
  1133. *parity = 'o';
  1134. /*
  1135. * The serial core only rounds down when matching this to a
  1136. * supported baud rate. Make sure we don't end up slightly
  1137. * lower than one of those, as it would make us fall through
  1138. * to a much lower baud rate than we really want.
  1139. */
  1140. *baud = port->uartclk / (16 * (quot - 1));
  1141. }
  1142. static int __init atmel_console_setup(struct console *co, char *options)
  1143. {
  1144. struct uart_port *port = &atmel_ports[co->index].uart;
  1145. int baud = 115200;
  1146. int bits = 8;
  1147. int parity = 'n';
  1148. int flow = 'n';
  1149. if (port->membase == NULL) {
  1150. /* Port not initialized yet - delay setup */
  1151. return -ENODEV;
  1152. }
  1153. UART_PUT_IDR(port, -1);
  1154. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1155. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1156. if (options)
  1157. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1158. else
  1159. atmel_console_get_options(port, &baud, &parity, &bits);
  1160. return uart_set_options(port, co, baud, parity, bits, flow);
  1161. }
  1162. static struct uart_driver atmel_uart;
  1163. static struct console atmel_console = {
  1164. .name = ATMEL_DEVICENAME,
  1165. .write = atmel_console_write,
  1166. .device = uart_console_device,
  1167. .setup = atmel_console_setup,
  1168. .flags = CON_PRINTBUFFER,
  1169. .index = -1,
  1170. .data = &atmel_uart,
  1171. };
  1172. #define ATMEL_CONSOLE_DEVICE &atmel_console
  1173. /*
  1174. * Early console initialization (before VM subsystem initialized).
  1175. */
  1176. static int __init atmel_console_init(void)
  1177. {
  1178. if (atmel_default_console_device) {
  1179. add_preferred_console(ATMEL_DEVICENAME,
  1180. atmel_default_console_device->id, NULL);
  1181. atmel_init_port(&atmel_ports[atmel_default_console_device->id],
  1182. atmel_default_console_device);
  1183. register_console(&atmel_console);
  1184. }
  1185. return 0;
  1186. }
  1187. console_initcall(atmel_console_init);
  1188. /*
  1189. * Late console initialization.
  1190. */
  1191. static int __init atmel_late_console_init(void)
  1192. {
  1193. if (atmel_default_console_device
  1194. && !(atmel_console.flags & CON_ENABLED))
  1195. register_console(&atmel_console);
  1196. return 0;
  1197. }
  1198. core_initcall(atmel_late_console_init);
  1199. static inline bool atmel_is_console_port(struct uart_port *port)
  1200. {
  1201. return port->cons && port->cons->index == port->line;
  1202. }
  1203. #else
  1204. #define ATMEL_CONSOLE_DEVICE NULL
  1205. static inline bool atmel_is_console_port(struct uart_port *port)
  1206. {
  1207. return false;
  1208. }
  1209. #endif
  1210. static struct uart_driver atmel_uart = {
  1211. .owner = THIS_MODULE,
  1212. .driver_name = "atmel_serial",
  1213. .dev_name = ATMEL_DEVICENAME,
  1214. .major = SERIAL_ATMEL_MAJOR,
  1215. .minor = MINOR_START,
  1216. .nr = ATMEL_MAX_UART,
  1217. .cons = ATMEL_CONSOLE_DEVICE,
  1218. };
  1219. #ifdef CONFIG_PM
  1220. static int atmel_serial_suspend(struct platform_device *pdev,
  1221. pm_message_t state)
  1222. {
  1223. struct uart_port *port = platform_get_drvdata(pdev);
  1224. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1225. if (device_may_wakeup(&pdev->dev)
  1226. && !at91_suspend_entering_slow_clock())
  1227. enable_irq_wake(port->irq);
  1228. else {
  1229. uart_suspend_port(&atmel_uart, port);
  1230. atmel_port->suspended = 1;
  1231. }
  1232. return 0;
  1233. }
  1234. static int atmel_serial_resume(struct platform_device *pdev)
  1235. {
  1236. struct uart_port *port = platform_get_drvdata(pdev);
  1237. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1238. if (atmel_port->suspended) {
  1239. uart_resume_port(&atmel_uart, port);
  1240. atmel_port->suspended = 0;
  1241. } else
  1242. disable_irq_wake(port->irq);
  1243. return 0;
  1244. }
  1245. #else
  1246. #define atmel_serial_suspend NULL
  1247. #define atmel_serial_resume NULL
  1248. #endif
  1249. static int __devinit atmel_serial_probe(struct platform_device *pdev)
  1250. {
  1251. struct atmel_uart_port *port;
  1252. void *data;
  1253. int ret;
  1254. BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
  1255. port = &atmel_ports[pdev->id];
  1256. atmel_init_port(port, pdev);
  1257. if (!atmel_use_dma_rx(&port->uart)) {
  1258. ret = -ENOMEM;
  1259. data = kmalloc(sizeof(struct atmel_uart_char)
  1260. * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
  1261. if (!data)
  1262. goto err_alloc_ring;
  1263. port->rx_ring.buf = data;
  1264. }
  1265. ret = uart_add_one_port(&atmel_uart, &port->uart);
  1266. if (ret)
  1267. goto err_add_port;
  1268. device_init_wakeup(&pdev->dev, 1);
  1269. platform_set_drvdata(pdev, port);
  1270. return 0;
  1271. err_add_port:
  1272. kfree(port->rx_ring.buf);
  1273. port->rx_ring.buf = NULL;
  1274. err_alloc_ring:
  1275. if (!atmel_is_console_port(&port->uart)) {
  1276. clk_disable(port->clk);
  1277. clk_put(port->clk);
  1278. port->clk = NULL;
  1279. }
  1280. return ret;
  1281. }
  1282. static int __devexit atmel_serial_remove(struct platform_device *pdev)
  1283. {
  1284. struct uart_port *port = platform_get_drvdata(pdev);
  1285. struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
  1286. int ret = 0;
  1287. device_init_wakeup(&pdev->dev, 0);
  1288. platform_set_drvdata(pdev, NULL);
  1289. ret = uart_remove_one_port(&atmel_uart, port);
  1290. tasklet_kill(&atmel_port->tasklet);
  1291. kfree(atmel_port->rx_ring.buf);
  1292. /* "port" is allocated statically, so we shouldn't free it */
  1293. clk_disable(atmel_port->clk);
  1294. clk_put(atmel_port->clk);
  1295. return ret;
  1296. }
  1297. static struct platform_driver atmel_serial_driver = {
  1298. .probe = atmel_serial_probe,
  1299. .remove = __devexit_p(atmel_serial_remove),
  1300. .suspend = atmel_serial_suspend,
  1301. .resume = atmel_serial_resume,
  1302. .driver = {
  1303. .name = "atmel_usart",
  1304. .owner = THIS_MODULE,
  1305. },
  1306. };
  1307. static int __init atmel_serial_init(void)
  1308. {
  1309. int ret;
  1310. ret = uart_register_driver(&atmel_uart);
  1311. if (ret)
  1312. return ret;
  1313. ret = platform_driver_register(&atmel_serial_driver);
  1314. if (ret)
  1315. uart_unregister_driver(&atmel_uart);
  1316. return ret;
  1317. }
  1318. static void __exit atmel_serial_exit(void)
  1319. {
  1320. platform_driver_unregister(&atmel_serial_driver);
  1321. uart_unregister_driver(&atmel_uart);
  1322. }
  1323. module_init(atmel_serial_init);
  1324. module_exit(atmel_serial_exit);
  1325. MODULE_AUTHOR("Rick Bronson");
  1326. MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
  1327. MODULE_LICENSE("GPL");
  1328. MODULE_ALIAS("platform:atmel_usart");