pci-sysfs.c 20 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/pci.h>
  18. #include <linux/stat.h>
  19. #include <linux/topology.h>
  20. #include <linux/mm.h>
  21. #include <linux/capability.h>
  22. #include <linux/pci-aspm.h>
  23. #include "pci.h"
  24. static int sysfs_initialized; /* = 0 */
  25. /* show configuration fields */
  26. #define pci_config_attr(field, format_string) \
  27. static ssize_t \
  28. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  29. { \
  30. struct pci_dev *pdev; \
  31. \
  32. pdev = to_pci_dev (dev); \
  33. return sprintf (buf, format_string, pdev->field); \
  34. }
  35. pci_config_attr(vendor, "0x%04x\n");
  36. pci_config_attr(device, "0x%04x\n");
  37. pci_config_attr(subsystem_vendor, "0x%04x\n");
  38. pci_config_attr(subsystem_device, "0x%04x\n");
  39. pci_config_attr(class, "0x%06x\n");
  40. pci_config_attr(irq, "%u\n");
  41. static ssize_t broken_parity_status_show(struct device *dev,
  42. struct device_attribute *attr,
  43. char *buf)
  44. {
  45. struct pci_dev *pdev = to_pci_dev(dev);
  46. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  47. }
  48. static ssize_t broken_parity_status_store(struct device *dev,
  49. struct device_attribute *attr,
  50. const char *buf, size_t count)
  51. {
  52. struct pci_dev *pdev = to_pci_dev(dev);
  53. ssize_t consumed = -EINVAL;
  54. if ((count > 0) && (*buf == '0' || *buf == '1')) {
  55. pdev->broken_parity_status = *buf == '1' ? 1 : 0;
  56. consumed = count;
  57. }
  58. return consumed;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. cpumask_t mask;
  64. int len;
  65. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  67. buf[len++] = '\n';
  68. buf[len] = '\0';
  69. return len;
  70. }
  71. static ssize_t local_cpulist_show(struct device *dev,
  72. struct device_attribute *attr, char *buf)
  73. {
  74. cpumask_t mask;
  75. int len;
  76. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  77. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. /* show resources */
  83. static ssize_t
  84. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  85. {
  86. struct pci_dev * pci_dev = to_pci_dev(dev);
  87. char * str = buf;
  88. int i;
  89. int max = 7;
  90. resource_size_t start, end;
  91. if (pci_dev->subordinate)
  92. max = DEVICE_COUNT_RESOURCE;
  93. for (i = 0; i < max; i++) {
  94. struct resource *res = &pci_dev->resource[i];
  95. pci_resource_to_user(pci_dev, i, res, &start, &end);
  96. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  97. (unsigned long long)start,
  98. (unsigned long long)end,
  99. (unsigned long long)res->flags);
  100. }
  101. return (str - buf);
  102. }
  103. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  104. {
  105. struct pci_dev *pci_dev = to_pci_dev(dev);
  106. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  107. pci_dev->vendor, pci_dev->device,
  108. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  109. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  110. (u8)(pci_dev->class));
  111. }
  112. static ssize_t is_enabled_store(struct device *dev,
  113. struct device_attribute *attr, const char *buf,
  114. size_t count)
  115. {
  116. ssize_t result = -EINVAL;
  117. struct pci_dev *pdev = to_pci_dev(dev);
  118. /* this can crash the machine when done on the "wrong" device */
  119. if (!capable(CAP_SYS_ADMIN))
  120. return count;
  121. if (*buf == '0') {
  122. if (atomic_read(&pdev->enable_cnt) != 0)
  123. pci_disable_device(pdev);
  124. else
  125. result = -EIO;
  126. } else if (*buf == '1')
  127. result = pci_enable_device(pdev);
  128. return result < 0 ? result : count;
  129. }
  130. static ssize_t is_enabled_show(struct device *dev,
  131. struct device_attribute *attr, char *buf)
  132. {
  133. struct pci_dev *pdev;
  134. pdev = to_pci_dev (dev);
  135. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  136. }
  137. #ifdef CONFIG_NUMA
  138. static ssize_t
  139. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  140. {
  141. return sprintf (buf, "%d\n", dev->numa_node);
  142. }
  143. #endif
  144. static ssize_t
  145. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  146. {
  147. struct pci_dev *pdev = to_pci_dev(dev);
  148. if (!pdev->subordinate)
  149. return 0;
  150. return sprintf (buf, "%u\n",
  151. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  152. }
  153. static ssize_t
  154. msi_bus_store(struct device *dev, struct device_attribute *attr,
  155. const char *buf, size_t count)
  156. {
  157. struct pci_dev *pdev = to_pci_dev(dev);
  158. /* bad things may happen if the no_msi flag is changed
  159. * while some drivers are loaded */
  160. if (!capable(CAP_SYS_ADMIN))
  161. return count;
  162. if (!pdev->subordinate)
  163. return count;
  164. if (*buf == '0') {
  165. pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  166. dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
  167. " bad things could happen.\n");
  168. }
  169. if (*buf == '1') {
  170. pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  171. dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
  172. " bad things could happen.\n");
  173. }
  174. return count;
  175. }
  176. struct device_attribute pci_dev_attrs[] = {
  177. __ATTR_RO(resource),
  178. __ATTR_RO(vendor),
  179. __ATTR_RO(device),
  180. __ATTR_RO(subsystem_vendor),
  181. __ATTR_RO(subsystem_device),
  182. __ATTR_RO(class),
  183. __ATTR_RO(irq),
  184. __ATTR_RO(local_cpus),
  185. __ATTR_RO(local_cpulist),
  186. __ATTR_RO(modalias),
  187. #ifdef CONFIG_NUMA
  188. __ATTR_RO(numa_node),
  189. #endif
  190. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  191. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  192. broken_parity_status_show,broken_parity_status_store),
  193. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  194. __ATTR_NULL,
  195. };
  196. static ssize_t
  197. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  198. char *buf, loff_t off, size_t count)
  199. {
  200. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  201. unsigned int size = 64;
  202. loff_t init_off = off;
  203. u8 *data = (u8*) buf;
  204. /* Several chips lock up trying to read undefined config space */
  205. if (capable(CAP_SYS_ADMIN)) {
  206. size = dev->cfg_size;
  207. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  208. size = 128;
  209. }
  210. if (off > size)
  211. return 0;
  212. if (off + count > size) {
  213. size -= off;
  214. count = size;
  215. } else {
  216. size = count;
  217. }
  218. if ((off & 1) && size) {
  219. u8 val;
  220. pci_user_read_config_byte(dev, off, &val);
  221. data[off - init_off] = val;
  222. off++;
  223. size--;
  224. }
  225. if ((off & 3) && size > 2) {
  226. u16 val;
  227. pci_user_read_config_word(dev, off, &val);
  228. data[off - init_off] = val & 0xff;
  229. data[off - init_off + 1] = (val >> 8) & 0xff;
  230. off += 2;
  231. size -= 2;
  232. }
  233. while (size > 3) {
  234. u32 val;
  235. pci_user_read_config_dword(dev, off, &val);
  236. data[off - init_off] = val & 0xff;
  237. data[off - init_off + 1] = (val >> 8) & 0xff;
  238. data[off - init_off + 2] = (val >> 16) & 0xff;
  239. data[off - init_off + 3] = (val >> 24) & 0xff;
  240. off += 4;
  241. size -= 4;
  242. }
  243. if (size >= 2) {
  244. u16 val;
  245. pci_user_read_config_word(dev, off, &val);
  246. data[off - init_off] = val & 0xff;
  247. data[off - init_off + 1] = (val >> 8) & 0xff;
  248. off += 2;
  249. size -= 2;
  250. }
  251. if (size > 0) {
  252. u8 val;
  253. pci_user_read_config_byte(dev, off, &val);
  254. data[off - init_off] = val;
  255. off++;
  256. --size;
  257. }
  258. return count;
  259. }
  260. static ssize_t
  261. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  262. char *buf, loff_t off, size_t count)
  263. {
  264. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  265. unsigned int size = count;
  266. loff_t init_off = off;
  267. u8 *data = (u8*) buf;
  268. if (off > dev->cfg_size)
  269. return 0;
  270. if (off + count > dev->cfg_size) {
  271. size = dev->cfg_size - off;
  272. count = size;
  273. }
  274. if ((off & 1) && size) {
  275. pci_user_write_config_byte(dev, off, data[off - init_off]);
  276. off++;
  277. size--;
  278. }
  279. if ((off & 3) && size > 2) {
  280. u16 val = data[off - init_off];
  281. val |= (u16) data[off - init_off + 1] << 8;
  282. pci_user_write_config_word(dev, off, val);
  283. off += 2;
  284. size -= 2;
  285. }
  286. while (size > 3) {
  287. u32 val = data[off - init_off];
  288. val |= (u32) data[off - init_off + 1] << 8;
  289. val |= (u32) data[off - init_off + 2] << 16;
  290. val |= (u32) data[off - init_off + 3] << 24;
  291. pci_user_write_config_dword(dev, off, val);
  292. off += 4;
  293. size -= 4;
  294. }
  295. if (size >= 2) {
  296. u16 val = data[off - init_off];
  297. val |= (u16) data[off - init_off + 1] << 8;
  298. pci_user_write_config_word(dev, off, val);
  299. off += 2;
  300. size -= 2;
  301. }
  302. if (size) {
  303. pci_user_write_config_byte(dev, off, data[off - init_off]);
  304. off++;
  305. --size;
  306. }
  307. return count;
  308. }
  309. static ssize_t
  310. pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  311. char *buf, loff_t off, size_t count)
  312. {
  313. struct pci_dev *dev =
  314. to_pci_dev(container_of(kobj, struct device, kobj));
  315. int end;
  316. int ret;
  317. if (off > bin_attr->size)
  318. count = 0;
  319. else if (count > bin_attr->size - off)
  320. count = bin_attr->size - off;
  321. end = off + count;
  322. while (off < end) {
  323. ret = dev->vpd->ops->read(dev, off, end - off, buf);
  324. if (ret < 0)
  325. return ret;
  326. buf += ret;
  327. off += ret;
  328. }
  329. return count;
  330. }
  331. static ssize_t
  332. pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  333. char *buf, loff_t off, size_t count)
  334. {
  335. struct pci_dev *dev =
  336. to_pci_dev(container_of(kobj, struct device, kobj));
  337. int end;
  338. int ret;
  339. if (off > bin_attr->size)
  340. count = 0;
  341. else if (count > bin_attr->size - off)
  342. count = bin_attr->size - off;
  343. end = off + count;
  344. while (off < end) {
  345. ret = dev->vpd->ops->write(dev, off, end - off, buf);
  346. if (ret < 0)
  347. return ret;
  348. buf += ret;
  349. off += ret;
  350. }
  351. return count;
  352. }
  353. #ifdef HAVE_PCI_LEGACY
  354. /**
  355. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  356. * @kobj: kobject corresponding to file to read from
  357. * @buf: buffer to store results
  358. * @off: offset into legacy I/O port space
  359. * @count: number of bytes to read
  360. *
  361. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  362. * callback routine (pci_legacy_read).
  363. */
  364. ssize_t
  365. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  366. char *buf, loff_t off, size_t count)
  367. {
  368. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  369. struct device,
  370. kobj));
  371. /* Only support 1, 2 or 4 byte accesses */
  372. if (count != 1 && count != 2 && count != 4)
  373. return -EINVAL;
  374. return pci_legacy_read(bus, off, (u32 *)buf, count);
  375. }
  376. /**
  377. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  378. * @kobj: kobject corresponding to file to read from
  379. * @buf: buffer containing value to be written
  380. * @off: offset into legacy I/O port space
  381. * @count: number of bytes to write
  382. *
  383. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  384. * callback routine (pci_legacy_write).
  385. */
  386. ssize_t
  387. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  388. char *buf, loff_t off, size_t count)
  389. {
  390. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  391. struct device,
  392. kobj));
  393. /* Only support 1, 2 or 4 byte accesses */
  394. if (count != 1 && count != 2 && count != 4)
  395. return -EINVAL;
  396. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  397. }
  398. /**
  399. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  400. * @kobj: kobject corresponding to device to be mapped
  401. * @attr: struct bin_attribute for this file
  402. * @vma: struct vm_area_struct passed to mmap
  403. *
  404. * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
  405. * legacy memory space (first meg of bus space) into application virtual
  406. * memory space.
  407. */
  408. int
  409. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  410. struct vm_area_struct *vma)
  411. {
  412. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  413. struct device,
  414. kobj));
  415. return pci_mmap_legacy_page_range(bus, vma);
  416. }
  417. #endif /* HAVE_PCI_LEGACY */
  418. #ifdef HAVE_PCI_MMAP
  419. /**
  420. * pci_mmap_resource - map a PCI resource into user memory space
  421. * @kobj: kobject for mapping
  422. * @attr: struct bin_attribute for the file being mapped
  423. * @vma: struct vm_area_struct passed into the mmap
  424. *
  425. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  426. * FIXME: write combining? maybe automatic for prefetchable regions?
  427. */
  428. static int
  429. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  430. struct vm_area_struct *vma)
  431. {
  432. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  433. struct device, kobj));
  434. struct resource *res = (struct resource *)attr->private;
  435. enum pci_mmap_state mmap_type;
  436. resource_size_t start, end;
  437. int i;
  438. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  439. if (res == &pdev->resource[i])
  440. break;
  441. if (i >= PCI_ROM_RESOURCE)
  442. return -ENODEV;
  443. /* pci_mmap_page_range() expects the same kind of entry as coming
  444. * from /proc/bus/pci/ which is a "user visible" value. If this is
  445. * different from the resource itself, arch will do necessary fixup.
  446. */
  447. pci_resource_to_user(pdev, i, res, &start, &end);
  448. vma->vm_pgoff += start >> PAGE_SHIFT;
  449. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  450. return pci_mmap_page_range(pdev, vma, mmap_type, 0);
  451. }
  452. /**
  453. * pci_remove_resource_files - cleanup resource files
  454. * @dev: dev to cleanup
  455. *
  456. * If we created resource files for @dev, remove them from sysfs and
  457. * free their resources.
  458. */
  459. static void
  460. pci_remove_resource_files(struct pci_dev *pdev)
  461. {
  462. int i;
  463. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  464. struct bin_attribute *res_attr;
  465. res_attr = pdev->res_attr[i];
  466. if (res_attr) {
  467. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  468. kfree(res_attr);
  469. }
  470. }
  471. }
  472. /**
  473. * pci_create_resource_files - create resource files in sysfs for @dev
  474. * @dev: dev in question
  475. *
  476. * Walk the resources in @dev creating files for each resource available.
  477. */
  478. static int pci_create_resource_files(struct pci_dev *pdev)
  479. {
  480. int i;
  481. int retval;
  482. /* Expose the PCI resources from this device as files */
  483. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  484. struct bin_attribute *res_attr;
  485. /* skip empty resources */
  486. if (!pci_resource_len(pdev, i))
  487. continue;
  488. /* allocate attribute structure, piggyback attribute name */
  489. res_attr = kzalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
  490. if (res_attr) {
  491. char *res_attr_name = (char *)(res_attr + 1);
  492. pdev->res_attr[i] = res_attr;
  493. sprintf(res_attr_name, "resource%d", i);
  494. res_attr->attr.name = res_attr_name;
  495. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  496. res_attr->size = pci_resource_len(pdev, i);
  497. res_attr->mmap = pci_mmap_resource;
  498. res_attr->private = &pdev->resource[i];
  499. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  500. if (retval) {
  501. pci_remove_resource_files(pdev);
  502. return retval;
  503. }
  504. } else {
  505. return -ENOMEM;
  506. }
  507. }
  508. return 0;
  509. }
  510. #else /* !HAVE_PCI_MMAP */
  511. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  512. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  513. #endif /* HAVE_PCI_MMAP */
  514. /**
  515. * pci_write_rom - used to enable access to the PCI ROM display
  516. * @kobj: kernel object handle
  517. * @buf: user input
  518. * @off: file offset
  519. * @count: number of byte in input
  520. *
  521. * writing anything except 0 enables it
  522. */
  523. static ssize_t
  524. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  525. char *buf, loff_t off, size_t count)
  526. {
  527. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  528. if ((off == 0) && (*buf == '0') && (count == 2))
  529. pdev->rom_attr_enabled = 0;
  530. else
  531. pdev->rom_attr_enabled = 1;
  532. return count;
  533. }
  534. /**
  535. * pci_read_rom - read a PCI ROM
  536. * @kobj: kernel object handle
  537. * @buf: where to put the data we read from the ROM
  538. * @off: file offset
  539. * @count: number of bytes to read
  540. *
  541. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  542. * device corresponding to @kobj.
  543. */
  544. static ssize_t
  545. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  546. char *buf, loff_t off, size_t count)
  547. {
  548. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  549. void __iomem *rom;
  550. size_t size;
  551. if (!pdev->rom_attr_enabled)
  552. return -EINVAL;
  553. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  554. if (!rom)
  555. return 0;
  556. if (off >= size)
  557. count = 0;
  558. else {
  559. if (off + count > size)
  560. count = size - off;
  561. memcpy_fromio(buf, rom + off, count);
  562. }
  563. pci_unmap_rom(pdev, rom);
  564. return count;
  565. }
  566. static struct bin_attribute pci_config_attr = {
  567. .attr = {
  568. .name = "config",
  569. .mode = S_IRUGO | S_IWUSR,
  570. },
  571. .size = 256,
  572. .read = pci_read_config,
  573. .write = pci_write_config,
  574. };
  575. static struct bin_attribute pcie_config_attr = {
  576. .attr = {
  577. .name = "config",
  578. .mode = S_IRUGO | S_IWUSR,
  579. },
  580. .size = 4096,
  581. .read = pci_read_config,
  582. .write = pci_write_config,
  583. };
  584. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  585. {
  586. return 0;
  587. }
  588. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  589. {
  590. struct bin_attribute *attr = NULL;
  591. int retval;
  592. if (!sysfs_initialized)
  593. return -EACCES;
  594. if (pdev->cfg_size < 4096)
  595. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  596. else
  597. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  598. if (retval)
  599. goto err;
  600. /* If the device has VPD, try to expose it in sysfs. */
  601. if (pdev->vpd) {
  602. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  603. if (attr) {
  604. pdev->vpd->attr = attr;
  605. attr->size = pdev->vpd->ops->get_size(pdev);
  606. attr->attr.name = "vpd";
  607. attr->attr.mode = S_IRUGO | S_IWUSR;
  608. attr->read = pci_read_vpd;
  609. attr->write = pci_write_vpd;
  610. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  611. if (retval)
  612. goto err_vpd;
  613. } else {
  614. retval = -ENOMEM;
  615. goto err_config_file;
  616. }
  617. }
  618. retval = pci_create_resource_files(pdev);
  619. if (retval)
  620. goto err_vpd_file;
  621. /* If the device has a ROM, try to expose it in sysfs. */
  622. if (pci_resource_len(pdev, PCI_ROM_RESOURCE) ||
  623. (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)) {
  624. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  625. if (attr) {
  626. pdev->rom_attr = attr;
  627. attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  628. attr->attr.name = "rom";
  629. attr->attr.mode = S_IRUSR;
  630. attr->read = pci_read_rom;
  631. attr->write = pci_write_rom;
  632. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  633. if (retval)
  634. goto err_rom;
  635. } else {
  636. retval = -ENOMEM;
  637. goto err_resource_files;
  638. }
  639. }
  640. /* add platform-specific attributes */
  641. if (pcibios_add_platform_entries(pdev))
  642. goto err_rom_file;
  643. pcie_aspm_create_sysfs_dev_files(pdev);
  644. return 0;
  645. err_rom_file:
  646. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  647. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  648. err_rom:
  649. kfree(pdev->rom_attr);
  650. err_resource_files:
  651. pci_remove_resource_files(pdev);
  652. err_vpd_file:
  653. if (pdev->vpd) {
  654. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->vpd->attr);
  655. err_vpd:
  656. kfree(pdev->vpd->attr);
  657. }
  658. err_config_file:
  659. if (pdev->cfg_size < 4096)
  660. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  661. else
  662. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  663. err:
  664. return retval;
  665. }
  666. /**
  667. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  668. * @pdev: device whose entries we should free
  669. *
  670. * Cleanup when @pdev is removed from sysfs.
  671. */
  672. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  673. {
  674. if (!sysfs_initialized)
  675. return;
  676. pcie_aspm_remove_sysfs_dev_files(pdev);
  677. if (pdev->vpd) {
  678. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->vpd->attr);
  679. kfree(pdev->vpd->attr);
  680. }
  681. if (pdev->cfg_size < 4096)
  682. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  683. else
  684. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  685. pci_remove_resource_files(pdev);
  686. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  687. if (pdev->rom_attr) {
  688. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  689. kfree(pdev->rom_attr);
  690. }
  691. }
  692. }
  693. static int __init pci_sysfs_init(void)
  694. {
  695. struct pci_dev *pdev = NULL;
  696. int retval;
  697. sysfs_initialized = 1;
  698. for_each_pci_dev(pdev) {
  699. retval = pci_create_sysfs_dev_files(pdev);
  700. if (retval) {
  701. pci_dev_put(pdev);
  702. return retval;
  703. }
  704. }
  705. return 0;
  706. }
  707. late_initcall(pci_sysfs_init);