smu.c 30 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrupts off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/device.h>
  23. #include <linux/dmapool.h>
  24. #include <linux/bootmem.h>
  25. #include <linux/vmalloc.h>
  26. #include <linux/highmem.h>
  27. #include <linux/jiffies.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/rtc.h>
  30. #include <linux/completion.h>
  31. #include <linux/miscdevice.h>
  32. #include <linux/delay.h>
  33. #include <linux/sysdev.h>
  34. #include <linux/poll.h>
  35. #include <linux/mutex.h>
  36. #include <asm/byteorder.h>
  37. #include <asm/io.h>
  38. #include <asm/prom.h>
  39. #include <asm/machdep.h>
  40. #include <asm/pmac_feature.h>
  41. #include <asm/smu.h>
  42. #include <asm/sections.h>
  43. #include <asm/abs_addr.h>
  44. #include <asm/uaccess.h>
  45. #include <asm/of_device.h>
  46. #include <asm/of_platform.h>
  47. #define VERSION "0.7"
  48. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  49. #undef DEBUG_SMU
  50. #ifdef DEBUG_SMU
  51. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  52. #else
  53. #define DPRINTK(fmt, args...) do { } while (0)
  54. #endif
  55. /*
  56. * This is the command buffer passed to the SMU hardware
  57. */
  58. #define SMU_MAX_DATA 254
  59. struct smu_cmd_buf {
  60. u8 cmd;
  61. u8 length;
  62. u8 data[SMU_MAX_DATA];
  63. };
  64. struct smu_device {
  65. spinlock_t lock;
  66. struct device_node *of_node;
  67. struct of_device *of_dev;
  68. int doorbell; /* doorbell gpio */
  69. u32 __iomem *db_buf; /* doorbell buffer */
  70. struct device_node *db_node;
  71. unsigned int db_irq;
  72. int msg;
  73. struct device_node *msg_node;
  74. unsigned int msg_irq;
  75. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  76. u32 cmd_buf_abs; /* command buffer absolute */
  77. struct list_head cmd_list;
  78. struct smu_cmd *cmd_cur; /* pending command */
  79. int broken_nap;
  80. struct list_head cmd_i2c_list;
  81. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  82. struct timer_list i2c_timer;
  83. };
  84. /*
  85. * I don't think there will ever be more than one SMU, so
  86. * for now, just hard code that
  87. */
  88. static struct smu_device *smu;
  89. static DEFINE_MUTEX(smu_part_access);
  90. static int smu_irq_inited;
  91. static void smu_i2c_retry(unsigned long data);
  92. /*
  93. * SMU driver low level stuff
  94. */
  95. static void smu_start_cmd(void)
  96. {
  97. unsigned long faddr, fend;
  98. struct smu_cmd *cmd;
  99. if (list_empty(&smu->cmd_list))
  100. return;
  101. /* Fetch first command in queue */
  102. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  103. smu->cmd_cur = cmd;
  104. list_del(&cmd->link);
  105. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  106. cmd->data_len);
  107. DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n",
  108. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  109. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3],
  110. ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5],
  111. ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]);
  112. /* Fill the SMU command buffer */
  113. smu->cmd_buf->cmd = cmd->cmd;
  114. smu->cmd_buf->length = cmd->data_len;
  115. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  116. /* Flush command and data to RAM */
  117. faddr = (unsigned long)smu->cmd_buf;
  118. fend = faddr + smu->cmd_buf->length + 2;
  119. flush_inval_dcache_range(faddr, fend);
  120. /* We also disable NAP mode for the duration of the command
  121. * on U3 based machines.
  122. * This is slightly racy as it can be written back to 1 by a sysctl
  123. * but that never happens in practice. There seem to be an issue with
  124. * U3 based machines such as the iMac G5 where napping for the
  125. * whole duration of the command prevents the SMU from fetching it
  126. * from memory. This might be related to the strange i2c based
  127. * mechanism the SMU uses to access memory.
  128. */
  129. if (smu->broken_nap)
  130. powersave_nap = 0;
  131. /* This isn't exactly a DMA mapping here, I suspect
  132. * the SMU is actually communicating with us via i2c to the
  133. * northbridge or the CPU to access RAM.
  134. */
  135. writel(smu->cmd_buf_abs, smu->db_buf);
  136. /* Ring the SMU doorbell */
  137. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  138. }
  139. static irqreturn_t smu_db_intr(int irq, void *arg)
  140. {
  141. unsigned long flags;
  142. struct smu_cmd *cmd;
  143. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  144. void *misc = NULL;
  145. u8 gpio;
  146. int rc = 0;
  147. /* SMU completed the command, well, we hope, let's make sure
  148. * of it
  149. */
  150. spin_lock_irqsave(&smu->lock, flags);
  151. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  152. if ((gpio & 7) != 7) {
  153. spin_unlock_irqrestore(&smu->lock, flags);
  154. return IRQ_HANDLED;
  155. }
  156. cmd = smu->cmd_cur;
  157. smu->cmd_cur = NULL;
  158. if (cmd == NULL)
  159. goto bail;
  160. if (rc == 0) {
  161. unsigned long faddr;
  162. int reply_len;
  163. u8 ack;
  164. /* CPU might have brought back the cache line, so we need
  165. * to flush again before peeking at the SMU response. We
  166. * flush the entire buffer for now as we haven't read the
  167. * reply length (it's only 2 cache lines anyway)
  168. */
  169. faddr = (unsigned long)smu->cmd_buf;
  170. flush_inval_dcache_range(faddr, faddr + 256);
  171. /* Now check ack */
  172. ack = (~cmd->cmd) & 0xff;
  173. if (ack != smu->cmd_buf->cmd) {
  174. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  175. ack, smu->cmd_buf->cmd);
  176. rc = -EIO;
  177. }
  178. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  179. DPRINTK("SMU: reply len: %d\n", reply_len);
  180. if (reply_len > cmd->reply_len) {
  181. printk(KERN_WARNING "SMU: reply buffer too small,"
  182. "got %d bytes for a %d bytes buffer\n",
  183. reply_len, cmd->reply_len);
  184. reply_len = cmd->reply_len;
  185. }
  186. cmd->reply_len = reply_len;
  187. if (cmd->reply_buf && reply_len)
  188. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  189. }
  190. /* Now complete the command. Write status last in order as we lost
  191. * ownership of the command structure as soon as it's no longer -1
  192. */
  193. done = cmd->done;
  194. misc = cmd->misc;
  195. mb();
  196. cmd->status = rc;
  197. /* Re-enable NAP mode */
  198. if (smu->broken_nap)
  199. powersave_nap = 1;
  200. bail:
  201. /* Start next command if any */
  202. smu_start_cmd();
  203. spin_unlock_irqrestore(&smu->lock, flags);
  204. /* Call command completion handler if any */
  205. if (done)
  206. done(cmd, misc);
  207. /* It's an edge interrupt, nothing to do */
  208. return IRQ_HANDLED;
  209. }
  210. static irqreturn_t smu_msg_intr(int irq, void *arg)
  211. {
  212. /* I don't quite know what to do with this one, we seem to never
  213. * receive it, so I suspect we have to arm it someway in the SMU
  214. * to start getting events that way.
  215. */
  216. printk(KERN_INFO "SMU: message interrupt !\n");
  217. /* It's an edge interrupt, nothing to do */
  218. return IRQ_HANDLED;
  219. }
  220. /*
  221. * Queued command management.
  222. *
  223. */
  224. int smu_queue_cmd(struct smu_cmd *cmd)
  225. {
  226. unsigned long flags;
  227. if (smu == NULL)
  228. return -ENODEV;
  229. if (cmd->data_len > SMU_MAX_DATA ||
  230. cmd->reply_len > SMU_MAX_DATA)
  231. return -EINVAL;
  232. cmd->status = 1;
  233. spin_lock_irqsave(&smu->lock, flags);
  234. list_add_tail(&cmd->link, &smu->cmd_list);
  235. if (smu->cmd_cur == NULL)
  236. smu_start_cmd();
  237. spin_unlock_irqrestore(&smu->lock, flags);
  238. /* Workaround for early calls when irq isn't available */
  239. if (!smu_irq_inited || smu->db_irq == NO_IRQ)
  240. smu_spinwait_cmd(cmd);
  241. return 0;
  242. }
  243. EXPORT_SYMBOL(smu_queue_cmd);
  244. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  245. unsigned int data_len,
  246. void (*done)(struct smu_cmd *cmd, void *misc),
  247. void *misc, ...)
  248. {
  249. struct smu_cmd *cmd = &scmd->cmd;
  250. va_list list;
  251. int i;
  252. if (data_len > sizeof(scmd->buffer))
  253. return -EINVAL;
  254. memset(scmd, 0, sizeof(*scmd));
  255. cmd->cmd = command;
  256. cmd->data_len = data_len;
  257. cmd->data_buf = scmd->buffer;
  258. cmd->reply_len = sizeof(scmd->buffer);
  259. cmd->reply_buf = scmd->buffer;
  260. cmd->done = done;
  261. cmd->misc = misc;
  262. va_start(list, misc);
  263. for (i = 0; i < data_len; ++i)
  264. scmd->buffer[i] = (u8)va_arg(list, int);
  265. va_end(list);
  266. return smu_queue_cmd(cmd);
  267. }
  268. EXPORT_SYMBOL(smu_queue_simple);
  269. void smu_poll(void)
  270. {
  271. u8 gpio;
  272. if (smu == NULL)
  273. return;
  274. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  275. if ((gpio & 7) == 7)
  276. smu_db_intr(smu->db_irq, smu);
  277. }
  278. EXPORT_SYMBOL(smu_poll);
  279. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  280. {
  281. struct completion *comp = misc;
  282. complete(comp);
  283. }
  284. EXPORT_SYMBOL(smu_done_complete);
  285. void smu_spinwait_cmd(struct smu_cmd *cmd)
  286. {
  287. while(cmd->status == 1)
  288. smu_poll();
  289. }
  290. EXPORT_SYMBOL(smu_spinwait_cmd);
  291. /* RTC low level commands */
  292. static inline int bcd2hex (int n)
  293. {
  294. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  295. }
  296. static inline int hex2bcd (int n)
  297. {
  298. return ((n / 10) << 4) + (n % 10);
  299. }
  300. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  301. struct rtc_time *time)
  302. {
  303. cmd_buf->cmd = 0x8e;
  304. cmd_buf->length = 8;
  305. cmd_buf->data[0] = 0x80;
  306. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  307. cmd_buf->data[2] = hex2bcd(time->tm_min);
  308. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  309. cmd_buf->data[4] = time->tm_wday;
  310. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  311. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  312. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  313. }
  314. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  315. {
  316. struct smu_simple_cmd cmd;
  317. int rc;
  318. if (smu == NULL)
  319. return -ENODEV;
  320. memset(time, 0, sizeof(struct rtc_time));
  321. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  322. SMU_CMD_RTC_GET_DATETIME);
  323. if (rc)
  324. return rc;
  325. smu_spinwait_simple(&cmd);
  326. time->tm_sec = bcd2hex(cmd.buffer[0]);
  327. time->tm_min = bcd2hex(cmd.buffer[1]);
  328. time->tm_hour = bcd2hex(cmd.buffer[2]);
  329. time->tm_wday = bcd2hex(cmd.buffer[3]);
  330. time->tm_mday = bcd2hex(cmd.buffer[4]);
  331. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  332. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  333. return 0;
  334. }
  335. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  336. {
  337. struct smu_simple_cmd cmd;
  338. int rc;
  339. if (smu == NULL)
  340. return -ENODEV;
  341. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  342. SMU_CMD_RTC_SET_DATETIME,
  343. hex2bcd(time->tm_sec),
  344. hex2bcd(time->tm_min),
  345. hex2bcd(time->tm_hour),
  346. time->tm_wday,
  347. hex2bcd(time->tm_mday),
  348. hex2bcd(time->tm_mon) + 1,
  349. hex2bcd(time->tm_year - 100));
  350. if (rc)
  351. return rc;
  352. smu_spinwait_simple(&cmd);
  353. return 0;
  354. }
  355. void smu_shutdown(void)
  356. {
  357. struct smu_simple_cmd cmd;
  358. if (smu == NULL)
  359. return;
  360. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  361. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  362. return;
  363. smu_spinwait_simple(&cmd);
  364. for (;;)
  365. ;
  366. }
  367. void smu_restart(void)
  368. {
  369. struct smu_simple_cmd cmd;
  370. if (smu == NULL)
  371. return;
  372. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  373. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  374. return;
  375. smu_spinwait_simple(&cmd);
  376. for (;;)
  377. ;
  378. }
  379. int smu_present(void)
  380. {
  381. return smu != NULL;
  382. }
  383. EXPORT_SYMBOL(smu_present);
  384. int __init smu_init (void)
  385. {
  386. struct device_node *np;
  387. const u32 *data;
  388. np = of_find_node_by_type(NULL, "smu");
  389. if (np == NULL)
  390. return -ENODEV;
  391. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  392. if (smu_cmdbuf_abs == 0) {
  393. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  394. return -EINVAL;
  395. }
  396. smu = alloc_bootmem(sizeof(struct smu_device));
  397. if (smu == NULL)
  398. return -ENOMEM;
  399. memset(smu, 0, sizeof(*smu));
  400. spin_lock_init(&smu->lock);
  401. INIT_LIST_HEAD(&smu->cmd_list);
  402. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  403. smu->of_node = np;
  404. smu->db_irq = NO_IRQ;
  405. smu->msg_irq = NO_IRQ;
  406. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  407. * 32 bits value safely
  408. */
  409. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  410. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  411. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  412. if (smu->db_node == NULL) {
  413. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  414. goto fail;
  415. }
  416. data = of_get_property(smu->db_node, "reg", NULL);
  417. if (data == NULL) {
  418. of_node_put(smu->db_node);
  419. smu->db_node = NULL;
  420. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  421. goto fail;
  422. }
  423. /* Current setup has one doorbell GPIO that does both doorbell
  424. * and ack. GPIOs are at 0x50, best would be to find that out
  425. * in the device-tree though.
  426. */
  427. smu->doorbell = *data;
  428. if (smu->doorbell < 0x50)
  429. smu->doorbell += 0x50;
  430. /* Now look for the smu-interrupt GPIO */
  431. do {
  432. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  433. if (smu->msg_node == NULL)
  434. break;
  435. data = of_get_property(smu->msg_node, "reg", NULL);
  436. if (data == NULL) {
  437. of_node_put(smu->msg_node);
  438. smu->msg_node = NULL;
  439. break;
  440. }
  441. smu->msg = *data;
  442. if (smu->msg < 0x50)
  443. smu->msg += 0x50;
  444. } while(0);
  445. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  446. * device-tree entry giving the address. Best would probably to use
  447. * an offset for K2 base though, but let's do it that way for now.
  448. */
  449. smu->db_buf = ioremap(0x8000860c, 0x1000);
  450. if (smu->db_buf == NULL) {
  451. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  452. goto fail;
  453. }
  454. /* U3 has an issue with NAP mode when issuing SMU commands */
  455. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  456. if (smu->broken_nap)
  457. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  458. sys_ctrler = SYS_CTRLER_SMU;
  459. return 0;
  460. fail:
  461. smu = NULL;
  462. return -ENXIO;
  463. }
  464. static int smu_late_init(void)
  465. {
  466. if (!smu)
  467. return 0;
  468. init_timer(&smu->i2c_timer);
  469. smu->i2c_timer.function = smu_i2c_retry;
  470. smu->i2c_timer.data = (unsigned long)smu;
  471. if (smu->db_node) {
  472. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  473. if (smu->db_irq == NO_IRQ)
  474. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  475. smu->db_node->full_name);
  476. }
  477. if (smu->msg_node) {
  478. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  479. if (smu->msg_irq == NO_IRQ)
  480. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  481. smu->msg_node->full_name);
  482. }
  483. /*
  484. * Try to request the interrupts
  485. */
  486. if (smu->db_irq != NO_IRQ) {
  487. if (request_irq(smu->db_irq, smu_db_intr,
  488. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  489. printk(KERN_WARNING "SMU: can't "
  490. "request interrupt %d\n",
  491. smu->db_irq);
  492. smu->db_irq = NO_IRQ;
  493. }
  494. }
  495. if (smu->msg_irq != NO_IRQ) {
  496. if (request_irq(smu->msg_irq, smu_msg_intr,
  497. IRQF_SHARED, "SMU message", smu) < 0) {
  498. printk(KERN_WARNING "SMU: can't "
  499. "request interrupt %d\n",
  500. smu->msg_irq);
  501. smu->msg_irq = NO_IRQ;
  502. }
  503. }
  504. smu_irq_inited = 1;
  505. return 0;
  506. }
  507. /* This has to be before arch_initcall as the low i2c stuff relies on the
  508. * above having been done before we reach arch_initcalls
  509. */
  510. core_initcall(smu_late_init);
  511. /*
  512. * sysfs visibility
  513. */
  514. static void smu_expose_childs(struct work_struct *unused)
  515. {
  516. struct device_node *np;
  517. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  518. if (of_device_is_compatible(np, "smu-sensors"))
  519. of_platform_device_create(np, "smu-sensors",
  520. &smu->of_dev->dev);
  521. }
  522. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  523. static int smu_platform_probe(struct of_device* dev,
  524. const struct of_device_id *match)
  525. {
  526. if (!smu)
  527. return -ENODEV;
  528. smu->of_dev = dev;
  529. /*
  530. * Ok, we are matched, now expose all i2c busses. We have to defer
  531. * that unfortunately or it would deadlock inside the device model
  532. */
  533. schedule_work(&smu_expose_childs_work);
  534. return 0;
  535. }
  536. static struct of_device_id smu_platform_match[] =
  537. {
  538. {
  539. .type = "smu",
  540. },
  541. {},
  542. };
  543. static struct of_platform_driver smu_of_platform_driver =
  544. {
  545. .name = "smu",
  546. .match_table = smu_platform_match,
  547. .probe = smu_platform_probe,
  548. };
  549. static int __init smu_init_sysfs(void)
  550. {
  551. /*
  552. * Due to sysfs bogosity, a sysdev is not a real device, so
  553. * we should in fact create both if we want sysdev semantics
  554. * for power management.
  555. * For now, we don't power manage machines with an SMU chip,
  556. * I'm a bit too far from figuring out how that works with those
  557. * new chipsets, but that will come back and bite us
  558. */
  559. of_register_platform_driver(&smu_of_platform_driver);
  560. return 0;
  561. }
  562. device_initcall(smu_init_sysfs);
  563. struct of_device *smu_get_ofdev(void)
  564. {
  565. if (!smu)
  566. return NULL;
  567. return smu->of_dev;
  568. }
  569. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  570. /*
  571. * i2c interface
  572. */
  573. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  574. {
  575. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  576. void *misc = cmd->misc;
  577. unsigned long flags;
  578. /* Check for read case */
  579. if (!fail && cmd->read) {
  580. if (cmd->pdata[0] < 1)
  581. fail = 1;
  582. else
  583. memcpy(cmd->info.data, &cmd->pdata[1],
  584. cmd->info.datalen);
  585. }
  586. DPRINTK("SMU: completing, success: %d\n", !fail);
  587. /* Update status and mark no pending i2c command with lock
  588. * held so nobody comes in while we dequeue an eventual
  589. * pending next i2c command
  590. */
  591. spin_lock_irqsave(&smu->lock, flags);
  592. smu->cmd_i2c_cur = NULL;
  593. wmb();
  594. cmd->status = fail ? -EIO : 0;
  595. /* Is there another i2c command waiting ? */
  596. if (!list_empty(&smu->cmd_i2c_list)) {
  597. struct smu_i2c_cmd *newcmd;
  598. /* Fetch it, new current, remove from list */
  599. newcmd = list_entry(smu->cmd_i2c_list.next,
  600. struct smu_i2c_cmd, link);
  601. smu->cmd_i2c_cur = newcmd;
  602. list_del(&cmd->link);
  603. /* Queue with low level smu */
  604. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  605. if (smu->cmd_cur == NULL)
  606. smu_start_cmd();
  607. }
  608. spin_unlock_irqrestore(&smu->lock, flags);
  609. /* Call command completion handler if any */
  610. if (done)
  611. done(cmd, misc);
  612. }
  613. static void smu_i2c_retry(unsigned long data)
  614. {
  615. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  616. DPRINTK("SMU: i2c failure, requeuing...\n");
  617. /* requeue command simply by resetting reply_len */
  618. cmd->pdata[0] = 0xff;
  619. cmd->scmd.reply_len = sizeof(cmd->pdata);
  620. smu_queue_cmd(&cmd->scmd);
  621. }
  622. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  623. {
  624. struct smu_i2c_cmd *cmd = misc;
  625. int fail = 0;
  626. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  627. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  628. /* Check for possible status */
  629. if (scmd->status < 0)
  630. fail = 1;
  631. else if (cmd->read) {
  632. if (cmd->stage == 0)
  633. fail = cmd->pdata[0] != 0;
  634. else
  635. fail = cmd->pdata[0] >= 0x80;
  636. } else {
  637. fail = cmd->pdata[0] != 0;
  638. }
  639. /* Handle failures by requeuing command, after 5ms interval
  640. */
  641. if (fail && --cmd->retries > 0) {
  642. DPRINTK("SMU: i2c failure, starting timer...\n");
  643. BUG_ON(cmd != smu->cmd_i2c_cur);
  644. if (!smu_irq_inited) {
  645. mdelay(5);
  646. smu_i2c_retry(0);
  647. return;
  648. }
  649. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  650. return;
  651. }
  652. /* If failure or stage 1, command is complete */
  653. if (fail || cmd->stage != 0) {
  654. smu_i2c_complete_command(cmd, fail);
  655. return;
  656. }
  657. DPRINTK("SMU: going to stage 1\n");
  658. /* Ok, initial command complete, now poll status */
  659. scmd->reply_buf = cmd->pdata;
  660. scmd->reply_len = sizeof(cmd->pdata);
  661. scmd->data_buf = cmd->pdata;
  662. scmd->data_len = 1;
  663. cmd->pdata[0] = 0;
  664. cmd->stage = 1;
  665. cmd->retries = 20;
  666. smu_queue_cmd(scmd);
  667. }
  668. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  669. {
  670. unsigned long flags;
  671. if (smu == NULL)
  672. return -ENODEV;
  673. /* Fill most fields of scmd */
  674. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  675. cmd->scmd.done = smu_i2c_low_completion;
  676. cmd->scmd.misc = cmd;
  677. cmd->scmd.reply_buf = cmd->pdata;
  678. cmd->scmd.reply_len = sizeof(cmd->pdata);
  679. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  680. cmd->scmd.status = 1;
  681. cmd->stage = 0;
  682. cmd->pdata[0] = 0xff;
  683. cmd->retries = 20;
  684. cmd->status = 1;
  685. /* Check transfer type, sanitize some "info" fields
  686. * based on transfer type and do more checking
  687. */
  688. cmd->info.caddr = cmd->info.devaddr;
  689. cmd->read = cmd->info.devaddr & 0x01;
  690. switch(cmd->info.type) {
  691. case SMU_I2C_TRANSFER_SIMPLE:
  692. memset(&cmd->info.sublen, 0, 4);
  693. break;
  694. case SMU_I2C_TRANSFER_COMBINED:
  695. cmd->info.devaddr &= 0xfe;
  696. case SMU_I2C_TRANSFER_STDSUB:
  697. if (cmd->info.sublen > 3)
  698. return -EINVAL;
  699. break;
  700. default:
  701. return -EINVAL;
  702. }
  703. /* Finish setting up command based on transfer direction
  704. */
  705. if (cmd->read) {
  706. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  707. return -EINVAL;
  708. memset(cmd->info.data, 0xff, cmd->info.datalen);
  709. cmd->scmd.data_len = 9;
  710. } else {
  711. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  712. return -EINVAL;
  713. cmd->scmd.data_len = 9 + cmd->info.datalen;
  714. }
  715. DPRINTK("SMU: i2c enqueuing command\n");
  716. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  717. cmd->read ? "read" : "write", cmd->info.datalen,
  718. cmd->info.bus, cmd->info.caddr,
  719. cmd->info.subaddr[0], cmd->info.type);
  720. /* Enqueue command in i2c list, and if empty, enqueue also in
  721. * main command list
  722. */
  723. spin_lock_irqsave(&smu->lock, flags);
  724. if (smu->cmd_i2c_cur == NULL) {
  725. smu->cmd_i2c_cur = cmd;
  726. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  727. if (smu->cmd_cur == NULL)
  728. smu_start_cmd();
  729. } else
  730. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  731. spin_unlock_irqrestore(&smu->lock, flags);
  732. return 0;
  733. }
  734. /*
  735. * Handling of "partitions"
  736. */
  737. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  738. {
  739. DECLARE_COMPLETION_ONSTACK(comp);
  740. unsigned int chunk;
  741. struct smu_cmd cmd;
  742. int rc;
  743. u8 params[8];
  744. /* We currently use a chunk size of 0xe. We could check the
  745. * SMU firmware version and use bigger sizes though
  746. */
  747. chunk = 0xe;
  748. while (len) {
  749. unsigned int clen = min(len, chunk);
  750. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  751. cmd.data_len = 7;
  752. cmd.data_buf = params;
  753. cmd.reply_len = chunk;
  754. cmd.reply_buf = dest;
  755. cmd.done = smu_done_complete;
  756. cmd.misc = &comp;
  757. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  758. params[1] = 0x4;
  759. *((u32 *)&params[2]) = addr;
  760. params[6] = clen;
  761. rc = smu_queue_cmd(&cmd);
  762. if (rc)
  763. return rc;
  764. wait_for_completion(&comp);
  765. if (cmd.status != 0)
  766. return rc;
  767. if (cmd.reply_len != clen) {
  768. printk(KERN_DEBUG "SMU: short read in "
  769. "smu_read_datablock, got: %d, want: %d\n",
  770. cmd.reply_len, clen);
  771. return -EIO;
  772. }
  773. len -= clen;
  774. addr += clen;
  775. dest += clen;
  776. }
  777. return 0;
  778. }
  779. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  780. {
  781. DECLARE_COMPLETION_ONSTACK(comp);
  782. struct smu_simple_cmd cmd;
  783. unsigned int addr, len, tlen;
  784. struct smu_sdbp_header *hdr;
  785. struct property *prop;
  786. /* First query the partition info */
  787. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  788. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  789. smu_done_complete, &comp,
  790. SMU_CMD_PARTITION_LATEST, id);
  791. wait_for_completion(&comp);
  792. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  793. cmd.cmd.status, cmd.cmd.reply_len);
  794. /* Partition doesn't exist (or other error) */
  795. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  796. return NULL;
  797. /* Fetch address and length from reply */
  798. addr = *((u16 *)cmd.buffer);
  799. len = cmd.buffer[3] << 2;
  800. /* Calucluate total length to allocate, including the 17 bytes
  801. * for "sdb-partition-XX" that we append at the end of the buffer
  802. */
  803. tlen = sizeof(struct property) + len + 18;
  804. prop = kzalloc(tlen, GFP_KERNEL);
  805. if (prop == NULL)
  806. return NULL;
  807. hdr = (struct smu_sdbp_header *)(prop + 1);
  808. prop->name = ((char *)prop) + tlen - 18;
  809. sprintf(prop->name, "sdb-partition-%02x", id);
  810. prop->length = len;
  811. prop->value = hdr;
  812. prop->next = NULL;
  813. /* Read the datablock */
  814. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  815. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  816. "partition %02x !\n", id);
  817. goto failure;
  818. }
  819. /* Got it, check a few things and create the property */
  820. if (hdr->id != id) {
  821. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  822. "%02x !\n", id, hdr->id);
  823. goto failure;
  824. }
  825. if (prom_add_property(smu->of_node, prop)) {
  826. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  827. "property !\n", id);
  828. goto failure;
  829. }
  830. return hdr;
  831. failure:
  832. kfree(prop);
  833. return NULL;
  834. }
  835. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  836. * when interruptible is 1
  837. */
  838. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  839. unsigned int *size, int interruptible)
  840. {
  841. char pname[32];
  842. const struct smu_sdbp_header *part;
  843. if (!smu)
  844. return NULL;
  845. sprintf(pname, "sdb-partition-%02x", id);
  846. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  847. if (interruptible) {
  848. int rc;
  849. rc = mutex_lock_interruptible(&smu_part_access);
  850. if (rc)
  851. return ERR_PTR(rc);
  852. } else
  853. mutex_lock(&smu_part_access);
  854. part = of_get_property(smu->of_node, pname, size);
  855. if (part == NULL) {
  856. DPRINTK("trying to extract from SMU ...\n");
  857. part = smu_create_sdb_partition(id);
  858. if (part != NULL && size)
  859. *size = part->len << 2;
  860. }
  861. mutex_unlock(&smu_part_access);
  862. return part;
  863. }
  864. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  865. {
  866. return __smu_get_sdb_partition(id, size, 0);
  867. }
  868. EXPORT_SYMBOL(smu_get_sdb_partition);
  869. /*
  870. * Userland driver interface
  871. */
  872. static LIST_HEAD(smu_clist);
  873. static DEFINE_SPINLOCK(smu_clist_lock);
  874. enum smu_file_mode {
  875. smu_file_commands,
  876. smu_file_events,
  877. smu_file_closing
  878. };
  879. struct smu_private
  880. {
  881. struct list_head list;
  882. enum smu_file_mode mode;
  883. int busy;
  884. struct smu_cmd cmd;
  885. spinlock_t lock;
  886. wait_queue_head_t wait;
  887. u8 buffer[SMU_MAX_DATA];
  888. };
  889. static int smu_open(struct inode *inode, struct file *file)
  890. {
  891. struct smu_private *pp;
  892. unsigned long flags;
  893. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  894. if (pp == 0)
  895. return -ENOMEM;
  896. spin_lock_init(&pp->lock);
  897. pp->mode = smu_file_commands;
  898. init_waitqueue_head(&pp->wait);
  899. spin_lock_irqsave(&smu_clist_lock, flags);
  900. list_add(&pp->list, &smu_clist);
  901. spin_unlock_irqrestore(&smu_clist_lock, flags);
  902. file->private_data = pp;
  903. return 0;
  904. }
  905. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  906. {
  907. struct smu_private *pp = misc;
  908. wake_up_all(&pp->wait);
  909. }
  910. static ssize_t smu_write(struct file *file, const char __user *buf,
  911. size_t count, loff_t *ppos)
  912. {
  913. struct smu_private *pp = file->private_data;
  914. unsigned long flags;
  915. struct smu_user_cmd_hdr hdr;
  916. int rc = 0;
  917. if (pp->busy)
  918. return -EBUSY;
  919. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  920. return -EFAULT;
  921. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  922. pp->mode = smu_file_events;
  923. return 0;
  924. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  925. const struct smu_sdbp_header *part;
  926. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  927. if (part == NULL)
  928. return -EINVAL;
  929. else if (IS_ERR(part))
  930. return PTR_ERR(part);
  931. return 0;
  932. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  933. return -EINVAL;
  934. else if (pp->mode != smu_file_commands)
  935. return -EBADFD;
  936. else if (hdr.data_len > SMU_MAX_DATA)
  937. return -EINVAL;
  938. spin_lock_irqsave(&pp->lock, flags);
  939. if (pp->busy) {
  940. spin_unlock_irqrestore(&pp->lock, flags);
  941. return -EBUSY;
  942. }
  943. pp->busy = 1;
  944. pp->cmd.status = 1;
  945. spin_unlock_irqrestore(&pp->lock, flags);
  946. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  947. pp->busy = 0;
  948. return -EFAULT;
  949. }
  950. pp->cmd.cmd = hdr.cmd;
  951. pp->cmd.data_len = hdr.data_len;
  952. pp->cmd.reply_len = SMU_MAX_DATA;
  953. pp->cmd.data_buf = pp->buffer;
  954. pp->cmd.reply_buf = pp->buffer;
  955. pp->cmd.done = smu_user_cmd_done;
  956. pp->cmd.misc = pp;
  957. rc = smu_queue_cmd(&pp->cmd);
  958. if (rc < 0)
  959. return rc;
  960. return count;
  961. }
  962. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  963. char __user *buf, size_t count)
  964. {
  965. DECLARE_WAITQUEUE(wait, current);
  966. struct smu_user_reply_hdr hdr;
  967. unsigned long flags;
  968. int size, rc = 0;
  969. if (!pp->busy)
  970. return 0;
  971. if (count < sizeof(struct smu_user_reply_hdr))
  972. return -EOVERFLOW;
  973. spin_lock_irqsave(&pp->lock, flags);
  974. if (pp->cmd.status == 1) {
  975. if (file->f_flags & O_NONBLOCK)
  976. return -EAGAIN;
  977. add_wait_queue(&pp->wait, &wait);
  978. for (;;) {
  979. set_current_state(TASK_INTERRUPTIBLE);
  980. rc = 0;
  981. if (pp->cmd.status != 1)
  982. break;
  983. rc = -ERESTARTSYS;
  984. if (signal_pending(current))
  985. break;
  986. spin_unlock_irqrestore(&pp->lock, flags);
  987. schedule();
  988. spin_lock_irqsave(&pp->lock, flags);
  989. }
  990. set_current_state(TASK_RUNNING);
  991. remove_wait_queue(&pp->wait, &wait);
  992. }
  993. spin_unlock_irqrestore(&pp->lock, flags);
  994. if (rc)
  995. return rc;
  996. if (pp->cmd.status != 0)
  997. pp->cmd.reply_len = 0;
  998. size = sizeof(hdr) + pp->cmd.reply_len;
  999. if (count < size)
  1000. size = count;
  1001. rc = size;
  1002. hdr.status = pp->cmd.status;
  1003. hdr.reply_len = pp->cmd.reply_len;
  1004. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1005. return -EFAULT;
  1006. size -= sizeof(hdr);
  1007. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1008. return -EFAULT;
  1009. pp->busy = 0;
  1010. return rc;
  1011. }
  1012. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1013. char __user *buf, size_t count)
  1014. {
  1015. /* Not implemented */
  1016. msleep_interruptible(1000);
  1017. return 0;
  1018. }
  1019. static ssize_t smu_read(struct file *file, char __user *buf,
  1020. size_t count, loff_t *ppos)
  1021. {
  1022. struct smu_private *pp = file->private_data;
  1023. if (pp->mode == smu_file_commands)
  1024. return smu_read_command(file, pp, buf, count);
  1025. if (pp->mode == smu_file_events)
  1026. return smu_read_events(file, pp, buf, count);
  1027. return -EBADFD;
  1028. }
  1029. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1030. {
  1031. struct smu_private *pp = file->private_data;
  1032. unsigned int mask = 0;
  1033. unsigned long flags;
  1034. if (pp == 0)
  1035. return 0;
  1036. if (pp->mode == smu_file_commands) {
  1037. poll_wait(file, &pp->wait, wait);
  1038. spin_lock_irqsave(&pp->lock, flags);
  1039. if (pp->busy && pp->cmd.status != 1)
  1040. mask |= POLLIN;
  1041. spin_unlock_irqrestore(&pp->lock, flags);
  1042. } if (pp->mode == smu_file_events) {
  1043. /* Not yet implemented */
  1044. }
  1045. return mask;
  1046. }
  1047. static int smu_release(struct inode *inode, struct file *file)
  1048. {
  1049. struct smu_private *pp = file->private_data;
  1050. unsigned long flags;
  1051. unsigned int busy;
  1052. if (pp == 0)
  1053. return 0;
  1054. file->private_data = NULL;
  1055. /* Mark file as closing to avoid races with new request */
  1056. spin_lock_irqsave(&pp->lock, flags);
  1057. pp->mode = smu_file_closing;
  1058. busy = pp->busy;
  1059. /* Wait for any pending request to complete */
  1060. if (busy && pp->cmd.status == 1) {
  1061. DECLARE_WAITQUEUE(wait, current);
  1062. add_wait_queue(&pp->wait, &wait);
  1063. for (;;) {
  1064. set_current_state(TASK_UNINTERRUPTIBLE);
  1065. if (pp->cmd.status != 1)
  1066. break;
  1067. spin_unlock_irqrestore(&pp->lock, flags);
  1068. schedule();
  1069. spin_lock_irqsave(&pp->lock, flags);
  1070. }
  1071. set_current_state(TASK_RUNNING);
  1072. remove_wait_queue(&pp->wait, &wait);
  1073. }
  1074. spin_unlock_irqrestore(&pp->lock, flags);
  1075. spin_lock_irqsave(&smu_clist_lock, flags);
  1076. list_del(&pp->list);
  1077. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1078. kfree(pp);
  1079. return 0;
  1080. }
  1081. static const struct file_operations smu_device_fops = {
  1082. .llseek = no_llseek,
  1083. .read = smu_read,
  1084. .write = smu_write,
  1085. .poll = smu_fpoll,
  1086. .open = smu_open,
  1087. .release = smu_release,
  1088. };
  1089. static struct miscdevice pmu_device = {
  1090. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1091. };
  1092. static int smu_device_init(void)
  1093. {
  1094. if (!smu)
  1095. return -ENODEV;
  1096. if (misc_register(&pmu_device) < 0)
  1097. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1098. return 0;
  1099. }
  1100. device_initcall(smu_device_init);