ehca_main.c 27 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * module start stop, hca detection
  5. *
  6. * Authors: Heiko J Schick <schickhj@de.ibm.com>
  7. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  8. * Joachim Fenkes <fenkes@de.ibm.com>
  9. *
  10. * Copyright (c) 2005 IBM Corporation
  11. *
  12. * All rights reserved.
  13. *
  14. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  15. * BSD.
  16. *
  17. * OpenIB BSD License
  18. *
  19. * Redistribution and use in source and binary forms, with or without
  20. * modification, are permitted provided that the following conditions are met:
  21. *
  22. * Redistributions of source code must retain the above copyright notice, this
  23. * list of conditions and the following disclaimer.
  24. *
  25. * Redistributions in binary form must reproduce the above copyright notice,
  26. * this list of conditions and the following disclaimer in the documentation
  27. * and/or other materials
  28. * provided with the distribution.
  29. *
  30. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  31. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  32. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  33. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  34. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  35. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  36. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  37. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  38. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  39. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  40. * POSSIBILITY OF SUCH DAMAGE.
  41. */
  42. #ifdef CONFIG_PPC_64K_PAGES
  43. #include <linux/slab.h>
  44. #endif
  45. #include "ehca_classes.h"
  46. #include "ehca_iverbs.h"
  47. #include "ehca_mrmw.h"
  48. #include "ehca_tools.h"
  49. #include "hcp_if.h"
  50. #define HCAD_VERSION "0025"
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
  53. MODULE_DESCRIPTION("IBM eServer HCA InfiniBand Device Driver");
  54. MODULE_VERSION(HCAD_VERSION);
  55. static int ehca_open_aqp1 = 0;
  56. static int ehca_hw_level = 0;
  57. static int ehca_poll_all_eqs = 1;
  58. static int ehca_mr_largepage = 1;
  59. int ehca_debug_level = 0;
  60. int ehca_nr_ports = 2;
  61. int ehca_use_hp_mr = 0;
  62. int ehca_port_act_time = 30;
  63. int ehca_static_rate = -1;
  64. int ehca_scaling_code = 0;
  65. int ehca_lock_hcalls = -1;
  66. module_param_named(open_aqp1, ehca_open_aqp1, int, S_IRUGO);
  67. module_param_named(debug_level, ehca_debug_level, int, S_IRUGO);
  68. module_param_named(hw_level, ehca_hw_level, int, S_IRUGO);
  69. module_param_named(nr_ports, ehca_nr_ports, int, S_IRUGO);
  70. module_param_named(use_hp_mr, ehca_use_hp_mr, int, S_IRUGO);
  71. module_param_named(port_act_time, ehca_port_act_time, int, S_IRUGO);
  72. module_param_named(poll_all_eqs, ehca_poll_all_eqs, int, S_IRUGO);
  73. module_param_named(static_rate, ehca_static_rate, int, S_IRUGO);
  74. module_param_named(scaling_code, ehca_scaling_code, int, S_IRUGO);
  75. module_param_named(mr_largepage, ehca_mr_largepage, int, S_IRUGO);
  76. module_param_named(lock_hcalls, ehca_lock_hcalls, bool, S_IRUGO);
  77. MODULE_PARM_DESC(open_aqp1,
  78. "AQP1 on startup (0: no (default), 1: yes)");
  79. MODULE_PARM_DESC(debug_level,
  80. "debug level"
  81. " (0: no debug traces (default), 1: with debug traces)");
  82. MODULE_PARM_DESC(hw_level,
  83. "hardware level"
  84. " (0: autosensing (default), 1: v. 0.20, 2: v. 0.21)");
  85. MODULE_PARM_DESC(nr_ports,
  86. "number of connected ports (-1: autodetect, 1: port one only, "
  87. "2: two ports (default)");
  88. MODULE_PARM_DESC(use_hp_mr,
  89. "high performance MRs (0: no (default), 1: yes)");
  90. MODULE_PARM_DESC(port_act_time,
  91. "time to wait for port activation (default: 30 sec)");
  92. MODULE_PARM_DESC(poll_all_eqs,
  93. "polls all event queues periodically"
  94. " (0: no, 1: yes (default))");
  95. MODULE_PARM_DESC(static_rate,
  96. "set permanent static rate (default: disabled)");
  97. MODULE_PARM_DESC(scaling_code,
  98. "set scaling code (0: disabled/default, 1: enabled)");
  99. MODULE_PARM_DESC(mr_largepage,
  100. "use large page for MR (0: use PAGE_SIZE (default), "
  101. "1: use large page depending on MR size");
  102. MODULE_PARM_DESC(lock_hcalls,
  103. "serialize all hCalls made by the driver "
  104. "(default: autodetect)");
  105. DEFINE_RWLOCK(ehca_qp_idr_lock);
  106. DEFINE_RWLOCK(ehca_cq_idr_lock);
  107. DEFINE_IDR(ehca_qp_idr);
  108. DEFINE_IDR(ehca_cq_idr);
  109. static LIST_HEAD(shca_list); /* list of all registered ehcas */
  110. static DEFINE_SPINLOCK(shca_list_lock);
  111. static struct timer_list poll_eqs_timer;
  112. #ifdef CONFIG_PPC_64K_PAGES
  113. static struct kmem_cache *ctblk_cache;
  114. void *ehca_alloc_fw_ctrlblock(gfp_t flags)
  115. {
  116. void *ret = kmem_cache_zalloc(ctblk_cache, flags);
  117. if (!ret)
  118. ehca_gen_err("Out of memory for ctblk");
  119. return ret;
  120. }
  121. void ehca_free_fw_ctrlblock(void *ptr)
  122. {
  123. if (ptr)
  124. kmem_cache_free(ctblk_cache, ptr);
  125. }
  126. #endif
  127. int ehca2ib_return_code(u64 ehca_rc)
  128. {
  129. switch (ehca_rc) {
  130. case H_SUCCESS:
  131. return 0;
  132. case H_RESOURCE: /* Resource in use */
  133. case H_BUSY:
  134. return -EBUSY;
  135. case H_NOT_ENOUGH_RESOURCES: /* insufficient resources */
  136. case H_CONSTRAINED: /* resource constraint */
  137. case H_NO_MEM:
  138. return -ENOMEM;
  139. default:
  140. return -EINVAL;
  141. }
  142. }
  143. static int ehca_create_slab_caches(void)
  144. {
  145. int ret;
  146. ret = ehca_init_pd_cache();
  147. if (ret) {
  148. ehca_gen_err("Cannot create PD SLAB cache.");
  149. return ret;
  150. }
  151. ret = ehca_init_cq_cache();
  152. if (ret) {
  153. ehca_gen_err("Cannot create CQ SLAB cache.");
  154. goto create_slab_caches2;
  155. }
  156. ret = ehca_init_qp_cache();
  157. if (ret) {
  158. ehca_gen_err("Cannot create QP SLAB cache.");
  159. goto create_slab_caches3;
  160. }
  161. ret = ehca_init_av_cache();
  162. if (ret) {
  163. ehca_gen_err("Cannot create AV SLAB cache.");
  164. goto create_slab_caches4;
  165. }
  166. ret = ehca_init_mrmw_cache();
  167. if (ret) {
  168. ehca_gen_err("Cannot create MR&MW SLAB cache.");
  169. goto create_slab_caches5;
  170. }
  171. ret = ehca_init_small_qp_cache();
  172. if (ret) {
  173. ehca_gen_err("Cannot create small queue SLAB cache.");
  174. goto create_slab_caches6;
  175. }
  176. #ifdef CONFIG_PPC_64K_PAGES
  177. ctblk_cache = kmem_cache_create("ehca_cache_ctblk",
  178. EHCA_PAGESIZE, H_CB_ALIGNMENT,
  179. SLAB_HWCACHE_ALIGN,
  180. NULL);
  181. if (!ctblk_cache) {
  182. ehca_gen_err("Cannot create ctblk SLAB cache.");
  183. ehca_cleanup_small_qp_cache();
  184. goto create_slab_caches6;
  185. }
  186. #endif
  187. return 0;
  188. create_slab_caches6:
  189. ehca_cleanup_mrmw_cache();
  190. create_slab_caches5:
  191. ehca_cleanup_av_cache();
  192. create_slab_caches4:
  193. ehca_cleanup_qp_cache();
  194. create_slab_caches3:
  195. ehca_cleanup_cq_cache();
  196. create_slab_caches2:
  197. ehca_cleanup_pd_cache();
  198. return ret;
  199. }
  200. static void ehca_destroy_slab_caches(void)
  201. {
  202. ehca_cleanup_small_qp_cache();
  203. ehca_cleanup_mrmw_cache();
  204. ehca_cleanup_av_cache();
  205. ehca_cleanup_qp_cache();
  206. ehca_cleanup_cq_cache();
  207. ehca_cleanup_pd_cache();
  208. #ifdef CONFIG_PPC_64K_PAGES
  209. if (ctblk_cache)
  210. kmem_cache_destroy(ctblk_cache);
  211. #endif
  212. }
  213. #define EHCA_HCAAVER EHCA_BMASK_IBM(32, 39)
  214. #define EHCA_REVID EHCA_BMASK_IBM(40, 63)
  215. static struct cap_descr {
  216. u64 mask;
  217. char *descr;
  218. } hca_cap_descr[] = {
  219. { HCA_CAP_AH_PORT_NR_CHECK, "HCA_CAP_AH_PORT_NR_CHECK" },
  220. { HCA_CAP_ATOMIC, "HCA_CAP_ATOMIC" },
  221. { HCA_CAP_AUTO_PATH_MIG, "HCA_CAP_AUTO_PATH_MIG" },
  222. { HCA_CAP_BAD_P_KEY_CTR, "HCA_CAP_BAD_P_KEY_CTR" },
  223. { HCA_CAP_SQD_RTS_PORT_CHANGE, "HCA_CAP_SQD_RTS_PORT_CHANGE" },
  224. { HCA_CAP_CUR_QP_STATE_MOD, "HCA_CAP_CUR_QP_STATE_MOD" },
  225. { HCA_CAP_INIT_TYPE, "HCA_CAP_INIT_TYPE" },
  226. { HCA_CAP_PORT_ACTIVE_EVENT, "HCA_CAP_PORT_ACTIVE_EVENT" },
  227. { HCA_CAP_Q_KEY_VIOL_CTR, "HCA_CAP_Q_KEY_VIOL_CTR" },
  228. { HCA_CAP_WQE_RESIZE, "HCA_CAP_WQE_RESIZE" },
  229. { HCA_CAP_RAW_PACKET_MCAST, "HCA_CAP_RAW_PACKET_MCAST" },
  230. { HCA_CAP_SHUTDOWN_PORT, "HCA_CAP_SHUTDOWN_PORT" },
  231. { HCA_CAP_RC_LL_QP, "HCA_CAP_RC_LL_QP" },
  232. { HCA_CAP_SRQ, "HCA_CAP_SRQ" },
  233. { HCA_CAP_UD_LL_QP, "HCA_CAP_UD_LL_QP" },
  234. { HCA_CAP_RESIZE_MR, "HCA_CAP_RESIZE_MR" },
  235. { HCA_CAP_MINI_QP, "HCA_CAP_MINI_QP" },
  236. { HCA_CAP_H_ALLOC_RES_SYNC, "HCA_CAP_H_ALLOC_RES_SYNC" },
  237. };
  238. static int ehca_sense_attributes(struct ehca_shca *shca)
  239. {
  240. int i, ret = 0;
  241. u64 h_ret;
  242. struct hipz_query_hca *rblock;
  243. struct hipz_query_port *port;
  244. static const u32 pgsize_map[] = {
  245. HCA_CAP_MR_PGSIZE_4K, 0x1000,
  246. HCA_CAP_MR_PGSIZE_64K, 0x10000,
  247. HCA_CAP_MR_PGSIZE_1M, 0x100000,
  248. HCA_CAP_MR_PGSIZE_16M, 0x1000000,
  249. };
  250. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  251. if (!rblock) {
  252. ehca_gen_err("Cannot allocate rblock memory.");
  253. return -ENOMEM;
  254. }
  255. h_ret = hipz_h_query_hca(shca->ipz_hca_handle, rblock);
  256. if (h_ret != H_SUCCESS) {
  257. ehca_gen_err("Cannot query device properties. h_ret=%li",
  258. h_ret);
  259. ret = -EPERM;
  260. goto sense_attributes1;
  261. }
  262. if (ehca_nr_ports == 1)
  263. shca->num_ports = 1;
  264. else
  265. shca->num_ports = (u8)rblock->num_ports;
  266. ehca_gen_dbg(" ... found %x ports", rblock->num_ports);
  267. if (ehca_hw_level == 0) {
  268. u32 hcaaver;
  269. u32 revid;
  270. hcaaver = EHCA_BMASK_GET(EHCA_HCAAVER, rblock->hw_ver);
  271. revid = EHCA_BMASK_GET(EHCA_REVID, rblock->hw_ver);
  272. ehca_gen_dbg(" ... hardware version=%x:%x", hcaaver, revid);
  273. if (hcaaver == 1) {
  274. if (revid <= 3)
  275. shca->hw_level = 0x10 | (revid + 1);
  276. else
  277. shca->hw_level = 0x14;
  278. } else if (hcaaver == 2) {
  279. if (revid == 0)
  280. shca->hw_level = 0x21;
  281. else if (revid == 0x10)
  282. shca->hw_level = 0x22;
  283. else if (revid == 0x20 || revid == 0x21)
  284. shca->hw_level = 0x23;
  285. }
  286. if (!shca->hw_level) {
  287. ehca_gen_warn("unknown hardware version"
  288. " - assuming default level");
  289. shca->hw_level = 0x22;
  290. }
  291. } else
  292. shca->hw_level = ehca_hw_level;
  293. ehca_gen_dbg(" ... hardware level=%x", shca->hw_level);
  294. shca->hca_cap = rblock->hca_cap_indicators;
  295. ehca_gen_dbg(" ... HCA capabilities:");
  296. for (i = 0; i < ARRAY_SIZE(hca_cap_descr); i++)
  297. if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
  298. ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
  299. /* Autodetect hCall locking -- the "H_ALLOC_RESOURCE synced" flag is
  300. * a firmware property, so it's valid across all adapters
  301. */
  302. if (ehca_lock_hcalls == -1)
  303. ehca_lock_hcalls = !(shca->hca_cap & HCA_CAP_H_ALLOC_RES_SYNC);
  304. /* translate supported MR page sizes; always support 4K */
  305. shca->hca_cap_mr_pgsize = EHCA_PAGESIZE;
  306. if (ehca_mr_largepage) { /* support extra sizes only if enabled */
  307. for (i = 0; i < ARRAY_SIZE(pgsize_map); i += 2)
  308. if (rblock->memory_page_size_supported & pgsize_map[i])
  309. shca->hca_cap_mr_pgsize |= pgsize_map[i + 1];
  310. }
  311. /* query max MTU from first port -- it's the same for all ports */
  312. port = (struct hipz_query_port *)rblock;
  313. h_ret = hipz_h_query_port(shca->ipz_hca_handle, 1, port);
  314. if (h_ret != H_SUCCESS) {
  315. ehca_gen_err("Cannot query port properties. h_ret=%li",
  316. h_ret);
  317. ret = -EPERM;
  318. goto sense_attributes1;
  319. }
  320. shca->max_mtu = port->max_mtu;
  321. sense_attributes1:
  322. ehca_free_fw_ctrlblock(rblock);
  323. return ret;
  324. }
  325. static int init_node_guid(struct ehca_shca *shca)
  326. {
  327. int ret = 0;
  328. struct hipz_query_hca *rblock;
  329. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  330. if (!rblock) {
  331. ehca_err(&shca->ib_device, "Can't allocate rblock memory.");
  332. return -ENOMEM;
  333. }
  334. if (hipz_h_query_hca(shca->ipz_hca_handle, rblock) != H_SUCCESS) {
  335. ehca_err(&shca->ib_device, "Can't query device properties");
  336. ret = -EINVAL;
  337. goto init_node_guid1;
  338. }
  339. memcpy(&shca->ib_device.node_guid, &rblock->node_guid, sizeof(u64));
  340. init_node_guid1:
  341. ehca_free_fw_ctrlblock(rblock);
  342. return ret;
  343. }
  344. static int ehca_init_device(struct ehca_shca *shca)
  345. {
  346. int ret;
  347. ret = init_node_guid(shca);
  348. if (ret)
  349. return ret;
  350. strlcpy(shca->ib_device.name, "ehca%d", IB_DEVICE_NAME_MAX);
  351. shca->ib_device.owner = THIS_MODULE;
  352. shca->ib_device.uverbs_abi_ver = 8;
  353. shca->ib_device.uverbs_cmd_mask =
  354. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  355. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  356. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  357. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  358. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  359. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  360. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  361. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  362. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  363. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  364. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  365. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  366. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  367. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  368. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  369. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
  370. shca->ib_device.node_type = RDMA_NODE_IB_CA;
  371. shca->ib_device.phys_port_cnt = shca->num_ports;
  372. shca->ib_device.num_comp_vectors = 1;
  373. shca->ib_device.dma_device = &shca->ofdev->dev;
  374. shca->ib_device.query_device = ehca_query_device;
  375. shca->ib_device.query_port = ehca_query_port;
  376. shca->ib_device.query_gid = ehca_query_gid;
  377. shca->ib_device.query_pkey = ehca_query_pkey;
  378. /* shca->in_device.modify_device = ehca_modify_device */
  379. shca->ib_device.modify_port = ehca_modify_port;
  380. shca->ib_device.alloc_ucontext = ehca_alloc_ucontext;
  381. shca->ib_device.dealloc_ucontext = ehca_dealloc_ucontext;
  382. shca->ib_device.alloc_pd = ehca_alloc_pd;
  383. shca->ib_device.dealloc_pd = ehca_dealloc_pd;
  384. shca->ib_device.create_ah = ehca_create_ah;
  385. /* shca->ib_device.modify_ah = ehca_modify_ah; */
  386. shca->ib_device.query_ah = ehca_query_ah;
  387. shca->ib_device.destroy_ah = ehca_destroy_ah;
  388. shca->ib_device.create_qp = ehca_create_qp;
  389. shca->ib_device.modify_qp = ehca_modify_qp;
  390. shca->ib_device.query_qp = ehca_query_qp;
  391. shca->ib_device.destroy_qp = ehca_destroy_qp;
  392. shca->ib_device.post_send = ehca_post_send;
  393. shca->ib_device.post_recv = ehca_post_recv;
  394. shca->ib_device.create_cq = ehca_create_cq;
  395. shca->ib_device.destroy_cq = ehca_destroy_cq;
  396. shca->ib_device.resize_cq = ehca_resize_cq;
  397. shca->ib_device.poll_cq = ehca_poll_cq;
  398. /* shca->ib_device.peek_cq = ehca_peek_cq; */
  399. shca->ib_device.req_notify_cq = ehca_req_notify_cq;
  400. /* shca->ib_device.req_ncomp_notif = ehca_req_ncomp_notif; */
  401. shca->ib_device.get_dma_mr = ehca_get_dma_mr;
  402. shca->ib_device.reg_phys_mr = ehca_reg_phys_mr;
  403. shca->ib_device.reg_user_mr = ehca_reg_user_mr;
  404. shca->ib_device.query_mr = ehca_query_mr;
  405. shca->ib_device.dereg_mr = ehca_dereg_mr;
  406. shca->ib_device.rereg_phys_mr = ehca_rereg_phys_mr;
  407. shca->ib_device.alloc_mw = ehca_alloc_mw;
  408. shca->ib_device.bind_mw = ehca_bind_mw;
  409. shca->ib_device.dealloc_mw = ehca_dealloc_mw;
  410. shca->ib_device.alloc_fmr = ehca_alloc_fmr;
  411. shca->ib_device.map_phys_fmr = ehca_map_phys_fmr;
  412. shca->ib_device.unmap_fmr = ehca_unmap_fmr;
  413. shca->ib_device.dealloc_fmr = ehca_dealloc_fmr;
  414. shca->ib_device.attach_mcast = ehca_attach_mcast;
  415. shca->ib_device.detach_mcast = ehca_detach_mcast;
  416. shca->ib_device.process_mad = ehca_process_mad;
  417. shca->ib_device.mmap = ehca_mmap;
  418. if (EHCA_BMASK_GET(HCA_CAP_SRQ, shca->hca_cap)) {
  419. shca->ib_device.uverbs_cmd_mask |=
  420. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  421. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  422. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  423. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  424. shca->ib_device.create_srq = ehca_create_srq;
  425. shca->ib_device.modify_srq = ehca_modify_srq;
  426. shca->ib_device.query_srq = ehca_query_srq;
  427. shca->ib_device.destroy_srq = ehca_destroy_srq;
  428. shca->ib_device.post_srq_recv = ehca_post_srq_recv;
  429. }
  430. return ret;
  431. }
  432. static int ehca_create_aqp1(struct ehca_shca *shca, u32 port)
  433. {
  434. struct ehca_sport *sport = &shca->sport[port - 1];
  435. struct ib_cq *ibcq;
  436. struct ib_qp *ibqp;
  437. struct ib_qp_init_attr qp_init_attr;
  438. int ret;
  439. if (sport->ibcq_aqp1) {
  440. ehca_err(&shca->ib_device, "AQP1 CQ is already created.");
  441. return -EPERM;
  442. }
  443. ibcq = ib_create_cq(&shca->ib_device, NULL, NULL, (void *)(-1), 10, 0);
  444. if (IS_ERR(ibcq)) {
  445. ehca_err(&shca->ib_device, "Cannot create AQP1 CQ.");
  446. return PTR_ERR(ibcq);
  447. }
  448. sport->ibcq_aqp1 = ibcq;
  449. if (sport->ibqp_sqp[IB_QPT_GSI]) {
  450. ehca_err(&shca->ib_device, "AQP1 QP is already created.");
  451. ret = -EPERM;
  452. goto create_aqp1;
  453. }
  454. memset(&qp_init_attr, 0, sizeof(struct ib_qp_init_attr));
  455. qp_init_attr.send_cq = ibcq;
  456. qp_init_attr.recv_cq = ibcq;
  457. qp_init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
  458. qp_init_attr.cap.max_send_wr = 100;
  459. qp_init_attr.cap.max_recv_wr = 100;
  460. qp_init_attr.cap.max_send_sge = 2;
  461. qp_init_attr.cap.max_recv_sge = 1;
  462. qp_init_attr.qp_type = IB_QPT_GSI;
  463. qp_init_attr.port_num = port;
  464. qp_init_attr.qp_context = NULL;
  465. qp_init_attr.event_handler = NULL;
  466. qp_init_attr.srq = NULL;
  467. ibqp = ib_create_qp(&shca->pd->ib_pd, &qp_init_attr);
  468. if (IS_ERR(ibqp)) {
  469. ehca_err(&shca->ib_device, "Cannot create AQP1 QP.");
  470. ret = PTR_ERR(ibqp);
  471. goto create_aqp1;
  472. }
  473. sport->ibqp_sqp[IB_QPT_GSI] = ibqp;
  474. return 0;
  475. create_aqp1:
  476. ib_destroy_cq(sport->ibcq_aqp1);
  477. return ret;
  478. }
  479. static int ehca_destroy_aqp1(struct ehca_sport *sport)
  480. {
  481. int ret;
  482. ret = ib_destroy_qp(sport->ibqp_sqp[IB_QPT_GSI]);
  483. if (ret) {
  484. ehca_gen_err("Cannot destroy AQP1 QP. ret=%i", ret);
  485. return ret;
  486. }
  487. ret = ib_destroy_cq(sport->ibcq_aqp1);
  488. if (ret)
  489. ehca_gen_err("Cannot destroy AQP1 CQ. ret=%i", ret);
  490. return ret;
  491. }
  492. static ssize_t ehca_show_debug_level(struct device_driver *ddp, char *buf)
  493. {
  494. return snprintf(buf, PAGE_SIZE, "%d\n",
  495. ehca_debug_level);
  496. }
  497. static ssize_t ehca_store_debug_level(struct device_driver *ddp,
  498. const char *buf, size_t count)
  499. {
  500. int value = (*buf) - '0';
  501. if (value >= 0 && value <= 9)
  502. ehca_debug_level = value;
  503. return 1;
  504. }
  505. static DRIVER_ATTR(debug_level, S_IRUSR | S_IWUSR,
  506. ehca_show_debug_level, ehca_store_debug_level);
  507. static struct attribute *ehca_drv_attrs[] = {
  508. &driver_attr_debug_level.attr,
  509. NULL
  510. };
  511. static struct attribute_group ehca_drv_attr_grp = {
  512. .attrs = ehca_drv_attrs
  513. };
  514. static struct attribute_group *ehca_drv_attr_groups[] = {
  515. &ehca_drv_attr_grp,
  516. NULL,
  517. };
  518. #define EHCA_RESOURCE_ATTR(name) \
  519. static ssize_t ehca_show_##name(struct device *dev, \
  520. struct device_attribute *attr, \
  521. char *buf) \
  522. { \
  523. struct ehca_shca *shca; \
  524. struct hipz_query_hca *rblock; \
  525. int data; \
  526. \
  527. shca = dev->driver_data; \
  528. \
  529. rblock = ehca_alloc_fw_ctrlblock(GFP_KERNEL); \
  530. if (!rblock) { \
  531. dev_err(dev, "Can't allocate rblock memory.\n"); \
  532. return 0; \
  533. } \
  534. \
  535. if (hipz_h_query_hca(shca->ipz_hca_handle, rblock) != H_SUCCESS) { \
  536. dev_err(dev, "Can't query device properties\n"); \
  537. ehca_free_fw_ctrlblock(rblock); \
  538. return 0; \
  539. } \
  540. \
  541. data = rblock->name; \
  542. ehca_free_fw_ctrlblock(rblock); \
  543. \
  544. if ((strcmp(#name, "num_ports") == 0) && (ehca_nr_ports == 1)) \
  545. return snprintf(buf, 256, "1\n"); \
  546. else \
  547. return snprintf(buf, 256, "%d\n", data); \
  548. \
  549. } \
  550. static DEVICE_ATTR(name, S_IRUGO, ehca_show_##name, NULL);
  551. EHCA_RESOURCE_ATTR(num_ports);
  552. EHCA_RESOURCE_ATTR(hw_ver);
  553. EHCA_RESOURCE_ATTR(max_eq);
  554. EHCA_RESOURCE_ATTR(cur_eq);
  555. EHCA_RESOURCE_ATTR(max_cq);
  556. EHCA_RESOURCE_ATTR(cur_cq);
  557. EHCA_RESOURCE_ATTR(max_qp);
  558. EHCA_RESOURCE_ATTR(cur_qp);
  559. EHCA_RESOURCE_ATTR(max_mr);
  560. EHCA_RESOURCE_ATTR(cur_mr);
  561. EHCA_RESOURCE_ATTR(max_mw);
  562. EHCA_RESOURCE_ATTR(cur_mw);
  563. EHCA_RESOURCE_ATTR(max_pd);
  564. EHCA_RESOURCE_ATTR(max_ah);
  565. static ssize_t ehca_show_adapter_handle(struct device *dev,
  566. struct device_attribute *attr,
  567. char *buf)
  568. {
  569. struct ehca_shca *shca = dev->driver_data;
  570. return sprintf(buf, "%lx\n", shca->ipz_hca_handle.handle);
  571. }
  572. static DEVICE_ATTR(adapter_handle, S_IRUGO, ehca_show_adapter_handle, NULL);
  573. static ssize_t ehca_show_mr_largepage(struct device *dev,
  574. struct device_attribute *attr,
  575. char *buf)
  576. {
  577. return sprintf(buf, "%d\n", ehca_mr_largepage);
  578. }
  579. static DEVICE_ATTR(mr_largepage, S_IRUGO, ehca_show_mr_largepage, NULL);
  580. static struct attribute *ehca_dev_attrs[] = {
  581. &dev_attr_adapter_handle.attr,
  582. &dev_attr_num_ports.attr,
  583. &dev_attr_hw_ver.attr,
  584. &dev_attr_max_eq.attr,
  585. &dev_attr_cur_eq.attr,
  586. &dev_attr_max_cq.attr,
  587. &dev_attr_cur_cq.attr,
  588. &dev_attr_max_qp.attr,
  589. &dev_attr_cur_qp.attr,
  590. &dev_attr_max_mr.attr,
  591. &dev_attr_cur_mr.attr,
  592. &dev_attr_max_mw.attr,
  593. &dev_attr_cur_mw.attr,
  594. &dev_attr_max_pd.attr,
  595. &dev_attr_max_ah.attr,
  596. &dev_attr_mr_largepage.attr,
  597. NULL
  598. };
  599. static struct attribute_group ehca_dev_attr_grp = {
  600. .attrs = ehca_dev_attrs
  601. };
  602. static int __devinit ehca_probe(struct of_device *dev,
  603. const struct of_device_id *id)
  604. {
  605. struct ehca_shca *shca;
  606. const u64 *handle;
  607. struct ib_pd *ibpd;
  608. int ret, i;
  609. handle = of_get_property(dev->node, "ibm,hca-handle", NULL);
  610. if (!handle) {
  611. ehca_gen_err("Cannot get eHCA handle for adapter: %s.",
  612. dev->node->full_name);
  613. return -ENODEV;
  614. }
  615. if (!(*handle)) {
  616. ehca_gen_err("Wrong eHCA handle for adapter: %s.",
  617. dev->node->full_name);
  618. return -ENODEV;
  619. }
  620. shca = (struct ehca_shca *)ib_alloc_device(sizeof(*shca));
  621. if (!shca) {
  622. ehca_gen_err("Cannot allocate shca memory.");
  623. return -ENOMEM;
  624. }
  625. mutex_init(&shca->modify_mutex);
  626. for (i = 0; i < ARRAY_SIZE(shca->sport); i++)
  627. spin_lock_init(&shca->sport[i].mod_sqp_lock);
  628. shca->ofdev = dev;
  629. shca->ipz_hca_handle.handle = *handle;
  630. dev->dev.driver_data = shca;
  631. ret = ehca_sense_attributes(shca);
  632. if (ret < 0) {
  633. ehca_gen_err("Cannot sense eHCA attributes.");
  634. goto probe1;
  635. }
  636. ret = ehca_init_device(shca);
  637. if (ret) {
  638. ehca_gen_err("Cannot init ehca device struct");
  639. goto probe1;
  640. }
  641. /* create event queues */
  642. ret = ehca_create_eq(shca, &shca->eq, EHCA_EQ, 2048);
  643. if (ret) {
  644. ehca_err(&shca->ib_device, "Cannot create EQ.");
  645. goto probe1;
  646. }
  647. ret = ehca_create_eq(shca, &shca->neq, EHCA_NEQ, 513);
  648. if (ret) {
  649. ehca_err(&shca->ib_device, "Cannot create NEQ.");
  650. goto probe3;
  651. }
  652. /* create internal protection domain */
  653. ibpd = ehca_alloc_pd(&shca->ib_device, (void *)(-1), NULL);
  654. if (IS_ERR(ibpd)) {
  655. ehca_err(&shca->ib_device, "Cannot create internal PD.");
  656. ret = PTR_ERR(ibpd);
  657. goto probe4;
  658. }
  659. shca->pd = container_of(ibpd, struct ehca_pd, ib_pd);
  660. shca->pd->ib_pd.device = &shca->ib_device;
  661. /* create internal max MR */
  662. ret = ehca_reg_internal_maxmr(shca, shca->pd, &shca->maxmr);
  663. if (ret) {
  664. ehca_err(&shca->ib_device, "Cannot create internal MR ret=%i",
  665. ret);
  666. goto probe5;
  667. }
  668. ret = ib_register_device(&shca->ib_device);
  669. if (ret) {
  670. ehca_err(&shca->ib_device,
  671. "ib_register_device() failed ret=%i", ret);
  672. goto probe6;
  673. }
  674. /* create AQP1 for port 1 */
  675. if (ehca_open_aqp1 == 1) {
  676. shca->sport[0].port_state = IB_PORT_DOWN;
  677. ret = ehca_create_aqp1(shca, 1);
  678. if (ret) {
  679. ehca_err(&shca->ib_device,
  680. "Cannot create AQP1 for port 1.");
  681. goto probe7;
  682. }
  683. }
  684. /* create AQP1 for port 2 */
  685. if ((ehca_open_aqp1 == 1) && (shca->num_ports == 2)) {
  686. shca->sport[1].port_state = IB_PORT_DOWN;
  687. ret = ehca_create_aqp1(shca, 2);
  688. if (ret) {
  689. ehca_err(&shca->ib_device,
  690. "Cannot create AQP1 for port 2.");
  691. goto probe8;
  692. }
  693. }
  694. ret = sysfs_create_group(&dev->dev.kobj, &ehca_dev_attr_grp);
  695. if (ret) /* only complain; we can live without attributes */
  696. ehca_err(&shca->ib_device,
  697. "Cannot create device attributes ret=%d", ret);
  698. spin_lock(&shca_list_lock);
  699. list_add(&shca->shca_list, &shca_list);
  700. spin_unlock(&shca_list_lock);
  701. return 0;
  702. probe8:
  703. ret = ehca_destroy_aqp1(&shca->sport[0]);
  704. if (ret)
  705. ehca_err(&shca->ib_device,
  706. "Cannot destroy AQP1 for port 1. ret=%i", ret);
  707. probe7:
  708. ib_unregister_device(&shca->ib_device);
  709. probe6:
  710. ret = ehca_dereg_internal_maxmr(shca);
  711. if (ret)
  712. ehca_err(&shca->ib_device,
  713. "Cannot destroy internal MR. ret=%x", ret);
  714. probe5:
  715. ret = ehca_dealloc_pd(&shca->pd->ib_pd);
  716. if (ret)
  717. ehca_err(&shca->ib_device,
  718. "Cannot destroy internal PD. ret=%x", ret);
  719. probe4:
  720. ret = ehca_destroy_eq(shca, &shca->neq);
  721. if (ret)
  722. ehca_err(&shca->ib_device,
  723. "Cannot destroy NEQ. ret=%x", ret);
  724. probe3:
  725. ret = ehca_destroy_eq(shca, &shca->eq);
  726. if (ret)
  727. ehca_err(&shca->ib_device,
  728. "Cannot destroy EQ. ret=%x", ret);
  729. probe1:
  730. ib_dealloc_device(&shca->ib_device);
  731. return -EINVAL;
  732. }
  733. static int __devexit ehca_remove(struct of_device *dev)
  734. {
  735. struct ehca_shca *shca = dev->dev.driver_data;
  736. int ret;
  737. sysfs_remove_group(&dev->dev.kobj, &ehca_dev_attr_grp);
  738. if (ehca_open_aqp1 == 1) {
  739. int i;
  740. for (i = 0; i < shca->num_ports; i++) {
  741. ret = ehca_destroy_aqp1(&shca->sport[i]);
  742. if (ret)
  743. ehca_err(&shca->ib_device,
  744. "Cannot destroy AQP1 for port %x "
  745. "ret=%i", ret, i);
  746. }
  747. }
  748. ib_unregister_device(&shca->ib_device);
  749. ret = ehca_dereg_internal_maxmr(shca);
  750. if (ret)
  751. ehca_err(&shca->ib_device,
  752. "Cannot destroy internal MR. ret=%i", ret);
  753. ret = ehca_dealloc_pd(&shca->pd->ib_pd);
  754. if (ret)
  755. ehca_err(&shca->ib_device,
  756. "Cannot destroy internal PD. ret=%i", ret);
  757. ret = ehca_destroy_eq(shca, &shca->eq);
  758. if (ret)
  759. ehca_err(&shca->ib_device, "Cannot destroy EQ. ret=%i", ret);
  760. ret = ehca_destroy_eq(shca, &shca->neq);
  761. if (ret)
  762. ehca_err(&shca->ib_device, "Canot destroy NEQ. ret=%i", ret);
  763. ib_dealloc_device(&shca->ib_device);
  764. spin_lock(&shca_list_lock);
  765. list_del(&shca->shca_list);
  766. spin_unlock(&shca_list_lock);
  767. return ret;
  768. }
  769. static struct of_device_id ehca_device_table[] =
  770. {
  771. {
  772. .name = "lhca",
  773. .compatible = "IBM,lhca",
  774. },
  775. {},
  776. };
  777. static struct of_platform_driver ehca_driver = {
  778. .name = "ehca",
  779. .match_table = ehca_device_table,
  780. .probe = ehca_probe,
  781. .remove = ehca_remove,
  782. .driver = {
  783. .groups = ehca_drv_attr_groups,
  784. },
  785. };
  786. void ehca_poll_eqs(unsigned long data)
  787. {
  788. struct ehca_shca *shca;
  789. spin_lock(&shca_list_lock);
  790. list_for_each_entry(shca, &shca_list, shca_list) {
  791. if (shca->eq.is_initialized) {
  792. /* call deadman proc only if eq ptr does not change */
  793. struct ehca_eq *eq = &shca->eq;
  794. int max = 3;
  795. volatile u64 q_ofs, q_ofs2;
  796. u64 flags;
  797. spin_lock_irqsave(&eq->spinlock, flags);
  798. q_ofs = eq->ipz_queue.current_q_offset;
  799. spin_unlock_irqrestore(&eq->spinlock, flags);
  800. do {
  801. spin_lock_irqsave(&eq->spinlock, flags);
  802. q_ofs2 = eq->ipz_queue.current_q_offset;
  803. spin_unlock_irqrestore(&eq->spinlock, flags);
  804. max--;
  805. } while (q_ofs == q_ofs2 && max > 0);
  806. if (q_ofs == q_ofs2)
  807. ehca_process_eq(shca, 0);
  808. }
  809. }
  810. mod_timer(&poll_eqs_timer, round_jiffies(jiffies + HZ));
  811. spin_unlock(&shca_list_lock);
  812. }
  813. static int __init ehca_module_init(void)
  814. {
  815. int ret;
  816. printk(KERN_INFO "eHCA Infiniband Device Driver "
  817. "(Version " HCAD_VERSION ")\n");
  818. ret = ehca_create_comp_pool();
  819. if (ret) {
  820. ehca_gen_err("Cannot create comp pool.");
  821. return ret;
  822. }
  823. ret = ehca_create_slab_caches();
  824. if (ret) {
  825. ehca_gen_err("Cannot create SLAB caches");
  826. ret = -ENOMEM;
  827. goto module_init1;
  828. }
  829. ret = ibmebus_register_driver(&ehca_driver);
  830. if (ret) {
  831. ehca_gen_err("Cannot register eHCA device driver");
  832. ret = -EINVAL;
  833. goto module_init2;
  834. }
  835. if (ehca_poll_all_eqs != 1) {
  836. ehca_gen_err("WARNING!!!");
  837. ehca_gen_err("It is possible to lose interrupts.");
  838. } else {
  839. init_timer(&poll_eqs_timer);
  840. poll_eqs_timer.function = ehca_poll_eqs;
  841. poll_eqs_timer.expires = jiffies + HZ;
  842. add_timer(&poll_eqs_timer);
  843. }
  844. return 0;
  845. module_init2:
  846. ehca_destroy_slab_caches();
  847. module_init1:
  848. ehca_destroy_comp_pool();
  849. return ret;
  850. };
  851. static void __exit ehca_module_exit(void)
  852. {
  853. if (ehca_poll_all_eqs == 1)
  854. del_timer_sync(&poll_eqs_timer);
  855. ibmebus_unregister_driver(&ehca_driver);
  856. ehca_destroy_slab_caches();
  857. ehca_destroy_comp_pool();
  858. idr_destroy(&ehca_cq_idr);
  859. idr_destroy(&ehca_qp_idr);
  860. };
  861. module_init(ehca_module_init);
  862. module_exit(ehca_module_exit);