iwch_provider.c 32 KB

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  1. /*
  2. * Copyright (c) 2006 Chelsio, Inc. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/moduleparam.h>
  34. #include <linux/device.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/delay.h>
  38. #include <linux/errno.h>
  39. #include <linux/list.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/ethtool.h>
  42. #include <linux/rtnetlink.h>
  43. #include <asm/io.h>
  44. #include <asm/irq.h>
  45. #include <asm/byteorder.h>
  46. #include <rdma/iw_cm.h>
  47. #include <rdma/ib_verbs.h>
  48. #include <rdma/ib_smi.h>
  49. #include <rdma/ib_umem.h>
  50. #include <rdma/ib_user_verbs.h>
  51. #include "cxio_hal.h"
  52. #include "iwch.h"
  53. #include "iwch_provider.h"
  54. #include "iwch_cm.h"
  55. #include "iwch_user.h"
  56. static int iwch_modify_port(struct ib_device *ibdev,
  57. u8 port, int port_modify_mask,
  58. struct ib_port_modify *props)
  59. {
  60. return -ENOSYS;
  61. }
  62. static struct ib_ah *iwch_ah_create(struct ib_pd *pd,
  63. struct ib_ah_attr *ah_attr)
  64. {
  65. return ERR_PTR(-ENOSYS);
  66. }
  67. static int iwch_ah_destroy(struct ib_ah *ah)
  68. {
  69. return -ENOSYS;
  70. }
  71. static int iwch_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  72. {
  73. return -ENOSYS;
  74. }
  75. static int iwch_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  76. {
  77. return -ENOSYS;
  78. }
  79. static int iwch_process_mad(struct ib_device *ibdev,
  80. int mad_flags,
  81. u8 port_num,
  82. struct ib_wc *in_wc,
  83. struct ib_grh *in_grh,
  84. struct ib_mad *in_mad, struct ib_mad *out_mad)
  85. {
  86. return -ENOSYS;
  87. }
  88. static int iwch_dealloc_ucontext(struct ib_ucontext *context)
  89. {
  90. struct iwch_dev *rhp = to_iwch_dev(context->device);
  91. struct iwch_ucontext *ucontext = to_iwch_ucontext(context);
  92. struct iwch_mm_entry *mm, *tmp;
  93. PDBG("%s context %p\n", __func__, context);
  94. list_for_each_entry_safe(mm, tmp, &ucontext->mmaps, entry)
  95. kfree(mm);
  96. cxio_release_ucontext(&rhp->rdev, &ucontext->uctx);
  97. kfree(ucontext);
  98. return 0;
  99. }
  100. static struct ib_ucontext *iwch_alloc_ucontext(struct ib_device *ibdev,
  101. struct ib_udata *udata)
  102. {
  103. struct iwch_ucontext *context;
  104. struct iwch_dev *rhp = to_iwch_dev(ibdev);
  105. PDBG("%s ibdev %p\n", __func__, ibdev);
  106. context = kzalloc(sizeof(*context), GFP_KERNEL);
  107. if (!context)
  108. return ERR_PTR(-ENOMEM);
  109. cxio_init_ucontext(&rhp->rdev, &context->uctx);
  110. INIT_LIST_HEAD(&context->mmaps);
  111. spin_lock_init(&context->mmap_lock);
  112. return &context->ibucontext;
  113. }
  114. static int iwch_destroy_cq(struct ib_cq *ib_cq)
  115. {
  116. struct iwch_cq *chp;
  117. PDBG("%s ib_cq %p\n", __func__, ib_cq);
  118. chp = to_iwch_cq(ib_cq);
  119. remove_handle(chp->rhp, &chp->rhp->cqidr, chp->cq.cqid);
  120. atomic_dec(&chp->refcnt);
  121. wait_event(chp->wait, !atomic_read(&chp->refcnt));
  122. cxio_destroy_cq(&chp->rhp->rdev, &chp->cq);
  123. kfree(chp);
  124. return 0;
  125. }
  126. static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, int vector,
  127. struct ib_ucontext *ib_context,
  128. struct ib_udata *udata)
  129. {
  130. struct iwch_dev *rhp;
  131. struct iwch_cq *chp;
  132. struct iwch_create_cq_resp uresp;
  133. struct iwch_create_cq_req ureq;
  134. struct iwch_ucontext *ucontext = NULL;
  135. PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries);
  136. rhp = to_iwch_dev(ibdev);
  137. chp = kzalloc(sizeof(*chp), GFP_KERNEL);
  138. if (!chp)
  139. return ERR_PTR(-ENOMEM);
  140. if (ib_context) {
  141. ucontext = to_iwch_ucontext(ib_context);
  142. if (!t3a_device(rhp)) {
  143. if (ib_copy_from_udata(&ureq, udata, sizeof (ureq))) {
  144. kfree(chp);
  145. return ERR_PTR(-EFAULT);
  146. }
  147. chp->user_rptr_addr = (u32 __user *)(unsigned long)ureq.user_rptr_addr;
  148. }
  149. }
  150. if (t3a_device(rhp)) {
  151. /*
  152. * T3A: Add some fluff to handle extra CQEs inserted
  153. * for various errors.
  154. * Additional CQE possibilities:
  155. * TERMINATE,
  156. * incoming RDMA WRITE Failures
  157. * incoming RDMA READ REQUEST FAILUREs
  158. * NOTE: We cannot ensure the CQ won't overflow.
  159. */
  160. entries += 16;
  161. }
  162. entries = roundup_pow_of_two(entries);
  163. chp->cq.size_log2 = ilog2(entries);
  164. if (cxio_create_cq(&rhp->rdev, &chp->cq)) {
  165. kfree(chp);
  166. return ERR_PTR(-ENOMEM);
  167. }
  168. chp->rhp = rhp;
  169. chp->ibcq.cqe = 1 << chp->cq.size_log2;
  170. spin_lock_init(&chp->lock);
  171. atomic_set(&chp->refcnt, 1);
  172. init_waitqueue_head(&chp->wait);
  173. insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid);
  174. if (ucontext) {
  175. struct iwch_mm_entry *mm;
  176. mm = kmalloc(sizeof *mm, GFP_KERNEL);
  177. if (!mm) {
  178. iwch_destroy_cq(&chp->ibcq);
  179. return ERR_PTR(-ENOMEM);
  180. }
  181. uresp.cqid = chp->cq.cqid;
  182. uresp.size_log2 = chp->cq.size_log2;
  183. spin_lock(&ucontext->mmap_lock);
  184. uresp.key = ucontext->key;
  185. ucontext->key += PAGE_SIZE;
  186. spin_unlock(&ucontext->mmap_lock);
  187. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  188. kfree(mm);
  189. iwch_destroy_cq(&chp->ibcq);
  190. return ERR_PTR(-EFAULT);
  191. }
  192. mm->key = uresp.key;
  193. mm->addr = virt_to_phys(chp->cq.queue);
  194. mm->len = PAGE_ALIGN((1UL << uresp.size_log2) *
  195. sizeof (struct t3_cqe));
  196. insert_mmap(ucontext, mm);
  197. }
  198. PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n",
  199. chp->cq.cqid, chp, (1 << chp->cq.size_log2),
  200. (unsigned long long) chp->cq.dma_addr);
  201. return &chp->ibcq;
  202. }
  203. static int iwch_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata)
  204. {
  205. #ifdef notyet
  206. struct iwch_cq *chp = to_iwch_cq(cq);
  207. struct t3_cq oldcq, newcq;
  208. int ret;
  209. PDBG("%s ib_cq %p cqe %d\n", __func__, cq, cqe);
  210. /* We don't downsize... */
  211. if (cqe <= cq->cqe)
  212. return 0;
  213. /* create new t3_cq with new size */
  214. cqe = roundup_pow_of_two(cqe+1);
  215. newcq.size_log2 = ilog2(cqe);
  216. /* Dont allow resize to less than the current wce count */
  217. if (cqe < Q_COUNT(chp->cq.rptr, chp->cq.wptr)) {
  218. return -ENOMEM;
  219. }
  220. /* Quiesce all QPs using this CQ */
  221. ret = iwch_quiesce_qps(chp);
  222. if (ret) {
  223. return ret;
  224. }
  225. ret = cxio_create_cq(&chp->rhp->rdev, &newcq);
  226. if (ret) {
  227. return ret;
  228. }
  229. /* copy CQEs */
  230. memcpy(newcq.queue, chp->cq.queue, (1 << chp->cq.size_log2) *
  231. sizeof(struct t3_cqe));
  232. /* old iwch_qp gets new t3_cq but keeps old cqid */
  233. oldcq = chp->cq;
  234. chp->cq = newcq;
  235. chp->cq.cqid = oldcq.cqid;
  236. /* resize new t3_cq to update the HW context */
  237. ret = cxio_resize_cq(&chp->rhp->rdev, &chp->cq);
  238. if (ret) {
  239. chp->cq = oldcq;
  240. return ret;
  241. }
  242. chp->ibcq.cqe = (1<<chp->cq.size_log2) - 1;
  243. /* destroy old t3_cq */
  244. oldcq.cqid = newcq.cqid;
  245. ret = cxio_destroy_cq(&chp->rhp->rdev, &oldcq);
  246. if (ret) {
  247. printk(KERN_ERR MOD "%s - cxio_destroy_cq failed %d\n",
  248. __func__, ret);
  249. }
  250. /* add user hooks here */
  251. /* resume qps */
  252. ret = iwch_resume_qps(chp);
  253. return ret;
  254. #else
  255. return -ENOSYS;
  256. #endif
  257. }
  258. static int iwch_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags)
  259. {
  260. struct iwch_dev *rhp;
  261. struct iwch_cq *chp;
  262. enum t3_cq_opcode cq_op;
  263. int err;
  264. unsigned long flag;
  265. u32 rptr;
  266. chp = to_iwch_cq(ibcq);
  267. rhp = chp->rhp;
  268. if ((flags & IB_CQ_SOLICITED_MASK) == IB_CQ_SOLICITED)
  269. cq_op = CQ_ARM_SE;
  270. else
  271. cq_op = CQ_ARM_AN;
  272. if (chp->user_rptr_addr) {
  273. if (get_user(rptr, chp->user_rptr_addr))
  274. return -EFAULT;
  275. spin_lock_irqsave(&chp->lock, flag);
  276. chp->cq.rptr = rptr;
  277. } else
  278. spin_lock_irqsave(&chp->lock, flag);
  279. PDBG("%s rptr 0x%x\n", __func__, chp->cq.rptr);
  280. err = cxio_hal_cq_op(&rhp->rdev, &chp->cq, cq_op, 0);
  281. spin_unlock_irqrestore(&chp->lock, flag);
  282. if (err < 0)
  283. printk(KERN_ERR MOD "Error %d rearming CQID 0x%x\n", err,
  284. chp->cq.cqid);
  285. if (err > 0 && !(flags & IB_CQ_REPORT_MISSED_EVENTS))
  286. err = 0;
  287. return err;
  288. }
  289. static int iwch_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  290. {
  291. int len = vma->vm_end - vma->vm_start;
  292. u32 key = vma->vm_pgoff << PAGE_SHIFT;
  293. struct cxio_rdev *rdev_p;
  294. int ret = 0;
  295. struct iwch_mm_entry *mm;
  296. struct iwch_ucontext *ucontext;
  297. u64 addr;
  298. PDBG("%s pgoff 0x%lx key 0x%x len %d\n", __func__, vma->vm_pgoff,
  299. key, len);
  300. if (vma->vm_start & (PAGE_SIZE-1)) {
  301. return -EINVAL;
  302. }
  303. rdev_p = &(to_iwch_dev(context->device)->rdev);
  304. ucontext = to_iwch_ucontext(context);
  305. mm = remove_mmap(ucontext, key, len);
  306. if (!mm)
  307. return -EINVAL;
  308. addr = mm->addr;
  309. kfree(mm);
  310. if ((addr >= rdev_p->rnic_info.udbell_physbase) &&
  311. (addr < (rdev_p->rnic_info.udbell_physbase +
  312. rdev_p->rnic_info.udbell_len))) {
  313. /*
  314. * Map T3 DB register.
  315. */
  316. if (vma->vm_flags & VM_READ) {
  317. return -EPERM;
  318. }
  319. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  320. vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND;
  321. vma->vm_flags &= ~VM_MAYREAD;
  322. ret = io_remap_pfn_range(vma, vma->vm_start,
  323. addr >> PAGE_SHIFT,
  324. len, vma->vm_page_prot);
  325. } else {
  326. /*
  327. * Map WQ or CQ contig dma memory...
  328. */
  329. ret = remap_pfn_range(vma, vma->vm_start,
  330. addr >> PAGE_SHIFT,
  331. len, vma->vm_page_prot);
  332. }
  333. return ret;
  334. }
  335. static int iwch_deallocate_pd(struct ib_pd *pd)
  336. {
  337. struct iwch_dev *rhp;
  338. struct iwch_pd *php;
  339. php = to_iwch_pd(pd);
  340. rhp = php->rhp;
  341. PDBG("%s ibpd %p pdid 0x%x\n", __func__, pd, php->pdid);
  342. cxio_hal_put_pdid(rhp->rdev.rscp, php->pdid);
  343. kfree(php);
  344. return 0;
  345. }
  346. static struct ib_pd *iwch_allocate_pd(struct ib_device *ibdev,
  347. struct ib_ucontext *context,
  348. struct ib_udata *udata)
  349. {
  350. struct iwch_pd *php;
  351. u32 pdid;
  352. struct iwch_dev *rhp;
  353. PDBG("%s ibdev %p\n", __func__, ibdev);
  354. rhp = (struct iwch_dev *) ibdev;
  355. pdid = cxio_hal_get_pdid(rhp->rdev.rscp);
  356. if (!pdid)
  357. return ERR_PTR(-EINVAL);
  358. php = kzalloc(sizeof(*php), GFP_KERNEL);
  359. if (!php) {
  360. cxio_hal_put_pdid(rhp->rdev.rscp, pdid);
  361. return ERR_PTR(-ENOMEM);
  362. }
  363. php->pdid = pdid;
  364. php->rhp = rhp;
  365. if (context) {
  366. if (ib_copy_to_udata(udata, &php->pdid, sizeof (__u32))) {
  367. iwch_deallocate_pd(&php->ibpd);
  368. return ERR_PTR(-EFAULT);
  369. }
  370. }
  371. PDBG("%s pdid 0x%0x ptr 0x%p\n", __func__, pdid, php);
  372. return &php->ibpd;
  373. }
  374. static int iwch_dereg_mr(struct ib_mr *ib_mr)
  375. {
  376. struct iwch_dev *rhp;
  377. struct iwch_mr *mhp;
  378. u32 mmid;
  379. PDBG("%s ib_mr %p\n", __func__, ib_mr);
  380. /* There can be no memory windows */
  381. if (atomic_read(&ib_mr->usecnt))
  382. return -EINVAL;
  383. mhp = to_iwch_mr(ib_mr);
  384. rhp = mhp->rhp;
  385. mmid = mhp->attr.stag >> 8;
  386. cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
  387. mhp->attr.pbl_addr);
  388. remove_handle(rhp, &rhp->mmidr, mmid);
  389. if (mhp->kva)
  390. kfree((void *) (unsigned long) mhp->kva);
  391. if (mhp->umem)
  392. ib_umem_release(mhp->umem);
  393. PDBG("%s mmid 0x%x ptr %p\n", __func__, mmid, mhp);
  394. kfree(mhp);
  395. return 0;
  396. }
  397. static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd,
  398. struct ib_phys_buf *buffer_list,
  399. int num_phys_buf,
  400. int acc,
  401. u64 *iova_start)
  402. {
  403. __be64 *page_list;
  404. int shift;
  405. u64 total_size;
  406. int npages;
  407. struct iwch_dev *rhp;
  408. struct iwch_pd *php;
  409. struct iwch_mr *mhp;
  410. int ret;
  411. PDBG("%s ib_pd %p\n", __func__, pd);
  412. php = to_iwch_pd(pd);
  413. rhp = php->rhp;
  414. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  415. if (!mhp)
  416. return ERR_PTR(-ENOMEM);
  417. /* First check that we have enough alignment */
  418. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {
  419. ret = -EINVAL;
  420. goto err;
  421. }
  422. if (num_phys_buf > 1 &&
  423. ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) {
  424. ret = -EINVAL;
  425. goto err;
  426. }
  427. ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start,
  428. &total_size, &npages, &shift, &page_list);
  429. if (ret)
  430. goto err;
  431. mhp->rhp = rhp;
  432. mhp->attr.pdid = php->pdid;
  433. mhp->attr.zbva = 0;
  434. mhp->attr.perms = iwch_ib_to_tpt_access(acc);
  435. mhp->attr.va_fbo = *iova_start;
  436. mhp->attr.page_size = shift - 12;
  437. mhp->attr.len = (u32) total_size;
  438. mhp->attr.pbl_size = npages;
  439. ret = iwch_register_mem(rhp, php, mhp, shift, page_list);
  440. kfree(page_list);
  441. if (ret) {
  442. goto err;
  443. }
  444. return &mhp->ibmr;
  445. err:
  446. kfree(mhp);
  447. return ERR_PTR(ret);
  448. }
  449. static int iwch_reregister_phys_mem(struct ib_mr *mr,
  450. int mr_rereg_mask,
  451. struct ib_pd *pd,
  452. struct ib_phys_buf *buffer_list,
  453. int num_phys_buf,
  454. int acc, u64 * iova_start)
  455. {
  456. struct iwch_mr mh, *mhp;
  457. struct iwch_pd *php;
  458. struct iwch_dev *rhp;
  459. __be64 *page_list = NULL;
  460. int shift = 0;
  461. u64 total_size;
  462. int npages;
  463. int ret;
  464. PDBG("%s ib_mr %p ib_pd %p\n", __func__, mr, pd);
  465. /* There can be no memory windows */
  466. if (atomic_read(&mr->usecnt))
  467. return -EINVAL;
  468. mhp = to_iwch_mr(mr);
  469. rhp = mhp->rhp;
  470. php = to_iwch_pd(mr->pd);
  471. /* make sure we are on the same adapter */
  472. if (rhp != php->rhp)
  473. return -EINVAL;
  474. memcpy(&mh, mhp, sizeof *mhp);
  475. if (mr_rereg_mask & IB_MR_REREG_PD)
  476. php = to_iwch_pd(pd);
  477. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  478. mh.attr.perms = iwch_ib_to_tpt_access(acc);
  479. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  480. ret = build_phys_page_list(buffer_list, num_phys_buf,
  481. iova_start,
  482. &total_size, &npages,
  483. &shift, &page_list);
  484. if (ret)
  485. return ret;
  486. }
  487. ret = iwch_reregister_mem(rhp, php, &mh, shift, page_list, npages);
  488. kfree(page_list);
  489. if (ret) {
  490. return ret;
  491. }
  492. if (mr_rereg_mask & IB_MR_REREG_PD)
  493. mhp->attr.pdid = php->pdid;
  494. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  495. mhp->attr.perms = iwch_ib_to_tpt_access(acc);
  496. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  497. mhp->attr.zbva = 0;
  498. mhp->attr.va_fbo = *iova_start;
  499. mhp->attr.page_size = shift - 12;
  500. mhp->attr.len = (u32) total_size;
  501. mhp->attr.pbl_size = npages;
  502. }
  503. return 0;
  504. }
  505. static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
  506. u64 virt, int acc, struct ib_udata *udata)
  507. {
  508. __be64 *pages;
  509. int shift, n, len;
  510. int i, j, k;
  511. int err = 0;
  512. struct ib_umem_chunk *chunk;
  513. struct iwch_dev *rhp;
  514. struct iwch_pd *php;
  515. struct iwch_mr *mhp;
  516. struct iwch_reg_user_mr_resp uresp;
  517. PDBG("%s ib_pd %p\n", __func__, pd);
  518. php = to_iwch_pd(pd);
  519. rhp = php->rhp;
  520. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  521. if (!mhp)
  522. return ERR_PTR(-ENOMEM);
  523. mhp->umem = ib_umem_get(pd->uobject->context, start, length, acc);
  524. if (IS_ERR(mhp->umem)) {
  525. err = PTR_ERR(mhp->umem);
  526. kfree(mhp);
  527. return ERR_PTR(err);
  528. }
  529. shift = ffs(mhp->umem->page_size) - 1;
  530. n = 0;
  531. list_for_each_entry(chunk, &mhp->umem->chunk_list, list)
  532. n += chunk->nents;
  533. pages = kmalloc(n * sizeof(u64), GFP_KERNEL);
  534. if (!pages) {
  535. err = -ENOMEM;
  536. goto err;
  537. }
  538. i = n = 0;
  539. list_for_each_entry(chunk, &mhp->umem->chunk_list, list)
  540. for (j = 0; j < chunk->nmap; ++j) {
  541. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  542. for (k = 0; k < len; ++k) {
  543. pages[i++] = cpu_to_be64(sg_dma_address(
  544. &chunk->page_list[j]) +
  545. mhp->umem->page_size * k);
  546. }
  547. }
  548. mhp->rhp = rhp;
  549. mhp->attr.pdid = php->pdid;
  550. mhp->attr.zbva = 0;
  551. mhp->attr.perms = iwch_ib_to_tpt_access(acc);
  552. mhp->attr.va_fbo = virt;
  553. mhp->attr.page_size = shift - 12;
  554. mhp->attr.len = (u32) length;
  555. mhp->attr.pbl_size = i;
  556. err = iwch_register_mem(rhp, php, mhp, shift, pages);
  557. kfree(pages);
  558. if (err)
  559. goto err;
  560. if (udata && !t3a_device(rhp)) {
  561. uresp.pbl_addr = (mhp->attr.pbl_addr -
  562. rhp->rdev.rnic_info.pbl_base) >> 3;
  563. PDBG("%s user resp pbl_addr 0x%x\n", __func__,
  564. uresp.pbl_addr);
  565. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  566. iwch_dereg_mr(&mhp->ibmr);
  567. err = -EFAULT;
  568. goto err;
  569. }
  570. }
  571. return &mhp->ibmr;
  572. err:
  573. ib_umem_release(mhp->umem);
  574. kfree(mhp);
  575. return ERR_PTR(err);
  576. }
  577. static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc)
  578. {
  579. struct ib_phys_buf bl;
  580. u64 kva;
  581. struct ib_mr *ibmr;
  582. PDBG("%s ib_pd %p\n", __func__, pd);
  583. /*
  584. * T3 only supports 32 bits of size.
  585. */
  586. bl.size = 0xffffffff;
  587. bl.addr = 0;
  588. kva = 0;
  589. ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva);
  590. return ibmr;
  591. }
  592. static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd)
  593. {
  594. struct iwch_dev *rhp;
  595. struct iwch_pd *php;
  596. struct iwch_mw *mhp;
  597. u32 mmid;
  598. u32 stag = 0;
  599. int ret;
  600. php = to_iwch_pd(pd);
  601. rhp = php->rhp;
  602. mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);
  603. if (!mhp)
  604. return ERR_PTR(-ENOMEM);
  605. ret = cxio_allocate_window(&rhp->rdev, &stag, php->pdid);
  606. if (ret) {
  607. kfree(mhp);
  608. return ERR_PTR(ret);
  609. }
  610. mhp->rhp = rhp;
  611. mhp->attr.pdid = php->pdid;
  612. mhp->attr.type = TPT_MW;
  613. mhp->attr.stag = stag;
  614. mmid = (stag) >> 8;
  615. insert_handle(rhp, &rhp->mmidr, mhp, mmid);
  616. PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __func__, mmid, mhp, stag);
  617. return &(mhp->ibmw);
  618. }
  619. static int iwch_dealloc_mw(struct ib_mw *mw)
  620. {
  621. struct iwch_dev *rhp;
  622. struct iwch_mw *mhp;
  623. u32 mmid;
  624. mhp = to_iwch_mw(mw);
  625. rhp = mhp->rhp;
  626. mmid = (mw->rkey) >> 8;
  627. cxio_deallocate_window(&rhp->rdev, mhp->attr.stag);
  628. remove_handle(rhp, &rhp->mmidr, mmid);
  629. kfree(mhp);
  630. PDBG("%s ib_mw %p mmid 0x%x ptr %p\n", __func__, mw, mmid, mhp);
  631. return 0;
  632. }
  633. static int iwch_destroy_qp(struct ib_qp *ib_qp)
  634. {
  635. struct iwch_dev *rhp;
  636. struct iwch_qp *qhp;
  637. struct iwch_qp_attributes attrs;
  638. struct iwch_ucontext *ucontext;
  639. qhp = to_iwch_qp(ib_qp);
  640. rhp = qhp->rhp;
  641. attrs.next_state = IWCH_QP_STATE_ERROR;
  642. iwch_modify_qp(rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, &attrs, 0);
  643. wait_event(qhp->wait, !qhp->ep);
  644. remove_handle(rhp, &rhp->qpidr, qhp->wq.qpid);
  645. atomic_dec(&qhp->refcnt);
  646. wait_event(qhp->wait, !atomic_read(&qhp->refcnt));
  647. ucontext = ib_qp->uobject ? to_iwch_ucontext(ib_qp->uobject->context)
  648. : NULL;
  649. cxio_destroy_qp(&rhp->rdev, &qhp->wq,
  650. ucontext ? &ucontext->uctx : &rhp->rdev.uctx);
  651. PDBG("%s ib_qp %p qpid 0x%0x qhp %p\n", __func__,
  652. ib_qp, qhp->wq.qpid, qhp);
  653. kfree(qhp);
  654. return 0;
  655. }
  656. static struct ib_qp *iwch_create_qp(struct ib_pd *pd,
  657. struct ib_qp_init_attr *attrs,
  658. struct ib_udata *udata)
  659. {
  660. struct iwch_dev *rhp;
  661. struct iwch_qp *qhp;
  662. struct iwch_pd *php;
  663. struct iwch_cq *schp;
  664. struct iwch_cq *rchp;
  665. struct iwch_create_qp_resp uresp;
  666. int wqsize, sqsize, rqsize;
  667. struct iwch_ucontext *ucontext;
  668. PDBG("%s ib_pd %p\n", __func__, pd);
  669. if (attrs->qp_type != IB_QPT_RC)
  670. return ERR_PTR(-EINVAL);
  671. php = to_iwch_pd(pd);
  672. rhp = php->rhp;
  673. schp = get_chp(rhp, ((struct iwch_cq *) attrs->send_cq)->cq.cqid);
  674. rchp = get_chp(rhp, ((struct iwch_cq *) attrs->recv_cq)->cq.cqid);
  675. if (!schp || !rchp)
  676. return ERR_PTR(-EINVAL);
  677. /* The RQT size must be # of entries + 1 rounded up to a power of two */
  678. rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr);
  679. if (rqsize == attrs->cap.max_recv_wr)
  680. rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr+1);
  681. /* T3 doesn't support RQT depth < 16 */
  682. if (rqsize < 16)
  683. rqsize = 16;
  684. if (rqsize > T3_MAX_RQ_SIZE)
  685. return ERR_PTR(-EINVAL);
  686. if (attrs->cap.max_inline_data > T3_MAX_INLINE)
  687. return ERR_PTR(-EINVAL);
  688. /*
  689. * NOTE: The SQ and total WQ sizes don't need to be
  690. * a power of two. However, all the code assumes
  691. * they are. EG: Q_FREECNT() and friends.
  692. */
  693. sqsize = roundup_pow_of_two(attrs->cap.max_send_wr);
  694. wqsize = roundup_pow_of_two(rqsize + sqsize);
  695. PDBG("%s wqsize %d sqsize %d rqsize %d\n", __func__,
  696. wqsize, sqsize, rqsize);
  697. qhp = kzalloc(sizeof(*qhp), GFP_KERNEL);
  698. if (!qhp)
  699. return ERR_PTR(-ENOMEM);
  700. qhp->wq.size_log2 = ilog2(wqsize);
  701. qhp->wq.rq_size_log2 = ilog2(rqsize);
  702. qhp->wq.sq_size_log2 = ilog2(sqsize);
  703. ucontext = pd->uobject ? to_iwch_ucontext(pd->uobject->context) : NULL;
  704. if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq,
  705. ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) {
  706. kfree(qhp);
  707. return ERR_PTR(-ENOMEM);
  708. }
  709. attrs->cap.max_recv_wr = rqsize - 1;
  710. attrs->cap.max_send_wr = sqsize;
  711. attrs->cap.max_inline_data = T3_MAX_INLINE;
  712. qhp->rhp = rhp;
  713. qhp->attr.pd = php->pdid;
  714. qhp->attr.scq = ((struct iwch_cq *) attrs->send_cq)->cq.cqid;
  715. qhp->attr.rcq = ((struct iwch_cq *) attrs->recv_cq)->cq.cqid;
  716. qhp->attr.sq_num_entries = attrs->cap.max_send_wr;
  717. qhp->attr.rq_num_entries = attrs->cap.max_recv_wr;
  718. qhp->attr.sq_max_sges = attrs->cap.max_send_sge;
  719. qhp->attr.sq_max_sges_rdma_write = attrs->cap.max_send_sge;
  720. qhp->attr.rq_max_sges = attrs->cap.max_recv_sge;
  721. qhp->attr.state = IWCH_QP_STATE_IDLE;
  722. qhp->attr.next_state = IWCH_QP_STATE_IDLE;
  723. /*
  724. * XXX - These don't get passed in from the openib user
  725. * at create time. The CM sets them via a QP modify.
  726. * Need to fix... I think the CM should
  727. */
  728. qhp->attr.enable_rdma_read = 1;
  729. qhp->attr.enable_rdma_write = 1;
  730. qhp->attr.enable_bind = 1;
  731. qhp->attr.max_ord = 1;
  732. qhp->attr.max_ird = 1;
  733. spin_lock_init(&qhp->lock);
  734. init_waitqueue_head(&qhp->wait);
  735. atomic_set(&qhp->refcnt, 1);
  736. insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.qpid);
  737. if (udata) {
  738. struct iwch_mm_entry *mm1, *mm2;
  739. mm1 = kmalloc(sizeof *mm1, GFP_KERNEL);
  740. if (!mm1) {
  741. iwch_destroy_qp(&qhp->ibqp);
  742. return ERR_PTR(-ENOMEM);
  743. }
  744. mm2 = kmalloc(sizeof *mm2, GFP_KERNEL);
  745. if (!mm2) {
  746. kfree(mm1);
  747. iwch_destroy_qp(&qhp->ibqp);
  748. return ERR_PTR(-ENOMEM);
  749. }
  750. uresp.qpid = qhp->wq.qpid;
  751. uresp.size_log2 = qhp->wq.size_log2;
  752. uresp.sq_size_log2 = qhp->wq.sq_size_log2;
  753. uresp.rq_size_log2 = qhp->wq.rq_size_log2;
  754. spin_lock(&ucontext->mmap_lock);
  755. uresp.key = ucontext->key;
  756. ucontext->key += PAGE_SIZE;
  757. uresp.db_key = ucontext->key;
  758. ucontext->key += PAGE_SIZE;
  759. spin_unlock(&ucontext->mmap_lock);
  760. if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) {
  761. kfree(mm1);
  762. kfree(mm2);
  763. iwch_destroy_qp(&qhp->ibqp);
  764. return ERR_PTR(-EFAULT);
  765. }
  766. mm1->key = uresp.key;
  767. mm1->addr = virt_to_phys(qhp->wq.queue);
  768. mm1->len = PAGE_ALIGN(wqsize * sizeof (union t3_wr));
  769. insert_mmap(ucontext, mm1);
  770. mm2->key = uresp.db_key;
  771. mm2->addr = qhp->wq.udb & PAGE_MASK;
  772. mm2->len = PAGE_SIZE;
  773. insert_mmap(ucontext, mm2);
  774. }
  775. qhp->ibqp.qp_num = qhp->wq.qpid;
  776. init_timer(&(qhp->timer));
  777. PDBG("%s sq_num_entries %d, rq_num_entries %d "
  778. "qpid 0x%0x qhp %p dma_addr 0x%llx size %d\n",
  779. __func__, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries,
  780. qhp->wq.qpid, qhp, (unsigned long long) qhp->wq.dma_addr,
  781. 1 << qhp->wq.size_log2);
  782. return &qhp->ibqp;
  783. }
  784. static int iwch_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  785. int attr_mask, struct ib_udata *udata)
  786. {
  787. struct iwch_dev *rhp;
  788. struct iwch_qp *qhp;
  789. enum iwch_qp_attr_mask mask = 0;
  790. struct iwch_qp_attributes attrs;
  791. PDBG("%s ib_qp %p\n", __func__, ibqp);
  792. /* iwarp does not support the RTR state */
  793. if ((attr_mask & IB_QP_STATE) && (attr->qp_state == IB_QPS_RTR))
  794. attr_mask &= ~IB_QP_STATE;
  795. /* Make sure we still have something left to do */
  796. if (!attr_mask)
  797. return 0;
  798. memset(&attrs, 0, sizeof attrs);
  799. qhp = to_iwch_qp(ibqp);
  800. rhp = qhp->rhp;
  801. attrs.next_state = iwch_convert_state(attr->qp_state);
  802. attrs.enable_rdma_read = (attr->qp_access_flags &
  803. IB_ACCESS_REMOTE_READ) ? 1 : 0;
  804. attrs.enable_rdma_write = (attr->qp_access_flags &
  805. IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  806. attrs.enable_bind = (attr->qp_access_flags & IB_ACCESS_MW_BIND) ? 1 : 0;
  807. mask |= (attr_mask & IB_QP_STATE) ? IWCH_QP_ATTR_NEXT_STATE : 0;
  808. mask |= (attr_mask & IB_QP_ACCESS_FLAGS) ?
  809. (IWCH_QP_ATTR_ENABLE_RDMA_READ |
  810. IWCH_QP_ATTR_ENABLE_RDMA_WRITE |
  811. IWCH_QP_ATTR_ENABLE_RDMA_BIND) : 0;
  812. return iwch_modify_qp(rhp, qhp, mask, &attrs, 0);
  813. }
  814. void iwch_qp_add_ref(struct ib_qp *qp)
  815. {
  816. PDBG("%s ib_qp %p\n", __func__, qp);
  817. atomic_inc(&(to_iwch_qp(qp)->refcnt));
  818. }
  819. void iwch_qp_rem_ref(struct ib_qp *qp)
  820. {
  821. PDBG("%s ib_qp %p\n", __func__, qp);
  822. if (atomic_dec_and_test(&(to_iwch_qp(qp)->refcnt)))
  823. wake_up(&(to_iwch_qp(qp)->wait));
  824. }
  825. static struct ib_qp *iwch_get_qp(struct ib_device *dev, int qpn)
  826. {
  827. PDBG("%s ib_dev %p qpn 0x%x\n", __func__, dev, qpn);
  828. return (struct ib_qp *)get_qhp(to_iwch_dev(dev), qpn);
  829. }
  830. static int iwch_query_pkey(struct ib_device *ibdev,
  831. u8 port, u16 index, u16 * pkey)
  832. {
  833. PDBG("%s ibdev %p\n", __func__, ibdev);
  834. *pkey = 0;
  835. return 0;
  836. }
  837. static int iwch_query_gid(struct ib_device *ibdev, u8 port,
  838. int index, union ib_gid *gid)
  839. {
  840. struct iwch_dev *dev;
  841. PDBG("%s ibdev %p, port %d, index %d, gid %p\n",
  842. __func__, ibdev, port, index, gid);
  843. dev = to_iwch_dev(ibdev);
  844. BUG_ON(port == 0 || port > 2);
  845. memset(&(gid->raw[0]), 0, sizeof(gid->raw));
  846. memcpy(&(gid->raw[0]), dev->rdev.port_info.lldevs[port-1]->dev_addr, 6);
  847. return 0;
  848. }
  849. static int iwch_query_device(struct ib_device *ibdev,
  850. struct ib_device_attr *props)
  851. {
  852. struct iwch_dev *dev;
  853. PDBG("%s ibdev %p\n", __func__, ibdev);
  854. dev = to_iwch_dev(ibdev);
  855. memset(props, 0, sizeof *props);
  856. memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
  857. props->device_cap_flags = dev->device_cap_flags;
  858. props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor;
  859. props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device;
  860. props->max_mr_size = ~0ull;
  861. props->max_qp = dev->attr.max_qps;
  862. props->max_qp_wr = dev->attr.max_wrs;
  863. props->max_sge = dev->attr.max_sge_per_wr;
  864. props->max_sge_rd = 1;
  865. props->max_qp_rd_atom = dev->attr.max_rdma_reads_per_qp;
  866. props->max_qp_init_rd_atom = dev->attr.max_rdma_reads_per_qp;
  867. props->max_cq = dev->attr.max_cqs;
  868. props->max_cqe = dev->attr.max_cqes_per_cq;
  869. props->max_mr = dev->attr.max_mem_regs;
  870. props->max_pd = dev->attr.max_pds;
  871. props->local_ca_ack_delay = 0;
  872. return 0;
  873. }
  874. static int iwch_query_port(struct ib_device *ibdev,
  875. u8 port, struct ib_port_attr *props)
  876. {
  877. PDBG("%s ibdev %p\n", __func__, ibdev);
  878. props->max_mtu = IB_MTU_4096;
  879. props->lid = 0;
  880. props->lmc = 0;
  881. props->sm_lid = 0;
  882. props->sm_sl = 0;
  883. props->state = IB_PORT_ACTIVE;
  884. props->phys_state = 0;
  885. props->port_cap_flags =
  886. IB_PORT_CM_SUP |
  887. IB_PORT_SNMP_TUNNEL_SUP |
  888. IB_PORT_REINIT_SUP |
  889. IB_PORT_DEVICE_MGMT_SUP |
  890. IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
  891. props->gid_tbl_len = 1;
  892. props->pkey_tbl_len = 1;
  893. props->qkey_viol_cntr = 0;
  894. props->active_width = 2;
  895. props->active_speed = 2;
  896. props->max_msg_sz = -1;
  897. return 0;
  898. }
  899. static ssize_t show_rev(struct device *dev, struct device_attribute *attr,
  900. char *buf)
  901. {
  902. struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev,
  903. ibdev.dev);
  904. PDBG("%s dev 0x%p\n", __func__, dev);
  905. return sprintf(buf, "%d\n", iwch_dev->rdev.t3cdev_p->type);
  906. }
  907. static ssize_t show_fw_ver(struct device *dev, struct device_attribute *attr, char *buf)
  908. {
  909. struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev,
  910. ibdev.dev);
  911. struct ethtool_drvinfo info;
  912. struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev;
  913. PDBG("%s dev 0x%p\n", __func__, dev);
  914. lldev->ethtool_ops->get_drvinfo(lldev, &info);
  915. return sprintf(buf, "%s\n", info.fw_version);
  916. }
  917. static ssize_t show_hca(struct device *dev, struct device_attribute *attr,
  918. char *buf)
  919. {
  920. struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev,
  921. ibdev.dev);
  922. struct ethtool_drvinfo info;
  923. struct net_device *lldev = iwch_dev->rdev.t3cdev_p->lldev;
  924. PDBG("%s dev 0x%p\n", __func__, dev);
  925. lldev->ethtool_ops->get_drvinfo(lldev, &info);
  926. return sprintf(buf, "%s\n", info.driver);
  927. }
  928. static ssize_t show_board(struct device *dev, struct device_attribute *attr,
  929. char *buf)
  930. {
  931. struct iwch_dev *iwch_dev = container_of(dev, struct iwch_dev,
  932. ibdev.dev);
  933. PDBG("%s dev 0x%p\n", __func__, dev);
  934. return sprintf(buf, "%x.%x\n", iwch_dev->rdev.rnic_info.pdev->vendor,
  935. iwch_dev->rdev.rnic_info.pdev->device);
  936. }
  937. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  938. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  939. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  940. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  941. static struct device_attribute *iwch_class_attributes[] = {
  942. &dev_attr_hw_rev,
  943. &dev_attr_fw_ver,
  944. &dev_attr_hca_type,
  945. &dev_attr_board_id
  946. };
  947. int iwch_register_device(struct iwch_dev *dev)
  948. {
  949. int ret;
  950. int i;
  951. PDBG("%s iwch_dev %p\n", __func__, dev);
  952. strlcpy(dev->ibdev.name, "cxgb3_%d", IB_DEVICE_NAME_MAX);
  953. memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid));
  954. memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6);
  955. dev->ibdev.owner = THIS_MODULE;
  956. dev->device_cap_flags =
  957. (IB_DEVICE_ZERO_STAG | IB_DEVICE_MEM_WINDOW);
  958. dev->ibdev.uverbs_cmd_mask =
  959. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  960. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  961. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  962. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  963. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  964. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  965. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  966. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  967. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  968. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  969. (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
  970. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  971. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  972. (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
  973. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  974. (1ull << IB_USER_VERBS_CMD_POST_SEND) |
  975. (1ull << IB_USER_VERBS_CMD_POST_RECV);
  976. dev->ibdev.node_type = RDMA_NODE_RNIC;
  977. memcpy(dev->ibdev.node_desc, IWCH_NODE_DESC, sizeof(IWCH_NODE_DESC));
  978. dev->ibdev.phys_port_cnt = dev->rdev.port_info.nports;
  979. dev->ibdev.num_comp_vectors = 1;
  980. dev->ibdev.dma_device = &(dev->rdev.rnic_info.pdev->dev);
  981. dev->ibdev.query_device = iwch_query_device;
  982. dev->ibdev.query_port = iwch_query_port;
  983. dev->ibdev.modify_port = iwch_modify_port;
  984. dev->ibdev.query_pkey = iwch_query_pkey;
  985. dev->ibdev.query_gid = iwch_query_gid;
  986. dev->ibdev.alloc_ucontext = iwch_alloc_ucontext;
  987. dev->ibdev.dealloc_ucontext = iwch_dealloc_ucontext;
  988. dev->ibdev.mmap = iwch_mmap;
  989. dev->ibdev.alloc_pd = iwch_allocate_pd;
  990. dev->ibdev.dealloc_pd = iwch_deallocate_pd;
  991. dev->ibdev.create_ah = iwch_ah_create;
  992. dev->ibdev.destroy_ah = iwch_ah_destroy;
  993. dev->ibdev.create_qp = iwch_create_qp;
  994. dev->ibdev.modify_qp = iwch_ib_modify_qp;
  995. dev->ibdev.destroy_qp = iwch_destroy_qp;
  996. dev->ibdev.create_cq = iwch_create_cq;
  997. dev->ibdev.destroy_cq = iwch_destroy_cq;
  998. dev->ibdev.resize_cq = iwch_resize_cq;
  999. dev->ibdev.poll_cq = iwch_poll_cq;
  1000. dev->ibdev.get_dma_mr = iwch_get_dma_mr;
  1001. dev->ibdev.reg_phys_mr = iwch_register_phys_mem;
  1002. dev->ibdev.rereg_phys_mr = iwch_reregister_phys_mem;
  1003. dev->ibdev.reg_user_mr = iwch_reg_user_mr;
  1004. dev->ibdev.dereg_mr = iwch_dereg_mr;
  1005. dev->ibdev.alloc_mw = iwch_alloc_mw;
  1006. dev->ibdev.bind_mw = iwch_bind_mw;
  1007. dev->ibdev.dealloc_mw = iwch_dealloc_mw;
  1008. dev->ibdev.attach_mcast = iwch_multicast_attach;
  1009. dev->ibdev.detach_mcast = iwch_multicast_detach;
  1010. dev->ibdev.process_mad = iwch_process_mad;
  1011. dev->ibdev.req_notify_cq = iwch_arm_cq;
  1012. dev->ibdev.post_send = iwch_post_send;
  1013. dev->ibdev.post_recv = iwch_post_receive;
  1014. dev->ibdev.iwcm = kmalloc(sizeof(struct iw_cm_verbs), GFP_KERNEL);
  1015. if (!dev->ibdev.iwcm)
  1016. return -ENOMEM;
  1017. dev->ibdev.iwcm->connect = iwch_connect;
  1018. dev->ibdev.iwcm->accept = iwch_accept_cr;
  1019. dev->ibdev.iwcm->reject = iwch_reject_cr;
  1020. dev->ibdev.iwcm->create_listen = iwch_create_listen;
  1021. dev->ibdev.iwcm->destroy_listen = iwch_destroy_listen;
  1022. dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;
  1023. dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;
  1024. dev->ibdev.iwcm->get_qp = iwch_get_qp;
  1025. ret = ib_register_device(&dev->ibdev);
  1026. if (ret)
  1027. goto bail1;
  1028. for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i) {
  1029. ret = device_create_file(&dev->ibdev.dev,
  1030. iwch_class_attributes[i]);
  1031. if (ret) {
  1032. goto bail2;
  1033. }
  1034. }
  1035. return 0;
  1036. bail2:
  1037. ib_unregister_device(&dev->ibdev);
  1038. bail1:
  1039. return ret;
  1040. }
  1041. void iwch_unregister_device(struct iwch_dev *dev)
  1042. {
  1043. int i;
  1044. PDBG("%s iwch_dev %p\n", __func__, dev);
  1045. for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i)
  1046. device_remove_file(&dev->ibdev.dev,
  1047. iwch_class_attributes[i]);
  1048. ib_unregister_device(&dev->ibdev);
  1049. return;
  1050. }