tc86c001.c 6.8 KB

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  1. /*
  2. * Copyright (C) 2002 Toshiba Corporation
  3. * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
  4. *
  5. * This file is licensed under the terms of the GNU General Public
  6. * License version 2. This program is licensed "as is" without any
  7. * warranty of any kind, whether express or implied.
  8. */
  9. #include <linux/types.h>
  10. #include <linux/pci.h>
  11. #include <linux/ide.h>
  12. static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
  13. {
  14. ide_hwif_t *hwif = HWIF(drive);
  15. unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
  16. u16 mode, scr = inw(scr_port);
  17. switch (speed) {
  18. case XFER_UDMA_4: mode = 0x00c0; break;
  19. case XFER_UDMA_3: mode = 0x00b0; break;
  20. case XFER_UDMA_2: mode = 0x00a0; break;
  21. case XFER_UDMA_1: mode = 0x0090; break;
  22. case XFER_UDMA_0: mode = 0x0080; break;
  23. case XFER_MW_DMA_2: mode = 0x0070; break;
  24. case XFER_MW_DMA_1: mode = 0x0060; break;
  25. case XFER_MW_DMA_0: mode = 0x0050; break;
  26. case XFER_PIO_4: mode = 0x0400; break;
  27. case XFER_PIO_3: mode = 0x0300; break;
  28. case XFER_PIO_2: mode = 0x0200; break;
  29. case XFER_PIO_1: mode = 0x0100; break;
  30. case XFER_PIO_0:
  31. default: mode = 0x0000; break;
  32. }
  33. scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
  34. scr |= mode;
  35. outw(scr, scr_port);
  36. }
  37. static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
  38. {
  39. tc86c001_set_mode(drive, XFER_PIO_0 + pio);
  40. }
  41. /*
  42. * HACKITY HACK
  43. *
  44. * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
  45. * if a DMA transfer terminates prematurely, the controller leaves the device's
  46. * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
  47. * set the interrupt bit in the DMA status register), thus no PCI interrupt
  48. * will occur until a DMA transfer has been successfully completed.
  49. *
  50. * We work around this by initiating dummy, zero-length DMA transfer on
  51. * a DMA timeout expiration. I found no better way to do this with the current
  52. * IDE core than to temporarily replace a higher level driver's timer expiry
  53. * handler with our own backing up to that handler in case our recovery fails.
  54. */
  55. static int tc86c001_timer_expiry(ide_drive_t *drive)
  56. {
  57. ide_hwif_t *hwif = HWIF(drive);
  58. ide_expiry_t *expiry = ide_get_hwifdata(hwif);
  59. ide_hwgroup_t *hwgroup = HWGROUP(drive);
  60. u8 dma_stat = inb(hwif->dma_status);
  61. /* Restore a higher level driver's expiry handler first. */
  62. hwgroup->expiry = expiry;
  63. if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */
  64. unsigned long sc_base = hwif->config_data;
  65. unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
  66. u8 dma_cmd = inb(hwif->dma_command);
  67. printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
  68. "attempting recovery...\n", drive->name);
  69. /* Stop DMA */
  70. outb(dma_cmd & ~0x01, hwif->dma_command);
  71. /* Setup the dummy DMA transfer */
  72. outw(0, sc_base + 0x0a); /* Sector Count */
  73. outw(0, twcr_port); /* Transfer Word Count 1 or 2 */
  74. /* Start the dummy DMA transfer */
  75. outb(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
  76. outb(0x01, hwif->dma_command); /* set START_STOPBM */
  77. /*
  78. * If an interrupt was pending, it should come thru shortly.
  79. * If not, a higher level driver's expiry handler should
  80. * eventually cause some kind of recovery from the DMA stall.
  81. */
  82. return WAIT_MIN_SLEEP;
  83. }
  84. /* Chain to the restored expiry handler if DMA wasn't active. */
  85. if (likely(expiry != NULL))
  86. return expiry(drive);
  87. /* If there was no handler, "emulate" that for ide_timer_expiry()... */
  88. return -1;
  89. }
  90. static void tc86c001_dma_start(ide_drive_t *drive)
  91. {
  92. ide_hwif_t *hwif = HWIF(drive);
  93. ide_hwgroup_t *hwgroup = HWGROUP(drive);
  94. unsigned long sc_base = hwif->config_data;
  95. unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
  96. unsigned long nsectors = hwgroup->rq->nr_sectors;
  97. /*
  98. * We have to manually load the sector count and size into
  99. * the appropriate system control registers for DMA to work
  100. * with LBA48 and ATAPI devices...
  101. */
  102. outw(nsectors, sc_base + 0x0a); /* Sector Count */
  103. outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
  104. /* Install our timeout expiry hook, saving the current handler... */
  105. ide_set_hwifdata(hwif, hwgroup->expiry);
  106. hwgroup->expiry = &tc86c001_timer_expiry;
  107. ide_dma_start(drive);
  108. }
  109. static u8 __devinit tc86c001_cable_detect(ide_hwif_t *hwif)
  110. {
  111. struct pci_dev *dev = to_pci_dev(hwif->dev);
  112. unsigned long sc_base = pci_resource_start(dev, 5);
  113. u16 scr1 = inw(sc_base + 0x00);
  114. /*
  115. * System Control 1 Register bit 13 (PDIAGN):
  116. * 0=80-pin cable, 1=40-pin cable
  117. */
  118. return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
  119. }
  120. static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
  121. {
  122. struct pci_dev *dev = to_pci_dev(hwif->dev);
  123. unsigned long sc_base = pci_resource_start(dev, 5);
  124. u16 scr1 = inw(sc_base + 0x00);
  125. /* System Control 1 Register bit 15 (Soft Reset) set */
  126. outw(scr1 | 0x8000, sc_base + 0x00);
  127. /* System Control 1 Register bit 14 (FIFO Reset) set */
  128. outw(scr1 | 0x4000, sc_base + 0x00);
  129. /* System Control 1 Register: reset clear */
  130. outw(scr1 & ~0xc000, sc_base + 0x00);
  131. /* Store the system control register base for convenience... */
  132. hwif->config_data = sc_base;
  133. hwif->set_pio_mode = &tc86c001_set_pio_mode;
  134. hwif->set_dma_mode = &tc86c001_set_mode;
  135. hwif->cable_detect = tc86c001_cable_detect;
  136. if (!hwif->dma_base)
  137. return;
  138. /*
  139. * Sector Count Control Register bits 0 and 1 set:
  140. * software sets Sector Count Register for master and slave device
  141. */
  142. outw(0x0003, sc_base + 0x0c);
  143. /* Sector Count Register limit */
  144. hwif->rqsize = 0xffff;
  145. hwif->dma_start = &tc86c001_dma_start;
  146. }
  147. static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
  148. const char *name)
  149. {
  150. int err = pci_request_region(dev, 5, name);
  151. if (err)
  152. printk(KERN_ERR "%s: system control regs already in use", name);
  153. return err;
  154. }
  155. static const struct ide_port_info tc86c001_chipset __devinitdata = {
  156. .name = "TC86C001",
  157. .init_chipset = init_chipset_tc86c001,
  158. .init_hwif = init_hwif_tc86c001,
  159. .host_flags = IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD |
  160. IDE_HFLAG_ABUSE_SET_DMA_MODE,
  161. .pio_mask = ATA_PIO4,
  162. .mwdma_mask = ATA_MWDMA2,
  163. .udma_mask = ATA_UDMA4,
  164. };
  165. static int __devinit tc86c001_init_one(struct pci_dev *dev,
  166. const struct pci_device_id *id)
  167. {
  168. return ide_setup_pci_device(dev, &tc86c001_chipset);
  169. }
  170. static const struct pci_device_id tc86c001_pci_tbl[] = {
  171. { PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 },
  172. { 0, }
  173. };
  174. MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
  175. static struct pci_driver driver = {
  176. .name = "TC86C001",
  177. .id_table = tc86c001_pci_tbl,
  178. .probe = tc86c001_init_one
  179. };
  180. static int __init tc86c001_ide_init(void)
  181. {
  182. return ide_pci_register_driver(&driver);
  183. }
  184. module_init(tc86c001_ide_init);
  185. MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
  186. MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
  187. MODULE_LICENSE("GPL");