synclink_cs.c 115 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/module.h>
  36. #include <linux/errno.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/timer.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <linux/tty.h>
  43. #include <linux/tty_flip.h>
  44. #include <linux/serial.h>
  45. #include <linux/major.h>
  46. #include <linux/string.h>
  47. #include <linux/fcntl.h>
  48. #include <linux/ptrace.h>
  49. #include <linux/ioport.h>
  50. #include <linux/mm.h>
  51. #include <linux/slab.h>
  52. #include <linux/netdevice.h>
  53. #include <linux/vmalloc.h>
  54. #include <linux/init.h>
  55. #include <linux/delay.h>
  56. #include <linux/ioctl.h>
  57. #include <linux/synclink.h>
  58. #include <asm/system.h>
  59. #include <asm/io.h>
  60. #include <asm/irq.h>
  61. #include <asm/dma.h>
  62. #include <linux/bitops.h>
  63. #include <asm/types.h>
  64. #include <linux/termios.h>
  65. #include <linux/workqueue.h>
  66. #include <linux/hdlc.h>
  67. #include <pcmcia/cs_types.h>
  68. #include <pcmcia/cs.h>
  69. #include <pcmcia/cistpl.h>
  70. #include <pcmcia/cisreg.h>
  71. #include <pcmcia/ds.h>
  72. #if defined(CONFIG_HDLC) || (defined(CONFIG_HDLC_MODULE) && defined(CONFIG_SYNCLINK_CS_MODULE))
  73. #define SYNCLINK_GENERIC_HDLC 1
  74. #else
  75. #define SYNCLINK_GENERIC_HDLC 0
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. static MGSL_PARAMS default_params = {
  83. MGSL_MODE_HDLC, /* unsigned long mode */
  84. 0, /* unsigned char loopback; */
  85. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  86. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  87. 0, /* unsigned long clock_speed; */
  88. 0xff, /* unsigned char addr_filter; */
  89. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  90. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  91. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  92. 9600, /* unsigned long data_rate; */
  93. 8, /* unsigned char data_bits; */
  94. 1, /* unsigned char stop_bits; */
  95. ASYNC_PARITY_NONE /* unsigned char parity; */
  96. };
  97. typedef struct
  98. {
  99. int count;
  100. unsigned char status;
  101. char data[1];
  102. } RXBUF;
  103. /* The queue of BH actions to be performed */
  104. #define BH_RECEIVE 1
  105. #define BH_TRANSMIT 2
  106. #define BH_STATUS 4
  107. #define IO_PIN_SHUTDOWN_LIMIT 100
  108. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  109. struct _input_signal_events {
  110. int ri_up;
  111. int ri_down;
  112. int dsr_up;
  113. int dsr_down;
  114. int dcd_up;
  115. int dcd_down;
  116. int cts_up;
  117. int cts_down;
  118. };
  119. /*
  120. * Device instance data structure
  121. */
  122. typedef struct _mgslpc_info {
  123. void *if_ptr; /* General purpose pointer (used by SPPP) */
  124. int magic;
  125. int flags;
  126. int count; /* count of opens */
  127. int line;
  128. unsigned short close_delay;
  129. unsigned short closing_wait; /* time to wait before closing */
  130. struct mgsl_icount icount;
  131. struct tty_struct *tty;
  132. int timeout;
  133. int x_char; /* xon/xoff character */
  134. int blocked_open; /* # of blocked opens */
  135. unsigned char read_status_mask;
  136. unsigned char ignore_status_mask;
  137. unsigned char *tx_buf;
  138. int tx_put;
  139. int tx_get;
  140. int tx_count;
  141. /* circular list of fixed length rx buffers */
  142. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  143. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  144. int rx_put; /* index of next empty rx buffer */
  145. int rx_get; /* index of next full rx buffer */
  146. int rx_buf_size; /* size in bytes of single rx buffer */
  147. int rx_buf_count; /* total number of rx buffers */
  148. int rx_frame_count; /* number of full rx buffers */
  149. wait_queue_head_t open_wait;
  150. wait_queue_head_t close_wait;
  151. wait_queue_head_t status_event_wait_q;
  152. wait_queue_head_t event_wait_q;
  153. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  154. struct _mgslpc_info *next_device; /* device list link */
  155. unsigned short imra_value;
  156. unsigned short imrb_value;
  157. unsigned char pim_value;
  158. spinlock_t lock;
  159. struct work_struct task; /* task structure for scheduling bh */
  160. u32 max_frame_size;
  161. u32 pending_bh;
  162. int bh_running;
  163. int bh_requested;
  164. int dcd_chkcount; /* check counts to prevent */
  165. int cts_chkcount; /* too many IRQs if a signal */
  166. int dsr_chkcount; /* is floating */
  167. int ri_chkcount;
  168. int rx_enabled;
  169. int rx_overflow;
  170. int tx_enabled;
  171. int tx_active;
  172. int tx_aborting;
  173. u32 idle_mode;
  174. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  175. char device_name[25]; /* device instance name */
  176. unsigned int io_base; /* base I/O address of adapter */
  177. unsigned int irq_level;
  178. MGSL_PARAMS params; /* communications parameters */
  179. unsigned char serial_signals; /* current serial signal states */
  180. char irq_occurred; /* for diagnostics use */
  181. char testing_irq;
  182. unsigned int init_error; /* startup error (DIAGS) */
  183. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  184. BOOLEAN drop_rts_on_tx_done;
  185. struct _input_signal_events input_signal_events;
  186. /* PCMCIA support */
  187. struct pcmcia_device *p_dev;
  188. dev_node_t node;
  189. int stop;
  190. /* SPPP/Cisco HDLC device parts */
  191. int netcount;
  192. int dosyncppp;
  193. spinlock_t netlock;
  194. #if SYNCLINK_GENERIC_HDLC
  195. struct net_device *netdev;
  196. #endif
  197. } MGSLPC_INFO;
  198. #define MGSLPC_MAGIC 0x5402
  199. /*
  200. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  201. */
  202. #define TXBUFSIZE 4096
  203. #define CHA 0x00 /* channel A offset */
  204. #define CHB 0x40 /* channel B offset */
  205. /*
  206. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  207. */
  208. #undef PVR
  209. #define RXFIFO 0
  210. #define TXFIFO 0
  211. #define STAR 0x20
  212. #define CMDR 0x20
  213. #define RSTA 0x21
  214. #define PRE 0x21
  215. #define MODE 0x22
  216. #define TIMR 0x23
  217. #define XAD1 0x24
  218. #define XAD2 0x25
  219. #define RAH1 0x26
  220. #define RAH2 0x27
  221. #define DAFO 0x27
  222. #define RAL1 0x28
  223. #define RFC 0x28
  224. #define RHCR 0x29
  225. #define RAL2 0x29
  226. #define RBCL 0x2a
  227. #define XBCL 0x2a
  228. #define RBCH 0x2b
  229. #define XBCH 0x2b
  230. #define CCR0 0x2c
  231. #define CCR1 0x2d
  232. #define CCR2 0x2e
  233. #define CCR3 0x2f
  234. #define VSTR 0x34
  235. #define BGR 0x34
  236. #define RLCR 0x35
  237. #define AML 0x36
  238. #define AMH 0x37
  239. #define GIS 0x38
  240. #define IVA 0x38
  241. #define IPC 0x39
  242. #define ISR 0x3a
  243. #define IMR 0x3a
  244. #define PVR 0x3c
  245. #define PIS 0x3d
  246. #define PIM 0x3d
  247. #define PCR 0x3e
  248. #define CCR4 0x3f
  249. // IMR/ISR
  250. #define IRQ_BREAK_ON BIT15 // rx break detected
  251. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  252. #define IRQ_ALLSENT BIT13 // all sent
  253. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  254. #define IRQ_TIMER BIT11 // timer interrupt
  255. #define IRQ_CTS BIT10 // CTS status change
  256. #define IRQ_TXREPEAT BIT9 // tx message repeat
  257. #define IRQ_TXFIFO BIT8 // transmit pool ready
  258. #define IRQ_RXEOM BIT7 // receive message end
  259. #define IRQ_EXITHUNT BIT6 // receive frame start
  260. #define IRQ_RXTIME BIT6 // rx char timeout
  261. #define IRQ_DCD BIT2 // carrier detect status change
  262. #define IRQ_OVERRUN BIT1 // receive frame overflow
  263. #define IRQ_RXFIFO BIT0 // receive pool full
  264. // STAR
  265. #define XFW BIT6 // transmit FIFO write enable
  266. #define CEC BIT2 // command executing
  267. #define CTS BIT1 // CTS state
  268. #define PVR_DTR BIT0
  269. #define PVR_DSR BIT1
  270. #define PVR_RI BIT2
  271. #define PVR_AUTOCTS BIT3
  272. #define PVR_RS232 0x20 /* 0010b */
  273. #define PVR_V35 0xe0 /* 1110b */
  274. #define PVR_RS422 0x40 /* 0100b */
  275. /* Register access functions */
  276. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  277. #define read_reg(info, reg) inb((info)->io_base + (reg))
  278. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  279. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  280. #define set_reg_bits(info, reg, mask) \
  281. write_reg(info, (reg), \
  282. (unsigned char) (read_reg(info, (reg)) | (mask)))
  283. #define clear_reg_bits(info, reg, mask) \
  284. write_reg(info, (reg), \
  285. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  286. /*
  287. * interrupt enable/disable routines
  288. */
  289. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  290. {
  291. if (channel == CHA) {
  292. info->imra_value |= mask;
  293. write_reg16(info, CHA + IMR, info->imra_value);
  294. } else {
  295. info->imrb_value |= mask;
  296. write_reg16(info, CHB + IMR, info->imrb_value);
  297. }
  298. }
  299. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  300. {
  301. if (channel == CHA) {
  302. info->imra_value &= ~mask;
  303. write_reg16(info, CHA + IMR, info->imra_value);
  304. } else {
  305. info->imrb_value &= ~mask;
  306. write_reg16(info, CHB + IMR, info->imrb_value);
  307. }
  308. }
  309. #define port_irq_disable(info, mask) \
  310. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  311. #define port_irq_enable(info, mask) \
  312. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  313. static void rx_start(MGSLPC_INFO *info);
  314. static void rx_stop(MGSLPC_INFO *info);
  315. static void tx_start(MGSLPC_INFO *info);
  316. static void tx_stop(MGSLPC_INFO *info);
  317. static void tx_set_idle(MGSLPC_INFO *info);
  318. static void get_signals(MGSLPC_INFO *info);
  319. static void set_signals(MGSLPC_INFO *info);
  320. static void reset_device(MGSLPC_INFO *info);
  321. static void hdlc_mode(MGSLPC_INFO *info);
  322. static void async_mode(MGSLPC_INFO *info);
  323. static void tx_timeout(unsigned long context);
  324. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  325. #if SYNCLINK_GENERIC_HDLC
  326. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  327. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  328. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  329. static int hdlcdev_init(MGSLPC_INFO *info);
  330. static void hdlcdev_exit(MGSLPC_INFO *info);
  331. #endif
  332. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  333. static BOOLEAN register_test(MGSLPC_INFO *info);
  334. static BOOLEAN irq_test(MGSLPC_INFO *info);
  335. static int adapter_test(MGSLPC_INFO *info);
  336. static int claim_resources(MGSLPC_INFO *info);
  337. static void release_resources(MGSLPC_INFO *info);
  338. static void mgslpc_add_device(MGSLPC_INFO *info);
  339. static void mgslpc_remove_device(MGSLPC_INFO *info);
  340. static int rx_get_frame(MGSLPC_INFO *info);
  341. static void rx_reset_buffers(MGSLPC_INFO *info);
  342. static int rx_alloc_buffers(MGSLPC_INFO *info);
  343. static void rx_free_buffers(MGSLPC_INFO *info);
  344. static irqreturn_t mgslpc_isr(int irq, void *dev_id);
  345. /*
  346. * Bottom half interrupt handlers
  347. */
  348. static void bh_handler(struct work_struct *work);
  349. static void bh_transmit(MGSLPC_INFO *info);
  350. static void bh_status(MGSLPC_INFO *info);
  351. /*
  352. * ioctl handlers
  353. */
  354. static int tiocmget(struct tty_struct *tty, struct file *file);
  355. static int tiocmset(struct tty_struct *tty, struct file *file,
  356. unsigned int set, unsigned int clear);
  357. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  358. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  359. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  360. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  361. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  362. static int set_txenable(MGSLPC_INFO *info, int enable);
  363. static int tx_abort(MGSLPC_INFO *info);
  364. static int set_rxenable(MGSLPC_INFO *info, int enable);
  365. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  366. static MGSLPC_INFO *mgslpc_device_list = NULL;
  367. static int mgslpc_device_count = 0;
  368. /*
  369. * Set this param to non-zero to load eax with the
  370. * .text section address and breakpoint on module load.
  371. * This is useful for use with gdb and add-symbol-file command.
  372. */
  373. static int break_on_load=0;
  374. /*
  375. * Driver major number, defaults to zero to get auto
  376. * assigned major number. May be forced as module parameter.
  377. */
  378. static int ttymajor=0;
  379. static int debug_level = 0;
  380. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  381. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  382. module_param(break_on_load, bool, 0);
  383. module_param(ttymajor, int, 0);
  384. module_param(debug_level, int, 0);
  385. module_param_array(maxframe, int, NULL, 0);
  386. module_param_array(dosyncppp, int, NULL, 0);
  387. MODULE_LICENSE("GPL");
  388. static char *driver_name = "SyncLink PC Card driver";
  389. static char *driver_version = "$Revision: 4.34 $";
  390. static struct tty_driver *serial_driver;
  391. /* number of characters left in xmit buffer before we ask for more */
  392. #define WAKEUP_CHARS 256
  393. static void mgslpc_change_params(MGSLPC_INFO *info);
  394. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  395. /* PCMCIA prototypes */
  396. static int mgslpc_config(struct pcmcia_device *link);
  397. static void mgslpc_release(u_long arg);
  398. static void mgslpc_detach(struct pcmcia_device *p_dev);
  399. /*
  400. * 1st function defined in .text section. Calling this function in
  401. * init_module() followed by a breakpoint allows a remote debugger
  402. * (gdb) to get the .text address for the add-symbol-file command.
  403. * This allows remote debugging of dynamically loadable modules.
  404. */
  405. static void* mgslpc_get_text_ptr(void)
  406. {
  407. return mgslpc_get_text_ptr;
  408. }
  409. /**
  410. * line discipline callback wrappers
  411. *
  412. * The wrappers maintain line discipline references
  413. * while calling into the line discipline.
  414. *
  415. * ldisc_flush_buffer - flush line discipline receive buffers
  416. * ldisc_receive_buf - pass receive data to line discipline
  417. */
  418. static void ldisc_flush_buffer(struct tty_struct *tty)
  419. {
  420. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  421. if (ld) {
  422. if (ld->flush_buffer)
  423. ld->flush_buffer(tty);
  424. tty_ldisc_deref(ld);
  425. }
  426. }
  427. static void ldisc_receive_buf(struct tty_struct *tty,
  428. const __u8 *data, char *flags, int count)
  429. {
  430. struct tty_ldisc *ld;
  431. if (!tty)
  432. return;
  433. ld = tty_ldisc_ref(tty);
  434. if (ld) {
  435. if (ld->receive_buf)
  436. ld->receive_buf(tty, data, flags, count);
  437. tty_ldisc_deref(ld);
  438. }
  439. }
  440. static int mgslpc_probe(struct pcmcia_device *link)
  441. {
  442. MGSLPC_INFO *info;
  443. int ret;
  444. if (debug_level >= DEBUG_LEVEL_INFO)
  445. printk("mgslpc_attach\n");
  446. info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  447. if (!info) {
  448. printk("Error can't allocate device instance data\n");
  449. return -ENOMEM;
  450. }
  451. info->magic = MGSLPC_MAGIC;
  452. INIT_WORK(&info->task, bh_handler);
  453. info->max_frame_size = 4096;
  454. info->close_delay = 5*HZ/10;
  455. info->closing_wait = 30*HZ;
  456. init_waitqueue_head(&info->open_wait);
  457. init_waitqueue_head(&info->close_wait);
  458. init_waitqueue_head(&info->status_event_wait_q);
  459. init_waitqueue_head(&info->event_wait_q);
  460. spin_lock_init(&info->lock);
  461. spin_lock_init(&info->netlock);
  462. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  463. info->idle_mode = HDLC_TXIDLE_FLAGS;
  464. info->imra_value = 0xffff;
  465. info->imrb_value = 0xffff;
  466. info->pim_value = 0xff;
  467. info->p_dev = link;
  468. link->priv = info;
  469. /* Initialize the struct pcmcia_device structure */
  470. /* Interrupt setup */
  471. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  472. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  473. link->irq.Handler = NULL;
  474. link->conf.Attributes = 0;
  475. link->conf.IntType = INT_MEMORY_AND_IO;
  476. ret = mgslpc_config(link);
  477. if (ret)
  478. return ret;
  479. mgslpc_add_device(info);
  480. return 0;
  481. }
  482. /* Card has been inserted.
  483. */
  484. #define CS_CHECK(fn, ret) \
  485. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  486. static int mgslpc_config(struct pcmcia_device *link)
  487. {
  488. MGSLPC_INFO *info = link->priv;
  489. tuple_t tuple;
  490. cisparse_t parse;
  491. int last_fn, last_ret;
  492. u_char buf[64];
  493. cistpl_cftable_entry_t dflt = { 0 };
  494. cistpl_cftable_entry_t *cfg;
  495. if (debug_level >= DEBUG_LEVEL_INFO)
  496. printk("mgslpc_config(0x%p)\n", link);
  497. tuple.Attributes = 0;
  498. tuple.TupleData = buf;
  499. tuple.TupleDataMax = sizeof(buf);
  500. tuple.TupleOffset = 0;
  501. /* get CIS configuration entry */
  502. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  503. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  504. cfg = &(parse.cftable_entry);
  505. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  506. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  507. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  508. if (cfg->index == 0)
  509. goto cs_failed;
  510. link->conf.ConfigIndex = cfg->index;
  511. link->conf.Attributes |= CONF_ENABLE_IRQ;
  512. /* IO window settings */
  513. link->io.NumPorts1 = 0;
  514. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  515. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  516. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  517. if (!(io->flags & CISTPL_IO_8BIT))
  518. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  519. if (!(io->flags & CISTPL_IO_16BIT))
  520. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  521. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  522. link->io.BasePort1 = io->win[0].base;
  523. link->io.NumPorts1 = io->win[0].len;
  524. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  525. }
  526. link->conf.Attributes = CONF_ENABLE_IRQ;
  527. link->conf.IntType = INT_MEMORY_AND_IO;
  528. link->conf.ConfigIndex = 8;
  529. link->conf.Present = PRESENT_OPTION;
  530. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  531. link->irq.Handler = mgslpc_isr;
  532. link->irq.Instance = info;
  533. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  534. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  535. info->io_base = link->io.BasePort1;
  536. info->irq_level = link->irq.AssignedIRQ;
  537. /* add to linked list of devices */
  538. sprintf(info->node.dev_name, "mgslpc0");
  539. info->node.major = info->node.minor = 0;
  540. link->dev_node = &info->node;
  541. printk(KERN_INFO "%s: index 0x%02x:",
  542. info->node.dev_name, link->conf.ConfigIndex);
  543. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  544. printk(", irq %d", link->irq.AssignedIRQ);
  545. if (link->io.NumPorts1)
  546. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  547. link->io.BasePort1+link->io.NumPorts1-1);
  548. printk("\n");
  549. return 0;
  550. cs_failed:
  551. cs_error(link, last_fn, last_ret);
  552. mgslpc_release((u_long)link);
  553. return -ENODEV;
  554. }
  555. /* Card has been removed.
  556. * Unregister device and release PCMCIA configuration.
  557. * If device is open, postpone until it is closed.
  558. */
  559. static void mgslpc_release(u_long arg)
  560. {
  561. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  562. if (debug_level >= DEBUG_LEVEL_INFO)
  563. printk("mgslpc_release(0x%p)\n", link);
  564. pcmcia_disable_device(link);
  565. }
  566. static void mgslpc_detach(struct pcmcia_device *link)
  567. {
  568. if (debug_level >= DEBUG_LEVEL_INFO)
  569. printk("mgslpc_detach(0x%p)\n", link);
  570. ((MGSLPC_INFO *)link->priv)->stop = 1;
  571. mgslpc_release((u_long)link);
  572. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  573. }
  574. static int mgslpc_suspend(struct pcmcia_device *link)
  575. {
  576. MGSLPC_INFO *info = link->priv;
  577. info->stop = 1;
  578. return 0;
  579. }
  580. static int mgslpc_resume(struct pcmcia_device *link)
  581. {
  582. MGSLPC_INFO *info = link->priv;
  583. info->stop = 0;
  584. return 0;
  585. }
  586. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  587. char *name, const char *routine)
  588. {
  589. #ifdef MGSLPC_PARANOIA_CHECK
  590. static const char *badmagic =
  591. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  592. static const char *badinfo =
  593. "Warning: null mgslpc_info for (%s) in %s\n";
  594. if (!info) {
  595. printk(badinfo, name, routine);
  596. return 1;
  597. }
  598. if (info->magic != MGSLPC_MAGIC) {
  599. printk(badmagic, name, routine);
  600. return 1;
  601. }
  602. #else
  603. if (!info)
  604. return 1;
  605. #endif
  606. return 0;
  607. }
  608. #define CMD_RXFIFO BIT7 // release current rx FIFO
  609. #define CMD_RXRESET BIT6 // receiver reset
  610. #define CMD_RXFIFO_READ BIT5
  611. #define CMD_START_TIMER BIT4
  612. #define CMD_TXFIFO BIT3 // release current tx FIFO
  613. #define CMD_TXEOM BIT1 // transmit end message
  614. #define CMD_TXRESET BIT0 // transmit reset
  615. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  616. {
  617. int i = 0;
  618. /* wait for command completion */
  619. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  620. udelay(1);
  621. if (i++ == 1000)
  622. return FALSE;
  623. }
  624. return TRUE;
  625. }
  626. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  627. {
  628. wait_command_complete(info, channel);
  629. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  630. }
  631. static void tx_pause(struct tty_struct *tty)
  632. {
  633. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  634. unsigned long flags;
  635. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  636. return;
  637. if (debug_level >= DEBUG_LEVEL_INFO)
  638. printk("tx_pause(%s)\n",info->device_name);
  639. spin_lock_irqsave(&info->lock,flags);
  640. if (info->tx_enabled)
  641. tx_stop(info);
  642. spin_unlock_irqrestore(&info->lock,flags);
  643. }
  644. static void tx_release(struct tty_struct *tty)
  645. {
  646. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  647. unsigned long flags;
  648. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  649. return;
  650. if (debug_level >= DEBUG_LEVEL_INFO)
  651. printk("tx_release(%s)\n",info->device_name);
  652. spin_lock_irqsave(&info->lock,flags);
  653. if (!info->tx_enabled)
  654. tx_start(info);
  655. spin_unlock_irqrestore(&info->lock,flags);
  656. }
  657. /* Return next bottom half action to perform.
  658. * or 0 if nothing to do.
  659. */
  660. static int bh_action(MGSLPC_INFO *info)
  661. {
  662. unsigned long flags;
  663. int rc = 0;
  664. spin_lock_irqsave(&info->lock,flags);
  665. if (info->pending_bh & BH_RECEIVE) {
  666. info->pending_bh &= ~BH_RECEIVE;
  667. rc = BH_RECEIVE;
  668. } else if (info->pending_bh & BH_TRANSMIT) {
  669. info->pending_bh &= ~BH_TRANSMIT;
  670. rc = BH_TRANSMIT;
  671. } else if (info->pending_bh & BH_STATUS) {
  672. info->pending_bh &= ~BH_STATUS;
  673. rc = BH_STATUS;
  674. }
  675. if (!rc) {
  676. /* Mark BH routine as complete */
  677. info->bh_running = 0;
  678. info->bh_requested = 0;
  679. }
  680. spin_unlock_irqrestore(&info->lock,flags);
  681. return rc;
  682. }
  683. static void bh_handler(struct work_struct *work)
  684. {
  685. MGSLPC_INFO *info = container_of(work, MGSLPC_INFO, task);
  686. int action;
  687. if (!info)
  688. return;
  689. if (debug_level >= DEBUG_LEVEL_BH)
  690. printk( "%s(%d):bh_handler(%s) entry\n",
  691. __FILE__,__LINE__,info->device_name);
  692. info->bh_running = 1;
  693. while((action = bh_action(info)) != 0) {
  694. /* Process work item */
  695. if ( debug_level >= DEBUG_LEVEL_BH )
  696. printk( "%s(%d):bh_handler() work item action=%d\n",
  697. __FILE__,__LINE__,action);
  698. switch (action) {
  699. case BH_RECEIVE:
  700. while(rx_get_frame(info));
  701. break;
  702. case BH_TRANSMIT:
  703. bh_transmit(info);
  704. break;
  705. case BH_STATUS:
  706. bh_status(info);
  707. break;
  708. default:
  709. /* unknown work item ID */
  710. printk("Unknown work item ID=%08X!\n", action);
  711. break;
  712. }
  713. }
  714. if (debug_level >= DEBUG_LEVEL_BH)
  715. printk( "%s(%d):bh_handler(%s) exit\n",
  716. __FILE__,__LINE__,info->device_name);
  717. }
  718. static void bh_transmit(MGSLPC_INFO *info)
  719. {
  720. struct tty_struct *tty = info->tty;
  721. if (debug_level >= DEBUG_LEVEL_BH)
  722. printk("bh_transmit() entry on %s\n", info->device_name);
  723. if (tty)
  724. tty_wakeup(tty);
  725. }
  726. static void bh_status(MGSLPC_INFO *info)
  727. {
  728. info->ri_chkcount = 0;
  729. info->dsr_chkcount = 0;
  730. info->dcd_chkcount = 0;
  731. info->cts_chkcount = 0;
  732. }
  733. /* eom: non-zero = end of frame */
  734. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  735. {
  736. unsigned char data[2];
  737. unsigned char fifo_count, read_count, i;
  738. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  739. if (debug_level >= DEBUG_LEVEL_ISR)
  740. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  741. if (!info->rx_enabled)
  742. return;
  743. if (info->rx_frame_count >= info->rx_buf_count) {
  744. /* no more free buffers */
  745. issue_command(info, CHA, CMD_RXRESET);
  746. info->pending_bh |= BH_RECEIVE;
  747. info->rx_overflow = 1;
  748. info->icount.buf_overrun++;
  749. return;
  750. }
  751. if (eom) {
  752. /* end of frame, get FIFO count from RBCL register */
  753. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  754. fifo_count = 32;
  755. } else
  756. fifo_count = 32;
  757. do {
  758. if (fifo_count == 1) {
  759. read_count = 1;
  760. data[0] = read_reg(info, CHA + RXFIFO);
  761. } else {
  762. read_count = 2;
  763. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  764. }
  765. fifo_count -= read_count;
  766. if (!fifo_count && eom)
  767. buf->status = data[--read_count];
  768. for (i = 0; i < read_count; i++) {
  769. if (buf->count >= info->max_frame_size) {
  770. /* frame too large, reset receiver and reset current buffer */
  771. issue_command(info, CHA, CMD_RXRESET);
  772. buf->count = 0;
  773. return;
  774. }
  775. *(buf->data + buf->count) = data[i];
  776. buf->count++;
  777. }
  778. } while (fifo_count);
  779. if (eom) {
  780. info->pending_bh |= BH_RECEIVE;
  781. info->rx_frame_count++;
  782. info->rx_put++;
  783. if (info->rx_put >= info->rx_buf_count)
  784. info->rx_put = 0;
  785. }
  786. issue_command(info, CHA, CMD_RXFIFO);
  787. }
  788. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  789. {
  790. unsigned char data, status, flag;
  791. int fifo_count;
  792. int work = 0;
  793. struct tty_struct *tty = info->tty;
  794. struct mgsl_icount *icount = &info->icount;
  795. if (tcd) {
  796. /* early termination, get FIFO count from RBCL register */
  797. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  798. /* Zero fifo count could mean 0 or 32 bytes available.
  799. * If BIT5 of STAR is set then at least 1 byte is available.
  800. */
  801. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  802. fifo_count = 32;
  803. } else
  804. fifo_count = 32;
  805. tty_buffer_request_room(tty, fifo_count);
  806. /* Flush received async data to receive data buffer. */
  807. while (fifo_count) {
  808. data = read_reg(info, CHA + RXFIFO);
  809. status = read_reg(info, CHA + RXFIFO);
  810. fifo_count -= 2;
  811. icount->rx++;
  812. flag = TTY_NORMAL;
  813. // if no frameing/crc error then save data
  814. // BIT7:parity error
  815. // BIT6:framing error
  816. if (status & (BIT7 + BIT6)) {
  817. if (status & BIT7)
  818. icount->parity++;
  819. else
  820. icount->frame++;
  821. /* discard char if tty control flags say so */
  822. if (status & info->ignore_status_mask)
  823. continue;
  824. status &= info->read_status_mask;
  825. if (status & BIT7)
  826. flag = TTY_PARITY;
  827. else if (status & BIT6)
  828. flag = TTY_FRAME;
  829. }
  830. work += tty_insert_flip_char(tty, data, flag);
  831. }
  832. issue_command(info, CHA, CMD_RXFIFO);
  833. if (debug_level >= DEBUG_LEVEL_ISR) {
  834. printk("%s(%d):rx_ready_async",
  835. __FILE__,__LINE__);
  836. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  837. __FILE__,__LINE__,icount->rx,icount->brk,
  838. icount->parity,icount->frame,icount->overrun);
  839. }
  840. if (work)
  841. tty_flip_buffer_push(tty);
  842. }
  843. static void tx_done(MGSLPC_INFO *info)
  844. {
  845. if (!info->tx_active)
  846. return;
  847. info->tx_active = 0;
  848. info->tx_aborting = 0;
  849. if (info->params.mode == MGSL_MODE_ASYNC)
  850. return;
  851. info->tx_count = info->tx_put = info->tx_get = 0;
  852. del_timer(&info->tx_timer);
  853. if (info->drop_rts_on_tx_done) {
  854. get_signals(info);
  855. if (info->serial_signals & SerialSignal_RTS) {
  856. info->serial_signals &= ~SerialSignal_RTS;
  857. set_signals(info);
  858. }
  859. info->drop_rts_on_tx_done = 0;
  860. }
  861. #if SYNCLINK_GENERIC_HDLC
  862. if (info->netcount)
  863. hdlcdev_tx_done(info);
  864. else
  865. #endif
  866. {
  867. if (info->tty->stopped || info->tty->hw_stopped) {
  868. tx_stop(info);
  869. return;
  870. }
  871. info->pending_bh |= BH_TRANSMIT;
  872. }
  873. }
  874. static void tx_ready(MGSLPC_INFO *info)
  875. {
  876. unsigned char fifo_count = 32;
  877. int c;
  878. if (debug_level >= DEBUG_LEVEL_ISR)
  879. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  880. if (info->params.mode == MGSL_MODE_HDLC) {
  881. if (!info->tx_active)
  882. return;
  883. } else {
  884. if (info->tty->stopped || info->tty->hw_stopped) {
  885. tx_stop(info);
  886. return;
  887. }
  888. if (!info->tx_count)
  889. info->tx_active = 0;
  890. }
  891. if (!info->tx_count)
  892. return;
  893. while (info->tx_count && fifo_count) {
  894. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  895. if (c == 1) {
  896. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  897. } else {
  898. write_reg16(info, CHA + TXFIFO,
  899. *((unsigned short*)(info->tx_buf + info->tx_get)));
  900. }
  901. info->tx_count -= c;
  902. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  903. fifo_count -= c;
  904. }
  905. if (info->params.mode == MGSL_MODE_ASYNC) {
  906. if (info->tx_count < WAKEUP_CHARS)
  907. info->pending_bh |= BH_TRANSMIT;
  908. issue_command(info, CHA, CMD_TXFIFO);
  909. } else {
  910. if (info->tx_count)
  911. issue_command(info, CHA, CMD_TXFIFO);
  912. else
  913. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  914. }
  915. }
  916. static void cts_change(MGSLPC_INFO *info)
  917. {
  918. get_signals(info);
  919. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  920. irq_disable(info, CHB, IRQ_CTS);
  921. info->icount.cts++;
  922. if (info->serial_signals & SerialSignal_CTS)
  923. info->input_signal_events.cts_up++;
  924. else
  925. info->input_signal_events.cts_down++;
  926. wake_up_interruptible(&info->status_event_wait_q);
  927. wake_up_interruptible(&info->event_wait_q);
  928. if (info->flags & ASYNC_CTS_FLOW) {
  929. if (info->tty->hw_stopped) {
  930. if (info->serial_signals & SerialSignal_CTS) {
  931. if (debug_level >= DEBUG_LEVEL_ISR)
  932. printk("CTS tx start...");
  933. if (info->tty)
  934. info->tty->hw_stopped = 0;
  935. tx_start(info);
  936. info->pending_bh |= BH_TRANSMIT;
  937. return;
  938. }
  939. } else {
  940. if (!(info->serial_signals & SerialSignal_CTS)) {
  941. if (debug_level >= DEBUG_LEVEL_ISR)
  942. printk("CTS tx stop...");
  943. if (info->tty)
  944. info->tty->hw_stopped = 1;
  945. tx_stop(info);
  946. }
  947. }
  948. }
  949. info->pending_bh |= BH_STATUS;
  950. }
  951. static void dcd_change(MGSLPC_INFO *info)
  952. {
  953. get_signals(info);
  954. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  955. irq_disable(info, CHB, IRQ_DCD);
  956. info->icount.dcd++;
  957. if (info->serial_signals & SerialSignal_DCD) {
  958. info->input_signal_events.dcd_up++;
  959. }
  960. else
  961. info->input_signal_events.dcd_down++;
  962. #if SYNCLINK_GENERIC_HDLC
  963. if (info->netcount) {
  964. if (info->serial_signals & SerialSignal_DCD)
  965. netif_carrier_on(info->netdev);
  966. else
  967. netif_carrier_off(info->netdev);
  968. }
  969. #endif
  970. wake_up_interruptible(&info->status_event_wait_q);
  971. wake_up_interruptible(&info->event_wait_q);
  972. if (info->flags & ASYNC_CHECK_CD) {
  973. if (debug_level >= DEBUG_LEVEL_ISR)
  974. printk("%s CD now %s...", info->device_name,
  975. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  976. if (info->serial_signals & SerialSignal_DCD)
  977. wake_up_interruptible(&info->open_wait);
  978. else {
  979. if (debug_level >= DEBUG_LEVEL_ISR)
  980. printk("doing serial hangup...");
  981. if (info->tty)
  982. tty_hangup(info->tty);
  983. }
  984. }
  985. info->pending_bh |= BH_STATUS;
  986. }
  987. static void dsr_change(MGSLPC_INFO *info)
  988. {
  989. get_signals(info);
  990. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  991. port_irq_disable(info, PVR_DSR);
  992. info->icount.dsr++;
  993. if (info->serial_signals & SerialSignal_DSR)
  994. info->input_signal_events.dsr_up++;
  995. else
  996. info->input_signal_events.dsr_down++;
  997. wake_up_interruptible(&info->status_event_wait_q);
  998. wake_up_interruptible(&info->event_wait_q);
  999. info->pending_bh |= BH_STATUS;
  1000. }
  1001. static void ri_change(MGSLPC_INFO *info)
  1002. {
  1003. get_signals(info);
  1004. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1005. port_irq_disable(info, PVR_RI);
  1006. info->icount.rng++;
  1007. if (info->serial_signals & SerialSignal_RI)
  1008. info->input_signal_events.ri_up++;
  1009. else
  1010. info->input_signal_events.ri_down++;
  1011. wake_up_interruptible(&info->status_event_wait_q);
  1012. wake_up_interruptible(&info->event_wait_q);
  1013. info->pending_bh |= BH_STATUS;
  1014. }
  1015. /* Interrupt service routine entry point.
  1016. *
  1017. * Arguments:
  1018. *
  1019. * irq interrupt number that caused interrupt
  1020. * dev_id device ID supplied during interrupt registration
  1021. */
  1022. static irqreturn_t mgslpc_isr(int dummy, void *dev_id)
  1023. {
  1024. MGSLPC_INFO *info = dev_id;
  1025. unsigned short isr;
  1026. unsigned char gis, pis;
  1027. int count=0;
  1028. if (debug_level >= DEBUG_LEVEL_ISR)
  1029. printk("mgslpc_isr(%d) entry.\n", info->irq_level);
  1030. if (!(info->p_dev->_locked))
  1031. return IRQ_HANDLED;
  1032. spin_lock(&info->lock);
  1033. while ((gis = read_reg(info, CHA + GIS))) {
  1034. if (debug_level >= DEBUG_LEVEL_ISR)
  1035. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1036. if ((gis & 0x70) || count > 1000) {
  1037. printk("synclink_cs:hardware failed or ejected\n");
  1038. break;
  1039. }
  1040. count++;
  1041. if (gis & (BIT1 + BIT0)) {
  1042. isr = read_reg16(info, CHB + ISR);
  1043. if (isr & IRQ_DCD)
  1044. dcd_change(info);
  1045. if (isr & IRQ_CTS)
  1046. cts_change(info);
  1047. }
  1048. if (gis & (BIT3 + BIT2))
  1049. {
  1050. isr = read_reg16(info, CHA + ISR);
  1051. if (isr & IRQ_TIMER) {
  1052. info->irq_occurred = 1;
  1053. irq_disable(info, CHA, IRQ_TIMER);
  1054. }
  1055. /* receive IRQs */
  1056. if (isr & IRQ_EXITHUNT) {
  1057. info->icount.exithunt++;
  1058. wake_up_interruptible(&info->event_wait_q);
  1059. }
  1060. if (isr & IRQ_BREAK_ON) {
  1061. info->icount.brk++;
  1062. if (info->flags & ASYNC_SAK)
  1063. do_SAK(info->tty);
  1064. }
  1065. if (isr & IRQ_RXTIME) {
  1066. issue_command(info, CHA, CMD_RXFIFO_READ);
  1067. }
  1068. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1069. if (info->params.mode == MGSL_MODE_HDLC)
  1070. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1071. else
  1072. rx_ready_async(info, isr & IRQ_RXEOM);
  1073. }
  1074. /* transmit IRQs */
  1075. if (isr & IRQ_UNDERRUN) {
  1076. if (info->tx_aborting)
  1077. info->icount.txabort++;
  1078. else
  1079. info->icount.txunder++;
  1080. tx_done(info);
  1081. }
  1082. else if (isr & IRQ_ALLSENT) {
  1083. info->icount.txok++;
  1084. tx_done(info);
  1085. }
  1086. else if (isr & IRQ_TXFIFO)
  1087. tx_ready(info);
  1088. }
  1089. if (gis & BIT7) {
  1090. pis = read_reg(info, CHA + PIS);
  1091. if (pis & BIT1)
  1092. dsr_change(info);
  1093. if (pis & BIT2)
  1094. ri_change(info);
  1095. }
  1096. }
  1097. /* Request bottom half processing if there's something
  1098. * for it to do and the bh is not already running
  1099. */
  1100. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1101. if ( debug_level >= DEBUG_LEVEL_ISR )
  1102. printk("%s(%d):%s queueing bh task.\n",
  1103. __FILE__,__LINE__,info->device_name);
  1104. schedule_work(&info->task);
  1105. info->bh_requested = 1;
  1106. }
  1107. spin_unlock(&info->lock);
  1108. if (debug_level >= DEBUG_LEVEL_ISR)
  1109. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1110. __FILE__, __LINE__, info->irq_level);
  1111. return IRQ_HANDLED;
  1112. }
  1113. /* Initialize and start device.
  1114. */
  1115. static int startup(MGSLPC_INFO * info)
  1116. {
  1117. int retval = 0;
  1118. if (debug_level >= DEBUG_LEVEL_INFO)
  1119. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1120. if (info->flags & ASYNC_INITIALIZED)
  1121. return 0;
  1122. if (!info->tx_buf) {
  1123. /* allocate a page of memory for a transmit buffer */
  1124. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1125. if (!info->tx_buf) {
  1126. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1127. __FILE__,__LINE__,info->device_name);
  1128. return -ENOMEM;
  1129. }
  1130. }
  1131. info->pending_bh = 0;
  1132. memset(&info->icount, 0, sizeof(info->icount));
  1133. setup_timer(&info->tx_timer, tx_timeout, (unsigned long)info);
  1134. /* Allocate and claim adapter resources */
  1135. retval = claim_resources(info);
  1136. /* perform existance check and diagnostics */
  1137. if ( !retval )
  1138. retval = adapter_test(info);
  1139. if ( retval ) {
  1140. if (capable(CAP_SYS_ADMIN) && info->tty)
  1141. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1142. release_resources(info);
  1143. return retval;
  1144. }
  1145. /* program hardware for current parameters */
  1146. mgslpc_change_params(info);
  1147. if (info->tty)
  1148. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1149. info->flags |= ASYNC_INITIALIZED;
  1150. return 0;
  1151. }
  1152. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1153. */
  1154. static void shutdown(MGSLPC_INFO * info)
  1155. {
  1156. unsigned long flags;
  1157. if (!(info->flags & ASYNC_INITIALIZED))
  1158. return;
  1159. if (debug_level >= DEBUG_LEVEL_INFO)
  1160. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1161. __FILE__,__LINE__, info->device_name );
  1162. /* clear status wait queue because status changes */
  1163. /* can't happen after shutting down the hardware */
  1164. wake_up_interruptible(&info->status_event_wait_q);
  1165. wake_up_interruptible(&info->event_wait_q);
  1166. del_timer_sync(&info->tx_timer);
  1167. if (info->tx_buf) {
  1168. free_page((unsigned long) info->tx_buf);
  1169. info->tx_buf = NULL;
  1170. }
  1171. spin_lock_irqsave(&info->lock,flags);
  1172. rx_stop(info);
  1173. tx_stop(info);
  1174. /* TODO:disable interrupts instead of reset to preserve signal states */
  1175. reset_device(info);
  1176. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1177. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1178. set_signals(info);
  1179. }
  1180. spin_unlock_irqrestore(&info->lock,flags);
  1181. release_resources(info);
  1182. if (info->tty)
  1183. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1184. info->flags &= ~ASYNC_INITIALIZED;
  1185. }
  1186. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1187. {
  1188. unsigned long flags;
  1189. spin_lock_irqsave(&info->lock,flags);
  1190. rx_stop(info);
  1191. tx_stop(info);
  1192. info->tx_count = info->tx_put = info->tx_get = 0;
  1193. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1194. hdlc_mode(info);
  1195. else
  1196. async_mode(info);
  1197. set_signals(info);
  1198. info->dcd_chkcount = 0;
  1199. info->cts_chkcount = 0;
  1200. info->ri_chkcount = 0;
  1201. info->dsr_chkcount = 0;
  1202. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1203. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1204. get_signals(info);
  1205. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1206. rx_start(info);
  1207. spin_unlock_irqrestore(&info->lock,flags);
  1208. }
  1209. /* Reconfigure adapter based on new parameters
  1210. */
  1211. static void mgslpc_change_params(MGSLPC_INFO *info)
  1212. {
  1213. unsigned cflag;
  1214. int bits_per_char;
  1215. if (!info->tty || !info->tty->termios)
  1216. return;
  1217. if (debug_level >= DEBUG_LEVEL_INFO)
  1218. printk("%s(%d):mgslpc_change_params(%s)\n",
  1219. __FILE__,__LINE__, info->device_name );
  1220. cflag = info->tty->termios->c_cflag;
  1221. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1222. /* otherwise assert DTR and RTS */
  1223. if (cflag & CBAUD)
  1224. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1225. else
  1226. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1227. /* byte size and parity */
  1228. switch (cflag & CSIZE) {
  1229. case CS5: info->params.data_bits = 5; break;
  1230. case CS6: info->params.data_bits = 6; break;
  1231. case CS7: info->params.data_bits = 7; break;
  1232. case CS8: info->params.data_bits = 8; break;
  1233. default: info->params.data_bits = 7; break;
  1234. }
  1235. if (cflag & CSTOPB)
  1236. info->params.stop_bits = 2;
  1237. else
  1238. info->params.stop_bits = 1;
  1239. info->params.parity = ASYNC_PARITY_NONE;
  1240. if (cflag & PARENB) {
  1241. if (cflag & PARODD)
  1242. info->params.parity = ASYNC_PARITY_ODD;
  1243. else
  1244. info->params.parity = ASYNC_PARITY_EVEN;
  1245. #ifdef CMSPAR
  1246. if (cflag & CMSPAR)
  1247. info->params.parity = ASYNC_PARITY_SPACE;
  1248. #endif
  1249. }
  1250. /* calculate number of jiffies to transmit a full
  1251. * FIFO (32 bytes) at specified data rate
  1252. */
  1253. bits_per_char = info->params.data_bits +
  1254. info->params.stop_bits + 1;
  1255. /* if port data rate is set to 460800 or less then
  1256. * allow tty settings to override, otherwise keep the
  1257. * current data rate.
  1258. */
  1259. if (info->params.data_rate <= 460800) {
  1260. info->params.data_rate = tty_get_baud_rate(info->tty);
  1261. }
  1262. if ( info->params.data_rate ) {
  1263. info->timeout = (32*HZ*bits_per_char) /
  1264. info->params.data_rate;
  1265. }
  1266. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1267. if (cflag & CRTSCTS)
  1268. info->flags |= ASYNC_CTS_FLOW;
  1269. else
  1270. info->flags &= ~ASYNC_CTS_FLOW;
  1271. if (cflag & CLOCAL)
  1272. info->flags &= ~ASYNC_CHECK_CD;
  1273. else
  1274. info->flags |= ASYNC_CHECK_CD;
  1275. /* process tty input control flags */
  1276. info->read_status_mask = 0;
  1277. if (I_INPCK(info->tty))
  1278. info->read_status_mask |= BIT7 | BIT6;
  1279. if (I_IGNPAR(info->tty))
  1280. info->ignore_status_mask |= BIT7 | BIT6;
  1281. mgslpc_program_hw(info);
  1282. }
  1283. /* Add a character to the transmit buffer
  1284. */
  1285. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1286. {
  1287. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1288. unsigned long flags;
  1289. if (debug_level >= DEBUG_LEVEL_INFO) {
  1290. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1291. __FILE__,__LINE__,ch,info->device_name);
  1292. }
  1293. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1294. return;
  1295. if (!info->tx_buf)
  1296. return;
  1297. spin_lock_irqsave(&info->lock,flags);
  1298. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1299. if (info->tx_count < TXBUFSIZE - 1) {
  1300. info->tx_buf[info->tx_put++] = ch;
  1301. info->tx_put &= TXBUFSIZE-1;
  1302. info->tx_count++;
  1303. }
  1304. }
  1305. spin_unlock_irqrestore(&info->lock,flags);
  1306. }
  1307. /* Enable transmitter so remaining characters in the
  1308. * transmit buffer are sent.
  1309. */
  1310. static void mgslpc_flush_chars(struct tty_struct *tty)
  1311. {
  1312. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1313. unsigned long flags;
  1314. if (debug_level >= DEBUG_LEVEL_INFO)
  1315. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1316. __FILE__,__LINE__,info->device_name,info->tx_count);
  1317. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1318. return;
  1319. if (info->tx_count <= 0 || tty->stopped ||
  1320. tty->hw_stopped || !info->tx_buf)
  1321. return;
  1322. if (debug_level >= DEBUG_LEVEL_INFO)
  1323. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1324. __FILE__,__LINE__,info->device_name);
  1325. spin_lock_irqsave(&info->lock,flags);
  1326. if (!info->tx_active)
  1327. tx_start(info);
  1328. spin_unlock_irqrestore(&info->lock,flags);
  1329. }
  1330. /* Send a block of data
  1331. *
  1332. * Arguments:
  1333. *
  1334. * tty pointer to tty information structure
  1335. * buf pointer to buffer containing send data
  1336. * count size of send data in bytes
  1337. *
  1338. * Returns: number of characters written
  1339. */
  1340. static int mgslpc_write(struct tty_struct * tty,
  1341. const unsigned char *buf, int count)
  1342. {
  1343. int c, ret = 0;
  1344. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1345. unsigned long flags;
  1346. if (debug_level >= DEBUG_LEVEL_INFO)
  1347. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1348. __FILE__,__LINE__,info->device_name,count);
  1349. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1350. !info->tx_buf)
  1351. goto cleanup;
  1352. if (info->params.mode == MGSL_MODE_HDLC) {
  1353. if (count > TXBUFSIZE) {
  1354. ret = -EIO;
  1355. goto cleanup;
  1356. }
  1357. if (info->tx_active)
  1358. goto cleanup;
  1359. else if (info->tx_count)
  1360. goto start;
  1361. }
  1362. for (;;) {
  1363. c = min(count,
  1364. min(TXBUFSIZE - info->tx_count - 1,
  1365. TXBUFSIZE - info->tx_put));
  1366. if (c <= 0)
  1367. break;
  1368. memcpy(info->tx_buf + info->tx_put, buf, c);
  1369. spin_lock_irqsave(&info->lock,flags);
  1370. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1371. info->tx_count += c;
  1372. spin_unlock_irqrestore(&info->lock,flags);
  1373. buf += c;
  1374. count -= c;
  1375. ret += c;
  1376. }
  1377. start:
  1378. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1379. spin_lock_irqsave(&info->lock,flags);
  1380. if (!info->tx_active)
  1381. tx_start(info);
  1382. spin_unlock_irqrestore(&info->lock,flags);
  1383. }
  1384. cleanup:
  1385. if (debug_level >= DEBUG_LEVEL_INFO)
  1386. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1387. __FILE__,__LINE__,info->device_name,ret);
  1388. return ret;
  1389. }
  1390. /* Return the count of free bytes in transmit buffer
  1391. */
  1392. static int mgslpc_write_room(struct tty_struct *tty)
  1393. {
  1394. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1395. int ret;
  1396. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1397. return 0;
  1398. if (info->params.mode == MGSL_MODE_HDLC) {
  1399. /* HDLC (frame oriented) mode */
  1400. if (info->tx_active)
  1401. return 0;
  1402. else
  1403. return HDLC_MAX_FRAME_SIZE;
  1404. } else {
  1405. ret = TXBUFSIZE - info->tx_count - 1;
  1406. if (ret < 0)
  1407. ret = 0;
  1408. }
  1409. if (debug_level >= DEBUG_LEVEL_INFO)
  1410. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1411. __FILE__,__LINE__, info->device_name, ret);
  1412. return ret;
  1413. }
  1414. /* Return the count of bytes in transmit buffer
  1415. */
  1416. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1417. {
  1418. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1419. int rc;
  1420. if (debug_level >= DEBUG_LEVEL_INFO)
  1421. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1422. __FILE__,__LINE__, info->device_name );
  1423. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1424. return 0;
  1425. if (info->params.mode == MGSL_MODE_HDLC)
  1426. rc = info->tx_active ? info->max_frame_size : 0;
  1427. else
  1428. rc = info->tx_count;
  1429. if (debug_level >= DEBUG_LEVEL_INFO)
  1430. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1431. __FILE__,__LINE__, info->device_name, rc);
  1432. return rc;
  1433. }
  1434. /* Discard all data in the send buffer
  1435. */
  1436. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1437. {
  1438. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1439. unsigned long flags;
  1440. if (debug_level >= DEBUG_LEVEL_INFO)
  1441. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1442. __FILE__,__LINE__, info->device_name );
  1443. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1444. return;
  1445. spin_lock_irqsave(&info->lock,flags);
  1446. info->tx_count = info->tx_put = info->tx_get = 0;
  1447. del_timer(&info->tx_timer);
  1448. spin_unlock_irqrestore(&info->lock,flags);
  1449. wake_up_interruptible(&tty->write_wait);
  1450. tty_wakeup(tty);
  1451. }
  1452. /* Send a high-priority XON/XOFF character
  1453. */
  1454. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1455. {
  1456. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1457. unsigned long flags;
  1458. if (debug_level >= DEBUG_LEVEL_INFO)
  1459. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1460. __FILE__,__LINE__, info->device_name, ch );
  1461. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1462. return;
  1463. info->x_char = ch;
  1464. if (ch) {
  1465. spin_lock_irqsave(&info->lock,flags);
  1466. if (!info->tx_enabled)
  1467. tx_start(info);
  1468. spin_unlock_irqrestore(&info->lock,flags);
  1469. }
  1470. }
  1471. /* Signal remote device to throttle send data (our receive data)
  1472. */
  1473. static void mgslpc_throttle(struct tty_struct * tty)
  1474. {
  1475. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1476. unsigned long flags;
  1477. if (debug_level >= DEBUG_LEVEL_INFO)
  1478. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1479. __FILE__,__LINE__, info->device_name );
  1480. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1481. return;
  1482. if (I_IXOFF(tty))
  1483. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1484. if (tty->termios->c_cflag & CRTSCTS) {
  1485. spin_lock_irqsave(&info->lock,flags);
  1486. info->serial_signals &= ~SerialSignal_RTS;
  1487. set_signals(info);
  1488. spin_unlock_irqrestore(&info->lock,flags);
  1489. }
  1490. }
  1491. /* Signal remote device to stop throttling send data (our receive data)
  1492. */
  1493. static void mgslpc_unthrottle(struct tty_struct * tty)
  1494. {
  1495. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1496. unsigned long flags;
  1497. if (debug_level >= DEBUG_LEVEL_INFO)
  1498. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1499. __FILE__,__LINE__, info->device_name );
  1500. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1501. return;
  1502. if (I_IXOFF(tty)) {
  1503. if (info->x_char)
  1504. info->x_char = 0;
  1505. else
  1506. mgslpc_send_xchar(tty, START_CHAR(tty));
  1507. }
  1508. if (tty->termios->c_cflag & CRTSCTS) {
  1509. spin_lock_irqsave(&info->lock,flags);
  1510. info->serial_signals |= SerialSignal_RTS;
  1511. set_signals(info);
  1512. spin_unlock_irqrestore(&info->lock,flags);
  1513. }
  1514. }
  1515. /* get the current serial statistics
  1516. */
  1517. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1518. {
  1519. int err;
  1520. if (debug_level >= DEBUG_LEVEL_INFO)
  1521. printk("get_params(%s)\n", info->device_name);
  1522. if (!user_icount) {
  1523. memset(&info->icount, 0, sizeof(info->icount));
  1524. } else {
  1525. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1526. if (err)
  1527. return -EFAULT;
  1528. }
  1529. return 0;
  1530. }
  1531. /* get the current serial parameters
  1532. */
  1533. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1534. {
  1535. int err;
  1536. if (debug_level >= DEBUG_LEVEL_INFO)
  1537. printk("get_params(%s)\n", info->device_name);
  1538. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1539. if (err)
  1540. return -EFAULT;
  1541. return 0;
  1542. }
  1543. /* set the serial parameters
  1544. *
  1545. * Arguments:
  1546. *
  1547. * info pointer to device instance data
  1548. * new_params user buffer containing new serial params
  1549. *
  1550. * Returns: 0 if success, otherwise error code
  1551. */
  1552. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1553. {
  1554. unsigned long flags;
  1555. MGSL_PARAMS tmp_params;
  1556. int err;
  1557. if (debug_level >= DEBUG_LEVEL_INFO)
  1558. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1559. info->device_name );
  1560. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1561. if (err) {
  1562. if ( debug_level >= DEBUG_LEVEL_INFO )
  1563. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1564. __FILE__,__LINE__,info->device_name);
  1565. return -EFAULT;
  1566. }
  1567. spin_lock_irqsave(&info->lock,flags);
  1568. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1569. spin_unlock_irqrestore(&info->lock,flags);
  1570. mgslpc_change_params(info);
  1571. return 0;
  1572. }
  1573. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1574. {
  1575. int err;
  1576. if (debug_level >= DEBUG_LEVEL_INFO)
  1577. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1578. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1579. if (err)
  1580. return -EFAULT;
  1581. return 0;
  1582. }
  1583. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1584. {
  1585. unsigned long flags;
  1586. if (debug_level >= DEBUG_LEVEL_INFO)
  1587. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1588. spin_lock_irqsave(&info->lock,flags);
  1589. info->idle_mode = idle_mode;
  1590. tx_set_idle(info);
  1591. spin_unlock_irqrestore(&info->lock,flags);
  1592. return 0;
  1593. }
  1594. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1595. {
  1596. int err;
  1597. if (debug_level >= DEBUG_LEVEL_INFO)
  1598. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1599. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1600. if (err)
  1601. return -EFAULT;
  1602. return 0;
  1603. }
  1604. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1605. {
  1606. unsigned long flags;
  1607. unsigned char val;
  1608. if (debug_level >= DEBUG_LEVEL_INFO)
  1609. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1610. spin_lock_irqsave(&info->lock,flags);
  1611. info->if_mode = if_mode;
  1612. val = read_reg(info, PVR) & 0x0f;
  1613. switch (info->if_mode)
  1614. {
  1615. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1616. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1617. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1618. }
  1619. write_reg(info, PVR, val);
  1620. spin_unlock_irqrestore(&info->lock,flags);
  1621. return 0;
  1622. }
  1623. static int set_txenable(MGSLPC_INFO * info, int enable)
  1624. {
  1625. unsigned long flags;
  1626. if (debug_level >= DEBUG_LEVEL_INFO)
  1627. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1628. spin_lock_irqsave(&info->lock,flags);
  1629. if (enable) {
  1630. if (!info->tx_enabled)
  1631. tx_start(info);
  1632. } else {
  1633. if (info->tx_enabled)
  1634. tx_stop(info);
  1635. }
  1636. spin_unlock_irqrestore(&info->lock,flags);
  1637. return 0;
  1638. }
  1639. static int tx_abort(MGSLPC_INFO * info)
  1640. {
  1641. unsigned long flags;
  1642. if (debug_level >= DEBUG_LEVEL_INFO)
  1643. printk("tx_abort(%s)\n", info->device_name);
  1644. spin_lock_irqsave(&info->lock,flags);
  1645. if (info->tx_active && info->tx_count &&
  1646. info->params.mode == MGSL_MODE_HDLC) {
  1647. /* clear data count so FIFO is not filled on next IRQ.
  1648. * This results in underrun and abort transmission.
  1649. */
  1650. info->tx_count = info->tx_put = info->tx_get = 0;
  1651. info->tx_aborting = TRUE;
  1652. }
  1653. spin_unlock_irqrestore(&info->lock,flags);
  1654. return 0;
  1655. }
  1656. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1657. {
  1658. unsigned long flags;
  1659. if (debug_level >= DEBUG_LEVEL_INFO)
  1660. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1661. spin_lock_irqsave(&info->lock,flags);
  1662. if (enable) {
  1663. if (!info->rx_enabled)
  1664. rx_start(info);
  1665. } else {
  1666. if (info->rx_enabled)
  1667. rx_stop(info);
  1668. }
  1669. spin_unlock_irqrestore(&info->lock,flags);
  1670. return 0;
  1671. }
  1672. /* wait for specified event to occur
  1673. *
  1674. * Arguments: info pointer to device instance data
  1675. * mask pointer to bitmask of events to wait for
  1676. * Return Value: 0 if successful and bit mask updated with
  1677. * of events triggerred,
  1678. * otherwise error code
  1679. */
  1680. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1681. {
  1682. unsigned long flags;
  1683. int s;
  1684. int rc=0;
  1685. struct mgsl_icount cprev, cnow;
  1686. int events;
  1687. int mask;
  1688. struct _input_signal_events oldsigs, newsigs;
  1689. DECLARE_WAITQUEUE(wait, current);
  1690. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1691. if (rc)
  1692. return -EFAULT;
  1693. if (debug_level >= DEBUG_LEVEL_INFO)
  1694. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1695. spin_lock_irqsave(&info->lock,flags);
  1696. /* return immediately if state matches requested events */
  1697. get_signals(info);
  1698. s = info->serial_signals;
  1699. events = mask &
  1700. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1701. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1702. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1703. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1704. if (events) {
  1705. spin_unlock_irqrestore(&info->lock,flags);
  1706. goto exit;
  1707. }
  1708. /* save current irq counts */
  1709. cprev = info->icount;
  1710. oldsigs = info->input_signal_events;
  1711. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1712. (mask & MgslEvent_ExitHuntMode))
  1713. irq_enable(info, CHA, IRQ_EXITHUNT);
  1714. set_current_state(TASK_INTERRUPTIBLE);
  1715. add_wait_queue(&info->event_wait_q, &wait);
  1716. spin_unlock_irqrestore(&info->lock,flags);
  1717. for(;;) {
  1718. schedule();
  1719. if (signal_pending(current)) {
  1720. rc = -ERESTARTSYS;
  1721. break;
  1722. }
  1723. /* get current irq counts */
  1724. spin_lock_irqsave(&info->lock,flags);
  1725. cnow = info->icount;
  1726. newsigs = info->input_signal_events;
  1727. set_current_state(TASK_INTERRUPTIBLE);
  1728. spin_unlock_irqrestore(&info->lock,flags);
  1729. /* if no change, wait aborted for some reason */
  1730. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1731. newsigs.dsr_down == oldsigs.dsr_down &&
  1732. newsigs.dcd_up == oldsigs.dcd_up &&
  1733. newsigs.dcd_down == oldsigs.dcd_down &&
  1734. newsigs.cts_up == oldsigs.cts_up &&
  1735. newsigs.cts_down == oldsigs.cts_down &&
  1736. newsigs.ri_up == oldsigs.ri_up &&
  1737. newsigs.ri_down == oldsigs.ri_down &&
  1738. cnow.exithunt == cprev.exithunt &&
  1739. cnow.rxidle == cprev.rxidle) {
  1740. rc = -EIO;
  1741. break;
  1742. }
  1743. events = mask &
  1744. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1745. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1746. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1747. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1748. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1749. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1750. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1751. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1752. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1753. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1754. if (events)
  1755. break;
  1756. cprev = cnow;
  1757. oldsigs = newsigs;
  1758. }
  1759. remove_wait_queue(&info->event_wait_q, &wait);
  1760. set_current_state(TASK_RUNNING);
  1761. if (mask & MgslEvent_ExitHuntMode) {
  1762. spin_lock_irqsave(&info->lock,flags);
  1763. if (!waitqueue_active(&info->event_wait_q))
  1764. irq_disable(info, CHA, IRQ_EXITHUNT);
  1765. spin_unlock_irqrestore(&info->lock,flags);
  1766. }
  1767. exit:
  1768. if (rc == 0)
  1769. PUT_USER(rc, events, mask_ptr);
  1770. return rc;
  1771. }
  1772. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1773. {
  1774. unsigned long flags;
  1775. int rc;
  1776. struct mgsl_icount cprev, cnow;
  1777. DECLARE_WAITQUEUE(wait, current);
  1778. /* save current irq counts */
  1779. spin_lock_irqsave(&info->lock,flags);
  1780. cprev = info->icount;
  1781. add_wait_queue(&info->status_event_wait_q, &wait);
  1782. set_current_state(TASK_INTERRUPTIBLE);
  1783. spin_unlock_irqrestore(&info->lock,flags);
  1784. for(;;) {
  1785. schedule();
  1786. if (signal_pending(current)) {
  1787. rc = -ERESTARTSYS;
  1788. break;
  1789. }
  1790. /* get new irq counts */
  1791. spin_lock_irqsave(&info->lock,flags);
  1792. cnow = info->icount;
  1793. set_current_state(TASK_INTERRUPTIBLE);
  1794. spin_unlock_irqrestore(&info->lock,flags);
  1795. /* if no change, wait aborted for some reason */
  1796. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1797. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1798. rc = -EIO;
  1799. break;
  1800. }
  1801. /* check for change in caller specified modem input */
  1802. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1803. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1804. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1805. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1806. rc = 0;
  1807. break;
  1808. }
  1809. cprev = cnow;
  1810. }
  1811. remove_wait_queue(&info->status_event_wait_q, &wait);
  1812. set_current_state(TASK_RUNNING);
  1813. return rc;
  1814. }
  1815. /* return the state of the serial control and status signals
  1816. */
  1817. static int tiocmget(struct tty_struct *tty, struct file *file)
  1818. {
  1819. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1820. unsigned int result;
  1821. unsigned long flags;
  1822. spin_lock_irqsave(&info->lock,flags);
  1823. get_signals(info);
  1824. spin_unlock_irqrestore(&info->lock,flags);
  1825. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1826. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1827. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1828. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1829. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1830. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1831. if (debug_level >= DEBUG_LEVEL_INFO)
  1832. printk("%s(%d):%s tiocmget() value=%08X\n",
  1833. __FILE__,__LINE__, info->device_name, result );
  1834. return result;
  1835. }
  1836. /* set modem control signals (DTR/RTS)
  1837. */
  1838. static int tiocmset(struct tty_struct *tty, struct file *file,
  1839. unsigned int set, unsigned int clear)
  1840. {
  1841. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1842. unsigned long flags;
  1843. if (debug_level >= DEBUG_LEVEL_INFO)
  1844. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1845. __FILE__,__LINE__,info->device_name, set, clear);
  1846. if (set & TIOCM_RTS)
  1847. info->serial_signals |= SerialSignal_RTS;
  1848. if (set & TIOCM_DTR)
  1849. info->serial_signals |= SerialSignal_DTR;
  1850. if (clear & TIOCM_RTS)
  1851. info->serial_signals &= ~SerialSignal_RTS;
  1852. if (clear & TIOCM_DTR)
  1853. info->serial_signals &= ~SerialSignal_DTR;
  1854. spin_lock_irqsave(&info->lock,flags);
  1855. set_signals(info);
  1856. spin_unlock_irqrestore(&info->lock,flags);
  1857. return 0;
  1858. }
  1859. /* Set or clear transmit break condition
  1860. *
  1861. * Arguments: tty pointer to tty instance data
  1862. * break_state -1=set break condition, 0=clear
  1863. */
  1864. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1865. {
  1866. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1867. unsigned long flags;
  1868. if (debug_level >= DEBUG_LEVEL_INFO)
  1869. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1870. __FILE__,__LINE__, info->device_name, break_state);
  1871. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1872. return;
  1873. spin_lock_irqsave(&info->lock,flags);
  1874. if (break_state == -1)
  1875. set_reg_bits(info, CHA+DAFO, BIT6);
  1876. else
  1877. clear_reg_bits(info, CHA+DAFO, BIT6);
  1878. spin_unlock_irqrestore(&info->lock,flags);
  1879. }
  1880. /* Service an IOCTL request
  1881. *
  1882. * Arguments:
  1883. *
  1884. * tty pointer to tty instance data
  1885. * file pointer to associated file object for device
  1886. * cmd IOCTL command code
  1887. * arg command argument/context
  1888. *
  1889. * Return Value: 0 if success, otherwise error code
  1890. */
  1891. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1892. unsigned int cmd, unsigned long arg)
  1893. {
  1894. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1895. if (debug_level >= DEBUG_LEVEL_INFO)
  1896. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1897. info->device_name, cmd );
  1898. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1899. return -ENODEV;
  1900. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1901. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1902. if (tty->flags & (1 << TTY_IO_ERROR))
  1903. return -EIO;
  1904. }
  1905. return ioctl_common(info, cmd, arg);
  1906. }
  1907. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1908. {
  1909. int error;
  1910. struct mgsl_icount cnow; /* kernel counter temps */
  1911. struct serial_icounter_struct __user *p_cuser; /* user space */
  1912. void __user *argp = (void __user *)arg;
  1913. unsigned long flags;
  1914. switch (cmd) {
  1915. case MGSL_IOCGPARAMS:
  1916. return get_params(info, argp);
  1917. case MGSL_IOCSPARAMS:
  1918. return set_params(info, argp);
  1919. case MGSL_IOCGTXIDLE:
  1920. return get_txidle(info, argp);
  1921. case MGSL_IOCSTXIDLE:
  1922. return set_txidle(info, (int)arg);
  1923. case MGSL_IOCGIF:
  1924. return get_interface(info, argp);
  1925. case MGSL_IOCSIF:
  1926. return set_interface(info,(int)arg);
  1927. case MGSL_IOCTXENABLE:
  1928. return set_txenable(info,(int)arg);
  1929. case MGSL_IOCRXENABLE:
  1930. return set_rxenable(info,(int)arg);
  1931. case MGSL_IOCTXABORT:
  1932. return tx_abort(info);
  1933. case MGSL_IOCGSTATS:
  1934. return get_stats(info, argp);
  1935. case MGSL_IOCWAITEVENT:
  1936. return wait_events(info, argp);
  1937. case TIOCMIWAIT:
  1938. return modem_input_wait(info,(int)arg);
  1939. case TIOCGICOUNT:
  1940. spin_lock_irqsave(&info->lock,flags);
  1941. cnow = info->icount;
  1942. spin_unlock_irqrestore(&info->lock,flags);
  1943. p_cuser = argp;
  1944. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1945. if (error) return error;
  1946. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1947. if (error) return error;
  1948. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1949. if (error) return error;
  1950. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1951. if (error) return error;
  1952. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1953. if (error) return error;
  1954. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1955. if (error) return error;
  1956. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1957. if (error) return error;
  1958. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1959. if (error) return error;
  1960. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1961. if (error) return error;
  1962. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1963. if (error) return error;
  1964. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1965. if (error) return error;
  1966. return 0;
  1967. default:
  1968. return -ENOIOCTLCMD;
  1969. }
  1970. return 0;
  1971. }
  1972. /* Set new termios settings
  1973. *
  1974. * Arguments:
  1975. *
  1976. * tty pointer to tty structure
  1977. * termios pointer to buffer to hold returned old termios
  1978. */
  1979. static void mgslpc_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1980. {
  1981. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1982. unsigned long flags;
  1983. if (debug_level >= DEBUG_LEVEL_INFO)
  1984. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1985. tty->driver->name );
  1986. /* just return if nothing has changed */
  1987. if ((tty->termios->c_cflag == old_termios->c_cflag)
  1988. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  1989. == RELEVANT_IFLAG(old_termios->c_iflag)))
  1990. return;
  1991. mgslpc_change_params(info);
  1992. /* Handle transition to B0 status */
  1993. if (old_termios->c_cflag & CBAUD &&
  1994. !(tty->termios->c_cflag & CBAUD)) {
  1995. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1996. spin_lock_irqsave(&info->lock,flags);
  1997. set_signals(info);
  1998. spin_unlock_irqrestore(&info->lock,flags);
  1999. }
  2000. /* Handle transition away from B0 status */
  2001. if (!(old_termios->c_cflag & CBAUD) &&
  2002. tty->termios->c_cflag & CBAUD) {
  2003. info->serial_signals |= SerialSignal_DTR;
  2004. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2005. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2006. info->serial_signals |= SerialSignal_RTS;
  2007. }
  2008. spin_lock_irqsave(&info->lock,flags);
  2009. set_signals(info);
  2010. spin_unlock_irqrestore(&info->lock,flags);
  2011. }
  2012. /* Handle turning off CRTSCTS */
  2013. if (old_termios->c_cflag & CRTSCTS &&
  2014. !(tty->termios->c_cflag & CRTSCTS)) {
  2015. tty->hw_stopped = 0;
  2016. tx_release(tty);
  2017. }
  2018. }
  2019. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2020. {
  2021. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2022. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2023. return;
  2024. if (debug_level >= DEBUG_LEVEL_INFO)
  2025. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2026. __FILE__,__LINE__, info->device_name, info->count);
  2027. if (!info->count)
  2028. return;
  2029. if (tty_hung_up_p(filp))
  2030. goto cleanup;
  2031. if ((tty->count == 1) && (info->count != 1)) {
  2032. /*
  2033. * tty->count is 1 and the tty structure will be freed.
  2034. * info->count should be one in this case.
  2035. * if it's not, correct it so that the port is shutdown.
  2036. */
  2037. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2038. "info->count is %d\n", info->count);
  2039. info->count = 1;
  2040. }
  2041. info->count--;
  2042. /* if at least one open remaining, leave hardware active */
  2043. if (info->count)
  2044. goto cleanup;
  2045. info->flags |= ASYNC_CLOSING;
  2046. /* set tty->closing to notify line discipline to
  2047. * only process XON/XOFF characters. Only the N_TTY
  2048. * discipline appears to use this (ppp does not).
  2049. */
  2050. tty->closing = 1;
  2051. /* wait for transmit data to clear all layers */
  2052. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2053. if (debug_level >= DEBUG_LEVEL_INFO)
  2054. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2055. __FILE__,__LINE__, info->device_name );
  2056. tty_wait_until_sent(tty, info->closing_wait);
  2057. }
  2058. if (info->flags & ASYNC_INITIALIZED)
  2059. mgslpc_wait_until_sent(tty, info->timeout);
  2060. if (tty->driver->flush_buffer)
  2061. tty->driver->flush_buffer(tty);
  2062. ldisc_flush_buffer(tty);
  2063. shutdown(info);
  2064. tty->closing = 0;
  2065. info->tty = NULL;
  2066. if (info->blocked_open) {
  2067. if (info->close_delay) {
  2068. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2069. }
  2070. wake_up_interruptible(&info->open_wait);
  2071. }
  2072. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2073. wake_up_interruptible(&info->close_wait);
  2074. cleanup:
  2075. if (debug_level >= DEBUG_LEVEL_INFO)
  2076. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2077. tty->driver->name, info->count);
  2078. }
  2079. /* Wait until the transmitter is empty.
  2080. */
  2081. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2082. {
  2083. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2084. unsigned long orig_jiffies, char_time;
  2085. if (!info )
  2086. return;
  2087. if (debug_level >= DEBUG_LEVEL_INFO)
  2088. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2089. __FILE__,__LINE__, info->device_name );
  2090. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2091. return;
  2092. if (!(info->flags & ASYNC_INITIALIZED))
  2093. goto exit;
  2094. orig_jiffies = jiffies;
  2095. /* Set check interval to 1/5 of estimated time to
  2096. * send a character, and make it at least 1. The check
  2097. * interval should also be less than the timeout.
  2098. * Note: use tight timings here to satisfy the NIST-PCTS.
  2099. */
  2100. if ( info->params.data_rate ) {
  2101. char_time = info->timeout/(32 * 5);
  2102. if (!char_time)
  2103. char_time++;
  2104. } else
  2105. char_time = 1;
  2106. if (timeout)
  2107. char_time = min_t(unsigned long, char_time, timeout);
  2108. if (info->params.mode == MGSL_MODE_HDLC) {
  2109. while (info->tx_active) {
  2110. msleep_interruptible(jiffies_to_msecs(char_time));
  2111. if (signal_pending(current))
  2112. break;
  2113. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2114. break;
  2115. }
  2116. } else {
  2117. while ((info->tx_count || info->tx_active) &&
  2118. info->tx_enabled) {
  2119. msleep_interruptible(jiffies_to_msecs(char_time));
  2120. if (signal_pending(current))
  2121. break;
  2122. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2123. break;
  2124. }
  2125. }
  2126. exit:
  2127. if (debug_level >= DEBUG_LEVEL_INFO)
  2128. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2129. __FILE__,__LINE__, info->device_name );
  2130. }
  2131. /* Called by tty_hangup() when a hangup is signaled.
  2132. * This is the same as closing all open files for the port.
  2133. */
  2134. static void mgslpc_hangup(struct tty_struct *tty)
  2135. {
  2136. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2137. if (debug_level >= DEBUG_LEVEL_INFO)
  2138. printk("%s(%d):mgslpc_hangup(%s)\n",
  2139. __FILE__,__LINE__, info->device_name );
  2140. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2141. return;
  2142. mgslpc_flush_buffer(tty);
  2143. shutdown(info);
  2144. info->count = 0;
  2145. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2146. info->tty = NULL;
  2147. wake_up_interruptible(&info->open_wait);
  2148. }
  2149. /* Block the current process until the specified port
  2150. * is ready to be opened.
  2151. */
  2152. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2153. MGSLPC_INFO *info)
  2154. {
  2155. DECLARE_WAITQUEUE(wait, current);
  2156. int retval;
  2157. int do_clocal = 0, extra_count = 0;
  2158. unsigned long flags;
  2159. if (debug_level >= DEBUG_LEVEL_INFO)
  2160. printk("%s(%d):block_til_ready on %s\n",
  2161. __FILE__,__LINE__, tty->driver->name );
  2162. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2163. /* nonblock mode is set or port is not enabled */
  2164. /* just verify that callout device is not active */
  2165. info->flags |= ASYNC_NORMAL_ACTIVE;
  2166. return 0;
  2167. }
  2168. if (tty->termios->c_cflag & CLOCAL)
  2169. do_clocal = 1;
  2170. /* Wait for carrier detect and the line to become
  2171. * free (i.e., not in use by the callout). While we are in
  2172. * this loop, info->count is dropped by one, so that
  2173. * mgslpc_close() knows when to free things. We restore it upon
  2174. * exit, either normal or abnormal.
  2175. */
  2176. retval = 0;
  2177. add_wait_queue(&info->open_wait, &wait);
  2178. if (debug_level >= DEBUG_LEVEL_INFO)
  2179. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2180. __FILE__,__LINE__, tty->driver->name, info->count );
  2181. spin_lock_irqsave(&info->lock, flags);
  2182. if (!tty_hung_up_p(filp)) {
  2183. extra_count = 1;
  2184. info->count--;
  2185. }
  2186. spin_unlock_irqrestore(&info->lock, flags);
  2187. info->blocked_open++;
  2188. while (1) {
  2189. if ((tty->termios->c_cflag & CBAUD)) {
  2190. spin_lock_irqsave(&info->lock,flags);
  2191. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2192. set_signals(info);
  2193. spin_unlock_irqrestore(&info->lock,flags);
  2194. }
  2195. set_current_state(TASK_INTERRUPTIBLE);
  2196. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2197. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2198. -EAGAIN : -ERESTARTSYS;
  2199. break;
  2200. }
  2201. spin_lock_irqsave(&info->lock,flags);
  2202. get_signals(info);
  2203. spin_unlock_irqrestore(&info->lock,flags);
  2204. if (!(info->flags & ASYNC_CLOSING) &&
  2205. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2206. break;
  2207. }
  2208. if (signal_pending(current)) {
  2209. retval = -ERESTARTSYS;
  2210. break;
  2211. }
  2212. if (debug_level >= DEBUG_LEVEL_INFO)
  2213. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2214. __FILE__,__LINE__, tty->driver->name, info->count );
  2215. schedule();
  2216. }
  2217. set_current_state(TASK_RUNNING);
  2218. remove_wait_queue(&info->open_wait, &wait);
  2219. if (extra_count)
  2220. info->count++;
  2221. info->blocked_open--;
  2222. if (debug_level >= DEBUG_LEVEL_INFO)
  2223. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2224. __FILE__,__LINE__, tty->driver->name, info->count );
  2225. if (!retval)
  2226. info->flags |= ASYNC_NORMAL_ACTIVE;
  2227. return retval;
  2228. }
  2229. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2230. {
  2231. MGSLPC_INFO *info;
  2232. int retval, line;
  2233. unsigned long flags;
  2234. /* verify range of specified line number */
  2235. line = tty->index;
  2236. if ((line < 0) || (line >= mgslpc_device_count)) {
  2237. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2238. __FILE__,__LINE__,line);
  2239. return -ENODEV;
  2240. }
  2241. /* find the info structure for the specified line */
  2242. info = mgslpc_device_list;
  2243. while(info && info->line != line)
  2244. info = info->next_device;
  2245. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2246. return -ENODEV;
  2247. tty->driver_data = info;
  2248. info->tty = tty;
  2249. if (debug_level >= DEBUG_LEVEL_INFO)
  2250. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2251. __FILE__,__LINE__,tty->driver->name, info->count);
  2252. /* If port is closing, signal caller to try again */
  2253. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2254. if (info->flags & ASYNC_CLOSING)
  2255. interruptible_sleep_on(&info->close_wait);
  2256. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2257. -EAGAIN : -ERESTARTSYS);
  2258. goto cleanup;
  2259. }
  2260. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2261. spin_lock_irqsave(&info->netlock, flags);
  2262. if (info->netcount) {
  2263. retval = -EBUSY;
  2264. spin_unlock_irqrestore(&info->netlock, flags);
  2265. goto cleanup;
  2266. }
  2267. info->count++;
  2268. spin_unlock_irqrestore(&info->netlock, flags);
  2269. if (info->count == 1) {
  2270. /* 1st open on this device, init hardware */
  2271. retval = startup(info);
  2272. if (retval < 0)
  2273. goto cleanup;
  2274. }
  2275. retval = block_til_ready(tty, filp, info);
  2276. if (retval) {
  2277. if (debug_level >= DEBUG_LEVEL_INFO)
  2278. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2279. __FILE__,__LINE__, info->device_name, retval);
  2280. goto cleanup;
  2281. }
  2282. if (debug_level >= DEBUG_LEVEL_INFO)
  2283. printk("%s(%d):mgslpc_open(%s) success\n",
  2284. __FILE__,__LINE__, info->device_name);
  2285. retval = 0;
  2286. cleanup:
  2287. if (retval) {
  2288. if (tty->count == 1)
  2289. info->tty = NULL; /* tty layer will release tty struct */
  2290. if(info->count)
  2291. info->count--;
  2292. }
  2293. return retval;
  2294. }
  2295. /*
  2296. * /proc fs routines....
  2297. */
  2298. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2299. {
  2300. char stat_buf[30];
  2301. int ret;
  2302. unsigned long flags;
  2303. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2304. info->device_name, info->io_base, info->irq_level);
  2305. /* output current serial signal states */
  2306. spin_lock_irqsave(&info->lock,flags);
  2307. get_signals(info);
  2308. spin_unlock_irqrestore(&info->lock,flags);
  2309. stat_buf[0] = 0;
  2310. stat_buf[1] = 0;
  2311. if (info->serial_signals & SerialSignal_RTS)
  2312. strcat(stat_buf, "|RTS");
  2313. if (info->serial_signals & SerialSignal_CTS)
  2314. strcat(stat_buf, "|CTS");
  2315. if (info->serial_signals & SerialSignal_DTR)
  2316. strcat(stat_buf, "|DTR");
  2317. if (info->serial_signals & SerialSignal_DSR)
  2318. strcat(stat_buf, "|DSR");
  2319. if (info->serial_signals & SerialSignal_DCD)
  2320. strcat(stat_buf, "|CD");
  2321. if (info->serial_signals & SerialSignal_RI)
  2322. strcat(stat_buf, "|RI");
  2323. if (info->params.mode == MGSL_MODE_HDLC) {
  2324. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2325. info->icount.txok, info->icount.rxok);
  2326. if (info->icount.txunder)
  2327. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2328. if (info->icount.txabort)
  2329. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2330. if (info->icount.rxshort)
  2331. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2332. if (info->icount.rxlong)
  2333. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2334. if (info->icount.rxover)
  2335. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2336. if (info->icount.rxcrc)
  2337. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2338. } else {
  2339. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2340. info->icount.tx, info->icount.rx);
  2341. if (info->icount.frame)
  2342. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2343. if (info->icount.parity)
  2344. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2345. if (info->icount.brk)
  2346. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2347. if (info->icount.overrun)
  2348. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2349. }
  2350. /* Append serial signal status to end */
  2351. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2352. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2353. info->tx_active,info->bh_requested,info->bh_running,
  2354. info->pending_bh);
  2355. return ret;
  2356. }
  2357. /* Called to print information about devices
  2358. */
  2359. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2360. int *eof, void *data)
  2361. {
  2362. int len = 0, l;
  2363. off_t begin = 0;
  2364. MGSLPC_INFO *info;
  2365. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2366. info = mgslpc_device_list;
  2367. while( info ) {
  2368. l = line_info(page + len, info);
  2369. len += l;
  2370. if (len+begin > off+count)
  2371. goto done;
  2372. if (len+begin < off) {
  2373. begin += len;
  2374. len = 0;
  2375. }
  2376. info = info->next_device;
  2377. }
  2378. *eof = 1;
  2379. done:
  2380. if (off >= len+begin)
  2381. return 0;
  2382. *start = page + (off-begin);
  2383. return ((count < begin+len-off) ? count : begin+len-off);
  2384. }
  2385. static int rx_alloc_buffers(MGSLPC_INFO *info)
  2386. {
  2387. /* each buffer has header and data */
  2388. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2389. /* calculate total allocation size for 8 buffers */
  2390. info->rx_buf_total_size = info->rx_buf_size * 8;
  2391. /* limit total allocated memory */
  2392. if (info->rx_buf_total_size > 0x10000)
  2393. info->rx_buf_total_size = 0x10000;
  2394. /* calculate number of buffers */
  2395. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2396. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2397. if (info->rx_buf == NULL)
  2398. return -ENOMEM;
  2399. rx_reset_buffers(info);
  2400. return 0;
  2401. }
  2402. static void rx_free_buffers(MGSLPC_INFO *info)
  2403. {
  2404. kfree(info->rx_buf);
  2405. info->rx_buf = NULL;
  2406. }
  2407. static int claim_resources(MGSLPC_INFO *info)
  2408. {
  2409. if (rx_alloc_buffers(info) < 0 ) {
  2410. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2411. release_resources(info);
  2412. return -ENODEV;
  2413. }
  2414. return 0;
  2415. }
  2416. static void release_resources(MGSLPC_INFO *info)
  2417. {
  2418. if (debug_level >= DEBUG_LEVEL_INFO)
  2419. printk("release_resources(%s)\n", info->device_name);
  2420. rx_free_buffers(info);
  2421. }
  2422. /* Add the specified device instance data structure to the
  2423. * global linked list of devices and increment the device count.
  2424. *
  2425. * Arguments: info pointer to device instance data
  2426. */
  2427. static void mgslpc_add_device(MGSLPC_INFO *info)
  2428. {
  2429. info->next_device = NULL;
  2430. info->line = mgslpc_device_count;
  2431. sprintf(info->device_name,"ttySLP%d",info->line);
  2432. if (info->line < MAX_DEVICE_COUNT) {
  2433. if (maxframe[info->line])
  2434. info->max_frame_size = maxframe[info->line];
  2435. info->dosyncppp = dosyncppp[info->line];
  2436. }
  2437. mgslpc_device_count++;
  2438. if (!mgslpc_device_list)
  2439. mgslpc_device_list = info;
  2440. else {
  2441. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2442. while( current_dev->next_device )
  2443. current_dev = current_dev->next_device;
  2444. current_dev->next_device = info;
  2445. }
  2446. if (info->max_frame_size < 4096)
  2447. info->max_frame_size = 4096;
  2448. else if (info->max_frame_size > 65535)
  2449. info->max_frame_size = 65535;
  2450. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2451. info->device_name, info->io_base, info->irq_level);
  2452. #if SYNCLINK_GENERIC_HDLC
  2453. hdlcdev_init(info);
  2454. #endif
  2455. }
  2456. static void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2457. {
  2458. MGSLPC_INFO *info = mgslpc_device_list;
  2459. MGSLPC_INFO *last = NULL;
  2460. while(info) {
  2461. if (info == remove_info) {
  2462. if (last)
  2463. last->next_device = info->next_device;
  2464. else
  2465. mgslpc_device_list = info->next_device;
  2466. #if SYNCLINK_GENERIC_HDLC
  2467. hdlcdev_exit(info);
  2468. #endif
  2469. release_resources(info);
  2470. kfree(info);
  2471. mgslpc_device_count--;
  2472. return;
  2473. }
  2474. last = info;
  2475. info = info->next_device;
  2476. }
  2477. }
  2478. static struct pcmcia_device_id mgslpc_ids[] = {
  2479. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2480. PCMCIA_DEVICE_NULL
  2481. };
  2482. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2483. static struct pcmcia_driver mgslpc_driver = {
  2484. .owner = THIS_MODULE,
  2485. .drv = {
  2486. .name = "synclink_cs",
  2487. },
  2488. .probe = mgslpc_probe,
  2489. .remove = mgslpc_detach,
  2490. .id_table = mgslpc_ids,
  2491. .suspend = mgslpc_suspend,
  2492. .resume = mgslpc_resume,
  2493. };
  2494. static const struct tty_operations mgslpc_ops = {
  2495. .open = mgslpc_open,
  2496. .close = mgslpc_close,
  2497. .write = mgslpc_write,
  2498. .put_char = mgslpc_put_char,
  2499. .flush_chars = mgslpc_flush_chars,
  2500. .write_room = mgslpc_write_room,
  2501. .chars_in_buffer = mgslpc_chars_in_buffer,
  2502. .flush_buffer = mgslpc_flush_buffer,
  2503. .ioctl = mgslpc_ioctl,
  2504. .throttle = mgslpc_throttle,
  2505. .unthrottle = mgslpc_unthrottle,
  2506. .send_xchar = mgslpc_send_xchar,
  2507. .break_ctl = mgslpc_break,
  2508. .wait_until_sent = mgslpc_wait_until_sent,
  2509. .read_proc = mgslpc_read_proc,
  2510. .set_termios = mgslpc_set_termios,
  2511. .stop = tx_pause,
  2512. .start = tx_release,
  2513. .hangup = mgslpc_hangup,
  2514. .tiocmget = tiocmget,
  2515. .tiocmset = tiocmset,
  2516. };
  2517. static void synclink_cs_cleanup(void)
  2518. {
  2519. int rc;
  2520. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2521. while(mgslpc_device_list)
  2522. mgslpc_remove_device(mgslpc_device_list);
  2523. if (serial_driver) {
  2524. if ((rc = tty_unregister_driver(serial_driver)))
  2525. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2526. __FILE__,__LINE__,rc);
  2527. put_tty_driver(serial_driver);
  2528. }
  2529. pcmcia_unregister_driver(&mgslpc_driver);
  2530. }
  2531. static int __init synclink_cs_init(void)
  2532. {
  2533. int rc;
  2534. if (break_on_load) {
  2535. mgslpc_get_text_ptr();
  2536. BREAKPOINT();
  2537. }
  2538. printk("%s %s\n", driver_name, driver_version);
  2539. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2540. return rc;
  2541. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2542. if (!serial_driver) {
  2543. rc = -ENOMEM;
  2544. goto error;
  2545. }
  2546. /* Initialize the tty_driver structure */
  2547. serial_driver->owner = THIS_MODULE;
  2548. serial_driver->driver_name = "synclink_cs";
  2549. serial_driver->name = "ttySLP";
  2550. serial_driver->major = ttymajor;
  2551. serial_driver->minor_start = 64;
  2552. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2553. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2554. serial_driver->init_termios = tty_std_termios;
  2555. serial_driver->init_termios.c_cflag =
  2556. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2557. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2558. tty_set_operations(serial_driver, &mgslpc_ops);
  2559. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2560. printk("%s(%d):Couldn't register serial driver\n",
  2561. __FILE__,__LINE__);
  2562. put_tty_driver(serial_driver);
  2563. serial_driver = NULL;
  2564. goto error;
  2565. }
  2566. printk("%s %s, tty major#%d\n",
  2567. driver_name, driver_version,
  2568. serial_driver->major);
  2569. return 0;
  2570. error:
  2571. synclink_cs_cleanup();
  2572. return rc;
  2573. }
  2574. static void __exit synclink_cs_exit(void)
  2575. {
  2576. synclink_cs_cleanup();
  2577. }
  2578. module_init(synclink_cs_init);
  2579. module_exit(synclink_cs_exit);
  2580. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2581. {
  2582. unsigned int M, N;
  2583. unsigned char val;
  2584. /* note:standard BRG mode is broken in V3.2 chip
  2585. * so enhanced mode is always used
  2586. */
  2587. if (rate) {
  2588. N = 3686400 / rate;
  2589. if (!N)
  2590. N = 1;
  2591. N >>= 1;
  2592. for (M = 1; N > 64 && M < 16; M++)
  2593. N >>= 1;
  2594. N--;
  2595. /* BGR[5..0] = N
  2596. * BGR[9..6] = M
  2597. * BGR[7..0] contained in BGR register
  2598. * BGR[9..8] contained in CCR2[7..6]
  2599. * divisor = (N+1)*2^M
  2600. *
  2601. * Note: M *must* not be zero (causes asymetric duty cycle)
  2602. */
  2603. write_reg(info, (unsigned char) (channel + BGR),
  2604. (unsigned char) ((M << 6) + N));
  2605. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2606. val |= ((M << 4) & 0xc0);
  2607. write_reg(info, (unsigned char) (channel + CCR2), val);
  2608. }
  2609. }
  2610. /* Enabled the AUX clock output at the specified frequency.
  2611. */
  2612. static void enable_auxclk(MGSLPC_INFO *info)
  2613. {
  2614. unsigned char val;
  2615. /* MODE
  2616. *
  2617. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2618. * 05 ADM Address Mode, 0 = no addr recognition
  2619. * 04 TMD Timer Mode, 0 = external
  2620. * 03 RAC Receiver Active, 0 = inactive
  2621. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2622. * 01 TRS Timer Resolution, 1=512
  2623. * 00 TLP Test Loop, 0 = no loop
  2624. *
  2625. * 1000 0010
  2626. */
  2627. val = 0x82;
  2628. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2629. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2630. val |= BIT2;
  2631. write_reg(info, CHB + MODE, val);
  2632. /* CCR0
  2633. *
  2634. * 07 PU Power Up, 1=active, 0=power down
  2635. * 06 MCE Master Clock Enable, 1=enabled
  2636. * 05 Reserved, 0
  2637. * 04..02 SC[2..0] Encoding
  2638. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2639. *
  2640. * 11000000
  2641. */
  2642. write_reg(info, CHB + CCR0, 0xc0);
  2643. /* CCR1
  2644. *
  2645. * 07 SFLG Shared Flag, 0 = disable shared flags
  2646. * 06 GALP Go Active On Loop, 0 = not used
  2647. * 05 GLP Go On Loop, 0 = not used
  2648. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2649. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2650. * 02..00 CM[2..0] Clock Mode
  2651. *
  2652. * 0001 0111
  2653. */
  2654. write_reg(info, CHB + CCR1, 0x17);
  2655. /* CCR2 (Channel B)
  2656. *
  2657. * 07..06 BGR[9..8] Baud rate bits 9..8
  2658. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2659. * 04 SSEL Clock source select, 1=submode b
  2660. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2661. * 02 RWX Read/Write Exchange 0=disabled
  2662. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2663. * 00 DIV, data inversion 0=disabled, 1=enabled
  2664. *
  2665. * 0011 1000
  2666. */
  2667. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2668. write_reg(info, CHB + CCR2, 0x38);
  2669. else
  2670. write_reg(info, CHB + CCR2, 0x30);
  2671. /* CCR4
  2672. *
  2673. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2674. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2675. * 05 TST1 Test Pin, 0=normal operation
  2676. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2677. * 03..02 Reserved, must be 0
  2678. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2679. *
  2680. * 0101 0000
  2681. */
  2682. write_reg(info, CHB + CCR4, 0x50);
  2683. /* if auxclk not enabled, set internal BRG so
  2684. * CTS transitions can be detected (requires TxC)
  2685. */
  2686. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2687. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2688. else
  2689. mgslpc_set_rate(info, CHB, 921600);
  2690. }
  2691. static void loopback_enable(MGSLPC_INFO *info)
  2692. {
  2693. unsigned char val;
  2694. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2695. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2696. write_reg(info, CHA + CCR1, val);
  2697. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2698. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2699. write_reg(info, CHA + CCR2, val);
  2700. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2701. if (info->params.clock_speed)
  2702. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2703. else
  2704. mgslpc_set_rate(info, CHA, 1843200);
  2705. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2706. val = read_reg(info, CHA + MODE) | BIT0;
  2707. write_reg(info, CHA + MODE, val);
  2708. }
  2709. static void hdlc_mode(MGSLPC_INFO *info)
  2710. {
  2711. unsigned char val;
  2712. unsigned char clkmode, clksubmode;
  2713. /* disable all interrupts */
  2714. irq_disable(info, CHA, 0xffff);
  2715. irq_disable(info, CHB, 0xffff);
  2716. port_irq_disable(info, 0xff);
  2717. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2718. clkmode = clksubmode = 0;
  2719. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2720. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2721. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2722. clkmode = 7;
  2723. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2724. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2725. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2726. clkmode = 7;
  2727. clksubmode = 1;
  2728. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2729. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2730. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2731. clkmode = 6;
  2732. clksubmode = 1;
  2733. } else {
  2734. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2735. clkmode = 6;
  2736. }
  2737. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2738. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2739. clksubmode = 1;
  2740. }
  2741. /* MODE
  2742. *
  2743. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2744. * 05 ADM Address Mode, 0 = no addr recognition
  2745. * 04 TMD Timer Mode, 0 = external
  2746. * 03 RAC Receiver Active, 0 = inactive
  2747. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2748. * 01 TRS Timer Resolution, 1=512
  2749. * 00 TLP Test Loop, 0 = no loop
  2750. *
  2751. * 1000 0010
  2752. */
  2753. val = 0x82;
  2754. if (info->params.loopback)
  2755. val |= BIT0;
  2756. /* preserve RTS state */
  2757. if (info->serial_signals & SerialSignal_RTS)
  2758. val |= BIT2;
  2759. write_reg(info, CHA + MODE, val);
  2760. /* CCR0
  2761. *
  2762. * 07 PU Power Up, 1=active, 0=power down
  2763. * 06 MCE Master Clock Enable, 1=enabled
  2764. * 05 Reserved, 0
  2765. * 04..02 SC[2..0] Encoding
  2766. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2767. *
  2768. * 11000000
  2769. */
  2770. val = 0xc0;
  2771. switch (info->params.encoding)
  2772. {
  2773. case HDLC_ENCODING_NRZI:
  2774. val |= BIT3;
  2775. break;
  2776. case HDLC_ENCODING_BIPHASE_SPACE:
  2777. val |= BIT4;
  2778. break; // FM0
  2779. case HDLC_ENCODING_BIPHASE_MARK:
  2780. val |= BIT4 + BIT2;
  2781. break; // FM1
  2782. case HDLC_ENCODING_BIPHASE_LEVEL:
  2783. val |= BIT4 + BIT3;
  2784. break; // Manchester
  2785. }
  2786. write_reg(info, CHA + CCR0, val);
  2787. /* CCR1
  2788. *
  2789. * 07 SFLG Shared Flag, 0 = disable shared flags
  2790. * 06 GALP Go Active On Loop, 0 = not used
  2791. * 05 GLP Go On Loop, 0 = not used
  2792. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2793. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2794. * 02..00 CM[2..0] Clock Mode
  2795. *
  2796. * 0001 0000
  2797. */
  2798. val = 0x10 + clkmode;
  2799. write_reg(info, CHA + CCR1, val);
  2800. /* CCR2
  2801. *
  2802. * 07..06 BGR[9..8] Baud rate bits 9..8
  2803. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2804. * 04 SSEL Clock source select, 1=submode b
  2805. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2806. * 02 RWX Read/Write Exchange 0=disabled
  2807. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2808. * 00 DIV, data inversion 0=disabled, 1=enabled
  2809. *
  2810. * 0000 0000
  2811. */
  2812. val = 0x00;
  2813. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2814. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2815. val |= BIT5;
  2816. if (clksubmode)
  2817. val |= BIT4;
  2818. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2819. val |= BIT1;
  2820. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2821. val |= BIT0;
  2822. write_reg(info, CHA + CCR2, val);
  2823. /* CCR3
  2824. *
  2825. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2826. * 05 EPT Enable preamble transmission, 1=enabled
  2827. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2828. * 03 CRL CRC Reset Level, 0=FFFF
  2829. * 02 RCRC Rx CRC 0=On 1=Off
  2830. * 01 TCRC Tx CRC 0=On 1=Off
  2831. * 00 PSD DPLL Phase Shift Disable
  2832. *
  2833. * 0000 0000
  2834. */
  2835. val = 0x00;
  2836. if (info->params.crc_type == HDLC_CRC_NONE)
  2837. val |= BIT2 + BIT1;
  2838. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2839. val |= BIT5;
  2840. switch (info->params.preamble_length)
  2841. {
  2842. case HDLC_PREAMBLE_LENGTH_16BITS:
  2843. val |= BIT6;
  2844. break;
  2845. case HDLC_PREAMBLE_LENGTH_32BITS:
  2846. val |= BIT6;
  2847. break;
  2848. case HDLC_PREAMBLE_LENGTH_64BITS:
  2849. val |= BIT7 + BIT6;
  2850. break;
  2851. }
  2852. write_reg(info, CHA + CCR3, val);
  2853. /* PRE - Preamble pattern */
  2854. val = 0;
  2855. switch (info->params.preamble)
  2856. {
  2857. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2858. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2859. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2860. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2861. }
  2862. write_reg(info, CHA + PRE, val);
  2863. /* CCR4
  2864. *
  2865. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2866. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2867. * 05 TST1 Test Pin, 0=normal operation
  2868. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2869. * 03..02 Reserved, must be 0
  2870. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2871. *
  2872. * 0101 0000
  2873. */
  2874. val = 0x50;
  2875. write_reg(info, CHA + CCR4, val);
  2876. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2877. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2878. else
  2879. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2880. /* RLCR Receive length check register
  2881. *
  2882. * 7 1=enable receive length check
  2883. * 6..0 Max frame length = (RL + 1) * 32
  2884. */
  2885. write_reg(info, CHA + RLCR, 0);
  2886. /* XBCH Transmit Byte Count High
  2887. *
  2888. * 07 DMA mode, 0 = interrupt driven
  2889. * 06 NRM, 0=ABM (ignored)
  2890. * 05 CAS Carrier Auto Start
  2891. * 04 XC Transmit Continuously (ignored)
  2892. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2893. *
  2894. * 0000 0000
  2895. */
  2896. val = 0x00;
  2897. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2898. val |= BIT5;
  2899. write_reg(info, CHA + XBCH, val);
  2900. enable_auxclk(info);
  2901. if (info->params.loopback || info->testing_irq)
  2902. loopback_enable(info);
  2903. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2904. {
  2905. irq_enable(info, CHB, IRQ_CTS);
  2906. /* PVR[3] 1=AUTO CTS active */
  2907. set_reg_bits(info, CHA + PVR, BIT3);
  2908. } else
  2909. clear_reg_bits(info, CHA + PVR, BIT3);
  2910. irq_enable(info, CHA,
  2911. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2912. IRQ_UNDERRUN + IRQ_TXFIFO);
  2913. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2914. wait_command_complete(info, CHA);
  2915. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2916. /* Master clock mode enabled above to allow reset commands
  2917. * to complete even if no data clocks are present.
  2918. *
  2919. * Disable master clock mode for normal communications because
  2920. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2921. * IRQ when in master clock mode.
  2922. *
  2923. * Leave master clock mode enabled for IRQ test because the
  2924. * timer IRQ used by the test can only happen in master clock mode.
  2925. */
  2926. if (!info->testing_irq)
  2927. clear_reg_bits(info, CHA + CCR0, BIT6);
  2928. tx_set_idle(info);
  2929. tx_stop(info);
  2930. rx_stop(info);
  2931. }
  2932. static void rx_stop(MGSLPC_INFO *info)
  2933. {
  2934. if (debug_level >= DEBUG_LEVEL_ISR)
  2935. printk("%s(%d):rx_stop(%s)\n",
  2936. __FILE__,__LINE__, info->device_name );
  2937. /* MODE:03 RAC Receiver Active, 0=inactive */
  2938. clear_reg_bits(info, CHA + MODE, BIT3);
  2939. info->rx_enabled = 0;
  2940. info->rx_overflow = 0;
  2941. }
  2942. static void rx_start(MGSLPC_INFO *info)
  2943. {
  2944. if (debug_level >= DEBUG_LEVEL_ISR)
  2945. printk("%s(%d):rx_start(%s)\n",
  2946. __FILE__,__LINE__, info->device_name );
  2947. rx_reset_buffers(info);
  2948. info->rx_enabled = 0;
  2949. info->rx_overflow = 0;
  2950. /* MODE:03 RAC Receiver Active, 1=active */
  2951. set_reg_bits(info, CHA + MODE, BIT3);
  2952. info->rx_enabled = 1;
  2953. }
  2954. static void tx_start(MGSLPC_INFO *info)
  2955. {
  2956. if (debug_level >= DEBUG_LEVEL_ISR)
  2957. printk("%s(%d):tx_start(%s)\n",
  2958. __FILE__,__LINE__, info->device_name );
  2959. if (info->tx_count) {
  2960. /* If auto RTS enabled and RTS is inactive, then assert */
  2961. /* RTS and set a flag indicating that the driver should */
  2962. /* negate RTS when the transmission completes. */
  2963. info->drop_rts_on_tx_done = 0;
  2964. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2965. get_signals(info);
  2966. if (!(info->serial_signals & SerialSignal_RTS)) {
  2967. info->serial_signals |= SerialSignal_RTS;
  2968. set_signals(info);
  2969. info->drop_rts_on_tx_done = 1;
  2970. }
  2971. }
  2972. if (info->params.mode == MGSL_MODE_ASYNC) {
  2973. if (!info->tx_active) {
  2974. info->tx_active = 1;
  2975. tx_ready(info);
  2976. }
  2977. } else {
  2978. info->tx_active = 1;
  2979. tx_ready(info);
  2980. mod_timer(&info->tx_timer, jiffies +
  2981. msecs_to_jiffies(5000));
  2982. }
  2983. }
  2984. if (!info->tx_enabled)
  2985. info->tx_enabled = 1;
  2986. }
  2987. static void tx_stop(MGSLPC_INFO *info)
  2988. {
  2989. if (debug_level >= DEBUG_LEVEL_ISR)
  2990. printk("%s(%d):tx_stop(%s)\n",
  2991. __FILE__,__LINE__, info->device_name );
  2992. del_timer(&info->tx_timer);
  2993. info->tx_enabled = 0;
  2994. info->tx_active = 0;
  2995. }
  2996. /* Reset the adapter to a known state and prepare it for further use.
  2997. */
  2998. static void reset_device(MGSLPC_INFO *info)
  2999. {
  3000. /* power up both channels (set BIT7) */
  3001. write_reg(info, CHA + CCR0, 0x80);
  3002. write_reg(info, CHB + CCR0, 0x80);
  3003. write_reg(info, CHA + MODE, 0);
  3004. write_reg(info, CHB + MODE, 0);
  3005. /* disable all interrupts */
  3006. irq_disable(info, CHA, 0xffff);
  3007. irq_disable(info, CHB, 0xffff);
  3008. port_irq_disable(info, 0xff);
  3009. /* PCR Port Configuration Register
  3010. *
  3011. * 07..04 DEC[3..0] Serial I/F select outputs
  3012. * 03 output, 1=AUTO CTS control enabled
  3013. * 02 RI Ring Indicator input 0=active
  3014. * 01 DSR input 0=active
  3015. * 00 DTR output 0=active
  3016. *
  3017. * 0000 0110
  3018. */
  3019. write_reg(info, PCR, 0x06);
  3020. /* PVR Port Value Register
  3021. *
  3022. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3023. * 03 AUTO CTS output 1=enabled
  3024. * 02 RI Ring Indicator input
  3025. * 01 DSR input
  3026. * 00 DTR output (1=inactive)
  3027. *
  3028. * 0000 0001
  3029. */
  3030. // write_reg(info, PVR, PVR_DTR);
  3031. /* IPC Interrupt Port Configuration
  3032. *
  3033. * 07 VIS 1=Masked interrupts visible
  3034. * 06..05 Reserved, 0
  3035. * 04..03 SLA Slave address, 00 ignored
  3036. * 02 CASM Cascading Mode, 1=daisy chain
  3037. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3038. *
  3039. * 0000 0101
  3040. */
  3041. write_reg(info, IPC, 0x05);
  3042. }
  3043. static void async_mode(MGSLPC_INFO *info)
  3044. {
  3045. unsigned char val;
  3046. /* disable all interrupts */
  3047. irq_disable(info, CHA, 0xffff);
  3048. irq_disable(info, CHB, 0xffff);
  3049. port_irq_disable(info, 0xff);
  3050. /* MODE
  3051. *
  3052. * 07 Reserved, 0
  3053. * 06 FRTS RTS State, 0=active
  3054. * 05 FCTS Flow Control on CTS
  3055. * 04 FLON Flow Control Enable
  3056. * 03 RAC Receiver Active, 0 = inactive
  3057. * 02 RTS 0=Auto RTS, 1=manual RTS
  3058. * 01 TRS Timer Resolution, 1=512
  3059. * 00 TLP Test Loop, 0 = no loop
  3060. *
  3061. * 0000 0110
  3062. */
  3063. val = 0x06;
  3064. if (info->params.loopback)
  3065. val |= BIT0;
  3066. /* preserve RTS state */
  3067. if (!(info->serial_signals & SerialSignal_RTS))
  3068. val |= BIT6;
  3069. write_reg(info, CHA + MODE, val);
  3070. /* CCR0
  3071. *
  3072. * 07 PU Power Up, 1=active, 0=power down
  3073. * 06 MCE Master Clock Enable, 1=enabled
  3074. * 05 Reserved, 0
  3075. * 04..02 SC[2..0] Encoding, 000=NRZ
  3076. * 01..00 SM[1..0] Serial Mode, 11=Async
  3077. *
  3078. * 1000 0011
  3079. */
  3080. write_reg(info, CHA + CCR0, 0x83);
  3081. /* CCR1
  3082. *
  3083. * 07..05 Reserved, 0
  3084. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3085. * 03 BCR Bit Clock Rate, 1=16x
  3086. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3087. *
  3088. * 0001 1111
  3089. */
  3090. write_reg(info, CHA + CCR1, 0x1f);
  3091. /* CCR2 (channel A)
  3092. *
  3093. * 07..06 BGR[9..8] Baud rate bits 9..8
  3094. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3095. * 04 SSEL Clock source select, 1=submode b
  3096. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3097. * 02 RWX Read/Write Exchange 0=disabled
  3098. * 01 Reserved, 0
  3099. * 00 DIV, data inversion 0=disabled, 1=enabled
  3100. *
  3101. * 0001 0000
  3102. */
  3103. write_reg(info, CHA + CCR2, 0x10);
  3104. /* CCR3
  3105. *
  3106. * 07..01 Reserved, 0
  3107. * 00 PSD DPLL Phase Shift Disable
  3108. *
  3109. * 0000 0000
  3110. */
  3111. write_reg(info, CHA + CCR3, 0);
  3112. /* CCR4
  3113. *
  3114. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3115. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3116. * 05 TST1 Test Pin, 0=normal operation
  3117. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3118. * 03..00 Reserved, must be 0
  3119. *
  3120. * 0101 0000
  3121. */
  3122. write_reg(info, CHA + CCR4, 0x50);
  3123. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3124. /* DAFO Data Format
  3125. *
  3126. * 07 Reserved, 0
  3127. * 06 XBRK transmit break, 0=normal operation
  3128. * 05 Stop bits (0=1, 1=2)
  3129. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3130. * 02 PAREN Parity Enable
  3131. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3132. *
  3133. */
  3134. val = 0x00;
  3135. if (info->params.data_bits != 8)
  3136. val |= BIT0; /* 7 bits */
  3137. if (info->params.stop_bits != 1)
  3138. val |= BIT5;
  3139. if (info->params.parity != ASYNC_PARITY_NONE)
  3140. {
  3141. val |= BIT2; /* Parity enable */
  3142. if (info->params.parity == ASYNC_PARITY_ODD)
  3143. val |= BIT3;
  3144. else
  3145. val |= BIT4;
  3146. }
  3147. write_reg(info, CHA + DAFO, val);
  3148. /* RFC Rx FIFO Control
  3149. *
  3150. * 07 Reserved, 0
  3151. * 06 DPS, 1=parity bit not stored in data byte
  3152. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3153. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3154. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3155. * 01 Reserved, 0
  3156. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3157. *
  3158. * 0101 1100
  3159. */
  3160. write_reg(info, CHA + RFC, 0x5c);
  3161. /* RLCR Receive length check register
  3162. *
  3163. * Max frame length = (RL + 1) * 32
  3164. */
  3165. write_reg(info, CHA + RLCR, 0);
  3166. /* XBCH Transmit Byte Count High
  3167. *
  3168. * 07 DMA mode, 0 = interrupt driven
  3169. * 06 NRM, 0=ABM (ignored)
  3170. * 05 CAS Carrier Auto Start
  3171. * 04 XC Transmit Continuously (ignored)
  3172. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3173. *
  3174. * 0000 0000
  3175. */
  3176. val = 0x00;
  3177. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3178. val |= BIT5;
  3179. write_reg(info, CHA + XBCH, val);
  3180. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3181. irq_enable(info, CHA, IRQ_CTS);
  3182. /* MODE:03 RAC Receiver Active, 1=active */
  3183. set_reg_bits(info, CHA + MODE, BIT3);
  3184. enable_auxclk(info);
  3185. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3186. irq_enable(info, CHB, IRQ_CTS);
  3187. /* PVR[3] 1=AUTO CTS active */
  3188. set_reg_bits(info, CHA + PVR, BIT3);
  3189. } else
  3190. clear_reg_bits(info, CHA + PVR, BIT3);
  3191. irq_enable(info, CHA,
  3192. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3193. IRQ_ALLSENT + IRQ_TXFIFO);
  3194. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3195. wait_command_complete(info, CHA);
  3196. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3197. }
  3198. /* Set the HDLC idle mode for the transmitter.
  3199. */
  3200. static void tx_set_idle(MGSLPC_INFO *info)
  3201. {
  3202. /* Note: ESCC2 only supports flags and one idle modes */
  3203. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3204. set_reg_bits(info, CHA + CCR1, BIT3);
  3205. else
  3206. clear_reg_bits(info, CHA + CCR1, BIT3);
  3207. }
  3208. /* get state of the V24 status (input) signals.
  3209. */
  3210. static void get_signals(MGSLPC_INFO *info)
  3211. {
  3212. unsigned char status = 0;
  3213. /* preserve DTR and RTS */
  3214. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3215. if (read_reg(info, CHB + VSTR) & BIT7)
  3216. info->serial_signals |= SerialSignal_DCD;
  3217. if (read_reg(info, CHB + STAR) & BIT1)
  3218. info->serial_signals |= SerialSignal_CTS;
  3219. status = read_reg(info, CHA + PVR);
  3220. if (!(status & PVR_RI))
  3221. info->serial_signals |= SerialSignal_RI;
  3222. if (!(status & PVR_DSR))
  3223. info->serial_signals |= SerialSignal_DSR;
  3224. }
  3225. /* Set the state of DTR and RTS based on contents of
  3226. * serial_signals member of device extension.
  3227. */
  3228. static void set_signals(MGSLPC_INFO *info)
  3229. {
  3230. unsigned char val;
  3231. val = read_reg(info, CHA + MODE);
  3232. if (info->params.mode == MGSL_MODE_ASYNC) {
  3233. if (info->serial_signals & SerialSignal_RTS)
  3234. val &= ~BIT6;
  3235. else
  3236. val |= BIT6;
  3237. } else {
  3238. if (info->serial_signals & SerialSignal_RTS)
  3239. val |= BIT2;
  3240. else
  3241. val &= ~BIT2;
  3242. }
  3243. write_reg(info, CHA + MODE, val);
  3244. if (info->serial_signals & SerialSignal_DTR)
  3245. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3246. else
  3247. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3248. }
  3249. static void rx_reset_buffers(MGSLPC_INFO *info)
  3250. {
  3251. RXBUF *buf;
  3252. int i;
  3253. info->rx_put = 0;
  3254. info->rx_get = 0;
  3255. info->rx_frame_count = 0;
  3256. for (i=0 ; i < info->rx_buf_count ; i++) {
  3257. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3258. buf->status = buf->count = 0;
  3259. }
  3260. }
  3261. /* Attempt to return a received HDLC frame
  3262. * Only frames received without errors are returned.
  3263. *
  3264. * Returns 1 if frame returned, otherwise 0
  3265. */
  3266. static int rx_get_frame(MGSLPC_INFO *info)
  3267. {
  3268. unsigned short status;
  3269. RXBUF *buf;
  3270. unsigned int framesize = 0;
  3271. unsigned long flags;
  3272. struct tty_struct *tty = info->tty;
  3273. int return_frame = 0;
  3274. if (info->rx_frame_count == 0)
  3275. return 0;
  3276. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3277. status = buf->status;
  3278. /* 07 VFR 1=valid frame
  3279. * 06 RDO 1=data overrun
  3280. * 05 CRC 1=OK, 0=error
  3281. * 04 RAB 1=frame aborted
  3282. */
  3283. if ((status & 0xf0) != 0xA0) {
  3284. if (!(status & BIT7) || (status & BIT4))
  3285. info->icount.rxabort++;
  3286. else if (status & BIT6)
  3287. info->icount.rxover++;
  3288. else if (!(status & BIT5)) {
  3289. info->icount.rxcrc++;
  3290. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3291. return_frame = 1;
  3292. }
  3293. framesize = 0;
  3294. #if SYNCLINK_GENERIC_HDLC
  3295. {
  3296. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3297. stats->rx_errors++;
  3298. stats->rx_frame_errors++;
  3299. }
  3300. #endif
  3301. } else
  3302. return_frame = 1;
  3303. if (return_frame)
  3304. framesize = buf->count;
  3305. if (debug_level >= DEBUG_LEVEL_BH)
  3306. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3307. __FILE__,__LINE__,info->device_name,status,framesize);
  3308. if (debug_level >= DEBUG_LEVEL_DATA)
  3309. trace_block(info, buf->data, framesize, 0);
  3310. if (framesize) {
  3311. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3312. framesize+1 > info->max_frame_size) ||
  3313. framesize > info->max_frame_size)
  3314. info->icount.rxlong++;
  3315. else {
  3316. if (status & BIT5)
  3317. info->icount.rxok++;
  3318. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3319. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3320. ++framesize;
  3321. }
  3322. #if SYNCLINK_GENERIC_HDLC
  3323. if (info->netcount)
  3324. hdlcdev_rx(info, buf->data, framesize);
  3325. else
  3326. #endif
  3327. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3328. }
  3329. }
  3330. spin_lock_irqsave(&info->lock,flags);
  3331. buf->status = buf->count = 0;
  3332. info->rx_frame_count--;
  3333. info->rx_get++;
  3334. if (info->rx_get >= info->rx_buf_count)
  3335. info->rx_get = 0;
  3336. spin_unlock_irqrestore(&info->lock,flags);
  3337. return 1;
  3338. }
  3339. static BOOLEAN register_test(MGSLPC_INFO *info)
  3340. {
  3341. static unsigned char patterns[] =
  3342. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3343. static unsigned int count = ARRAY_SIZE(patterns);
  3344. unsigned int i;
  3345. BOOLEAN rc = TRUE;
  3346. unsigned long flags;
  3347. spin_lock_irqsave(&info->lock,flags);
  3348. reset_device(info);
  3349. for (i = 0; i < count; i++) {
  3350. write_reg(info, XAD1, patterns[i]);
  3351. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3352. if ((read_reg(info, XAD1) != patterns[i]) ||
  3353. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3354. rc = FALSE;
  3355. break;
  3356. }
  3357. }
  3358. spin_unlock_irqrestore(&info->lock,flags);
  3359. return rc;
  3360. }
  3361. static BOOLEAN irq_test(MGSLPC_INFO *info)
  3362. {
  3363. unsigned long end_time;
  3364. unsigned long flags;
  3365. spin_lock_irqsave(&info->lock,flags);
  3366. reset_device(info);
  3367. info->testing_irq = TRUE;
  3368. hdlc_mode(info);
  3369. info->irq_occurred = FALSE;
  3370. /* init hdlc mode */
  3371. irq_enable(info, CHA, IRQ_TIMER);
  3372. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3373. issue_command(info, CHA, CMD_START_TIMER);
  3374. spin_unlock_irqrestore(&info->lock,flags);
  3375. end_time=100;
  3376. while(end_time-- && !info->irq_occurred) {
  3377. msleep_interruptible(10);
  3378. }
  3379. info->testing_irq = FALSE;
  3380. spin_lock_irqsave(&info->lock,flags);
  3381. reset_device(info);
  3382. spin_unlock_irqrestore(&info->lock,flags);
  3383. return info->irq_occurred ? TRUE : FALSE;
  3384. }
  3385. static int adapter_test(MGSLPC_INFO *info)
  3386. {
  3387. if (!register_test(info)) {
  3388. info->init_error = DiagStatus_AddressFailure;
  3389. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3390. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3391. return -ENODEV;
  3392. }
  3393. if (!irq_test(info)) {
  3394. info->init_error = DiagStatus_IrqFailure;
  3395. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3396. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3397. return -ENODEV;
  3398. }
  3399. if (debug_level >= DEBUG_LEVEL_INFO)
  3400. printk("%s(%d):device %s passed diagnostics\n",
  3401. __FILE__,__LINE__,info->device_name);
  3402. return 0;
  3403. }
  3404. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3405. {
  3406. int i;
  3407. int linecount;
  3408. if (xmit)
  3409. printk("%s tx data:\n",info->device_name);
  3410. else
  3411. printk("%s rx data:\n",info->device_name);
  3412. while(count) {
  3413. if (count > 16)
  3414. linecount = 16;
  3415. else
  3416. linecount = count;
  3417. for(i=0;i<linecount;i++)
  3418. printk("%02X ",(unsigned char)data[i]);
  3419. for(;i<17;i++)
  3420. printk(" ");
  3421. for(i=0;i<linecount;i++) {
  3422. if (data[i]>=040 && data[i]<=0176)
  3423. printk("%c",data[i]);
  3424. else
  3425. printk(".");
  3426. }
  3427. printk("\n");
  3428. data += linecount;
  3429. count -= linecount;
  3430. }
  3431. }
  3432. /* HDLC frame time out
  3433. * update stats and do tx completion processing
  3434. */
  3435. static void tx_timeout(unsigned long context)
  3436. {
  3437. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3438. unsigned long flags;
  3439. if ( debug_level >= DEBUG_LEVEL_INFO )
  3440. printk( "%s(%d):tx_timeout(%s)\n",
  3441. __FILE__,__LINE__,info->device_name);
  3442. if(info->tx_active &&
  3443. info->params.mode == MGSL_MODE_HDLC) {
  3444. info->icount.txtimeout++;
  3445. }
  3446. spin_lock_irqsave(&info->lock,flags);
  3447. info->tx_active = 0;
  3448. info->tx_count = info->tx_put = info->tx_get = 0;
  3449. spin_unlock_irqrestore(&info->lock,flags);
  3450. #if SYNCLINK_GENERIC_HDLC
  3451. if (info->netcount)
  3452. hdlcdev_tx_done(info);
  3453. else
  3454. #endif
  3455. bh_transmit(info);
  3456. }
  3457. #if SYNCLINK_GENERIC_HDLC
  3458. /**
  3459. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3460. * set encoding and frame check sequence (FCS) options
  3461. *
  3462. * dev pointer to network device structure
  3463. * encoding serial encoding setting
  3464. * parity FCS setting
  3465. *
  3466. * returns 0 if success, otherwise error code
  3467. */
  3468. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3469. unsigned short parity)
  3470. {
  3471. MGSLPC_INFO *info = dev_to_port(dev);
  3472. unsigned char new_encoding;
  3473. unsigned short new_crctype;
  3474. /* return error if TTY interface open */
  3475. if (info->count)
  3476. return -EBUSY;
  3477. switch (encoding)
  3478. {
  3479. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3480. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3481. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3482. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3483. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3484. default: return -EINVAL;
  3485. }
  3486. switch (parity)
  3487. {
  3488. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3489. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3490. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3491. default: return -EINVAL;
  3492. }
  3493. info->params.encoding = new_encoding;
  3494. info->params.crc_type = new_crctype;
  3495. /* if network interface up, reprogram hardware */
  3496. if (info->netcount)
  3497. mgslpc_program_hw(info);
  3498. return 0;
  3499. }
  3500. /**
  3501. * called by generic HDLC layer to send frame
  3502. *
  3503. * skb socket buffer containing HDLC frame
  3504. * dev pointer to network device structure
  3505. *
  3506. * returns 0 if success, otherwise error code
  3507. */
  3508. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3509. {
  3510. MGSLPC_INFO *info = dev_to_port(dev);
  3511. struct net_device_stats *stats = hdlc_stats(dev);
  3512. unsigned long flags;
  3513. if (debug_level >= DEBUG_LEVEL_INFO)
  3514. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3515. /* stop sending until this frame completes */
  3516. netif_stop_queue(dev);
  3517. /* copy data to device buffers */
  3518. skb_copy_from_linear_data(skb, info->tx_buf, skb->len);
  3519. info->tx_get = 0;
  3520. info->tx_put = info->tx_count = skb->len;
  3521. /* update network statistics */
  3522. stats->tx_packets++;
  3523. stats->tx_bytes += skb->len;
  3524. /* done with socket buffer, so free it */
  3525. dev_kfree_skb(skb);
  3526. /* save start time for transmit timeout detection */
  3527. dev->trans_start = jiffies;
  3528. /* start hardware transmitter if necessary */
  3529. spin_lock_irqsave(&info->lock,flags);
  3530. if (!info->tx_active)
  3531. tx_start(info);
  3532. spin_unlock_irqrestore(&info->lock,flags);
  3533. return 0;
  3534. }
  3535. /**
  3536. * called by network layer when interface enabled
  3537. * claim resources and initialize hardware
  3538. *
  3539. * dev pointer to network device structure
  3540. *
  3541. * returns 0 if success, otherwise error code
  3542. */
  3543. static int hdlcdev_open(struct net_device *dev)
  3544. {
  3545. MGSLPC_INFO *info = dev_to_port(dev);
  3546. int rc;
  3547. unsigned long flags;
  3548. if (debug_level >= DEBUG_LEVEL_INFO)
  3549. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3550. /* generic HDLC layer open processing */
  3551. if ((rc = hdlc_open(dev)))
  3552. return rc;
  3553. /* arbitrate between network and tty opens */
  3554. spin_lock_irqsave(&info->netlock, flags);
  3555. if (info->count != 0 || info->netcount != 0) {
  3556. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3557. spin_unlock_irqrestore(&info->netlock, flags);
  3558. return -EBUSY;
  3559. }
  3560. info->netcount=1;
  3561. spin_unlock_irqrestore(&info->netlock, flags);
  3562. /* claim resources and init adapter */
  3563. if ((rc = startup(info)) != 0) {
  3564. spin_lock_irqsave(&info->netlock, flags);
  3565. info->netcount=0;
  3566. spin_unlock_irqrestore(&info->netlock, flags);
  3567. return rc;
  3568. }
  3569. /* assert DTR and RTS, apply hardware settings */
  3570. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3571. mgslpc_program_hw(info);
  3572. /* enable network layer transmit */
  3573. dev->trans_start = jiffies;
  3574. netif_start_queue(dev);
  3575. /* inform generic HDLC layer of current DCD status */
  3576. spin_lock_irqsave(&info->lock, flags);
  3577. get_signals(info);
  3578. spin_unlock_irqrestore(&info->lock, flags);
  3579. if (info->serial_signals & SerialSignal_DCD)
  3580. netif_carrier_on(dev);
  3581. else
  3582. netif_carrier_off(dev);
  3583. return 0;
  3584. }
  3585. /**
  3586. * called by network layer when interface is disabled
  3587. * shutdown hardware and release resources
  3588. *
  3589. * dev pointer to network device structure
  3590. *
  3591. * returns 0 if success, otherwise error code
  3592. */
  3593. static int hdlcdev_close(struct net_device *dev)
  3594. {
  3595. MGSLPC_INFO *info = dev_to_port(dev);
  3596. unsigned long flags;
  3597. if (debug_level >= DEBUG_LEVEL_INFO)
  3598. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3599. netif_stop_queue(dev);
  3600. /* shutdown adapter and release resources */
  3601. shutdown(info);
  3602. hdlc_close(dev);
  3603. spin_lock_irqsave(&info->netlock, flags);
  3604. info->netcount=0;
  3605. spin_unlock_irqrestore(&info->netlock, flags);
  3606. return 0;
  3607. }
  3608. /**
  3609. * called by network layer to process IOCTL call to network device
  3610. *
  3611. * dev pointer to network device structure
  3612. * ifr pointer to network interface request structure
  3613. * cmd IOCTL command code
  3614. *
  3615. * returns 0 if success, otherwise error code
  3616. */
  3617. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3618. {
  3619. const size_t size = sizeof(sync_serial_settings);
  3620. sync_serial_settings new_line;
  3621. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3622. MGSLPC_INFO *info = dev_to_port(dev);
  3623. unsigned int flags;
  3624. if (debug_level >= DEBUG_LEVEL_INFO)
  3625. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3626. /* return error if TTY interface open */
  3627. if (info->count)
  3628. return -EBUSY;
  3629. if (cmd != SIOCWANDEV)
  3630. return hdlc_ioctl(dev, ifr, cmd);
  3631. switch(ifr->ifr_settings.type) {
  3632. case IF_GET_IFACE: /* return current sync_serial_settings */
  3633. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3634. if (ifr->ifr_settings.size < size) {
  3635. ifr->ifr_settings.size = size; /* data size wanted */
  3636. return -ENOBUFS;
  3637. }
  3638. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3639. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3640. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3641. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3642. switch (flags){
  3643. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3644. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3645. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3646. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3647. default: new_line.clock_type = CLOCK_DEFAULT;
  3648. }
  3649. new_line.clock_rate = info->params.clock_speed;
  3650. new_line.loopback = info->params.loopback ? 1:0;
  3651. if (copy_to_user(line, &new_line, size))
  3652. return -EFAULT;
  3653. return 0;
  3654. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3655. if(!capable(CAP_NET_ADMIN))
  3656. return -EPERM;
  3657. if (copy_from_user(&new_line, line, size))
  3658. return -EFAULT;
  3659. switch (new_line.clock_type)
  3660. {
  3661. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3662. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3663. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3664. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3665. case CLOCK_DEFAULT: flags = info->params.flags &
  3666. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3667. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3668. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3669. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3670. default: return -EINVAL;
  3671. }
  3672. if (new_line.loopback != 0 && new_line.loopback != 1)
  3673. return -EINVAL;
  3674. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3675. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3676. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3677. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3678. info->params.flags |= flags;
  3679. info->params.loopback = new_line.loopback;
  3680. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3681. info->params.clock_speed = new_line.clock_rate;
  3682. else
  3683. info->params.clock_speed = 0;
  3684. /* if network interface up, reprogram hardware */
  3685. if (info->netcount)
  3686. mgslpc_program_hw(info);
  3687. return 0;
  3688. default:
  3689. return hdlc_ioctl(dev, ifr, cmd);
  3690. }
  3691. }
  3692. /**
  3693. * called by network layer when transmit timeout is detected
  3694. *
  3695. * dev pointer to network device structure
  3696. */
  3697. static void hdlcdev_tx_timeout(struct net_device *dev)
  3698. {
  3699. MGSLPC_INFO *info = dev_to_port(dev);
  3700. struct net_device_stats *stats = hdlc_stats(dev);
  3701. unsigned long flags;
  3702. if (debug_level >= DEBUG_LEVEL_INFO)
  3703. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3704. stats->tx_errors++;
  3705. stats->tx_aborted_errors++;
  3706. spin_lock_irqsave(&info->lock,flags);
  3707. tx_stop(info);
  3708. spin_unlock_irqrestore(&info->lock,flags);
  3709. netif_wake_queue(dev);
  3710. }
  3711. /**
  3712. * called by device driver when transmit completes
  3713. * reenable network layer transmit if stopped
  3714. *
  3715. * info pointer to device instance information
  3716. */
  3717. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3718. {
  3719. if (netif_queue_stopped(info->netdev))
  3720. netif_wake_queue(info->netdev);
  3721. }
  3722. /**
  3723. * called by device driver when frame received
  3724. * pass frame to network layer
  3725. *
  3726. * info pointer to device instance information
  3727. * buf pointer to buffer contianing frame data
  3728. * size count of data bytes in buf
  3729. */
  3730. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3731. {
  3732. struct sk_buff *skb = dev_alloc_skb(size);
  3733. struct net_device *dev = info->netdev;
  3734. struct net_device_stats *stats = hdlc_stats(dev);
  3735. if (debug_level >= DEBUG_LEVEL_INFO)
  3736. printk("hdlcdev_rx(%s)\n",dev->name);
  3737. if (skb == NULL) {
  3738. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3739. stats->rx_dropped++;
  3740. return;
  3741. }
  3742. memcpy(skb_put(skb, size),buf,size);
  3743. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3744. stats->rx_packets++;
  3745. stats->rx_bytes += size;
  3746. netif_rx(skb);
  3747. info->netdev->last_rx = jiffies;
  3748. }
  3749. /**
  3750. * called by device driver when adding device instance
  3751. * do generic HDLC initialization
  3752. *
  3753. * info pointer to device instance information
  3754. *
  3755. * returns 0 if success, otherwise error code
  3756. */
  3757. static int hdlcdev_init(MGSLPC_INFO *info)
  3758. {
  3759. int rc;
  3760. struct net_device *dev;
  3761. hdlc_device *hdlc;
  3762. /* allocate and initialize network and HDLC layer objects */
  3763. if (!(dev = alloc_hdlcdev(info))) {
  3764. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3765. return -ENOMEM;
  3766. }
  3767. /* for network layer reporting purposes only */
  3768. dev->base_addr = info->io_base;
  3769. dev->irq = info->irq_level;
  3770. /* network layer callbacks and settings */
  3771. dev->do_ioctl = hdlcdev_ioctl;
  3772. dev->open = hdlcdev_open;
  3773. dev->stop = hdlcdev_close;
  3774. dev->tx_timeout = hdlcdev_tx_timeout;
  3775. dev->watchdog_timeo = 10*HZ;
  3776. dev->tx_queue_len = 50;
  3777. /* generic HDLC layer callbacks and settings */
  3778. hdlc = dev_to_hdlc(dev);
  3779. hdlc->attach = hdlcdev_attach;
  3780. hdlc->xmit = hdlcdev_xmit;
  3781. /* register objects with HDLC layer */
  3782. if ((rc = register_hdlc_device(dev))) {
  3783. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3784. free_netdev(dev);
  3785. return rc;
  3786. }
  3787. info->netdev = dev;
  3788. return 0;
  3789. }
  3790. /**
  3791. * called by device driver when removing device instance
  3792. * do generic HDLC cleanup
  3793. *
  3794. * info pointer to device instance information
  3795. */
  3796. static void hdlcdev_exit(MGSLPC_INFO *info)
  3797. {
  3798. unregister_hdlc_device(info->netdev);
  3799. free_netdev(info->netdev);
  3800. info->netdev = NULL;
  3801. }
  3802. #endif /* CONFIG_HDLC */