setup.c 10 KB

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  1. /*
  2. * arch/xtensa/kernel/setup.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (C) 1995 Linus Torvalds
  9. * Copyright (C) 2001 - 2005 Tensilica Inc.
  10. *
  11. * Chris Zankel <chris@zankel.net>
  12. * Joe Taylor <joe@tensilica.com, joetylr@yahoo.com>
  13. * Kevin Chea
  14. * Marc Gauthier<marc@tensilica.com> <marc@alumni.uwaterloo.ca>
  15. */
  16. #include <linux/errno.h>
  17. #include <linux/init.h>
  18. #include <linux/proc_fs.h>
  19. #include <linux/screen_info.h>
  20. #include <linux/bootmem.h>
  21. #include <linux/kernel.h>
  22. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  23. # include <linux/console.h>
  24. #endif
  25. #ifdef CONFIG_RTC
  26. # include <linux/timex.h>
  27. #endif
  28. #ifdef CONFIG_PROC_FS
  29. # include <linux/seq_file.h>
  30. #endif
  31. #include <asm/system.h>
  32. #include <asm/bootparam.h>
  33. #include <asm/pgtable.h>
  34. #include <asm/processor.h>
  35. #include <asm/timex.h>
  36. #include <asm/platform.h>
  37. #include <asm/page.h>
  38. #include <asm/setup.h>
  39. #include <asm/param.h>
  40. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  41. struct screen_info screen_info = { 0, 24, 0, 0, 0, 80, 0, 0, 0, 24, 1, 16};
  42. #endif
  43. #ifdef CONFIG_BLK_DEV_FD
  44. extern struct fd_ops no_fd_ops;
  45. struct fd_ops *fd_ops;
  46. #endif
  47. #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
  48. extern struct ide_ops no_ide_ops;
  49. struct ide_ops *ide_ops;
  50. #endif
  51. extern struct rtc_ops no_rtc_ops;
  52. struct rtc_ops *rtc_ops;
  53. #ifdef CONFIG_BLK_DEV_INITRD
  54. extern void *initrd_start;
  55. extern void *initrd_end;
  56. extern void *__initrd_start;
  57. extern void *__initrd_end;
  58. int initrd_is_mapped = 0;
  59. extern int initrd_below_start_ok;
  60. #endif
  61. unsigned char aux_device_present;
  62. extern unsigned long loops_per_jiffy;
  63. /* Command line specified as configuration option. */
  64. static char __initdata command_line[COMMAND_LINE_SIZE];
  65. #ifdef CONFIG_CMDLINE_BOOL
  66. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  67. #endif
  68. sysmem_info_t __initdata sysmem;
  69. #ifdef CONFIG_BLK_DEV_INITRD
  70. int initrd_is_mapped;
  71. #endif
  72. extern void init_mmu(void);
  73. /*
  74. * Boot parameter parsing.
  75. *
  76. * The Xtensa port uses a list of variable-sized tags to pass data to
  77. * the kernel. The first tag must be a BP_TAG_FIRST tag for the list
  78. * to be recognised. The list is terminated with a zero-sized
  79. * BP_TAG_LAST tag.
  80. */
  81. typedef struct tagtable {
  82. u32 tag;
  83. int (*parse)(const bp_tag_t*);
  84. } tagtable_t;
  85. #define __tagtable(tag, fn) static tagtable_t __tagtable_##fn \
  86. __attribute__((unused, __section__(".taglist"))) = { tag, fn }
  87. /* parse current tag */
  88. static int __init parse_tag_mem(const bp_tag_t *tag)
  89. {
  90. meminfo_t *mi = (meminfo_t*)(tag->data);
  91. if (mi->type != MEMORY_TYPE_CONVENTIONAL)
  92. return -1;
  93. if (sysmem.nr_banks >= SYSMEM_BANKS_MAX) {
  94. printk(KERN_WARNING
  95. "Ignoring memory bank 0x%08lx size %ldKB\n",
  96. (unsigned long)mi->start,
  97. (unsigned long)mi->end - (unsigned long)mi->start);
  98. return -EINVAL;
  99. }
  100. sysmem.bank[sysmem.nr_banks].type = mi->type;
  101. sysmem.bank[sysmem.nr_banks].start = PAGE_ALIGN(mi->start);
  102. sysmem.bank[sysmem.nr_banks].end = mi->end & PAGE_SIZE;
  103. sysmem.nr_banks++;
  104. return 0;
  105. }
  106. __tagtable(BP_TAG_MEMORY, parse_tag_mem);
  107. #ifdef CONFIG_BLK_DEV_INITRD
  108. static int __init parse_tag_initrd(const bp_tag_t* tag)
  109. {
  110. meminfo_t* mi;
  111. mi = (meminfo_t*)(tag->data);
  112. initrd_start = (void*)(mi->start);
  113. initrd_end = (void*)(mi->end);
  114. return 0;
  115. }
  116. __tagtable(BP_TAG_INITRD, parse_tag_initrd);
  117. #endif /* CONFIG_BLK_DEV_INITRD */
  118. static int __init parse_tag_cmdline(const bp_tag_t* tag)
  119. {
  120. strncpy(command_line, (char*)(tag->data), COMMAND_LINE_SIZE);
  121. command_line[COMMAND_LINE_SIZE - 1] = '\0';
  122. return 0;
  123. }
  124. __tagtable(BP_TAG_COMMAND_LINE, parse_tag_cmdline);
  125. static int __init parse_bootparam(const bp_tag_t* tag)
  126. {
  127. extern tagtable_t __tagtable_begin, __tagtable_end;
  128. tagtable_t *t;
  129. /* Boot parameters must start with a BP_TAG_FIRST tag. */
  130. if (tag->id != BP_TAG_FIRST) {
  131. printk(KERN_WARNING "Invalid boot parameters!\n");
  132. return 0;
  133. }
  134. tag = (bp_tag_t*)((unsigned long)tag + sizeof(bp_tag_t) + tag->size);
  135. /* Parse all tags. */
  136. while (tag != NULL && tag->id != BP_TAG_LAST) {
  137. for (t = &__tagtable_begin; t < &__tagtable_end; t++) {
  138. if (tag->id == t->tag) {
  139. t->parse(tag);
  140. break;
  141. }
  142. }
  143. if (t == &__tagtable_end)
  144. printk(KERN_WARNING "Ignoring tag "
  145. "0x%08x\n", tag->id);
  146. tag = (bp_tag_t*)((unsigned long)(tag + 1) + tag->size);
  147. }
  148. return 0;
  149. }
  150. /*
  151. * Initialize architecture. (Early stage)
  152. */
  153. void __init init_arch(bp_tag_t *bp_start)
  154. {
  155. #ifdef CONFIG_BLK_DEV_INITRD
  156. initrd_start = &__initrd_start;
  157. initrd_end = &__initrd_end;
  158. #endif
  159. sysmem.nr_banks = 0;
  160. #ifdef CONFIG_CMDLINE_BOOL
  161. strcpy(command_line, default_command_line);
  162. #endif
  163. /* Parse boot parameters */
  164. if (bp_start)
  165. parse_bootparam(bp_start);
  166. if (sysmem.nr_banks == 0) {
  167. sysmem.nr_banks = 1;
  168. sysmem.bank[0].start = PLATFORM_DEFAULT_MEM_START;
  169. sysmem.bank[0].end = PLATFORM_DEFAULT_MEM_START
  170. + PLATFORM_DEFAULT_MEM_SIZE;
  171. }
  172. /* Early hook for platforms */
  173. platform_init(bp_start);
  174. /* Initialize MMU. */
  175. init_mmu();
  176. }
  177. /*
  178. * Initialize system. Setup memory and reserve regions.
  179. */
  180. extern char _end;
  181. extern char _stext;
  182. extern char _WindowVectors_text_start;
  183. extern char _WindowVectors_text_end;
  184. extern char _DebugInterruptVector_literal_start;
  185. extern char _DebugInterruptVector_text_end;
  186. extern char _KernelExceptionVector_literal_start;
  187. extern char _KernelExceptionVector_text_end;
  188. extern char _UserExceptionVector_literal_start;
  189. extern char _UserExceptionVector_text_end;
  190. extern char _DoubleExceptionVector_literal_start;
  191. extern char _DoubleExceptionVector_text_end;
  192. void __init setup_arch(char **cmdline_p)
  193. {
  194. extern int mem_reserve(unsigned long, unsigned long, int);
  195. extern void bootmem_init(void);
  196. memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
  197. boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
  198. *cmdline_p = command_line;
  199. /* Reserve some memory regions */
  200. #ifdef CONFIG_BLK_DEV_INITRD
  201. if (initrd_start < initrd_end) {
  202. initrd_is_mapped = mem_reserve(__pa(initrd_start),
  203. __pa(initrd_end), 0);
  204. initrd_below_start_ok = 1;
  205. } else {
  206. initrd_start = 0;
  207. }
  208. #endif
  209. mem_reserve(__pa(&_stext),__pa(&_end), 1);
  210. mem_reserve(__pa(&_WindowVectors_text_start),
  211. __pa(&_WindowVectors_text_end), 0);
  212. mem_reserve(__pa(&_DebugInterruptVector_literal_start),
  213. __pa(&_DebugInterruptVector_text_end), 0);
  214. mem_reserve(__pa(&_KernelExceptionVector_literal_start),
  215. __pa(&_KernelExceptionVector_text_end), 0);
  216. mem_reserve(__pa(&_UserExceptionVector_literal_start),
  217. __pa(&_UserExceptionVector_text_end), 0);
  218. mem_reserve(__pa(&_DoubleExceptionVector_literal_start),
  219. __pa(&_DoubleExceptionVector_text_end), 0);
  220. bootmem_init();
  221. platform_setup(cmdline_p);
  222. paging_init();
  223. #ifdef CONFIG_VT
  224. # if defined(CONFIG_VGA_CONSOLE)
  225. conswitchp = &vga_con;
  226. # elif defined(CONFIG_DUMMY_CONSOLE)
  227. conswitchp = &dummy_con;
  228. # endif
  229. #endif
  230. #ifdef CONFIG_PCI
  231. platform_pcibios_init();
  232. #endif
  233. }
  234. void machine_restart(char * cmd)
  235. {
  236. platform_restart();
  237. }
  238. void machine_halt(void)
  239. {
  240. platform_halt();
  241. while (1);
  242. }
  243. void machine_power_off(void)
  244. {
  245. platform_power_off();
  246. while (1);
  247. }
  248. #ifdef CONFIG_PROC_FS
  249. /*
  250. * Display some core information through /proc/cpuinfo.
  251. */
  252. static int
  253. c_show(struct seq_file *f, void *slot)
  254. {
  255. /* high-level stuff */
  256. seq_printf(f,"processor\t: 0\n"
  257. "vendor_id\t: Tensilica\n"
  258. "model\t\t: Xtensa " XCHAL_HW_VERSION_NAME "\n"
  259. "core ID\t\t: " XCHAL_CORE_ID "\n"
  260. "build ID\t: 0x%x\n"
  261. "byte order\t: %s\n"
  262. "cpu MHz\t\t: %lu.%02lu\n"
  263. "bogomips\t: %lu.%02lu\n",
  264. XCHAL_BUILD_UNIQUE_ID,
  265. XCHAL_HAVE_BE ? "big" : "little",
  266. CCOUNT_PER_JIFFY/(1000000/HZ),
  267. (CCOUNT_PER_JIFFY/(10000/HZ)) % 100,
  268. loops_per_jiffy/(500000/HZ),
  269. (loops_per_jiffy/(5000/HZ)) % 100);
  270. seq_printf(f,"flags\t\t: "
  271. #if XCHAL_HAVE_NMI
  272. "nmi "
  273. #endif
  274. #if XCHAL_HAVE_DEBUG
  275. "debug "
  276. # if XCHAL_HAVE_OCD
  277. "ocd "
  278. # endif
  279. #endif
  280. #if XCHAL_HAVE_DENSITY
  281. "density "
  282. #endif
  283. #if XCHAL_HAVE_BOOLEANS
  284. "boolean "
  285. #endif
  286. #if XCHAL_HAVE_LOOPS
  287. "loop "
  288. #endif
  289. #if XCHAL_HAVE_NSA
  290. "nsa "
  291. #endif
  292. #if XCHAL_HAVE_MINMAX
  293. "minmax "
  294. #endif
  295. #if XCHAL_HAVE_SEXT
  296. "sext "
  297. #endif
  298. #if XCHAL_HAVE_CLAMPS
  299. "clamps "
  300. #endif
  301. #if XCHAL_HAVE_MAC16
  302. "mac16 "
  303. #endif
  304. #if XCHAL_HAVE_MUL16
  305. "mul16 "
  306. #endif
  307. #if XCHAL_HAVE_MUL32
  308. "mul32 "
  309. #endif
  310. #if XCHAL_HAVE_MUL32_HIGH
  311. "mul32h "
  312. #endif
  313. #if XCHAL_HAVE_FP
  314. "fpu "
  315. #endif
  316. "\n");
  317. /* Registers. */
  318. seq_printf(f,"physical aregs\t: %d\n"
  319. "misc regs\t: %d\n"
  320. "ibreak\t\t: %d\n"
  321. "dbreak\t\t: %d\n",
  322. XCHAL_NUM_AREGS,
  323. XCHAL_NUM_MISC_REGS,
  324. XCHAL_NUM_IBREAK,
  325. XCHAL_NUM_DBREAK);
  326. /* Interrupt. */
  327. seq_printf(f,"num ints\t: %d\n"
  328. "ext ints\t: %d\n"
  329. "int levels\t: %d\n"
  330. "timers\t\t: %d\n"
  331. "debug level\t: %d\n",
  332. XCHAL_NUM_INTERRUPTS,
  333. XCHAL_NUM_EXTINTERRUPTS,
  334. XCHAL_NUM_INTLEVELS,
  335. XCHAL_NUM_TIMERS,
  336. XCHAL_DEBUGLEVEL);
  337. /* Cache */
  338. seq_printf(f,"icache line size: %d\n"
  339. "icache ways\t: %d\n"
  340. "icache size\t: %d\n"
  341. "icache flags\t: "
  342. #if XCHAL_ICACHE_LINE_LOCKABLE
  343. "lock"
  344. #endif
  345. "\n"
  346. "dcache line size: %d\n"
  347. "dcache ways\t: %d\n"
  348. "dcache size\t: %d\n"
  349. "dcache flags\t: "
  350. #if XCHAL_DCACHE_IS_WRITEBACK
  351. "writeback"
  352. #endif
  353. #if XCHAL_DCACHE_LINE_LOCKABLE
  354. "lock"
  355. #endif
  356. "\n",
  357. XCHAL_ICACHE_LINESIZE,
  358. XCHAL_ICACHE_WAYS,
  359. XCHAL_ICACHE_SIZE,
  360. XCHAL_DCACHE_LINESIZE,
  361. XCHAL_DCACHE_WAYS,
  362. XCHAL_DCACHE_SIZE);
  363. return 0;
  364. }
  365. /*
  366. * We show only CPU #0 info.
  367. */
  368. static void *
  369. c_start(struct seq_file *f, loff_t *pos)
  370. {
  371. return (void *) ((*pos == 0) ? (void *)1 : NULL);
  372. }
  373. static void *
  374. c_next(struct seq_file *f, void *v, loff_t *pos)
  375. {
  376. return NULL;
  377. }
  378. static void
  379. c_stop(struct seq_file *f, void *v)
  380. {
  381. }
  382. const struct seq_operations cpuinfo_op =
  383. {
  384. start: c_start,
  385. next: c_next,
  386. stop: c_stop,
  387. show: c_show
  388. };
  389. #endif /* CONFIG_PROC_FS */