irq_64.c 6.5 KB

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  1. /*
  2. * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
  3. *
  4. * This file contains the lowest level x86_64-specific interrupt
  5. * entry and irq statistics code. All the remaining irq logic is
  6. * done by the generic kernel/irq/ code and in the
  7. * x86_64-specific irq controller code. (e.g. i8259.c and
  8. * io_apic.c.)
  9. */
  10. #include <linux/kernel_stat.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/seq_file.h>
  13. #include <linux/module.h>
  14. #include <linux/delay.h>
  15. #include <asm/uaccess.h>
  16. #include <asm/io_apic.h>
  17. #include <asm/idle.h>
  18. #include <asm/smp.h>
  19. atomic_t irq_err_count;
  20. /*
  21. * 'what should we do if we get a hw irq event on an illegal vector'.
  22. * each architecture has to answer this themselves.
  23. */
  24. void ack_bad_irq(unsigned int irq)
  25. {
  26. printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq);
  27. /*
  28. * Currently unexpected vectors happen only on SMP and APIC.
  29. * We _must_ ack these because every local APIC has only N
  30. * irq slots per priority level, and a 'hanging, unacked' IRQ
  31. * holds up an irq slot - in excessive cases (when multiple
  32. * unexpected vectors occur) that might lock up the APIC
  33. * completely.
  34. * But don't ack when the APIC is disabled. -AK
  35. */
  36. if (!disable_apic)
  37. ack_APIC_irq();
  38. }
  39. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  40. /*
  41. * Probabilistic stack overflow check:
  42. *
  43. * Only check the stack in process context, because everything else
  44. * runs on the big interrupt stacks. Checking reliably is too expensive,
  45. * so we just check from interrupts.
  46. */
  47. static inline void stack_overflow_check(struct pt_regs *regs)
  48. {
  49. u64 curbase = (u64)task_stack_page(current);
  50. static unsigned long warned = -60*HZ;
  51. if (regs->sp >= curbase && regs->sp <= curbase + THREAD_SIZE &&
  52. regs->sp < curbase + sizeof(struct thread_info) + 128 &&
  53. time_after(jiffies, warned + 60*HZ)) {
  54. printk("do_IRQ: %s near stack overflow (cur:%Lx,sp:%lx)\n",
  55. current->comm, curbase, regs->sp);
  56. show_stack(NULL,NULL);
  57. warned = jiffies;
  58. }
  59. }
  60. #endif
  61. /*
  62. * Generic, controller-independent functions:
  63. */
  64. int show_interrupts(struct seq_file *p, void *v)
  65. {
  66. int i = *(loff_t *) v, j;
  67. struct irqaction * action;
  68. unsigned long flags;
  69. if (i == 0) {
  70. seq_printf(p, " ");
  71. for_each_online_cpu(j)
  72. seq_printf(p, "CPU%-8d",j);
  73. seq_putc(p, '\n');
  74. }
  75. if (i < NR_IRQS) {
  76. unsigned any_count = 0;
  77. spin_lock_irqsave(&irq_desc[i].lock, flags);
  78. #ifndef CONFIG_SMP
  79. any_count = kstat_irqs(i);
  80. #else
  81. for_each_online_cpu(j)
  82. any_count |= kstat_cpu(j).irqs[i];
  83. #endif
  84. action = irq_desc[i].action;
  85. if (!action && !any_count)
  86. goto skip;
  87. seq_printf(p, "%3d: ",i);
  88. #ifndef CONFIG_SMP
  89. seq_printf(p, "%10u ", kstat_irqs(i));
  90. #else
  91. for_each_online_cpu(j)
  92. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  93. #endif
  94. seq_printf(p, " %8s", irq_desc[i].chip->name);
  95. seq_printf(p, "-%-8s", irq_desc[i].name);
  96. if (action) {
  97. seq_printf(p, " %s", action->name);
  98. while ((action = action->next) != NULL)
  99. seq_printf(p, ", %s", action->name);
  100. }
  101. seq_putc(p, '\n');
  102. skip:
  103. spin_unlock_irqrestore(&irq_desc[i].lock, flags);
  104. } else if (i == NR_IRQS) {
  105. seq_printf(p, "NMI: ");
  106. for_each_online_cpu(j)
  107. seq_printf(p, "%10u ", cpu_pda(j)->__nmi_count);
  108. seq_printf(p, " Non-maskable interrupts\n");
  109. seq_printf(p, "LOC: ");
  110. for_each_online_cpu(j)
  111. seq_printf(p, "%10u ", cpu_pda(j)->apic_timer_irqs);
  112. seq_printf(p, " Local timer interrupts\n");
  113. #ifdef CONFIG_SMP
  114. seq_printf(p, "RES: ");
  115. for_each_online_cpu(j)
  116. seq_printf(p, "%10u ", cpu_pda(j)->irq_resched_count);
  117. seq_printf(p, " Rescheduling interrupts\n");
  118. seq_printf(p, "CAL: ");
  119. for_each_online_cpu(j)
  120. seq_printf(p, "%10u ", cpu_pda(j)->irq_call_count);
  121. seq_printf(p, " function call interrupts\n");
  122. seq_printf(p, "TLB: ");
  123. for_each_online_cpu(j)
  124. seq_printf(p, "%10u ", cpu_pda(j)->irq_tlb_count);
  125. seq_printf(p, " TLB shootdowns\n");
  126. #endif
  127. seq_printf(p, "TRM: ");
  128. for_each_online_cpu(j)
  129. seq_printf(p, "%10u ", cpu_pda(j)->irq_thermal_count);
  130. seq_printf(p, " Thermal event interrupts\n");
  131. seq_printf(p, "THR: ");
  132. for_each_online_cpu(j)
  133. seq_printf(p, "%10u ", cpu_pda(j)->irq_threshold_count);
  134. seq_printf(p, " Threshold APIC interrupts\n");
  135. seq_printf(p, "SPU: ");
  136. for_each_online_cpu(j)
  137. seq_printf(p, "%10u ", cpu_pda(j)->irq_spurious_count);
  138. seq_printf(p, " Spurious interrupts\n");
  139. seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
  140. }
  141. return 0;
  142. }
  143. /*
  144. * do_IRQ handles all normal device IRQ's (the special
  145. * SMP cross-CPU interrupts have their own specific
  146. * handlers).
  147. */
  148. asmlinkage unsigned int do_IRQ(struct pt_regs *regs)
  149. {
  150. struct pt_regs *old_regs = set_irq_regs(regs);
  151. /* high bit used in ret_from_ code */
  152. unsigned vector = ~regs->orig_ax;
  153. unsigned irq;
  154. exit_idle();
  155. irq_enter();
  156. irq = __get_cpu_var(vector_irq)[vector];
  157. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  158. stack_overflow_check(regs);
  159. #endif
  160. if (likely(irq < NR_IRQS))
  161. generic_handle_irq(irq);
  162. else {
  163. if (!disable_apic)
  164. ack_APIC_irq();
  165. if (printk_ratelimit())
  166. printk(KERN_EMERG "%s: %d.%d No irq handler for vector\n",
  167. __func__, smp_processor_id(), vector);
  168. }
  169. irq_exit();
  170. set_irq_regs(old_regs);
  171. return 1;
  172. }
  173. #ifdef CONFIG_HOTPLUG_CPU
  174. void fixup_irqs(cpumask_t map)
  175. {
  176. unsigned int irq;
  177. static int warned;
  178. for (irq = 0; irq < NR_IRQS; irq++) {
  179. cpumask_t mask;
  180. int break_affinity = 0;
  181. int set_affinity = 1;
  182. if (irq == 2)
  183. continue;
  184. /* interrupt's are disabled at this point */
  185. spin_lock(&irq_desc[irq].lock);
  186. if (!irq_has_action(irq) ||
  187. cpus_equal(irq_desc[irq].affinity, map)) {
  188. spin_unlock(&irq_desc[irq].lock);
  189. continue;
  190. }
  191. cpus_and(mask, irq_desc[irq].affinity, map);
  192. if (cpus_empty(mask)) {
  193. break_affinity = 1;
  194. mask = map;
  195. }
  196. if (irq_desc[irq].chip->mask)
  197. irq_desc[irq].chip->mask(irq);
  198. if (irq_desc[irq].chip->set_affinity)
  199. irq_desc[irq].chip->set_affinity(irq, mask);
  200. else if (!(warned++))
  201. set_affinity = 0;
  202. if (irq_desc[irq].chip->unmask)
  203. irq_desc[irq].chip->unmask(irq);
  204. spin_unlock(&irq_desc[irq].lock);
  205. if (break_affinity && set_affinity)
  206. printk("Broke affinity for irq %i\n", irq);
  207. else if (!set_affinity)
  208. printk("Cannot set affinity for irq %i\n", irq);
  209. }
  210. /* That doesn't seem sufficient. Give it 1ms. */
  211. local_irq_enable();
  212. mdelay(1);
  213. local_irq_disable();
  214. }
  215. #endif
  216. extern void call_softirq(void);
  217. asmlinkage void do_softirq(void)
  218. {
  219. __u32 pending;
  220. unsigned long flags;
  221. if (in_interrupt())
  222. return;
  223. local_irq_save(flags);
  224. pending = local_softirq_pending();
  225. /* Switch to interrupt stack */
  226. if (pending) {
  227. call_softirq();
  228. WARN_ON_ONCE(softirq_count());
  229. }
  230. local_irq_restore(flags);
  231. }