traps.c 22 KB

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  1. /*
  2. * arch/s390/kernel/traps.c
  3. *
  4. * S390 version
  5. * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
  6. * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
  7. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
  8. *
  9. * Derived from "arch/i386/kernel/traps.c"
  10. * Copyright (C) 1991, 1992 Linus Torvalds
  11. */
  12. /*
  13. * 'Traps.c' handles hardware traps and faults after we have saved some
  14. * state in 'asm.s'.
  15. */
  16. #include <linux/sched.h>
  17. #include <linux/kernel.h>
  18. #include <linux/string.h>
  19. #include <linux/errno.h>
  20. #include <linux/ptrace.h>
  21. #include <linux/timer.h>
  22. #include <linux/mm.h>
  23. #include <linux/smp.h>
  24. #include <linux/init.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/delay.h>
  28. #include <linux/module.h>
  29. #include <linux/kdebug.h>
  30. #include <linux/kallsyms.h>
  31. #include <linux/reboot.h>
  32. #include <linux/kprobes.h>
  33. #include <linux/bug.h>
  34. #include <linux/utsname.h>
  35. #include <asm/system.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/io.h>
  38. #include <asm/atomic.h>
  39. #include <asm/mathemu.h>
  40. #include <asm/cpcmd.h>
  41. #include <asm/s390_ext.h>
  42. #include <asm/lowcore.h>
  43. #include <asm/debug.h>
  44. #include "entry.h"
  45. pgm_check_handler_t *pgm_check_table[128];
  46. #ifdef CONFIG_SYSCTL
  47. #ifdef CONFIG_PROCESS_DEBUG
  48. int sysctl_userprocess_debug = 1;
  49. #else
  50. int sysctl_userprocess_debug = 0;
  51. #endif
  52. #endif
  53. extern pgm_check_handler_t do_protection_exception;
  54. extern pgm_check_handler_t do_dat_exception;
  55. extern pgm_check_handler_t do_asce_exception;
  56. #define stack_pointer ({ void **sp; asm("la %0,0(15)" : "=&d" (sp)); sp; })
  57. #ifndef CONFIG_64BIT
  58. #define FOURLONG "%08lx %08lx %08lx %08lx\n"
  59. static int kstack_depth_to_print = 12;
  60. #else /* CONFIG_64BIT */
  61. #define FOURLONG "%016lx %016lx %016lx %016lx\n"
  62. static int kstack_depth_to_print = 20;
  63. #endif /* CONFIG_64BIT */
  64. /*
  65. * For show_trace we have tree different stack to consider:
  66. * - the panic stack which is used if the kernel stack has overflown
  67. * - the asynchronous interrupt stack (cpu related)
  68. * - the synchronous kernel stack (process related)
  69. * The stack trace can start at any of the three stack and can potentially
  70. * touch all of them. The order is: panic stack, async stack, sync stack.
  71. */
  72. static unsigned long
  73. __show_trace(unsigned long sp, unsigned long low, unsigned long high)
  74. {
  75. struct stack_frame *sf;
  76. struct pt_regs *regs;
  77. while (1) {
  78. sp = sp & PSW_ADDR_INSN;
  79. if (sp < low || sp > high - sizeof(*sf))
  80. return sp;
  81. sf = (struct stack_frame *) sp;
  82. printk("([<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  83. print_symbol("%s)\n", sf->gprs[8] & PSW_ADDR_INSN);
  84. /* Follow the backchain. */
  85. while (1) {
  86. low = sp;
  87. sp = sf->back_chain & PSW_ADDR_INSN;
  88. if (!sp)
  89. break;
  90. if (sp <= low || sp > high - sizeof(*sf))
  91. return sp;
  92. sf = (struct stack_frame *) sp;
  93. printk(" [<%016lx>] ", sf->gprs[8] & PSW_ADDR_INSN);
  94. print_symbol("%s\n", sf->gprs[8] & PSW_ADDR_INSN);
  95. }
  96. /* Zero backchain detected, check for interrupt frame. */
  97. sp = (unsigned long) (sf + 1);
  98. if (sp <= low || sp > high - sizeof(*regs))
  99. return sp;
  100. regs = (struct pt_regs *) sp;
  101. printk(" [<%016lx>] ", regs->psw.addr & PSW_ADDR_INSN);
  102. print_symbol("%s\n", regs->psw.addr & PSW_ADDR_INSN);
  103. low = sp;
  104. sp = regs->gprs[15];
  105. }
  106. }
  107. void show_trace(struct task_struct *task, unsigned long *stack)
  108. {
  109. register unsigned long __r15 asm ("15");
  110. unsigned long sp;
  111. sp = (unsigned long) stack;
  112. if (!sp)
  113. sp = task ? task->thread.ksp : __r15;
  114. printk("Call Trace:\n");
  115. #ifdef CONFIG_CHECK_STACK
  116. sp = __show_trace(sp, S390_lowcore.panic_stack - 4096,
  117. S390_lowcore.panic_stack);
  118. #endif
  119. sp = __show_trace(sp, S390_lowcore.async_stack - ASYNC_SIZE,
  120. S390_lowcore.async_stack);
  121. if (task)
  122. __show_trace(sp, (unsigned long) task_stack_page(task),
  123. (unsigned long) task_stack_page(task) + THREAD_SIZE);
  124. else
  125. __show_trace(sp, S390_lowcore.thread_info,
  126. S390_lowcore.thread_info + THREAD_SIZE);
  127. if (!task)
  128. task = current;
  129. debug_show_held_locks(task);
  130. }
  131. void show_stack(struct task_struct *task, unsigned long *sp)
  132. {
  133. register unsigned long * __r15 asm ("15");
  134. unsigned long *stack;
  135. int i;
  136. if (!sp)
  137. stack = task ? (unsigned long *) task->thread.ksp : __r15;
  138. else
  139. stack = sp;
  140. for (i = 0; i < kstack_depth_to_print; i++) {
  141. if (((addr_t) stack & (THREAD_SIZE-1)) == 0)
  142. break;
  143. if (i && ((i * sizeof (long) % 32) == 0))
  144. printk("\n ");
  145. printk("%p ", (void *)*stack++);
  146. }
  147. printk("\n");
  148. show_trace(task, sp);
  149. }
  150. #ifdef CONFIG_64BIT
  151. void show_last_breaking_event(struct pt_regs *regs)
  152. {
  153. printk("Last Breaking-Event-Address:\n");
  154. printk(" [<%016lx>] ", regs->args[0] & PSW_ADDR_INSN);
  155. print_symbol("%s\n", regs->args[0] & PSW_ADDR_INSN);
  156. }
  157. #endif
  158. /*
  159. * The architecture-independent dump_stack generator
  160. */
  161. void dump_stack(void)
  162. {
  163. printk("CPU: %d %s %s %.*s\n",
  164. task_thread_info(current)->cpu, print_tainted(),
  165. init_utsname()->release,
  166. (int)strcspn(init_utsname()->version, " "),
  167. init_utsname()->version);
  168. printk("Process %s (pid: %d, task: %p, ksp: %p)\n",
  169. current->comm, current->pid, current,
  170. (void *) current->thread.ksp);
  171. show_stack(NULL, NULL);
  172. }
  173. EXPORT_SYMBOL(dump_stack);
  174. static inline int mask_bits(struct pt_regs *regs, unsigned long bits)
  175. {
  176. return (regs->psw.mask & bits) / ((~bits + 1) & bits);
  177. }
  178. void show_registers(struct pt_regs *regs)
  179. {
  180. char *mode;
  181. mode = (regs->psw.mask & PSW_MASK_PSTATE) ? "User" : "Krnl";
  182. printk("%s PSW : %p %p",
  183. mode, (void *) regs->psw.mask,
  184. (void *) regs->psw.addr);
  185. print_symbol(" (%s)\n", regs->psw.addr & PSW_ADDR_INSN);
  186. printk(" R:%x T:%x IO:%x EX:%x Key:%x M:%x W:%x "
  187. "P:%x AS:%x CC:%x PM:%x", mask_bits(regs, PSW_MASK_PER),
  188. mask_bits(regs, PSW_MASK_DAT), mask_bits(regs, PSW_MASK_IO),
  189. mask_bits(regs, PSW_MASK_EXT), mask_bits(regs, PSW_MASK_KEY),
  190. mask_bits(regs, PSW_MASK_MCHECK), mask_bits(regs, PSW_MASK_WAIT),
  191. mask_bits(regs, PSW_MASK_PSTATE), mask_bits(regs, PSW_MASK_ASC),
  192. mask_bits(regs, PSW_MASK_CC), mask_bits(regs, PSW_MASK_PM));
  193. #ifdef CONFIG_64BIT
  194. printk(" EA:%x", mask_bits(regs, PSW_BASE_BITS));
  195. #endif
  196. printk("\n%s GPRS: " FOURLONG, mode,
  197. regs->gprs[0], regs->gprs[1], regs->gprs[2], regs->gprs[3]);
  198. printk(" " FOURLONG,
  199. regs->gprs[4], regs->gprs[5], regs->gprs[6], regs->gprs[7]);
  200. printk(" " FOURLONG,
  201. regs->gprs[8], regs->gprs[9], regs->gprs[10], regs->gprs[11]);
  202. printk(" " FOURLONG,
  203. regs->gprs[12], regs->gprs[13], regs->gprs[14], regs->gprs[15]);
  204. show_code(regs);
  205. }
  206. /* This is called from fs/proc/array.c */
  207. void task_show_regs(struct seq_file *m, struct task_struct *task)
  208. {
  209. struct pt_regs *regs;
  210. regs = task_pt_regs(task);
  211. seq_printf(m, "task: %p, ksp: %p\n",
  212. task, (void *)task->thread.ksp);
  213. seq_printf(m, "User PSW : %p %p\n",
  214. (void *) regs->psw.mask, (void *)regs->psw.addr);
  215. seq_printf(m, "User GPRS: " FOURLONG,
  216. regs->gprs[0], regs->gprs[1],
  217. regs->gprs[2], regs->gprs[3]);
  218. seq_printf(m, " " FOURLONG,
  219. regs->gprs[4], regs->gprs[5],
  220. regs->gprs[6], regs->gprs[7]);
  221. seq_printf(m, " " FOURLONG,
  222. regs->gprs[8], regs->gprs[9],
  223. regs->gprs[10], regs->gprs[11]);
  224. seq_printf(m, " " FOURLONG,
  225. regs->gprs[12], regs->gprs[13],
  226. regs->gprs[14], regs->gprs[15]);
  227. seq_printf(m, "User ACRS: %08x %08x %08x %08x\n",
  228. task->thread.acrs[0], task->thread.acrs[1],
  229. task->thread.acrs[2], task->thread.acrs[3]);
  230. seq_printf(m, " %08x %08x %08x %08x\n",
  231. task->thread.acrs[4], task->thread.acrs[5],
  232. task->thread.acrs[6], task->thread.acrs[7]);
  233. seq_printf(m, " %08x %08x %08x %08x\n",
  234. task->thread.acrs[8], task->thread.acrs[9],
  235. task->thread.acrs[10], task->thread.acrs[11]);
  236. seq_printf(m, " %08x %08x %08x %08x\n",
  237. task->thread.acrs[12], task->thread.acrs[13],
  238. task->thread.acrs[14], task->thread.acrs[15]);
  239. }
  240. static DEFINE_SPINLOCK(die_lock);
  241. void die(const char * str, struct pt_regs * regs, long err)
  242. {
  243. static int die_counter;
  244. oops_enter();
  245. debug_stop_all();
  246. console_verbose();
  247. spin_lock_irq(&die_lock);
  248. bust_spinlocks(1);
  249. printk("%s: %04lx [#%d] ", str, err & 0xffff, ++die_counter);
  250. #ifdef CONFIG_PREEMPT
  251. printk("PREEMPT ");
  252. #endif
  253. #ifdef CONFIG_SMP
  254. printk("SMP ");
  255. #endif
  256. #ifdef CONFIG_DEBUG_PAGEALLOC
  257. printk("DEBUG_PAGEALLOC");
  258. #endif
  259. printk("\n");
  260. notify_die(DIE_OOPS, str, regs, err, current->thread.trap_no, SIGSEGV);
  261. show_regs(regs);
  262. bust_spinlocks(0);
  263. add_taint(TAINT_DIE);
  264. spin_unlock_irq(&die_lock);
  265. if (in_interrupt())
  266. panic("Fatal exception in interrupt");
  267. if (panic_on_oops)
  268. panic("Fatal exception: panic_on_oops");
  269. oops_exit();
  270. do_exit(SIGSEGV);
  271. }
  272. static void inline
  273. report_user_fault(long interruption_code, struct pt_regs *regs)
  274. {
  275. #if defined(CONFIG_SYSCTL)
  276. if (!sysctl_userprocess_debug)
  277. return;
  278. #endif
  279. #if defined(CONFIG_SYSCTL) || defined(CONFIG_PROCESS_DEBUG)
  280. printk("User process fault: interruption code 0x%lX\n",
  281. interruption_code);
  282. show_regs(regs);
  283. #endif
  284. }
  285. int is_valid_bugaddr(unsigned long addr)
  286. {
  287. return 1;
  288. }
  289. static void __kprobes inline do_trap(long interruption_code, int signr,
  290. char *str, struct pt_regs *regs,
  291. siginfo_t *info)
  292. {
  293. /*
  294. * We got all needed information from the lowcore and can
  295. * now safely switch on interrupts.
  296. */
  297. if (regs->psw.mask & PSW_MASK_PSTATE)
  298. local_irq_enable();
  299. if (notify_die(DIE_TRAP, str, regs, interruption_code,
  300. interruption_code, signr) == NOTIFY_STOP)
  301. return;
  302. if (regs->psw.mask & PSW_MASK_PSTATE) {
  303. struct task_struct *tsk = current;
  304. tsk->thread.trap_no = interruption_code & 0xffff;
  305. force_sig_info(signr, info, tsk);
  306. report_user_fault(interruption_code, regs);
  307. } else {
  308. const struct exception_table_entry *fixup;
  309. fixup = search_exception_tables(regs->psw.addr & PSW_ADDR_INSN);
  310. if (fixup)
  311. regs->psw.addr = fixup->fixup | PSW_ADDR_AMODE;
  312. else {
  313. enum bug_trap_type btt;
  314. btt = report_bug(regs->psw.addr & PSW_ADDR_INSN, regs);
  315. if (btt == BUG_TRAP_TYPE_WARN)
  316. return;
  317. die(str, regs, interruption_code);
  318. }
  319. }
  320. }
  321. static inline void __user *get_check_address(struct pt_regs *regs)
  322. {
  323. return (void __user *)((regs->psw.addr-S390_lowcore.pgm_ilc) & PSW_ADDR_INSN);
  324. }
  325. void __kprobes do_single_step(struct pt_regs *regs)
  326. {
  327. if (notify_die(DIE_SSTEP, "sstep", regs, 0, 0,
  328. SIGTRAP) == NOTIFY_STOP){
  329. return;
  330. }
  331. if ((current->ptrace & PT_PTRACED) != 0)
  332. force_sig(SIGTRAP, current);
  333. }
  334. static void default_trap_handler(struct pt_regs * regs, long interruption_code)
  335. {
  336. if (regs->psw.mask & PSW_MASK_PSTATE) {
  337. local_irq_enable();
  338. do_exit(SIGSEGV);
  339. report_user_fault(interruption_code, regs);
  340. } else
  341. die("Unknown program exception", regs, interruption_code);
  342. }
  343. #define DO_ERROR_INFO(signr, str, name, sicode, siaddr) \
  344. static void name(struct pt_regs * regs, long interruption_code) \
  345. { \
  346. siginfo_t info; \
  347. info.si_signo = signr; \
  348. info.si_errno = 0; \
  349. info.si_code = sicode; \
  350. info.si_addr = siaddr; \
  351. do_trap(interruption_code, signr, str, regs, &info); \
  352. }
  353. DO_ERROR_INFO(SIGILL, "addressing exception", addressing_exception,
  354. ILL_ILLADR, get_check_address(regs))
  355. DO_ERROR_INFO(SIGILL, "execute exception", execute_exception,
  356. ILL_ILLOPN, get_check_address(regs))
  357. DO_ERROR_INFO(SIGFPE, "fixpoint divide exception", divide_exception,
  358. FPE_INTDIV, get_check_address(regs))
  359. DO_ERROR_INFO(SIGFPE, "fixpoint overflow exception", overflow_exception,
  360. FPE_INTOVF, get_check_address(regs))
  361. DO_ERROR_INFO(SIGFPE, "HFP overflow exception", hfp_overflow_exception,
  362. FPE_FLTOVF, get_check_address(regs))
  363. DO_ERROR_INFO(SIGFPE, "HFP underflow exception", hfp_underflow_exception,
  364. FPE_FLTUND, get_check_address(regs))
  365. DO_ERROR_INFO(SIGFPE, "HFP significance exception", hfp_significance_exception,
  366. FPE_FLTRES, get_check_address(regs))
  367. DO_ERROR_INFO(SIGFPE, "HFP divide exception", hfp_divide_exception,
  368. FPE_FLTDIV, get_check_address(regs))
  369. DO_ERROR_INFO(SIGFPE, "HFP square root exception", hfp_sqrt_exception,
  370. FPE_FLTINV, get_check_address(regs))
  371. DO_ERROR_INFO(SIGILL, "operand exception", operand_exception,
  372. ILL_ILLOPN, get_check_address(regs))
  373. DO_ERROR_INFO(SIGILL, "privileged operation", privileged_op,
  374. ILL_PRVOPC, get_check_address(regs))
  375. DO_ERROR_INFO(SIGILL, "special operation exception", special_op_exception,
  376. ILL_ILLOPN, get_check_address(regs))
  377. DO_ERROR_INFO(SIGILL, "translation exception", translation_exception,
  378. ILL_ILLOPN, get_check_address(regs))
  379. static inline void
  380. do_fp_trap(struct pt_regs *regs, void __user *location,
  381. int fpc, long interruption_code)
  382. {
  383. siginfo_t si;
  384. si.si_signo = SIGFPE;
  385. si.si_errno = 0;
  386. si.si_addr = location;
  387. si.si_code = 0;
  388. /* FPC[2] is Data Exception Code */
  389. if ((fpc & 0x00000300) == 0) {
  390. /* bits 6 and 7 of DXC are 0 iff IEEE exception */
  391. if (fpc & 0x8000) /* invalid fp operation */
  392. si.si_code = FPE_FLTINV;
  393. else if (fpc & 0x4000) /* div by 0 */
  394. si.si_code = FPE_FLTDIV;
  395. else if (fpc & 0x2000) /* overflow */
  396. si.si_code = FPE_FLTOVF;
  397. else if (fpc & 0x1000) /* underflow */
  398. si.si_code = FPE_FLTUND;
  399. else if (fpc & 0x0800) /* inexact */
  400. si.si_code = FPE_FLTRES;
  401. }
  402. current->thread.ieee_instruction_pointer = (addr_t) location;
  403. do_trap(interruption_code, SIGFPE,
  404. "floating point exception", regs, &si);
  405. }
  406. static void illegal_op(struct pt_regs * regs, long interruption_code)
  407. {
  408. siginfo_t info;
  409. __u8 opcode[6];
  410. __u16 __user *location;
  411. int signal = 0;
  412. location = get_check_address(regs);
  413. /*
  414. * We got all needed information from the lowcore and can
  415. * now safely switch on interrupts.
  416. */
  417. if (regs->psw.mask & PSW_MASK_PSTATE)
  418. local_irq_enable();
  419. if (regs->psw.mask & PSW_MASK_PSTATE) {
  420. if (get_user(*((__u16 *) opcode), (__u16 __user *) location))
  421. return;
  422. if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) {
  423. if (current->ptrace & PT_PTRACED)
  424. force_sig(SIGTRAP, current);
  425. else
  426. signal = SIGILL;
  427. #ifdef CONFIG_MATHEMU
  428. } else if (opcode[0] == 0xb3) {
  429. if (get_user(*((__u16 *) (opcode+2)), location+1))
  430. return;
  431. signal = math_emu_b3(opcode, regs);
  432. } else if (opcode[0] == 0xed) {
  433. if (get_user(*((__u32 *) (opcode+2)),
  434. (__u32 __user *)(location+1)))
  435. return;
  436. signal = math_emu_ed(opcode, regs);
  437. } else if (*((__u16 *) opcode) == 0xb299) {
  438. if (get_user(*((__u16 *) (opcode+2)), location+1))
  439. return;
  440. signal = math_emu_srnm(opcode, regs);
  441. } else if (*((__u16 *) opcode) == 0xb29c) {
  442. if (get_user(*((__u16 *) (opcode+2)), location+1))
  443. return;
  444. signal = math_emu_stfpc(opcode, regs);
  445. } else if (*((__u16 *) opcode) == 0xb29d) {
  446. if (get_user(*((__u16 *) (opcode+2)), location+1))
  447. return;
  448. signal = math_emu_lfpc(opcode, regs);
  449. #endif
  450. } else
  451. signal = SIGILL;
  452. } else {
  453. /*
  454. * If we get an illegal op in kernel mode, send it through the
  455. * kprobes notifier. If kprobes doesn't pick it up, SIGILL
  456. */
  457. if (notify_die(DIE_BPT, "bpt", regs, interruption_code,
  458. 3, SIGTRAP) != NOTIFY_STOP)
  459. signal = SIGILL;
  460. }
  461. #ifdef CONFIG_MATHEMU
  462. if (signal == SIGFPE)
  463. do_fp_trap(regs, location,
  464. current->thread.fp_regs.fpc, interruption_code);
  465. else if (signal == SIGSEGV) {
  466. info.si_signo = signal;
  467. info.si_errno = 0;
  468. info.si_code = SEGV_MAPERR;
  469. info.si_addr = (void __user *) location;
  470. do_trap(interruption_code, signal,
  471. "user address fault", regs, &info);
  472. } else
  473. #endif
  474. if (signal) {
  475. info.si_signo = signal;
  476. info.si_errno = 0;
  477. info.si_code = ILL_ILLOPC;
  478. info.si_addr = (void __user *) location;
  479. do_trap(interruption_code, signal,
  480. "illegal operation", regs, &info);
  481. }
  482. }
  483. #ifdef CONFIG_MATHEMU
  484. asmlinkage void
  485. specification_exception(struct pt_regs * regs, long interruption_code)
  486. {
  487. __u8 opcode[6];
  488. __u16 __user *location = NULL;
  489. int signal = 0;
  490. location = (__u16 __user *) get_check_address(regs);
  491. /*
  492. * We got all needed information from the lowcore and can
  493. * now safely switch on interrupts.
  494. */
  495. if (regs->psw.mask & PSW_MASK_PSTATE)
  496. local_irq_enable();
  497. if (regs->psw.mask & PSW_MASK_PSTATE) {
  498. get_user(*((__u16 *) opcode), location);
  499. switch (opcode[0]) {
  500. case 0x28: /* LDR Rx,Ry */
  501. signal = math_emu_ldr(opcode);
  502. break;
  503. case 0x38: /* LER Rx,Ry */
  504. signal = math_emu_ler(opcode);
  505. break;
  506. case 0x60: /* STD R,D(X,B) */
  507. get_user(*((__u16 *) (opcode+2)), location+1);
  508. signal = math_emu_std(opcode, regs);
  509. break;
  510. case 0x68: /* LD R,D(X,B) */
  511. get_user(*((__u16 *) (opcode+2)), location+1);
  512. signal = math_emu_ld(opcode, regs);
  513. break;
  514. case 0x70: /* STE R,D(X,B) */
  515. get_user(*((__u16 *) (opcode+2)), location+1);
  516. signal = math_emu_ste(opcode, regs);
  517. break;
  518. case 0x78: /* LE R,D(X,B) */
  519. get_user(*((__u16 *) (opcode+2)), location+1);
  520. signal = math_emu_le(opcode, regs);
  521. break;
  522. default:
  523. signal = SIGILL;
  524. break;
  525. }
  526. } else
  527. signal = SIGILL;
  528. if (signal == SIGFPE)
  529. do_fp_trap(regs, location,
  530. current->thread.fp_regs.fpc, interruption_code);
  531. else if (signal) {
  532. siginfo_t info;
  533. info.si_signo = signal;
  534. info.si_errno = 0;
  535. info.si_code = ILL_ILLOPN;
  536. info.si_addr = location;
  537. do_trap(interruption_code, signal,
  538. "specification exception", regs, &info);
  539. }
  540. }
  541. #else
  542. DO_ERROR_INFO(SIGILL, "specification exception", specification_exception,
  543. ILL_ILLOPN, get_check_address(regs));
  544. #endif
  545. static void data_exception(struct pt_regs * regs, long interruption_code)
  546. {
  547. __u16 __user *location;
  548. int signal = 0;
  549. location = get_check_address(regs);
  550. /*
  551. * We got all needed information from the lowcore and can
  552. * now safely switch on interrupts.
  553. */
  554. if (regs->psw.mask & PSW_MASK_PSTATE)
  555. local_irq_enable();
  556. if (MACHINE_HAS_IEEE)
  557. asm volatile("stfpc %0" : "=m" (current->thread.fp_regs.fpc));
  558. #ifdef CONFIG_MATHEMU
  559. else if (regs->psw.mask & PSW_MASK_PSTATE) {
  560. __u8 opcode[6];
  561. get_user(*((__u16 *) opcode), location);
  562. switch (opcode[0]) {
  563. case 0x28: /* LDR Rx,Ry */
  564. signal = math_emu_ldr(opcode);
  565. break;
  566. case 0x38: /* LER Rx,Ry */
  567. signal = math_emu_ler(opcode);
  568. break;
  569. case 0x60: /* STD R,D(X,B) */
  570. get_user(*((__u16 *) (opcode+2)), location+1);
  571. signal = math_emu_std(opcode, regs);
  572. break;
  573. case 0x68: /* LD R,D(X,B) */
  574. get_user(*((__u16 *) (opcode+2)), location+1);
  575. signal = math_emu_ld(opcode, regs);
  576. break;
  577. case 0x70: /* STE R,D(X,B) */
  578. get_user(*((__u16 *) (opcode+2)), location+1);
  579. signal = math_emu_ste(opcode, regs);
  580. break;
  581. case 0x78: /* LE R,D(X,B) */
  582. get_user(*((__u16 *) (opcode+2)), location+1);
  583. signal = math_emu_le(opcode, regs);
  584. break;
  585. case 0xb3:
  586. get_user(*((__u16 *) (opcode+2)), location+1);
  587. signal = math_emu_b3(opcode, regs);
  588. break;
  589. case 0xed:
  590. get_user(*((__u32 *) (opcode+2)),
  591. (__u32 __user *)(location+1));
  592. signal = math_emu_ed(opcode, regs);
  593. break;
  594. case 0xb2:
  595. if (opcode[1] == 0x99) {
  596. get_user(*((__u16 *) (opcode+2)), location+1);
  597. signal = math_emu_srnm(opcode, regs);
  598. } else if (opcode[1] == 0x9c) {
  599. get_user(*((__u16 *) (opcode+2)), location+1);
  600. signal = math_emu_stfpc(opcode, regs);
  601. } else if (opcode[1] == 0x9d) {
  602. get_user(*((__u16 *) (opcode+2)), location+1);
  603. signal = math_emu_lfpc(opcode, regs);
  604. } else
  605. signal = SIGILL;
  606. break;
  607. default:
  608. signal = SIGILL;
  609. break;
  610. }
  611. }
  612. #endif
  613. if (current->thread.fp_regs.fpc & FPC_DXC_MASK)
  614. signal = SIGFPE;
  615. else
  616. signal = SIGILL;
  617. if (signal == SIGFPE)
  618. do_fp_trap(regs, location,
  619. current->thread.fp_regs.fpc, interruption_code);
  620. else if (signal) {
  621. siginfo_t info;
  622. info.si_signo = signal;
  623. info.si_errno = 0;
  624. info.si_code = ILL_ILLOPN;
  625. info.si_addr = location;
  626. do_trap(interruption_code, signal,
  627. "data exception", regs, &info);
  628. }
  629. }
  630. static void space_switch_exception(struct pt_regs * regs, long int_code)
  631. {
  632. siginfo_t info;
  633. /* Set user psw back to home space mode. */
  634. if (regs->psw.mask & PSW_MASK_PSTATE)
  635. regs->psw.mask |= PSW_ASC_HOME;
  636. /* Send SIGILL. */
  637. info.si_signo = SIGILL;
  638. info.si_errno = 0;
  639. info.si_code = ILL_PRVOPC;
  640. info.si_addr = get_check_address(regs);
  641. do_trap(int_code, SIGILL, "space switch event", regs, &info);
  642. }
  643. asmlinkage void kernel_stack_overflow(struct pt_regs * regs)
  644. {
  645. bust_spinlocks(1);
  646. printk("Kernel stack overflow.\n");
  647. show_regs(regs);
  648. bust_spinlocks(0);
  649. panic("Corrupt kernel stack, can't continue.");
  650. }
  651. /* init is done in lowcore.S and head.S */
  652. void __init trap_init(void)
  653. {
  654. int i;
  655. for (i = 0; i < 128; i++)
  656. pgm_check_table[i] = &default_trap_handler;
  657. pgm_check_table[1] = &illegal_op;
  658. pgm_check_table[2] = &privileged_op;
  659. pgm_check_table[3] = &execute_exception;
  660. pgm_check_table[4] = &do_protection_exception;
  661. pgm_check_table[5] = &addressing_exception;
  662. pgm_check_table[6] = &specification_exception;
  663. pgm_check_table[7] = &data_exception;
  664. pgm_check_table[8] = &overflow_exception;
  665. pgm_check_table[9] = &divide_exception;
  666. pgm_check_table[0x0A] = &overflow_exception;
  667. pgm_check_table[0x0B] = &divide_exception;
  668. pgm_check_table[0x0C] = &hfp_overflow_exception;
  669. pgm_check_table[0x0D] = &hfp_underflow_exception;
  670. pgm_check_table[0x0E] = &hfp_significance_exception;
  671. pgm_check_table[0x0F] = &hfp_divide_exception;
  672. pgm_check_table[0x10] = &do_dat_exception;
  673. pgm_check_table[0x11] = &do_dat_exception;
  674. pgm_check_table[0x12] = &translation_exception;
  675. pgm_check_table[0x13] = &special_op_exception;
  676. #ifdef CONFIG_64BIT
  677. pgm_check_table[0x38] = &do_asce_exception;
  678. pgm_check_table[0x39] = &do_dat_exception;
  679. pgm_check_table[0x3A] = &do_dat_exception;
  680. pgm_check_table[0x3B] = &do_dat_exception;
  681. #endif /* CONFIG_64BIT */
  682. pgm_check_table[0x15] = &operand_exception;
  683. pgm_check_table[0x1C] = &space_switch_exception;
  684. pgm_check_table[0x1D] = &hfp_sqrt_exception;
  685. pfault_irq_init();
  686. }