sandpoint.h 2.3 KB

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  1. /*
  2. * Definitions for Motorola SPS Sandpoint Test Platform
  3. *
  4. * Author: Mark A. Greer
  5. * mgreer@mvista.com
  6. *
  7. * 2000-2003 (c) MontaVista, Software, Inc. This file is licensed under
  8. * the terms of the GNU General Public License version 2. This program
  9. * is licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. /*
  13. * Sandpoint uses the CHRP map (Map B).
  14. */
  15. #ifndef __PPC_PLATFORMS_SANDPOINT_H
  16. #define __PPC_PLATFORMS_SANDPOINT_H
  17. #include <asm/ppcboot.h>
  18. #if 0
  19. /* The Sandpoint X3 allows the IDE interrupt to be directly connected
  20. * from the Windbond (PCI INTC or INTD) to the serial EPIC. Someday
  21. * we should try this, but it was easier to use the existing 83c553
  22. * initialization than change it to route the different interrupts :-).
  23. * -- Dan
  24. */
  25. #define SANDPOINT_IDE_INT0 23 /* EPIC 7 */
  26. #define SANDPOINT_IDE_INT1 24 /* EPIC 8 */
  27. #endif
  28. /*
  29. * The sandpoint boards have processor modules that either have an 8240 or
  30. * an MPC107 host bridge on them. These bridges have an IDSEL line that allows
  31. * them to respond to PCI transactions as if they were a normal PCI devices.
  32. * However, the processor on the processor side of the bridge can not reach
  33. * out onto the PCI bus and then select the bridge or bad things will happen
  34. * (documented in the 8240 and 107 manuals).
  35. * Because of this, we always skip the bridge PCI device when accessing the
  36. * PCI bus. The PCI slot that the bridge occupies is defined by the macro
  37. * below.
  38. */
  39. #define SANDPOINT_HOST_BRIDGE_IDSEL 12
  40. /*
  41. * Serial defines.
  42. */
  43. #define SANDPOINT_SERIAL_0 0xfe0003f8
  44. #define SANDPOINT_SERIAL_1 0xfe0002f8
  45. #define RS_TABLE_SIZE 2
  46. /* Rate for the 1.8432 Mhz clock for the onboard serial chip */
  47. #define BASE_BAUD ( 1843200 / 16 )
  48. #define UART_CLK 1843200
  49. #ifdef CONFIG_SERIAL_DETECT_IRQ
  50. #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_AUTO_IRQ)
  51. #else
  52. #define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF)
  53. #endif
  54. #define STD_SERIAL_PORT_DFNS \
  55. { 0, BASE_BAUD, SANDPOINT_SERIAL_0, 4, STD_COM_FLAGS, /* ttyS0 */ \
  56. iomem_base: (u8 *)SANDPOINT_SERIAL_0, \
  57. io_type: SERIAL_IO_MEM }, \
  58. { 0, BASE_BAUD, SANDPOINT_SERIAL_1, 3, STD_COM_FLAGS, /* ttyS1 */ \
  59. iomem_base: (u8 *)SANDPOINT_SERIAL_1, \
  60. io_type: SERIAL_IO_MEM },
  61. #define SERIAL_PORT_DFNS \
  62. STD_SERIAL_PORT_DFNS
  63. #endif /* __PPC_PLATFORMS_SANDPOINT_H */