mpc86xx_hpcn.c 5.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249
  1. /*
  2. * MPC86xx HPCN board specific routines
  3. *
  4. * Recode: ZHANG WEI <wei.zhang@freescale.com>
  5. * Initial author: Xianghua Xiao <x.xiao@freescale.com>
  6. *
  7. * Copyright 2006 Freescale Semiconductor Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/pci.h>
  17. #include <linux/kdev_t.h>
  18. #include <linux/delay.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/of_platform.h>
  21. #include <asm/system.h>
  22. #include <asm/time.h>
  23. #include <asm/machdep.h>
  24. #include <asm/pci-bridge.h>
  25. #include <asm/mpc86xx.h>
  26. #include <asm/prom.h>
  27. #include <mm/mmu_decl.h>
  28. #include <asm/udbg.h>
  29. #include <asm/i8259.h>
  30. #include <asm/mpic.h>
  31. #include <sysdev/fsl_pci.h>
  32. #include <sysdev/fsl_soc.h>
  33. #include "mpc86xx.h"
  34. #undef DEBUG
  35. #ifdef DEBUG
  36. #define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
  37. #else
  38. #define DBG(fmt...) do { } while(0)
  39. #endif
  40. #ifdef CONFIG_PCI
  41. static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
  42. {
  43. unsigned int cascade_irq = i8259_irq();
  44. if (cascade_irq != NO_IRQ)
  45. generic_handle_irq(cascade_irq);
  46. desc->chip->eoi(irq);
  47. }
  48. #endif /* CONFIG_PCI */
  49. static void __init
  50. mpc86xx_hpcn_init_irq(void)
  51. {
  52. struct mpic *mpic1;
  53. struct device_node *np;
  54. struct resource res;
  55. #ifdef CONFIG_PCI
  56. struct device_node *cascade_node = NULL;
  57. int cascade_irq;
  58. #endif
  59. /* Determine PIC address. */
  60. np = of_find_node_by_type(NULL, "open-pic");
  61. if (np == NULL)
  62. return;
  63. of_address_to_resource(np, 0, &res);
  64. /* Alloc mpic structure and per isu has 16 INT entries. */
  65. mpic1 = mpic_alloc(np, res.start,
  66. MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
  67. 0, 256, " MPIC ");
  68. BUG_ON(mpic1 == NULL);
  69. mpic_init(mpic1);
  70. #ifdef CONFIG_PCI
  71. /* Initialize i8259 controller */
  72. for_each_node_by_type(np, "interrupt-controller")
  73. if (of_device_is_compatible(np, "chrp,iic")) {
  74. cascade_node = np;
  75. break;
  76. }
  77. if (cascade_node == NULL) {
  78. printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
  79. return;
  80. }
  81. cascade_irq = irq_of_parse_and_map(cascade_node, 0);
  82. if (cascade_irq == NO_IRQ) {
  83. printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
  84. return;
  85. }
  86. DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
  87. i8259_init(cascade_node, 0);
  88. of_node_put(cascade_node);
  89. set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
  90. #endif
  91. }
  92. #ifdef CONFIG_PCI
  93. extern int uses_fsl_uli_m1575;
  94. extern int uli_exclude_device(struct pci_controller *hose,
  95. u_char bus, u_char devfn);
  96. static int mpc86xx_exclude_device(struct pci_controller *hose,
  97. u_char bus, u_char devfn)
  98. {
  99. struct device_node* node;
  100. struct resource rsrc;
  101. node = hose->dn;
  102. of_address_to_resource(node, 0, &rsrc);
  103. if ((rsrc.start & 0xfffff) == 0x8000) {
  104. return uli_exclude_device(hose, bus, devfn);
  105. }
  106. return PCIBIOS_SUCCESSFUL;
  107. }
  108. #endif /* CONFIG_PCI */
  109. static void __init
  110. mpc86xx_hpcn_setup_arch(void)
  111. {
  112. #ifdef CONFIG_PCI
  113. struct device_node *np;
  114. #endif
  115. if (ppc_md.progress)
  116. ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
  117. #ifdef CONFIG_PCI
  118. for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
  119. struct resource rsrc;
  120. of_address_to_resource(np, 0, &rsrc);
  121. if ((rsrc.start & 0xfffff) == 0x8000)
  122. fsl_add_bridge(np, 1);
  123. else
  124. fsl_add_bridge(np, 0);
  125. }
  126. uses_fsl_uli_m1575 = 1;
  127. ppc_md.pci_exclude_device = mpc86xx_exclude_device;
  128. #endif
  129. printk("MPC86xx HPCN board from Freescale Semiconductor\n");
  130. #ifdef CONFIG_SMP
  131. mpc86xx_smp_init();
  132. #endif
  133. }
  134. static void
  135. mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
  136. {
  137. struct device_node *root;
  138. uint memsize = total_memory;
  139. const char *model = "";
  140. uint svid = mfspr(SPRN_SVR);
  141. seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
  142. root = of_find_node_by_path("/");
  143. if (root)
  144. model = of_get_property(root, "model", NULL);
  145. seq_printf(m, "Machine\t\t: %s\n", model);
  146. of_node_put(root);
  147. seq_printf(m, "SVR\t\t: 0x%x\n", svid);
  148. seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
  149. }
  150. /*
  151. * Called very early, device-tree isn't unflattened
  152. */
  153. static int __init mpc86xx_hpcn_probe(void)
  154. {
  155. unsigned long root = of_get_flat_dt_root();
  156. if (of_flat_dt_is_compatible(root, "fsl,mpc8641hpcn"))
  157. return 1; /* Looks good */
  158. /* Be nice and don't give silent boot death. Delete this in 2.6.27 */
  159. if (of_flat_dt_is_compatible(root, "mpc86xx")) {
  160. pr_warning("WARNING: your dts/dtb is old. You must update before the next kernel release\n");
  161. return 1;
  162. }
  163. return 0;
  164. }
  165. static long __init
  166. mpc86xx_time_init(void)
  167. {
  168. unsigned int temp;
  169. /* Set the time base to zero */
  170. mtspr(SPRN_TBWL, 0);
  171. mtspr(SPRN_TBWU, 0);
  172. temp = mfspr(SPRN_HID0);
  173. temp |= HID0_TBEN;
  174. mtspr(SPRN_HID0, temp);
  175. asm volatile("isync");
  176. return 0;
  177. }
  178. static __initdata struct of_device_id of_bus_ids[] = {
  179. { .compatible = "simple-bus", },
  180. {},
  181. };
  182. static int __init declare_of_platform_devices(void)
  183. {
  184. of_platform_bus_probe(NULL, of_bus_ids, NULL);
  185. return 0;
  186. }
  187. machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
  188. define_machine(mpc86xx_hpcn) {
  189. .name = "MPC86xx HPCN",
  190. .probe = mpc86xx_hpcn_probe,
  191. .setup_arch = mpc86xx_hpcn_setup_arch,
  192. .init_IRQ = mpc86xx_hpcn_init_irq,
  193. .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
  194. .get_irq = mpic_get_irq,
  195. .restart = fsl_rstcr_restart,
  196. .time_init = mpc86xx_time_init,
  197. .calibrate_decr = generic_calibrate_decr,
  198. .progress = udbg_progress,
  199. #ifdef CONFIG_PCI
  200. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  201. #endif
  202. };