generic.c 10.0 KB

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  1. /*
  2. * linux/arch/arm/mach-sa1100/generic.c
  3. *
  4. * Author: Nicolas Pitre
  5. *
  6. * Code common to all SA11x0 machines.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/pm.h>
  17. #include <linux/cpufreq.h>
  18. #include <linux/ioport.h>
  19. #include <linux/sched.h> /* just for sched_clock() - funny that */
  20. #include <linux/platform_device.h>
  21. #include <asm/div64.h>
  22. #include <asm/cnt32_to_63.h>
  23. #include <asm/hardware.h>
  24. #include <asm/system.h>
  25. #include <asm/pgtable.h>
  26. #include <asm/mach/map.h>
  27. #include <asm/mach/flash.h>
  28. #include <asm/irq.h>
  29. #include <asm/gpio.h>
  30. #include "generic.h"
  31. #define NR_FREQS 16
  32. /*
  33. * This table is setup for a 3.6864MHz Crystal.
  34. */
  35. static const unsigned short cclk_frequency_100khz[NR_FREQS] = {
  36. 590, /* 59.0 MHz */
  37. 737, /* 73.7 MHz */
  38. 885, /* 88.5 MHz */
  39. 1032, /* 103.2 MHz */
  40. 1180, /* 118.0 MHz */
  41. 1327, /* 132.7 MHz */
  42. 1475, /* 147.5 MHz */
  43. 1622, /* 162.2 MHz */
  44. 1769, /* 176.9 MHz */
  45. 1917, /* 191.7 MHz */
  46. 2064, /* 206.4 MHz */
  47. 2212, /* 221.2 MHz */
  48. 2359, /* 235.9 MHz */
  49. 2507, /* 250.7 MHz */
  50. 2654, /* 265.4 MHz */
  51. 2802 /* 280.2 MHz */
  52. };
  53. #if defined(CONFIG_CPU_FREQ_SA1100) || defined(CONFIG_CPU_FREQ_SA1110)
  54. /* rounds up(!) */
  55. unsigned int sa11x0_freq_to_ppcr(unsigned int khz)
  56. {
  57. int i;
  58. khz /= 100;
  59. for (i = 0; i < NR_FREQS; i++)
  60. if (cclk_frequency_100khz[i] >= khz)
  61. break;
  62. return i;
  63. }
  64. unsigned int sa11x0_ppcr_to_freq(unsigned int idx)
  65. {
  66. unsigned int freq = 0;
  67. if (idx < NR_FREQS)
  68. freq = cclk_frequency_100khz[idx] * 100;
  69. return freq;
  70. }
  71. /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on
  72. * this platform, anyway.
  73. */
  74. int sa11x0_verify_speed(struct cpufreq_policy *policy)
  75. {
  76. unsigned int tmp;
  77. if (policy->cpu)
  78. return -EINVAL;
  79. cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  80. /* make sure that at least one frequency is within the policy */
  81. tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100;
  82. if (tmp > policy->max)
  83. policy->max = tmp;
  84. cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq);
  85. return 0;
  86. }
  87. unsigned int sa11x0_getspeed(unsigned int cpu)
  88. {
  89. if (cpu)
  90. return 0;
  91. return cclk_frequency_100khz[PPCR & 0xf] * 100;
  92. }
  93. #else
  94. /*
  95. * We still need to provide this so building without cpufreq works.
  96. */
  97. unsigned int cpufreq_get(unsigned int cpu)
  98. {
  99. return cclk_frequency_100khz[PPCR & 0xf] * 100;
  100. }
  101. EXPORT_SYMBOL(cpufreq_get);
  102. #endif
  103. /*
  104. * This is the SA11x0 sched_clock implementation. This has
  105. * a resolution of 271ns, and a maximum value of 32025597s (370 days).
  106. *
  107. * The return value is guaranteed to be monotonic in that range as
  108. * long as there is always less than 582 seconds between successive
  109. * calls to this function.
  110. *
  111. * ( * 1E9 / 3686400 => * 78125 / 288)
  112. */
  113. unsigned long long sched_clock(void)
  114. {
  115. unsigned long long v = cnt32_to_63(OSCR);
  116. /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */
  117. v *= 78125<<1;
  118. do_div(v, 288<<1);
  119. return v;
  120. }
  121. /*
  122. * Default power-off for SA1100
  123. */
  124. static void sa1100_power_off(void)
  125. {
  126. mdelay(100);
  127. local_irq_disable();
  128. /* disable internal oscillator, float CS lines */
  129. PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
  130. /* enable wake-up on GPIO0 (Assabet...) */
  131. PWER = GFER = GRER = 1;
  132. /*
  133. * set scratchpad to zero, just in case it is used as a
  134. * restart address by the bootloader.
  135. */
  136. PSPR = 0;
  137. /* enter sleep mode */
  138. PMCR = PMCR_SF;
  139. }
  140. static struct resource sa11x0udc_resources[] = {
  141. [0] = {
  142. .start = 0x80000000,
  143. .end = 0x8000ffff,
  144. .flags = IORESOURCE_MEM,
  145. },
  146. };
  147. static u64 sa11x0udc_dma_mask = 0xffffffffUL;
  148. static struct platform_device sa11x0udc_device = {
  149. .name = "sa11x0-udc",
  150. .id = -1,
  151. .dev = {
  152. .dma_mask = &sa11x0udc_dma_mask,
  153. .coherent_dma_mask = 0xffffffff,
  154. },
  155. .num_resources = ARRAY_SIZE(sa11x0udc_resources),
  156. .resource = sa11x0udc_resources,
  157. };
  158. static struct resource sa11x0uart1_resources[] = {
  159. [0] = {
  160. .start = 0x80010000,
  161. .end = 0x8001ffff,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. };
  165. static struct platform_device sa11x0uart1_device = {
  166. .name = "sa11x0-uart",
  167. .id = 1,
  168. .num_resources = ARRAY_SIZE(sa11x0uart1_resources),
  169. .resource = sa11x0uart1_resources,
  170. };
  171. static struct resource sa11x0uart3_resources[] = {
  172. [0] = {
  173. .start = 0x80050000,
  174. .end = 0x8005ffff,
  175. .flags = IORESOURCE_MEM,
  176. },
  177. };
  178. static struct platform_device sa11x0uart3_device = {
  179. .name = "sa11x0-uart",
  180. .id = 3,
  181. .num_resources = ARRAY_SIZE(sa11x0uart3_resources),
  182. .resource = sa11x0uart3_resources,
  183. };
  184. static struct resource sa11x0mcp_resources[] = {
  185. [0] = {
  186. .start = 0x80060000,
  187. .end = 0x8006ffff,
  188. .flags = IORESOURCE_MEM,
  189. },
  190. };
  191. static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
  192. static struct platform_device sa11x0mcp_device = {
  193. .name = "sa11x0-mcp",
  194. .id = -1,
  195. .dev = {
  196. .dma_mask = &sa11x0mcp_dma_mask,
  197. .coherent_dma_mask = 0xffffffff,
  198. },
  199. .num_resources = ARRAY_SIZE(sa11x0mcp_resources),
  200. .resource = sa11x0mcp_resources,
  201. };
  202. void sa11x0_set_mcp_data(struct mcp_plat_data *data)
  203. {
  204. sa11x0mcp_device.dev.platform_data = data;
  205. }
  206. static struct resource sa11x0ssp_resources[] = {
  207. [0] = {
  208. .start = 0x80070000,
  209. .end = 0x8007ffff,
  210. .flags = IORESOURCE_MEM,
  211. },
  212. };
  213. static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
  214. static struct platform_device sa11x0ssp_device = {
  215. .name = "sa11x0-ssp",
  216. .id = -1,
  217. .dev = {
  218. .dma_mask = &sa11x0ssp_dma_mask,
  219. .coherent_dma_mask = 0xffffffff,
  220. },
  221. .num_resources = ARRAY_SIZE(sa11x0ssp_resources),
  222. .resource = sa11x0ssp_resources,
  223. };
  224. static struct resource sa11x0fb_resources[] = {
  225. [0] = {
  226. .start = 0xb0100000,
  227. .end = 0xb010ffff,
  228. .flags = IORESOURCE_MEM,
  229. },
  230. [1] = {
  231. .start = IRQ_LCD,
  232. .end = IRQ_LCD,
  233. .flags = IORESOURCE_IRQ,
  234. },
  235. };
  236. static struct platform_device sa11x0fb_device = {
  237. .name = "sa11x0-fb",
  238. .id = -1,
  239. .dev = {
  240. .coherent_dma_mask = 0xffffffff,
  241. },
  242. .num_resources = ARRAY_SIZE(sa11x0fb_resources),
  243. .resource = sa11x0fb_resources,
  244. };
  245. static struct platform_device sa11x0pcmcia_device = {
  246. .name = "sa11x0-pcmcia",
  247. .id = -1,
  248. };
  249. static struct platform_device sa11x0mtd_device = {
  250. .name = "flash",
  251. .id = -1,
  252. };
  253. void sa11x0_set_flash_data(struct flash_platform_data *flash,
  254. struct resource *res, int nr)
  255. {
  256. flash->name = "sa1100";
  257. sa11x0mtd_device.dev.platform_data = flash;
  258. sa11x0mtd_device.resource = res;
  259. sa11x0mtd_device.num_resources = nr;
  260. }
  261. static struct resource sa11x0ir_resources[] = {
  262. {
  263. .start = __PREG(Ser2UTCR0),
  264. .end = __PREG(Ser2UTCR0) + 0x24 - 1,
  265. .flags = IORESOURCE_MEM,
  266. }, {
  267. .start = __PREG(Ser2HSCR0),
  268. .end = __PREG(Ser2HSCR0) + 0x1c - 1,
  269. .flags = IORESOURCE_MEM,
  270. }, {
  271. .start = __PREG(Ser2HSCR2),
  272. .end = __PREG(Ser2HSCR2) + 0x04 - 1,
  273. .flags = IORESOURCE_MEM,
  274. }, {
  275. .start = IRQ_Ser2ICP,
  276. .end = IRQ_Ser2ICP,
  277. .flags = IORESOURCE_IRQ,
  278. }
  279. };
  280. static struct platform_device sa11x0ir_device = {
  281. .name = "sa11x0-ir",
  282. .id = -1,
  283. .num_resources = ARRAY_SIZE(sa11x0ir_resources),
  284. .resource = sa11x0ir_resources,
  285. };
  286. void sa11x0_set_irda_data(struct irda_platform_data *irda)
  287. {
  288. sa11x0ir_device.dev.platform_data = irda;
  289. }
  290. static struct platform_device sa11x0rtc_device = {
  291. .name = "sa1100-rtc",
  292. .id = -1,
  293. };
  294. static struct platform_device *sa11x0_devices[] __initdata = {
  295. &sa11x0udc_device,
  296. &sa11x0uart1_device,
  297. &sa11x0uart3_device,
  298. &sa11x0mcp_device,
  299. &sa11x0ssp_device,
  300. &sa11x0pcmcia_device,
  301. &sa11x0fb_device,
  302. &sa11x0mtd_device,
  303. &sa11x0rtc_device,
  304. };
  305. static int __init sa1100_init(void)
  306. {
  307. pm_power_off = sa1100_power_off;
  308. if (sa11x0ir_device.dev.platform_data)
  309. platform_device_register(&sa11x0ir_device);
  310. return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
  311. }
  312. arch_initcall(sa1100_init);
  313. void (*sa1100fb_backlight_power)(int on);
  314. void (*sa1100fb_lcd_power)(int on);
  315. EXPORT_SYMBOL(sa1100fb_backlight_power);
  316. EXPORT_SYMBOL(sa1100fb_lcd_power);
  317. /*
  318. * Common I/O mapping:
  319. *
  320. * Typically, static virtual address mappings are as follow:
  321. *
  322. * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
  323. * 0xf4000000-0xf4ffffff: SA-1111
  324. * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
  325. * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
  326. * 0xffff0000-0xffff0fff: SA1100 exception vectors
  327. * 0xffff2000-0xffff2fff: Minicache copy_user_page area
  328. *
  329. * Below 0xe8000000 is reserved for vm allocation.
  330. *
  331. * The machine specific code must provide the extra mapping beside the
  332. * default mapping provided here.
  333. */
  334. static struct map_desc standard_io_desc[] __initdata = {
  335. { /* PCM */
  336. .virtual = 0xf8000000,
  337. .pfn = __phys_to_pfn(0x80000000),
  338. .length = 0x00100000,
  339. .type = MT_DEVICE
  340. }, { /* SCM */
  341. .virtual = 0xfa000000,
  342. .pfn = __phys_to_pfn(0x90000000),
  343. .length = 0x00100000,
  344. .type = MT_DEVICE
  345. }, { /* MER */
  346. .virtual = 0xfc000000,
  347. .pfn = __phys_to_pfn(0xa0000000),
  348. .length = 0x00100000,
  349. .type = MT_DEVICE
  350. }, { /* LCD + DMA */
  351. .virtual = 0xfe000000,
  352. .pfn = __phys_to_pfn(0xb0000000),
  353. .length = 0x00200000,
  354. .type = MT_DEVICE
  355. },
  356. };
  357. void __init sa1100_map_io(void)
  358. {
  359. iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
  360. }
  361. /*
  362. * Disable the memory bus request/grant signals on the SA1110 to
  363. * ensure that we don't receive spurious memory requests. We set
  364. * the MBGNT signal false to ensure the SA1111 doesn't own the
  365. * SDRAM bus.
  366. */
  367. void __init sa1110_mb_disable(void)
  368. {
  369. unsigned long flags;
  370. local_irq_save(flags);
  371. PGSR &= ~GPIO_MBGNT;
  372. GPCR = GPIO_MBGNT;
  373. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  374. GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
  375. local_irq_restore(flags);
  376. }
  377. /*
  378. * If the system is going to use the SA-1111 DMA engines, set up
  379. * the memory bus request/grant pins.
  380. */
  381. void __devinit sa1110_mb_enable(void)
  382. {
  383. unsigned long flags;
  384. local_irq_save(flags);
  385. PGSR &= ~GPIO_MBGNT;
  386. GPCR = GPIO_MBGNT;
  387. GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
  388. GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
  389. TUCR |= TUCR_MR;
  390. local_irq_restore(flags);
  391. }