radeon_gem.c 13 KB

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  1. /*
  2. * Copyright 2008 Advanced Micro Devices, Inc.
  3. * Copyright 2008 Red Hat Inc.
  4. * Copyright 2009 Jerome Glisse.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors: Dave Airlie
  25. * Alex Deucher
  26. * Jerome Glisse
  27. */
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "radeon_drm.h"
  31. #include "radeon.h"
  32. int radeon_gem_object_init(struct drm_gem_object *obj)
  33. {
  34. BUG();
  35. return 0;
  36. }
  37. void radeon_gem_object_free(struct drm_gem_object *gobj)
  38. {
  39. struct radeon_bo *robj = gem_to_radeon_bo(gobj);
  40. if (robj) {
  41. radeon_bo_unref(&robj);
  42. }
  43. }
  44. int radeon_gem_object_create(struct radeon_device *rdev, int size,
  45. int alignment, int initial_domain,
  46. bool discardable, bool kernel,
  47. struct drm_gem_object **obj)
  48. {
  49. struct radeon_bo *robj;
  50. int r;
  51. *obj = NULL;
  52. /* At least align on page size */
  53. if (alignment < PAGE_SIZE) {
  54. alignment = PAGE_SIZE;
  55. }
  56. r = radeon_bo_create(rdev, size, alignment, kernel, initial_domain, &robj);
  57. if (r) {
  58. if (r != -ERESTARTSYS)
  59. DRM_ERROR("Failed to allocate GEM object (%d, %d, %u, %d)\n",
  60. size, initial_domain, alignment, r);
  61. return r;
  62. }
  63. *obj = &robj->gem_base;
  64. mutex_lock(&rdev->gem.mutex);
  65. list_add_tail(&robj->list, &rdev->gem.objects);
  66. mutex_unlock(&rdev->gem.mutex);
  67. return 0;
  68. }
  69. int radeon_gem_set_domain(struct drm_gem_object *gobj,
  70. uint32_t rdomain, uint32_t wdomain)
  71. {
  72. struct radeon_bo *robj;
  73. uint32_t domain;
  74. int r;
  75. /* FIXME: reeimplement */
  76. robj = gem_to_radeon_bo(gobj);
  77. /* work out where to validate the buffer to */
  78. domain = wdomain;
  79. if (!domain) {
  80. domain = rdomain;
  81. }
  82. if (!domain) {
  83. /* Do nothings */
  84. printk(KERN_WARNING "Set domain withou domain !\n");
  85. return 0;
  86. }
  87. if (domain == RADEON_GEM_DOMAIN_CPU) {
  88. /* Asking for cpu access wait for object idle */
  89. r = radeon_bo_wait(robj, NULL, false);
  90. if (r) {
  91. printk(KERN_ERR "Failed to wait for object !\n");
  92. return r;
  93. }
  94. }
  95. return 0;
  96. }
  97. int radeon_gem_init(struct radeon_device *rdev)
  98. {
  99. INIT_LIST_HEAD(&rdev->gem.objects);
  100. return 0;
  101. }
  102. void radeon_gem_fini(struct radeon_device *rdev)
  103. {
  104. radeon_bo_force_delete(rdev);
  105. }
  106. /*
  107. * Call from drm_gem_handle_create which appear in both new and open ioctl
  108. * case.
  109. */
  110. int radeon_gem_object_open(struct drm_gem_object *obj, struct drm_file *file_priv)
  111. {
  112. return 0;
  113. }
  114. void radeon_gem_object_close(struct drm_gem_object *obj,
  115. struct drm_file *file_priv)
  116. {
  117. struct radeon_bo *rbo = gem_to_radeon_bo(obj);
  118. struct radeon_device *rdev = rbo->rdev;
  119. struct radeon_fpriv *fpriv = file_priv->driver_priv;
  120. struct radeon_vm *vm = &fpriv->vm;
  121. struct radeon_bo_va *bo_va, *tmp;
  122. if (rdev->family < CHIP_CAYMAN) {
  123. return;
  124. }
  125. if (radeon_bo_reserve(rbo, false)) {
  126. return;
  127. }
  128. list_for_each_entry_safe(bo_va, tmp, &rbo->va, bo_list) {
  129. if (bo_va->vm == vm) {
  130. /* remove from this vm address space */
  131. mutex_lock(&vm->mutex);
  132. list_del(&bo_va->vm_list);
  133. mutex_unlock(&vm->mutex);
  134. list_del(&bo_va->bo_list);
  135. kfree(bo_va);
  136. }
  137. }
  138. radeon_bo_unreserve(rbo);
  139. }
  140. static int radeon_gem_handle_lockup(struct radeon_device *rdev, int r)
  141. {
  142. if (r == -EDEADLK) {
  143. radeon_mutex_lock(&rdev->cs_mutex);
  144. r = radeon_gpu_reset(rdev);
  145. if (!r)
  146. r = -EAGAIN;
  147. radeon_mutex_unlock(&rdev->cs_mutex);
  148. }
  149. return r;
  150. }
  151. /*
  152. * GEM ioctls.
  153. */
  154. int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
  155. struct drm_file *filp)
  156. {
  157. struct radeon_device *rdev = dev->dev_private;
  158. struct drm_radeon_gem_info *args = data;
  159. struct ttm_mem_type_manager *man;
  160. unsigned i;
  161. man = &rdev->mman.bdev.man[TTM_PL_VRAM];
  162. args->vram_size = rdev->mc.real_vram_size;
  163. args->vram_visible = (u64)man->size << PAGE_SHIFT;
  164. if (rdev->stollen_vga_memory)
  165. args->vram_visible -= radeon_bo_size(rdev->stollen_vga_memory);
  166. args->vram_visible -= radeon_fbdev_total_size(rdev);
  167. args->gart_size = rdev->mc.gtt_size - 4096 - RADEON_IB_POOL_SIZE*64*1024;
  168. for(i = 0; i < RADEON_NUM_RINGS; ++i)
  169. args->gart_size -= rdev->ring[i].ring_size;
  170. return 0;
  171. }
  172. int radeon_gem_pread_ioctl(struct drm_device *dev, void *data,
  173. struct drm_file *filp)
  174. {
  175. /* TODO: implement */
  176. DRM_ERROR("unimplemented %s\n", __func__);
  177. return -ENOSYS;
  178. }
  179. int radeon_gem_pwrite_ioctl(struct drm_device *dev, void *data,
  180. struct drm_file *filp)
  181. {
  182. /* TODO: implement */
  183. DRM_ERROR("unimplemented %s\n", __func__);
  184. return -ENOSYS;
  185. }
  186. int radeon_gem_create_ioctl(struct drm_device *dev, void *data,
  187. struct drm_file *filp)
  188. {
  189. struct radeon_device *rdev = dev->dev_private;
  190. struct drm_radeon_gem_create *args = data;
  191. struct drm_gem_object *gobj;
  192. uint32_t handle;
  193. int r;
  194. /* create a gem object to contain this object in */
  195. args->size = roundup(args->size, PAGE_SIZE);
  196. r = radeon_gem_object_create(rdev, args->size, args->alignment,
  197. args->initial_domain, false,
  198. false, &gobj);
  199. if (r) {
  200. r = radeon_gem_handle_lockup(rdev, r);
  201. return r;
  202. }
  203. r = drm_gem_handle_create(filp, gobj, &handle);
  204. /* drop reference from allocate - handle holds it now */
  205. drm_gem_object_unreference_unlocked(gobj);
  206. if (r) {
  207. r = radeon_gem_handle_lockup(rdev, r);
  208. return r;
  209. }
  210. args->handle = handle;
  211. return 0;
  212. }
  213. int radeon_gem_set_domain_ioctl(struct drm_device *dev, void *data,
  214. struct drm_file *filp)
  215. {
  216. /* transition the BO to a domain -
  217. * just validate the BO into a certain domain */
  218. struct drm_radeon_gem_set_domain *args = data;
  219. struct drm_gem_object *gobj;
  220. struct radeon_bo *robj;
  221. int r;
  222. /* for now if someone requests domain CPU -
  223. * just make sure the buffer is finished with */
  224. /* just do a BO wait for now */
  225. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  226. if (gobj == NULL) {
  227. return -ENOENT;
  228. }
  229. robj = gem_to_radeon_bo(gobj);
  230. r = radeon_gem_set_domain(gobj, args->read_domains, args->write_domain);
  231. drm_gem_object_unreference_unlocked(gobj);
  232. r = radeon_gem_handle_lockup(robj->rdev, r);
  233. return r;
  234. }
  235. int radeon_mode_dumb_mmap(struct drm_file *filp,
  236. struct drm_device *dev,
  237. uint32_t handle, uint64_t *offset_p)
  238. {
  239. struct drm_gem_object *gobj;
  240. struct radeon_bo *robj;
  241. gobj = drm_gem_object_lookup(dev, filp, handle);
  242. if (gobj == NULL) {
  243. return -ENOENT;
  244. }
  245. robj = gem_to_radeon_bo(gobj);
  246. *offset_p = radeon_bo_mmap_offset(robj);
  247. drm_gem_object_unreference_unlocked(gobj);
  248. return 0;
  249. }
  250. int radeon_gem_mmap_ioctl(struct drm_device *dev, void *data,
  251. struct drm_file *filp)
  252. {
  253. struct drm_radeon_gem_mmap *args = data;
  254. return radeon_mode_dumb_mmap(filp, dev, args->handle, &args->addr_ptr);
  255. }
  256. int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
  257. struct drm_file *filp)
  258. {
  259. struct drm_radeon_gem_busy *args = data;
  260. struct drm_gem_object *gobj;
  261. struct radeon_bo *robj;
  262. int r;
  263. uint32_t cur_placement = 0;
  264. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  265. if (gobj == NULL) {
  266. return -ENOENT;
  267. }
  268. robj = gem_to_radeon_bo(gobj);
  269. r = radeon_bo_wait(robj, &cur_placement, true);
  270. switch (cur_placement) {
  271. case TTM_PL_VRAM:
  272. args->domain = RADEON_GEM_DOMAIN_VRAM;
  273. break;
  274. case TTM_PL_TT:
  275. args->domain = RADEON_GEM_DOMAIN_GTT;
  276. break;
  277. case TTM_PL_SYSTEM:
  278. args->domain = RADEON_GEM_DOMAIN_CPU;
  279. default:
  280. break;
  281. }
  282. drm_gem_object_unreference_unlocked(gobj);
  283. r = radeon_gem_handle_lockup(robj->rdev, r);
  284. return r;
  285. }
  286. int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
  287. struct drm_file *filp)
  288. {
  289. struct drm_radeon_gem_wait_idle *args = data;
  290. struct drm_gem_object *gobj;
  291. struct radeon_bo *robj;
  292. int r;
  293. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  294. if (gobj == NULL) {
  295. return -ENOENT;
  296. }
  297. robj = gem_to_radeon_bo(gobj);
  298. r = radeon_bo_wait(robj, NULL, false);
  299. /* callback hw specific functions if any */
  300. if (robj->rdev->asic->ioctl_wait_idle)
  301. robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
  302. drm_gem_object_unreference_unlocked(gobj);
  303. r = radeon_gem_handle_lockup(robj->rdev, r);
  304. return r;
  305. }
  306. int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
  307. struct drm_file *filp)
  308. {
  309. struct drm_radeon_gem_set_tiling *args = data;
  310. struct drm_gem_object *gobj;
  311. struct radeon_bo *robj;
  312. int r = 0;
  313. DRM_DEBUG("%d \n", args->handle);
  314. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  315. if (gobj == NULL)
  316. return -ENOENT;
  317. robj = gem_to_radeon_bo(gobj);
  318. r = radeon_bo_set_tiling_flags(robj, args->tiling_flags, args->pitch);
  319. drm_gem_object_unreference_unlocked(gobj);
  320. return r;
  321. }
  322. int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
  323. struct drm_file *filp)
  324. {
  325. struct drm_radeon_gem_get_tiling *args = data;
  326. struct drm_gem_object *gobj;
  327. struct radeon_bo *rbo;
  328. int r = 0;
  329. DRM_DEBUG("\n");
  330. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  331. if (gobj == NULL)
  332. return -ENOENT;
  333. rbo = gem_to_radeon_bo(gobj);
  334. r = radeon_bo_reserve(rbo, false);
  335. if (unlikely(r != 0))
  336. goto out;
  337. radeon_bo_get_tiling_flags(rbo, &args->tiling_flags, &args->pitch);
  338. radeon_bo_unreserve(rbo);
  339. out:
  340. drm_gem_object_unreference_unlocked(gobj);
  341. return r;
  342. }
  343. int radeon_gem_va_ioctl(struct drm_device *dev, void *data,
  344. struct drm_file *filp)
  345. {
  346. struct drm_radeon_gem_va *args = data;
  347. struct drm_gem_object *gobj;
  348. struct radeon_device *rdev = dev->dev_private;
  349. struct radeon_fpriv *fpriv = filp->driver_priv;
  350. struct radeon_bo *rbo;
  351. struct radeon_bo_va *bo_va;
  352. u32 invalid_flags;
  353. int r = 0;
  354. if (!rdev->vm_manager.enabled) {
  355. args->operation = RADEON_VA_RESULT_ERROR;
  356. return -ENOTTY;
  357. }
  358. /* !! DONT REMOVE !!
  359. * We don't support vm_id yet, to be sure we don't have have broken
  360. * userspace, reject anyone trying to use non 0 value thus moving
  361. * forward we can use those fields without breaking existant userspace
  362. */
  363. if (args->vm_id) {
  364. args->operation = RADEON_VA_RESULT_ERROR;
  365. return -EINVAL;
  366. }
  367. if (args->offset < RADEON_VA_RESERVED_SIZE) {
  368. dev_err(&dev->pdev->dev,
  369. "offset 0x%lX is in reserved area 0x%X\n",
  370. (unsigned long)args->offset,
  371. RADEON_VA_RESERVED_SIZE);
  372. args->operation = RADEON_VA_RESULT_ERROR;
  373. return -EINVAL;
  374. }
  375. /* don't remove, we need to enforce userspace to set the snooped flag
  376. * otherwise we will endup with broken userspace and we won't be able
  377. * to enable this feature without adding new interface
  378. */
  379. invalid_flags = RADEON_VM_PAGE_VALID | RADEON_VM_PAGE_SYSTEM;
  380. if ((args->flags & invalid_flags)) {
  381. dev_err(&dev->pdev->dev, "invalid flags 0x%08X vs 0x%08X\n",
  382. args->flags, invalid_flags);
  383. args->operation = RADEON_VA_RESULT_ERROR;
  384. return -EINVAL;
  385. }
  386. if (!(args->flags & RADEON_VM_PAGE_SNOOPED)) {
  387. dev_err(&dev->pdev->dev, "only supported snooped mapping for now\n");
  388. args->operation = RADEON_VA_RESULT_ERROR;
  389. return -EINVAL;
  390. }
  391. switch (args->operation) {
  392. case RADEON_VA_MAP:
  393. case RADEON_VA_UNMAP:
  394. break;
  395. default:
  396. dev_err(&dev->pdev->dev, "unsupported operation %d\n",
  397. args->operation);
  398. args->operation = RADEON_VA_RESULT_ERROR;
  399. return -EINVAL;
  400. }
  401. gobj = drm_gem_object_lookup(dev, filp, args->handle);
  402. if (gobj == NULL) {
  403. args->operation = RADEON_VA_RESULT_ERROR;
  404. return -ENOENT;
  405. }
  406. rbo = gem_to_radeon_bo(gobj);
  407. r = radeon_bo_reserve(rbo, false);
  408. if (r) {
  409. args->operation = RADEON_VA_RESULT_ERROR;
  410. drm_gem_object_unreference_unlocked(gobj);
  411. return r;
  412. }
  413. switch (args->operation) {
  414. case RADEON_VA_MAP:
  415. bo_va = radeon_bo_va(rbo, &fpriv->vm);
  416. if (bo_va) {
  417. args->operation = RADEON_VA_RESULT_VA_EXIST;
  418. args->offset = bo_va->soffset;
  419. goto out;
  420. }
  421. r = radeon_vm_bo_add(rdev, &fpriv->vm, rbo,
  422. args->offset, args->flags);
  423. break;
  424. case RADEON_VA_UNMAP:
  425. r = radeon_vm_bo_rmv(rdev, &fpriv->vm, rbo);
  426. break;
  427. default:
  428. break;
  429. }
  430. args->operation = RADEON_VA_RESULT_OK;
  431. if (r) {
  432. args->operation = RADEON_VA_RESULT_ERROR;
  433. }
  434. out:
  435. radeon_bo_unreserve(rbo);
  436. drm_gem_object_unreference_unlocked(gobj);
  437. return r;
  438. }
  439. int radeon_mode_dumb_create(struct drm_file *file_priv,
  440. struct drm_device *dev,
  441. struct drm_mode_create_dumb *args)
  442. {
  443. struct radeon_device *rdev = dev->dev_private;
  444. struct drm_gem_object *gobj;
  445. uint32_t handle;
  446. int r;
  447. args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
  448. args->size = args->pitch * args->height;
  449. args->size = ALIGN(args->size, PAGE_SIZE);
  450. r = radeon_gem_object_create(rdev, args->size, 0,
  451. RADEON_GEM_DOMAIN_VRAM,
  452. false, ttm_bo_type_device,
  453. &gobj);
  454. if (r)
  455. return -ENOMEM;
  456. r = drm_gem_handle_create(file_priv, gobj, &handle);
  457. /* drop reference from allocate - handle holds it now */
  458. drm_gem_object_unreference_unlocked(gobj);
  459. if (r) {
  460. return r;
  461. }
  462. args->handle = handle;
  463. return 0;
  464. }
  465. int radeon_mode_dumb_destroy(struct drm_file *file_priv,
  466. struct drm_device *dev,
  467. uint32_t handle)
  468. {
  469. return drm_gem_handle_delete(file_priv, handle);
  470. }