max77693-private.h 6.7 KB

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  1. /*
  2. * max77693-private.h - Voltage regulator driver for the Maxim 77693
  3. *
  4. * Copyright (C) 2012 Samsung Electrnoics
  5. * SangYoung Son <hello.son@samsung.com>
  6. *
  7. * This program is not provided / owned by Maxim Integrated Products.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #ifndef __LINUX_MFD_MAX77693_PRIV_H
  24. #define __LINUX_MFD_MAX77693_PRIV_H
  25. #include <linux/i2c.h>
  26. #define MAX77693_NUM_IRQ_MUIC_REGS 3
  27. #define MAX77693_REG_INVALID (0xff)
  28. /* Slave addr = 0xCC: PMIC, Charger, Flash LED */
  29. enum max77693_pmic_reg {
  30. MAX77693_LED_REG_IFLASH1 = 0x00,
  31. MAX77693_LED_REG_IFLASH2 = 0x01,
  32. MAX77693_LED_REG_ITORCH = 0x02,
  33. MAX77693_LED_REG_ITORCHTIMER = 0x03,
  34. MAX77693_LED_REG_FLASH_TIMER = 0x04,
  35. MAX77693_LED_REG_FLASH_EN = 0x05,
  36. MAX77693_LED_REG_MAX_FLASH1 = 0x06,
  37. MAX77693_LED_REG_MAX_FLASH2 = 0x07,
  38. MAX77693_LED_REG_MAX_FLASH3 = 0x08,
  39. MAX77693_LED_REG_MAX_FLASH4 = 0x09,
  40. MAX77693_LED_REG_VOUT_CNTL = 0x0A,
  41. MAX77693_LED_REG_VOUT_FLASH1 = 0x0B,
  42. MAX77693_LED_REG_VOUT_FLASH2 = 0x0C,
  43. MAX77693_LED_REG_FLASH_INT = 0x0E,
  44. MAX77693_LED_REG_FLASH_INT_MASK = 0x0F,
  45. MAX77693_LED_REG_FLASH_INT_STATUS = 0x10,
  46. MAX77693_PMIC_REG_PMIC_ID1 = 0x20,
  47. MAX77693_PMIC_REG_PMIC_ID2 = 0x21,
  48. MAX77693_PMIC_REG_INTSRC = 0x22,
  49. MAX77693_PMIC_REG_INTSRC_MASK = 0x23,
  50. MAX77693_PMIC_REG_TOPSYS_INT = 0x24,
  51. MAX77693_PMIC_REG_TOPSYS_INT_MASK = 0x26,
  52. MAX77693_PMIC_REG_TOPSYS_STAT = 0x28,
  53. MAX77693_PMIC_REG_MAINCTRL1 = 0x2A,
  54. MAX77693_PMIC_REG_LSCNFG = 0x2B,
  55. MAX77693_CHG_REG_CHG_INT = 0xB0,
  56. MAX77693_CHG_REG_CHG_INT_MASK = 0xB1,
  57. MAX77693_CHG_REG_CHG_INT_OK = 0xB2,
  58. MAX77693_CHG_REG_CHG_DETAILS_00 = 0xB3,
  59. MAX77693_CHG_REG_CHG_DETAILS_01 = 0xB4,
  60. MAX77693_CHG_REG_CHG_DETAILS_02 = 0xB5,
  61. MAX77693_CHG_REG_CHG_DETAILS_03 = 0xB6,
  62. MAX77693_CHG_REG_CHG_CNFG_00 = 0xB7,
  63. MAX77693_CHG_REG_CHG_CNFG_01 = 0xB8,
  64. MAX77693_CHG_REG_CHG_CNFG_02 = 0xB9,
  65. MAX77693_CHG_REG_CHG_CNFG_03 = 0xBA,
  66. MAX77693_CHG_REG_CHG_CNFG_04 = 0xBB,
  67. MAX77693_CHG_REG_CHG_CNFG_05 = 0xBC,
  68. MAX77693_CHG_REG_CHG_CNFG_06 = 0xBD,
  69. MAX77693_CHG_REG_CHG_CNFG_07 = 0xBE,
  70. MAX77693_CHG_REG_CHG_CNFG_08 = 0xBF,
  71. MAX77693_CHG_REG_CHG_CNFG_09 = 0xC0,
  72. MAX77693_CHG_REG_CHG_CNFG_10 = 0xC1,
  73. MAX77693_CHG_REG_CHG_CNFG_11 = 0xC2,
  74. MAX77693_CHG_REG_CHG_CNFG_12 = 0xC3,
  75. MAX77693_CHG_REG_CHG_CNFG_13 = 0xC4,
  76. MAX77693_CHG_REG_CHG_CNFG_14 = 0xC5,
  77. MAX77693_CHG_REG_SAFEOUT_CTRL = 0xC6,
  78. MAX77693_PMIC_REG_END,
  79. };
  80. /* Slave addr = 0x4A: MUIC */
  81. enum max77693_muic_reg {
  82. MAX77693_MUIC_REG_ID = 0x00,
  83. MAX77693_MUIC_REG_INT1 = 0x01,
  84. MAX77693_MUIC_REG_INT2 = 0x02,
  85. MAX77693_MUIC_REG_INT3 = 0x03,
  86. MAX77693_MUIC_REG_STATUS1 = 0x04,
  87. MAX77693_MUIC_REG_STATUS2 = 0x05,
  88. MAX77693_MUIC_REG_STATUS3 = 0x06,
  89. MAX77693_MUIC_REG_INTMASK1 = 0x07,
  90. MAX77693_MUIC_REG_INTMASK2 = 0x08,
  91. MAX77693_MUIC_REG_INTMASK3 = 0x09,
  92. MAX77693_MUIC_REG_CDETCTRL1 = 0x0A,
  93. MAX77693_MUIC_REG_CDETCTRL2 = 0x0B,
  94. MAX77693_MUIC_REG_CTRL1 = 0x0C,
  95. MAX77693_MUIC_REG_CTRL2 = 0x0D,
  96. MAX77693_MUIC_REG_CTRL3 = 0x0E,
  97. MAX77693_MUIC_REG_END,
  98. };
  99. /* Slave addr = 0x90: Haptic */
  100. enum max77693_haptic_reg {
  101. MAX77693_HAPTIC_REG_STATUS = 0x00,
  102. MAX77693_HAPTIC_REG_CONFIG1 = 0x01,
  103. MAX77693_HAPTIC_REG_CONFIG2 = 0x02,
  104. MAX77693_HAPTIC_REG_CONFIG_CHNL = 0x03,
  105. MAX77693_HAPTIC_REG_CONFG_CYC1 = 0x04,
  106. MAX77693_HAPTIC_REG_CONFG_CYC2 = 0x05,
  107. MAX77693_HAPTIC_REG_CONFIG_PER1 = 0x06,
  108. MAX77693_HAPTIC_REG_CONFIG_PER2 = 0x07,
  109. MAX77693_HAPTIC_REG_CONFIG_PER3 = 0x08,
  110. MAX77693_HAPTIC_REG_CONFIG_PER4 = 0x09,
  111. MAX77693_HAPTIC_REG_CONFIG_DUTY1 = 0x0A,
  112. MAX77693_HAPTIC_REG_CONFIG_DUTY2 = 0x0B,
  113. MAX77693_HAPTIC_REG_CONFIG_PWM1 = 0x0C,
  114. MAX77693_HAPTIC_REG_CONFIG_PWM2 = 0x0D,
  115. MAX77693_HAPTIC_REG_CONFIG_PWM3 = 0x0E,
  116. MAX77693_HAPTIC_REG_CONFIG_PWM4 = 0x0F,
  117. MAX77693_HAPTIC_REG_REV = 0x10,
  118. MAX77693_HAPTIC_REG_END,
  119. };
  120. enum max77693_irq_source {
  121. LED_INT = 0,
  122. TOPSYS_INT,
  123. CHG_INT,
  124. MUIC_INT1,
  125. MUIC_INT2,
  126. MUIC_INT3,
  127. MAX77693_IRQ_GROUP_NR,
  128. };
  129. enum max77693_irq {
  130. /* PMIC - FLASH */
  131. MAX77693_LED_IRQ_FLED2_OPEN,
  132. MAX77693_LED_IRQ_FLED2_SHORT,
  133. MAX77693_LED_IRQ_FLED1_OPEN,
  134. MAX77693_LED_IRQ_FLED1_SHORT,
  135. MAX77693_LED_IRQ_MAX_FLASH,
  136. /* PMIC - TOPSYS */
  137. MAX77693_TOPSYS_IRQ_T120C_INT,
  138. MAX77693_TOPSYS_IRQ_T140C_INT,
  139. MAX77693_TOPSYS_IRQ_LOWSYS_INT,
  140. /* PMIC - Charger */
  141. MAX77693_CHG_IRQ_BYP_I,
  142. MAX77693_CHG_IRQ_THM_I,
  143. MAX77693_CHG_IRQ_BAT_I,
  144. MAX77693_CHG_IRQ_CHG_I,
  145. MAX77693_CHG_IRQ_CHGIN_I,
  146. /* MUIC INT1 */
  147. MAX77693_MUIC_IRQ_INT1_ADC,
  148. MAX77693_MUIC_IRQ_INT1_ADC_LOW,
  149. MAX77693_MUIC_IRQ_INT1_ADC_ERR,
  150. MAX77693_MUIC_IRQ_INT1_ADC1K,
  151. /* MUIC INT2 */
  152. MAX77693_MUIC_IRQ_INT2_CHGTYP,
  153. MAX77693_MUIC_IRQ_INT2_CHGDETREUN,
  154. MAX77693_MUIC_IRQ_INT2_DCDTMR,
  155. MAX77693_MUIC_IRQ_INT2_DXOVP,
  156. MAX77693_MUIC_IRQ_INT2_VBVOLT,
  157. MAX77693_MUIC_IRQ_INT2_VIDRM,
  158. /* MUIC INT3 */
  159. MAX77693_MUIC_IRQ_INT3_EOC,
  160. MAX77693_MUIC_IRQ_INT3_CGMBC,
  161. MAX77693_MUIC_IRQ_INT3_OVP,
  162. MAX77693_MUIC_IRQ_INT3_MBCCHG_ERR,
  163. MAX77693_MUIC_IRQ_INT3_CHG_ENABLED,
  164. MAX77693_MUIC_IRQ_INT3_BAT_DET,
  165. MAX77693_IRQ_NR,
  166. };
  167. struct max77693_dev {
  168. struct device *dev;
  169. struct i2c_client *i2c; /* 0xCC , PMIC, Charger, Flash LED */
  170. struct i2c_client *muic; /* 0x4A , MUIC */
  171. struct i2c_client *haptic; /* 0x90 , Haptic */
  172. int type;
  173. struct regmap *regmap;
  174. struct regmap *regmap_muic;
  175. struct regmap *regmap_haptic;
  176. struct irq_domain *irq_domain;
  177. int irq;
  178. int irq_gpio;
  179. bool wakeup;
  180. struct mutex irqlock;
  181. int irq_masks_cur[MAX77693_IRQ_GROUP_NR];
  182. int irq_masks_cache[MAX77693_IRQ_GROUP_NR];
  183. };
  184. enum max77693_types {
  185. TYPE_MAX77693,
  186. };
  187. extern int max77693_read_reg(struct regmap *map, u8 reg, u8 *dest);
  188. extern int max77693_bulk_read(struct regmap *map, u8 reg, int count,
  189. u8 *buf);
  190. extern int max77693_write_reg(struct regmap *map, u8 reg, u8 value);
  191. extern int max77693_bulk_write(struct regmap *map, u8 reg, int count,
  192. u8 *buf);
  193. extern int max77693_update_reg(struct regmap *map, u8 reg, u8 val, u8 mask);
  194. extern int max77693_irq_init(struct max77693_dev *max77686);
  195. extern void max77693_irq_exit(struct max77693_dev *max77686);
  196. extern int max77693_irq_resume(struct max77693_dev *max77686);
  197. #endif /* __LINUX_MFD_MAX77693_PRIV_H */