dma-mapping.c 18 KB

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  1. /*
  2. * linux/arch/arm/mm/dma-mapping.c
  3. *
  4. * Copyright (C) 2000-2004 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * DMA uncached mapping support.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/mm.h>
  14. #include <linux/gfp.h>
  15. #include <linux/errno.h>
  16. #include <linux/list.h>
  17. #include <linux/init.h>
  18. #include <linux/device.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/highmem.h>
  21. #include <linux/slab.h>
  22. #include <asm/memory.h>
  23. #include <asm/highmem.h>
  24. #include <asm/cacheflush.h>
  25. #include <asm/tlbflush.h>
  26. #include <asm/sizes.h>
  27. #include <asm/mach/arch.h>
  28. #include "mm.h"
  29. static u64 get_coherent_dma_mask(struct device *dev)
  30. {
  31. u64 mask = (u64)arm_dma_limit;
  32. if (dev) {
  33. mask = dev->coherent_dma_mask;
  34. /*
  35. * Sanity check the DMA mask - it must be non-zero, and
  36. * must be able to be satisfied by a DMA allocation.
  37. */
  38. if (mask == 0) {
  39. dev_warn(dev, "coherent DMA mask is unset\n");
  40. return 0;
  41. }
  42. if ((~mask) & (u64)arm_dma_limit) {
  43. dev_warn(dev, "coherent DMA mask %#llx is smaller "
  44. "than system GFP_DMA mask %#llx\n",
  45. mask, (u64)arm_dma_limit);
  46. return 0;
  47. }
  48. }
  49. return mask;
  50. }
  51. /*
  52. * Allocate a DMA buffer for 'dev' of size 'size' using the
  53. * specified gfp mask. Note that 'size' must be page aligned.
  54. */
  55. static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
  56. {
  57. unsigned long order = get_order(size);
  58. struct page *page, *p, *e;
  59. void *ptr;
  60. u64 mask = get_coherent_dma_mask(dev);
  61. #ifdef CONFIG_DMA_API_DEBUG
  62. u64 limit = (mask + 1) & ~mask;
  63. if (limit && size >= limit) {
  64. dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
  65. size, mask);
  66. return NULL;
  67. }
  68. #endif
  69. if (!mask)
  70. return NULL;
  71. if (mask < 0xffffffffULL)
  72. gfp |= GFP_DMA;
  73. page = alloc_pages(gfp, order);
  74. if (!page)
  75. return NULL;
  76. /*
  77. * Now split the huge page and free the excess pages
  78. */
  79. split_page(page, order);
  80. for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
  81. __free_page(p);
  82. /*
  83. * Ensure that the allocated pages are zeroed, and that any data
  84. * lurking in the kernel direct-mapped region is invalidated.
  85. */
  86. ptr = page_address(page);
  87. memset(ptr, 0, size);
  88. dmac_flush_range(ptr, ptr + size);
  89. outer_flush_range(__pa(ptr), __pa(ptr) + size);
  90. return page;
  91. }
  92. /*
  93. * Free a DMA buffer. 'size' must be page aligned.
  94. */
  95. static void __dma_free_buffer(struct page *page, size_t size)
  96. {
  97. struct page *e = page + (size >> PAGE_SHIFT);
  98. while (page < e) {
  99. __free_page(page);
  100. page++;
  101. }
  102. }
  103. #ifdef CONFIG_MMU
  104. #define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT)
  105. #define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT)
  106. /*
  107. * These are the page tables (2MB each) covering uncached, DMA consistent allocations
  108. */
  109. static pte_t **consistent_pte;
  110. #define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
  111. unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
  112. void __init init_consistent_dma_size(unsigned long size)
  113. {
  114. unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M);
  115. BUG_ON(consistent_pte); /* Check we're called before DMA region init */
  116. BUG_ON(base < VMALLOC_END);
  117. /* Grow region to accommodate specified size */
  118. if (base < consistent_base)
  119. consistent_base = base;
  120. }
  121. #include "vmregion.h"
  122. static struct arm_vmregion_head consistent_head = {
  123. .vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
  124. .vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
  125. .vm_end = CONSISTENT_END,
  126. };
  127. #ifdef CONFIG_HUGETLB_PAGE
  128. #error ARM Coherent DMA allocator does not (yet) support huge TLB
  129. #endif
  130. /*
  131. * Initialise the consistent memory allocation.
  132. */
  133. static int __init consistent_init(void)
  134. {
  135. int ret = 0;
  136. pgd_t *pgd;
  137. pud_t *pud;
  138. pmd_t *pmd;
  139. pte_t *pte;
  140. int i = 0;
  141. unsigned long base = consistent_base;
  142. unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
  143. consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
  144. if (!consistent_pte) {
  145. pr_err("%s: no memory\n", __func__);
  146. return -ENOMEM;
  147. }
  148. pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END);
  149. consistent_head.vm_start = base;
  150. do {
  151. pgd = pgd_offset(&init_mm, base);
  152. pud = pud_alloc(&init_mm, pgd, base);
  153. if (!pud) {
  154. pr_err("%s: no pud tables\n", __func__);
  155. ret = -ENOMEM;
  156. break;
  157. }
  158. pmd = pmd_alloc(&init_mm, pud, base);
  159. if (!pmd) {
  160. pr_err("%s: no pmd tables\n", __func__);
  161. ret = -ENOMEM;
  162. break;
  163. }
  164. WARN_ON(!pmd_none(*pmd));
  165. pte = pte_alloc_kernel(pmd, base);
  166. if (!pte) {
  167. pr_err("%s: no pte tables\n", __func__);
  168. ret = -ENOMEM;
  169. break;
  170. }
  171. consistent_pte[i++] = pte;
  172. base += PMD_SIZE;
  173. } while (base < CONSISTENT_END);
  174. return ret;
  175. }
  176. core_initcall(consistent_init);
  177. static void *
  178. __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot,
  179. const void *caller)
  180. {
  181. struct arm_vmregion *c;
  182. size_t align;
  183. int bit;
  184. if (!consistent_pte) {
  185. pr_err("%s: not initialised\n", __func__);
  186. dump_stack();
  187. return NULL;
  188. }
  189. /*
  190. * Align the virtual region allocation - maximum alignment is
  191. * a section size, minimum is a page size. This helps reduce
  192. * fragmentation of the DMA space, and also prevents allocations
  193. * smaller than a section from crossing a section boundary.
  194. */
  195. bit = fls(size - 1);
  196. if (bit > SECTION_SHIFT)
  197. bit = SECTION_SHIFT;
  198. align = 1 << bit;
  199. /*
  200. * Allocate a virtual address in the consistent mapping region.
  201. */
  202. c = arm_vmregion_alloc(&consistent_head, align, size,
  203. gfp & ~(__GFP_DMA | __GFP_HIGHMEM), caller);
  204. if (c) {
  205. pte_t *pte;
  206. int idx = CONSISTENT_PTE_INDEX(c->vm_start);
  207. u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
  208. pte = consistent_pte[idx] + off;
  209. c->vm_pages = page;
  210. do {
  211. BUG_ON(!pte_none(*pte));
  212. set_pte_ext(pte, mk_pte(page, prot), 0);
  213. page++;
  214. pte++;
  215. off++;
  216. if (off >= PTRS_PER_PTE) {
  217. off = 0;
  218. pte = consistent_pte[++idx];
  219. }
  220. } while (size -= PAGE_SIZE);
  221. dsb();
  222. return (void *)c->vm_start;
  223. }
  224. return NULL;
  225. }
  226. static void __dma_free_remap(void *cpu_addr, size_t size)
  227. {
  228. struct arm_vmregion *c;
  229. unsigned long addr;
  230. pte_t *ptep;
  231. int idx;
  232. u32 off;
  233. c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
  234. if (!c) {
  235. pr_err("%s: trying to free invalid coherent area: %p\n",
  236. __func__, cpu_addr);
  237. dump_stack();
  238. return;
  239. }
  240. if ((c->vm_end - c->vm_start) != size) {
  241. pr_err("%s: freeing wrong coherent size (%ld != %d)\n",
  242. __func__, c->vm_end - c->vm_start, size);
  243. dump_stack();
  244. size = c->vm_end - c->vm_start;
  245. }
  246. idx = CONSISTENT_PTE_INDEX(c->vm_start);
  247. off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
  248. ptep = consistent_pte[idx] + off;
  249. addr = c->vm_start;
  250. do {
  251. pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
  252. ptep++;
  253. addr += PAGE_SIZE;
  254. off++;
  255. if (off >= PTRS_PER_PTE) {
  256. off = 0;
  257. ptep = consistent_pte[++idx];
  258. }
  259. if (pte_none(pte) || !pte_present(pte))
  260. pr_crit("%s: bad page in kernel page table\n",
  261. __func__);
  262. } while (size -= PAGE_SIZE);
  263. flush_tlb_kernel_range(c->vm_start, c->vm_end);
  264. arm_vmregion_free(&consistent_head, c);
  265. }
  266. #else /* !CONFIG_MMU */
  267. #define __dma_alloc_remap(page, size, gfp, prot, c) page_address(page)
  268. #define __dma_free_remap(addr, size) do { } while (0)
  269. #endif /* CONFIG_MMU */
  270. static void *
  271. __dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
  272. pgprot_t prot, const void *caller)
  273. {
  274. struct page *page;
  275. void *addr;
  276. /*
  277. * Following is a work-around (a.k.a. hack) to prevent pages
  278. * with __GFP_COMP being passed to split_page() which cannot
  279. * handle them. The real problem is that this flag probably
  280. * should be 0 on ARM as it is not supported on this
  281. * platform; see CONFIG_HUGETLBFS.
  282. */
  283. gfp &= ~(__GFP_COMP);
  284. *handle = DMA_ERROR_CODE;
  285. size = PAGE_ALIGN(size);
  286. page = __dma_alloc_buffer(dev, size, gfp);
  287. if (!page)
  288. return NULL;
  289. if (!arch_is_coherent())
  290. addr = __dma_alloc_remap(page, size, gfp, prot, caller);
  291. else
  292. addr = page_address(page);
  293. if (addr)
  294. *handle = pfn_to_dma(dev, page_to_pfn(page));
  295. else
  296. __dma_free_buffer(page, size);
  297. return addr;
  298. }
  299. /*
  300. * Allocate DMA-coherent memory space and return both the kernel remapped
  301. * virtual and bus address for that space.
  302. */
  303. void *
  304. dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  305. {
  306. void *memory;
  307. if (dma_alloc_from_coherent(dev, size, handle, &memory))
  308. return memory;
  309. return __dma_alloc(dev, size, handle, gfp,
  310. pgprot_dmacoherent(pgprot_kernel),
  311. __builtin_return_address(0));
  312. }
  313. EXPORT_SYMBOL(dma_alloc_coherent);
  314. /*
  315. * Allocate a writecombining region, in much the same way as
  316. * dma_alloc_coherent above.
  317. */
  318. void *
  319. dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
  320. {
  321. return __dma_alloc(dev, size, handle, gfp,
  322. pgprot_writecombine(pgprot_kernel),
  323. __builtin_return_address(0));
  324. }
  325. EXPORT_SYMBOL(dma_alloc_writecombine);
  326. static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
  327. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  328. {
  329. int ret = -ENXIO;
  330. #ifdef CONFIG_MMU
  331. unsigned long user_size, kern_size;
  332. struct arm_vmregion *c;
  333. if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
  334. return ret;
  335. user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  336. c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
  337. if (c) {
  338. unsigned long off = vma->vm_pgoff;
  339. kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
  340. if (off < kern_size &&
  341. user_size <= (kern_size - off)) {
  342. ret = remap_pfn_range(vma, vma->vm_start,
  343. page_to_pfn(c->vm_pages) + off,
  344. user_size << PAGE_SHIFT,
  345. vma->vm_page_prot);
  346. }
  347. }
  348. #endif /* CONFIG_MMU */
  349. return ret;
  350. }
  351. int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
  352. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  353. {
  354. vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
  355. return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
  356. }
  357. EXPORT_SYMBOL(dma_mmap_coherent);
  358. int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
  359. void *cpu_addr, dma_addr_t dma_addr, size_t size)
  360. {
  361. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  362. return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
  363. }
  364. EXPORT_SYMBOL(dma_mmap_writecombine);
  365. /*
  366. * free a page as defined by the above mapping.
  367. * Must not be called with IRQs disabled.
  368. */
  369. void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
  370. {
  371. WARN_ON(irqs_disabled());
  372. if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
  373. return;
  374. size = PAGE_ALIGN(size);
  375. if (!arch_is_coherent())
  376. __dma_free_remap(cpu_addr, size);
  377. __dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);
  378. }
  379. EXPORT_SYMBOL(dma_free_coherent);
  380. /*
  381. * Make an area consistent for devices.
  382. * Note: Drivers should NOT use this function directly, as it will break
  383. * platforms with CONFIG_DMABOUNCE.
  384. * Use the driver DMA support - see dma-mapping.h (dma_sync_*)
  385. */
  386. void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,
  387. enum dma_data_direction dir)
  388. {
  389. unsigned long paddr;
  390. BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
  391. dmac_map_area(kaddr, size, dir);
  392. paddr = __pa(kaddr);
  393. if (dir == DMA_FROM_DEVICE) {
  394. outer_inv_range(paddr, paddr + size);
  395. } else {
  396. outer_clean_range(paddr, paddr + size);
  397. }
  398. /* FIXME: non-speculating: flush on bidirectional mappings? */
  399. }
  400. EXPORT_SYMBOL(___dma_single_cpu_to_dev);
  401. void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,
  402. enum dma_data_direction dir)
  403. {
  404. BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
  405. /* FIXME: non-speculating: not required */
  406. /* don't bother invalidating if DMA to device */
  407. if (dir != DMA_TO_DEVICE) {
  408. unsigned long paddr = __pa(kaddr);
  409. outer_inv_range(paddr, paddr + size);
  410. }
  411. dmac_unmap_area(kaddr, size, dir);
  412. }
  413. EXPORT_SYMBOL(___dma_single_dev_to_cpu);
  414. static void dma_cache_maint_page(struct page *page, unsigned long offset,
  415. size_t size, enum dma_data_direction dir,
  416. void (*op)(const void *, size_t, int))
  417. {
  418. /*
  419. * A single sg entry may refer to multiple physically contiguous
  420. * pages. But we still need to process highmem pages individually.
  421. * If highmem is not configured then the bulk of this loop gets
  422. * optimized out.
  423. */
  424. size_t left = size;
  425. do {
  426. size_t len = left;
  427. void *vaddr;
  428. if (PageHighMem(page)) {
  429. if (len + offset > PAGE_SIZE) {
  430. if (offset >= PAGE_SIZE) {
  431. page += offset / PAGE_SIZE;
  432. offset %= PAGE_SIZE;
  433. }
  434. len = PAGE_SIZE - offset;
  435. }
  436. vaddr = kmap_high_get(page);
  437. if (vaddr) {
  438. vaddr += offset;
  439. op(vaddr, len, dir);
  440. kunmap_high(page);
  441. } else if (cache_is_vipt()) {
  442. /* unmapped pages might still be cached */
  443. vaddr = kmap_atomic(page);
  444. op(vaddr + offset, len, dir);
  445. kunmap_atomic(vaddr);
  446. }
  447. } else {
  448. vaddr = page_address(page) + offset;
  449. op(vaddr, len, dir);
  450. }
  451. offset = 0;
  452. page++;
  453. left -= len;
  454. } while (left);
  455. }
  456. void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
  457. size_t size, enum dma_data_direction dir)
  458. {
  459. unsigned long paddr;
  460. dma_cache_maint_page(page, off, size, dir, dmac_map_area);
  461. paddr = page_to_phys(page) + off;
  462. if (dir == DMA_FROM_DEVICE) {
  463. outer_inv_range(paddr, paddr + size);
  464. } else {
  465. outer_clean_range(paddr, paddr + size);
  466. }
  467. /* FIXME: non-speculating: flush on bidirectional mappings? */
  468. }
  469. EXPORT_SYMBOL(___dma_page_cpu_to_dev);
  470. void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
  471. size_t size, enum dma_data_direction dir)
  472. {
  473. unsigned long paddr = page_to_phys(page) + off;
  474. /* FIXME: non-speculating: not required */
  475. /* don't bother invalidating if DMA to device */
  476. if (dir != DMA_TO_DEVICE)
  477. outer_inv_range(paddr, paddr + size);
  478. dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
  479. /*
  480. * Mark the D-cache clean for this page to avoid extra flushing.
  481. */
  482. if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
  483. set_bit(PG_dcache_clean, &page->flags);
  484. }
  485. EXPORT_SYMBOL(___dma_page_dev_to_cpu);
  486. /**
  487. * dma_map_sg - map a set of SG buffers for streaming mode DMA
  488. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  489. * @sg: list of buffers
  490. * @nents: number of buffers to map
  491. * @dir: DMA transfer direction
  492. *
  493. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  494. * This is the scatter-gather version of the dma_map_single interface.
  495. * Here the scatter gather list elements are each tagged with the
  496. * appropriate dma address and length. They are obtained via
  497. * sg_dma_{address,length}.
  498. *
  499. * Device ownership issues as mentioned for dma_map_single are the same
  500. * here.
  501. */
  502. int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  503. enum dma_data_direction dir)
  504. {
  505. struct scatterlist *s;
  506. int i, j;
  507. BUG_ON(!valid_dma_direction(dir));
  508. for_each_sg(sg, s, nents, i) {
  509. s->dma_address = __dma_map_page(dev, sg_page(s), s->offset,
  510. s->length, dir);
  511. if (dma_mapping_error(dev, s->dma_address))
  512. goto bad_mapping;
  513. }
  514. debug_dma_map_sg(dev, sg, nents, nents, dir);
  515. return nents;
  516. bad_mapping:
  517. for_each_sg(sg, s, i, j)
  518. __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
  519. return 0;
  520. }
  521. EXPORT_SYMBOL(dma_map_sg);
  522. /**
  523. * dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
  524. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  525. * @sg: list of buffers
  526. * @nents: number of buffers to unmap (same as was passed to dma_map_sg)
  527. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  528. *
  529. * Unmap a set of streaming mode DMA translations. Again, CPU access
  530. * rules concerning calls here are the same as for dma_unmap_single().
  531. */
  532. void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
  533. enum dma_data_direction dir)
  534. {
  535. struct scatterlist *s;
  536. int i;
  537. debug_dma_unmap_sg(dev, sg, nents, dir);
  538. for_each_sg(sg, s, nents, i)
  539. __dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
  540. }
  541. EXPORT_SYMBOL(dma_unmap_sg);
  542. /**
  543. * dma_sync_sg_for_cpu
  544. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  545. * @sg: list of buffers
  546. * @nents: number of buffers to map (returned from dma_map_sg)
  547. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  548. */
  549. void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
  550. int nents, enum dma_data_direction dir)
  551. {
  552. struct scatterlist *s;
  553. int i;
  554. for_each_sg(sg, s, nents, i) {
  555. if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s),
  556. sg_dma_len(s), dir))
  557. continue;
  558. __dma_page_dev_to_cpu(sg_page(s), s->offset,
  559. s->length, dir);
  560. }
  561. debug_dma_sync_sg_for_cpu(dev, sg, nents, dir);
  562. }
  563. EXPORT_SYMBOL(dma_sync_sg_for_cpu);
  564. /**
  565. * dma_sync_sg_for_device
  566. * @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
  567. * @sg: list of buffers
  568. * @nents: number of buffers to map (returned from dma_map_sg)
  569. * @dir: DMA transfer direction (same as was passed to dma_map_sg)
  570. */
  571. void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
  572. int nents, enum dma_data_direction dir)
  573. {
  574. struct scatterlist *s;
  575. int i;
  576. for_each_sg(sg, s, nents, i) {
  577. if (!dmabounce_sync_for_device(dev, sg_dma_address(s),
  578. sg_dma_len(s), dir))
  579. continue;
  580. __dma_page_cpu_to_dev(sg_page(s), s->offset,
  581. s->length, dir);
  582. }
  583. debug_dma_sync_sg_for_device(dev, sg, nents, dir);
  584. }
  585. EXPORT_SYMBOL(dma_sync_sg_for_device);
  586. /*
  587. * Return whether the given device DMA address mask can be supported
  588. * properly. For example, if your device can only drive the low 24-bits
  589. * during bus mastering, then you would pass 0x00ffffff as the mask
  590. * to this function.
  591. */
  592. int dma_supported(struct device *dev, u64 mask)
  593. {
  594. if (mask < (u64)arm_dma_limit)
  595. return 0;
  596. return 1;
  597. }
  598. EXPORT_SYMBOL(dma_supported);
  599. int dma_set_mask(struct device *dev, u64 dma_mask)
  600. {
  601. if (!dev->dma_mask || !dma_supported(dev, dma_mask))
  602. return -EIO;
  603. #ifndef CONFIG_DMABOUNCE
  604. *dev->dma_mask = dma_mask;
  605. #endif
  606. return 0;
  607. }
  608. EXPORT_SYMBOL(dma_set_mask);
  609. #define PREALLOC_DMA_DEBUG_ENTRIES 4096
  610. static int __init dma_debug_do_init(void)
  611. {
  612. #ifdef CONFIG_MMU
  613. arm_vmregion_create_proc("dma-mappings", &consistent_head);
  614. #endif
  615. dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
  616. return 0;
  617. }
  618. fs_initcall(dma_debug_do_init);