fsl_msi.c 12 KB

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  1. /*
  2. * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
  3. *
  4. * Author: Tony Li <tony.li@freescale.com>
  5. * Jason Jin <Jason.jin@freescale.com>
  6. *
  7. * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; version 2 of the
  12. * License.
  13. *
  14. */
  15. #include <linux/irq.h>
  16. #include <linux/bootmem.h>
  17. #include <linux/msi.h>
  18. #include <linux/pci.h>
  19. #include <linux/slab.h>
  20. #include <linux/of_platform.h>
  21. #include <sysdev/fsl_soc.h>
  22. #include <asm/prom.h>
  23. #include <asm/hw_irq.h>
  24. #include <asm/ppc-pci.h>
  25. #include <asm/mpic.h>
  26. #include "fsl_msi.h"
  27. #include "fsl_pci.h"
  28. LIST_HEAD(msi_head);
  29. struct fsl_msi_feature {
  30. u32 fsl_pic_ip;
  31. u32 msiir_offset; /* Offset of MSIIR, relative to start of MSIR bank */
  32. };
  33. struct fsl_msi_cascade_data {
  34. struct fsl_msi *msi_data;
  35. int index;
  36. };
  37. static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
  38. {
  39. return in_be32(base + (reg >> 2));
  40. }
  41. /*
  42. * We do not need this actually. The MSIR register has been read once
  43. * in the cascade interrupt. So, this MSI interrupt has been acked
  44. */
  45. static void fsl_msi_end_irq(struct irq_data *d)
  46. {
  47. }
  48. static struct irq_chip fsl_msi_chip = {
  49. .irq_mask = mask_msi_irq,
  50. .irq_unmask = unmask_msi_irq,
  51. .irq_ack = fsl_msi_end_irq,
  52. .name = "FSL-MSI",
  53. };
  54. static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
  55. irq_hw_number_t hw)
  56. {
  57. struct fsl_msi *msi_data = h->host_data;
  58. struct irq_chip *chip = &fsl_msi_chip;
  59. irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING);
  60. irq_set_chip_data(virq, msi_data);
  61. irq_set_chip_and_handler(virq, chip, handle_edge_irq);
  62. return 0;
  63. }
  64. static struct irq_host_ops fsl_msi_host_ops = {
  65. .map = fsl_msi_host_map,
  66. };
  67. static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
  68. {
  69. int rc;
  70. rc = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
  71. msi_data->irqhost->of_node);
  72. if (rc)
  73. return rc;
  74. rc = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
  75. if (rc < 0) {
  76. msi_bitmap_free(&msi_data->bitmap);
  77. return rc;
  78. }
  79. return 0;
  80. }
  81. static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
  82. {
  83. if (type == PCI_CAP_ID_MSIX)
  84. pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
  85. return 0;
  86. }
  87. static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
  88. {
  89. struct msi_desc *entry;
  90. struct fsl_msi *msi_data;
  91. list_for_each_entry(entry, &pdev->msi_list, list) {
  92. if (entry->irq == NO_IRQ)
  93. continue;
  94. msi_data = irq_get_chip_data(entry->irq);
  95. irq_set_msi_desc(entry->irq, NULL);
  96. msi_bitmap_free_hwirqs(&msi_data->bitmap,
  97. virq_to_hw(entry->irq), 1);
  98. irq_dispose_mapping(entry->irq);
  99. }
  100. return;
  101. }
  102. static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
  103. struct msi_msg *msg,
  104. struct fsl_msi *fsl_msi_data)
  105. {
  106. struct fsl_msi *msi_data = fsl_msi_data;
  107. struct pci_controller *hose = pci_bus_to_host(pdev->bus);
  108. u64 address; /* Physical address of the MSIIR */
  109. int len;
  110. const u64 *reg;
  111. /* If the msi-address-64 property exists, then use it */
  112. reg = of_get_property(hose->dn, "msi-address-64", &len);
  113. if (reg && (len == sizeof(u64)))
  114. address = be64_to_cpup(reg);
  115. else
  116. address = fsl_pci_immrbar_base(hose) + msi_data->msiir_offset;
  117. msg->address_lo = lower_32_bits(address);
  118. msg->address_hi = upper_32_bits(address);
  119. msg->data = hwirq;
  120. pr_debug("%s: allocated srs: %d, ibs: %d\n",
  121. __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
  122. }
  123. static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  124. {
  125. struct pci_controller *hose = pci_bus_to_host(pdev->bus);
  126. struct device_node *np;
  127. phandle phandle = 0;
  128. int rc, hwirq = -ENOMEM;
  129. unsigned int virq;
  130. struct msi_desc *entry;
  131. struct msi_msg msg;
  132. struct fsl_msi *msi_data;
  133. /*
  134. * If the PCI node has an fsl,msi property, then we need to use it
  135. * to find the specific MSI.
  136. */
  137. np = of_parse_phandle(hose->dn, "fsl,msi", 0);
  138. if (np) {
  139. if (of_device_is_compatible(np, "fsl,mpic-msi"))
  140. phandle = np->phandle;
  141. else {
  142. dev_err(&pdev->dev, "node %s has an invalid fsl,msi"
  143. " phandle\n", hose->dn->full_name);
  144. return -EINVAL;
  145. }
  146. }
  147. list_for_each_entry(entry, &pdev->msi_list, list) {
  148. /*
  149. * Loop over all the MSI devices until we find one that has an
  150. * available interrupt.
  151. */
  152. list_for_each_entry(msi_data, &msi_head, list) {
  153. /*
  154. * If the PCI node has an fsl,msi property, then we
  155. * restrict our search to the corresponding MSI node.
  156. * The simplest way is to skip over MSI nodes with the
  157. * wrong phandle. Under the Freescale hypervisor, this
  158. * has the additional benefit of skipping over MSI
  159. * nodes that are not mapped in the PAMU.
  160. */
  161. if (phandle && (phandle != msi_data->phandle))
  162. continue;
  163. hwirq = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
  164. if (hwirq >= 0)
  165. break;
  166. }
  167. if (hwirq < 0) {
  168. rc = hwirq;
  169. pr_debug("%s: fail allocating msi interrupt\n",
  170. __func__);
  171. goto out_free;
  172. }
  173. virq = irq_create_mapping(msi_data->irqhost, hwirq);
  174. if (virq == NO_IRQ) {
  175. pr_debug("%s: fail mapping hwirq 0x%x\n",
  176. __func__, hwirq);
  177. msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1);
  178. rc = -ENOSPC;
  179. goto out_free;
  180. }
  181. /* chip_data is msi_data via host->hostdata in host->map() */
  182. irq_set_msi_desc(virq, entry);
  183. fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
  184. write_msi_msg(virq, &msg);
  185. }
  186. return 0;
  187. out_free:
  188. /* free by the caller of this function */
  189. return rc;
  190. }
  191. static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
  192. {
  193. struct irq_chip *chip = irq_desc_get_chip(desc);
  194. struct irq_data *idata = irq_desc_get_irq_data(desc);
  195. unsigned int cascade_irq;
  196. struct fsl_msi *msi_data;
  197. int msir_index = -1;
  198. u32 msir_value = 0;
  199. u32 intr_index;
  200. u32 have_shift = 0;
  201. struct fsl_msi_cascade_data *cascade_data;
  202. cascade_data = irq_get_handler_data(irq);
  203. msi_data = cascade_data->msi_data;
  204. raw_spin_lock(&desc->lock);
  205. if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
  206. if (chip->irq_mask_ack)
  207. chip->irq_mask_ack(idata);
  208. else {
  209. chip->irq_mask(idata);
  210. chip->irq_ack(idata);
  211. }
  212. }
  213. if (unlikely(irqd_irq_inprogress(idata)))
  214. goto unlock;
  215. msir_index = cascade_data->index;
  216. if (msir_index >= NR_MSI_REG)
  217. cascade_irq = NO_IRQ;
  218. irqd_set_chained_irq_inprogress(idata);
  219. switch (msi_data->feature & FSL_PIC_IP_MASK) {
  220. case FSL_PIC_IP_MPIC:
  221. msir_value = fsl_msi_read(msi_data->msi_regs,
  222. msir_index * 0x10);
  223. break;
  224. case FSL_PIC_IP_IPIC:
  225. msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
  226. break;
  227. }
  228. while (msir_value) {
  229. intr_index = ffs(msir_value) - 1;
  230. cascade_irq = irq_linear_revmap(msi_data->irqhost,
  231. msir_index * IRQS_PER_MSI_REG +
  232. intr_index + have_shift);
  233. if (cascade_irq != NO_IRQ)
  234. generic_handle_irq(cascade_irq);
  235. have_shift += intr_index + 1;
  236. msir_value = msir_value >> (intr_index + 1);
  237. }
  238. irqd_clr_chained_irq_inprogress(idata);
  239. switch (msi_data->feature & FSL_PIC_IP_MASK) {
  240. case FSL_PIC_IP_MPIC:
  241. chip->irq_eoi(idata);
  242. break;
  243. case FSL_PIC_IP_IPIC:
  244. if (!irqd_irq_disabled(idata) && chip->irq_unmask)
  245. chip->irq_unmask(idata);
  246. break;
  247. }
  248. unlock:
  249. raw_spin_unlock(&desc->lock);
  250. }
  251. static int fsl_of_msi_remove(struct platform_device *ofdev)
  252. {
  253. struct fsl_msi *msi = platform_get_drvdata(ofdev);
  254. int virq, i;
  255. struct fsl_msi_cascade_data *cascade_data;
  256. if (msi->list.prev != NULL)
  257. list_del(&msi->list);
  258. for (i = 0; i < NR_MSI_REG; i++) {
  259. virq = msi->msi_virqs[i];
  260. if (virq != NO_IRQ) {
  261. cascade_data = irq_get_handler_data(virq);
  262. kfree(cascade_data);
  263. irq_dispose_mapping(virq);
  264. }
  265. }
  266. if (msi->bitmap.bitmap)
  267. msi_bitmap_free(&msi->bitmap);
  268. iounmap(msi->msi_regs);
  269. kfree(msi);
  270. return 0;
  271. }
  272. static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
  273. struct platform_device *dev,
  274. int offset, int irq_index)
  275. {
  276. struct fsl_msi_cascade_data *cascade_data = NULL;
  277. int virt_msir;
  278. virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
  279. if (virt_msir == NO_IRQ) {
  280. dev_err(&dev->dev, "%s: Cannot translate IRQ index %d\n",
  281. __func__, irq_index);
  282. return 0;
  283. }
  284. cascade_data = kzalloc(sizeof(struct fsl_msi_cascade_data), GFP_KERNEL);
  285. if (!cascade_data) {
  286. dev_err(&dev->dev, "No memory for MSI cascade data\n");
  287. return -ENOMEM;
  288. }
  289. msi->msi_virqs[irq_index] = virt_msir;
  290. cascade_data->index = offset;
  291. cascade_data->msi_data = msi;
  292. irq_set_handler_data(virt_msir, cascade_data);
  293. irq_set_chained_handler(virt_msir, fsl_msi_cascade);
  294. return 0;
  295. }
  296. static const struct of_device_id fsl_of_msi_ids[];
  297. static int __devinit fsl_of_msi_probe(struct platform_device *dev)
  298. {
  299. const struct of_device_id *match;
  300. struct fsl_msi *msi;
  301. struct resource res;
  302. int err, i, j, irq_index, count;
  303. int rc;
  304. const u32 *p;
  305. struct fsl_msi_feature *features;
  306. int len;
  307. u32 offset;
  308. static const u32 all_avail[] = { 0, NR_MSI_IRQS };
  309. match = of_match_device(fsl_of_msi_ids, &dev->dev);
  310. if (!match)
  311. return -EINVAL;
  312. features = match->data;
  313. printk(KERN_DEBUG "Setting up Freescale MSI support\n");
  314. msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
  315. if (!msi) {
  316. dev_err(&dev->dev, "No memory for MSI structure\n");
  317. return -ENOMEM;
  318. }
  319. platform_set_drvdata(dev, msi);
  320. msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR,
  321. NR_MSI_IRQS, &fsl_msi_host_ops, 0);
  322. if (msi->irqhost == NULL) {
  323. dev_err(&dev->dev, "No memory for MSI irqhost\n");
  324. err = -ENOMEM;
  325. goto error_out;
  326. }
  327. /* Get the MSI reg base */
  328. err = of_address_to_resource(dev->dev.of_node, 0, &res);
  329. if (err) {
  330. dev_err(&dev->dev, "%s resource error!\n",
  331. dev->dev.of_node->full_name);
  332. goto error_out;
  333. }
  334. msi->msi_regs = ioremap(res.start, resource_size(&res));
  335. if (!msi->msi_regs) {
  336. dev_err(&dev->dev, "ioremap problem failed\n");
  337. goto error_out;
  338. }
  339. msi->feature = features->fsl_pic_ip;
  340. msi->irqhost->host_data = msi;
  341. msi->msiir_offset = features->msiir_offset + (res.start & 0xfffff);
  342. /*
  343. * Remember the phandle, so that we can match with any PCI nodes
  344. * that have an "fsl,msi" property.
  345. */
  346. msi->phandle = dev->dev.of_node->phandle;
  347. rc = fsl_msi_init_allocator(msi);
  348. if (rc) {
  349. dev_err(&dev->dev, "Error allocating MSI bitmap\n");
  350. goto error_out;
  351. }
  352. p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
  353. if (p && len % (2 * sizeof(u32)) != 0) {
  354. dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
  355. __func__);
  356. err = -EINVAL;
  357. goto error_out;
  358. }
  359. if (!p) {
  360. p = all_avail;
  361. len = sizeof(all_avail);
  362. }
  363. for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
  364. if (p[i * 2] % IRQS_PER_MSI_REG ||
  365. p[i * 2 + 1] % IRQS_PER_MSI_REG) {
  366. printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
  367. __func__, dev->dev.of_node->full_name,
  368. p[i * 2 + 1], p[i * 2]);
  369. err = -EINVAL;
  370. goto error_out;
  371. }
  372. offset = p[i * 2] / IRQS_PER_MSI_REG;
  373. count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
  374. for (j = 0; j < count; j++, irq_index++) {
  375. err = fsl_msi_setup_hwirq(msi, dev, offset + j, irq_index);
  376. if (err)
  377. goto error_out;
  378. }
  379. }
  380. list_add_tail(&msi->list, &msi_head);
  381. /* The multiple setting ppc_md.setup_msi_irqs will not harm things */
  382. if (!ppc_md.setup_msi_irqs) {
  383. ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
  384. ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
  385. ppc_md.msi_check_device = fsl_msi_check_device;
  386. } else if (ppc_md.setup_msi_irqs != fsl_setup_msi_irqs) {
  387. dev_err(&dev->dev, "Different MSI driver already installed!\n");
  388. err = -ENODEV;
  389. goto error_out;
  390. }
  391. return 0;
  392. error_out:
  393. fsl_of_msi_remove(dev);
  394. return err;
  395. }
  396. static const struct fsl_msi_feature mpic_msi_feature = {
  397. .fsl_pic_ip = FSL_PIC_IP_MPIC,
  398. .msiir_offset = 0x140,
  399. };
  400. static const struct fsl_msi_feature ipic_msi_feature = {
  401. .fsl_pic_ip = FSL_PIC_IP_IPIC,
  402. .msiir_offset = 0x38,
  403. };
  404. static const struct of_device_id fsl_of_msi_ids[] = {
  405. {
  406. .compatible = "fsl,mpic-msi",
  407. .data = (void *)&mpic_msi_feature,
  408. },
  409. {
  410. .compatible = "fsl,ipic-msi",
  411. .data = (void *)&ipic_msi_feature,
  412. },
  413. {}
  414. };
  415. static struct platform_driver fsl_of_msi_driver = {
  416. .driver = {
  417. .name = "fsl-msi",
  418. .owner = THIS_MODULE,
  419. .of_match_table = fsl_of_msi_ids,
  420. },
  421. .probe = fsl_of_msi_probe,
  422. .remove = fsl_of_msi_remove,
  423. };
  424. static __init int fsl_of_msi_init(void)
  425. {
  426. return platform_driver_register(&fsl_of_msi_driver);
  427. }
  428. subsys_initcall(fsl_of_msi_init);