intel_lvds.c 31 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <acpi/button.h>
  30. #include <linux/dmi.h>
  31. #include <linux/i2c.h>
  32. #include <linux/slab.h>
  33. #include "drmP.h"
  34. #include "drm.h"
  35. #include "drm_crtc.h"
  36. #include "drm_edid.h"
  37. #include "intel_drv.h"
  38. #include "i915_drm.h"
  39. #include "i915_drv.h"
  40. #include <linux/acpi.h>
  41. /* Private structure for the integrated LVDS support */
  42. struct intel_lvds {
  43. struct intel_encoder base;
  44. struct edid *edid;
  45. int fitting_mode;
  46. u32 pfit_control;
  47. u32 pfit_pgm_ratios;
  48. bool pfit_dirty;
  49. struct drm_display_mode *fixed_mode;
  50. };
  51. static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  52. {
  53. return container_of(encoder, struct intel_lvds, base.base);
  54. }
  55. static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  56. {
  57. return container_of(intel_attached_encoder(connector),
  58. struct intel_lvds, base);
  59. }
  60. static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
  61. enum pipe *pipe)
  62. {
  63. struct drm_device *dev = encoder->base.dev;
  64. struct drm_i915_private *dev_priv = dev->dev_private;
  65. u32 lvds_reg, tmp;
  66. if (HAS_PCH_SPLIT(dev)) {
  67. lvds_reg = PCH_LVDS;
  68. } else {
  69. lvds_reg = LVDS;
  70. }
  71. tmp = I915_READ(lvds_reg);
  72. if (!(tmp & LVDS_PORT_EN))
  73. return false;
  74. if (HAS_PCH_CPT(dev))
  75. *pipe = PORT_TO_PIPE_CPT(tmp);
  76. else
  77. *pipe = PORT_TO_PIPE(tmp);
  78. return true;
  79. }
  80. /**
  81. * Sets the power state for the panel.
  82. */
  83. static void intel_enable_lvds(struct intel_encoder *encoder)
  84. {
  85. struct drm_device *dev = encoder->base.dev;
  86. struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  87. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  88. struct drm_i915_private *dev_priv = dev->dev_private;
  89. u32 ctl_reg, lvds_reg, stat_reg;
  90. if (HAS_PCH_SPLIT(dev)) {
  91. ctl_reg = PCH_PP_CONTROL;
  92. lvds_reg = PCH_LVDS;
  93. stat_reg = PCH_PP_STATUS;
  94. } else {
  95. ctl_reg = PP_CONTROL;
  96. lvds_reg = LVDS;
  97. stat_reg = PP_STATUS;
  98. }
  99. I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  100. if (intel_lvds->pfit_dirty) {
  101. /*
  102. * Enable automatic panel scaling so that non-native modes
  103. * fill the screen. The panel fitter should only be
  104. * adjusted whilst the pipe is disabled, according to
  105. * register description and PRM.
  106. */
  107. DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  108. intel_lvds->pfit_control,
  109. intel_lvds->pfit_pgm_ratios);
  110. I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
  111. I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
  112. intel_lvds->pfit_dirty = false;
  113. }
  114. I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
  115. POSTING_READ(lvds_reg);
  116. if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
  117. DRM_ERROR("timed out waiting for panel to power on\n");
  118. intel_panel_enable_backlight(dev, intel_crtc->pipe);
  119. }
  120. static void intel_disable_lvds(struct intel_encoder *encoder)
  121. {
  122. struct drm_device *dev = encoder->base.dev;
  123. struct intel_lvds *intel_lvds = to_intel_lvds(&encoder->base);
  124. struct drm_i915_private *dev_priv = dev->dev_private;
  125. u32 ctl_reg, lvds_reg, stat_reg;
  126. if (HAS_PCH_SPLIT(dev)) {
  127. ctl_reg = PCH_PP_CONTROL;
  128. lvds_reg = PCH_LVDS;
  129. stat_reg = PCH_PP_STATUS;
  130. } else {
  131. ctl_reg = PP_CONTROL;
  132. lvds_reg = LVDS;
  133. stat_reg = PP_STATUS;
  134. }
  135. intel_panel_disable_backlight(dev);
  136. I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
  137. if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
  138. DRM_ERROR("timed out waiting for panel to power off\n");
  139. if (intel_lvds->pfit_control) {
  140. I915_WRITE(PFIT_CONTROL, 0);
  141. intel_lvds->pfit_dirty = true;
  142. }
  143. I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
  144. POSTING_READ(lvds_reg);
  145. }
  146. static int intel_lvds_mode_valid(struct drm_connector *connector,
  147. struct drm_display_mode *mode)
  148. {
  149. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  150. struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
  151. if (mode->hdisplay > fixed_mode->hdisplay)
  152. return MODE_PANEL;
  153. if (mode->vdisplay > fixed_mode->vdisplay)
  154. return MODE_PANEL;
  155. return MODE_OK;
  156. }
  157. static void
  158. centre_horizontally(struct drm_display_mode *mode,
  159. int width)
  160. {
  161. u32 border, sync_pos, blank_width, sync_width;
  162. /* keep the hsync and hblank widths constant */
  163. sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
  164. blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
  165. sync_pos = (blank_width - sync_width + 1) / 2;
  166. border = (mode->hdisplay - width + 1) / 2;
  167. border += border & 1; /* make the border even */
  168. mode->crtc_hdisplay = width;
  169. mode->crtc_hblank_start = width + border;
  170. mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
  171. mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
  172. mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
  173. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  174. }
  175. static void
  176. centre_vertically(struct drm_display_mode *mode,
  177. int height)
  178. {
  179. u32 border, sync_pos, blank_width, sync_width;
  180. /* keep the vsync and vblank widths constant */
  181. sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
  182. blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
  183. sync_pos = (blank_width - sync_width + 1) / 2;
  184. border = (mode->vdisplay - height + 1) / 2;
  185. mode->crtc_vdisplay = height;
  186. mode->crtc_vblank_start = height + border;
  187. mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
  188. mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
  189. mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
  190. mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
  191. }
  192. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  193. {
  194. /*
  195. * Floating point operation is not supported. So the FACTOR
  196. * is defined, which can avoid the floating point computation
  197. * when calculating the panel ratio.
  198. */
  199. #define ACCURACY 12
  200. #define FACTOR (1 << ACCURACY)
  201. u32 ratio = source * FACTOR / target;
  202. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  203. }
  204. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  205. const struct drm_display_mode *mode,
  206. struct drm_display_mode *adjusted_mode)
  207. {
  208. struct drm_device *dev = encoder->dev;
  209. struct drm_i915_private *dev_priv = dev->dev_private;
  210. struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
  211. struct intel_crtc *intel_crtc = intel_lvds->base.new_crtc;
  212. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  213. int pipe;
  214. /* Should never happen!! */
  215. if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
  216. DRM_ERROR("Can't support LVDS on pipe A\n");
  217. return false;
  218. }
  219. if (intel_encoder_check_is_cloned(&intel_lvds->base))
  220. return false;
  221. /*
  222. * We have timings from the BIOS for the panel, put them in
  223. * to the adjusted mode. The CRTC will be set up for this mode,
  224. * with the panel scaling set up to source from the H/VDisplay
  225. * of the original mode.
  226. */
  227. intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
  228. if (HAS_PCH_SPLIT(dev)) {
  229. intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
  230. mode, adjusted_mode);
  231. return true;
  232. }
  233. /* Native modes don't need fitting */
  234. if (adjusted_mode->hdisplay == mode->hdisplay &&
  235. adjusted_mode->vdisplay == mode->vdisplay)
  236. goto out;
  237. /* 965+ wants fuzzy fitting */
  238. if (INTEL_INFO(dev)->gen >= 4)
  239. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  240. PFIT_FILTER_FUZZY);
  241. /*
  242. * Enable automatic panel scaling for non-native modes so that they fill
  243. * the screen. Should be enabled before the pipe is enabled, according
  244. * to register description and PRM.
  245. * Change the value here to see the borders for debugging
  246. */
  247. for_each_pipe(pipe)
  248. I915_WRITE(BCLRPAT(pipe), 0);
  249. drm_mode_set_crtcinfo(adjusted_mode, 0);
  250. switch (intel_lvds->fitting_mode) {
  251. case DRM_MODE_SCALE_CENTER:
  252. /*
  253. * For centered modes, we have to calculate border widths &
  254. * heights and modify the values programmed into the CRTC.
  255. */
  256. centre_horizontally(adjusted_mode, mode->hdisplay);
  257. centre_vertically(adjusted_mode, mode->vdisplay);
  258. border = LVDS_BORDER_ENABLE;
  259. break;
  260. case DRM_MODE_SCALE_ASPECT:
  261. /* Scale but preserve the aspect ratio */
  262. if (INTEL_INFO(dev)->gen >= 4) {
  263. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  264. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  265. /* 965+ is easy, it does everything in hw */
  266. if (scaled_width > scaled_height)
  267. pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
  268. else if (scaled_width < scaled_height)
  269. pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
  270. else if (adjusted_mode->hdisplay != mode->hdisplay)
  271. pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  272. } else {
  273. u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
  274. u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
  275. /*
  276. * For earlier chips we have to calculate the scaling
  277. * ratio by hand and program it into the
  278. * PFIT_PGM_RATIO register
  279. */
  280. if (scaled_width > scaled_height) { /* pillar */
  281. centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
  282. border = LVDS_BORDER_ENABLE;
  283. if (mode->vdisplay != adjusted_mode->vdisplay) {
  284. u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
  285. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  286. bits << PFIT_VERT_SCALE_SHIFT);
  287. pfit_control |= (PFIT_ENABLE |
  288. VERT_INTERP_BILINEAR |
  289. HORIZ_INTERP_BILINEAR);
  290. }
  291. } else if (scaled_width < scaled_height) { /* letter */
  292. centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
  293. border = LVDS_BORDER_ENABLE;
  294. if (mode->hdisplay != adjusted_mode->hdisplay) {
  295. u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
  296. pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  297. bits << PFIT_VERT_SCALE_SHIFT);
  298. pfit_control |= (PFIT_ENABLE |
  299. VERT_INTERP_BILINEAR |
  300. HORIZ_INTERP_BILINEAR);
  301. }
  302. } else
  303. /* Aspects match, Let hw scale both directions */
  304. pfit_control |= (PFIT_ENABLE |
  305. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  306. VERT_INTERP_BILINEAR |
  307. HORIZ_INTERP_BILINEAR);
  308. }
  309. break;
  310. case DRM_MODE_SCALE_FULLSCREEN:
  311. /*
  312. * Full scaling, even if it changes the aspect ratio.
  313. * Fortunately this is all done for us in hw.
  314. */
  315. if (mode->vdisplay != adjusted_mode->vdisplay ||
  316. mode->hdisplay != adjusted_mode->hdisplay) {
  317. pfit_control |= PFIT_ENABLE;
  318. if (INTEL_INFO(dev)->gen >= 4)
  319. pfit_control |= PFIT_SCALING_AUTO;
  320. else
  321. pfit_control |= (VERT_AUTO_SCALE |
  322. VERT_INTERP_BILINEAR |
  323. HORIZ_AUTO_SCALE |
  324. HORIZ_INTERP_BILINEAR);
  325. }
  326. break;
  327. default:
  328. break;
  329. }
  330. out:
  331. /* If not enabling scaling, be consistent and always use 0. */
  332. if ((pfit_control & PFIT_ENABLE) == 0) {
  333. pfit_control = 0;
  334. pfit_pgm_ratios = 0;
  335. }
  336. /* Make sure pre-965 set dither correctly */
  337. if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
  338. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  339. if (pfit_control != intel_lvds->pfit_control ||
  340. pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
  341. intel_lvds->pfit_control = pfit_control;
  342. intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
  343. intel_lvds->pfit_dirty = true;
  344. }
  345. dev_priv->lvds_border_bits = border;
  346. /*
  347. * XXX: It would be nice to support lower refresh rates on the
  348. * panels to reduce power consumption, and perhaps match the
  349. * user's requested refresh rate.
  350. */
  351. return true;
  352. }
  353. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  354. struct drm_display_mode *mode,
  355. struct drm_display_mode *adjusted_mode)
  356. {
  357. /*
  358. * The LVDS pin pair will already have been turned on in the
  359. * intel_crtc_mode_set since it has a large impact on the DPLL
  360. * settings.
  361. */
  362. }
  363. /**
  364. * Detect the LVDS connection.
  365. *
  366. * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
  367. * connected and closed means disconnected. We also send hotplug events as
  368. * needed, using lid status notification from the input layer.
  369. */
  370. static enum drm_connector_status
  371. intel_lvds_detect(struct drm_connector *connector, bool force)
  372. {
  373. struct drm_device *dev = connector->dev;
  374. enum drm_connector_status status;
  375. status = intel_panel_detect(dev);
  376. if (status != connector_status_unknown)
  377. return status;
  378. return connector_status_connected;
  379. }
  380. /**
  381. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  382. */
  383. static int intel_lvds_get_modes(struct drm_connector *connector)
  384. {
  385. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  386. struct drm_device *dev = connector->dev;
  387. struct drm_display_mode *mode;
  388. if (intel_lvds->edid)
  389. return drm_add_edid_modes(connector, intel_lvds->edid);
  390. mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
  391. if (mode == NULL)
  392. return 0;
  393. drm_mode_probed_add(connector, mode);
  394. return 1;
  395. }
  396. static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
  397. {
  398. DRM_INFO("Skipping forced modeset for %s\n", id->ident);
  399. return 1;
  400. }
  401. /* The GPU hangs up on these systems if modeset is performed on LID open */
  402. static const struct dmi_system_id intel_no_modeset_on_lid[] = {
  403. {
  404. .callback = intel_no_modeset_on_lid_dmi_callback,
  405. .ident = "Toshiba Tecra A11",
  406. .matches = {
  407. DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
  408. DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
  409. },
  410. },
  411. { } /* terminating entry */
  412. };
  413. /*
  414. * Lid events. Note the use of 'modeset_on_lid':
  415. * - we set it on lid close, and reset it on open
  416. * - we use it as a "only once" bit (ie we ignore
  417. * duplicate events where it was already properly
  418. * set/reset)
  419. * - the suspend/resume paths will also set it to
  420. * zero, since they restore the mode ("lid open").
  421. */
  422. static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
  423. void *unused)
  424. {
  425. struct drm_i915_private *dev_priv =
  426. container_of(nb, struct drm_i915_private, lid_notifier);
  427. struct drm_device *dev = dev_priv->dev;
  428. struct drm_connector *connector = dev_priv->int_lvds_connector;
  429. if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
  430. return NOTIFY_OK;
  431. /*
  432. * check and update the status of LVDS connector after receiving
  433. * the LID nofication event.
  434. */
  435. if (connector)
  436. connector->status = connector->funcs->detect(connector,
  437. false);
  438. /* Don't force modeset on machines where it causes a GPU lockup */
  439. if (dmi_check_system(intel_no_modeset_on_lid))
  440. return NOTIFY_OK;
  441. if (!acpi_lid_open()) {
  442. dev_priv->modeset_on_lid = 1;
  443. return NOTIFY_OK;
  444. }
  445. if (!dev_priv->modeset_on_lid)
  446. return NOTIFY_OK;
  447. dev_priv->modeset_on_lid = 0;
  448. mutex_lock(&dev->mode_config.mutex);
  449. drm_helper_resume_force_mode(dev);
  450. mutex_unlock(&dev->mode_config.mutex);
  451. return NOTIFY_OK;
  452. }
  453. /**
  454. * intel_lvds_destroy - unregister and free LVDS structures
  455. * @connector: connector to free
  456. *
  457. * Unregister the DDC bus for this connector then free the driver private
  458. * structure.
  459. */
  460. static void intel_lvds_destroy(struct drm_connector *connector)
  461. {
  462. struct drm_device *dev = connector->dev;
  463. struct drm_i915_private *dev_priv = dev->dev_private;
  464. intel_panel_destroy_backlight(dev);
  465. if (dev_priv->lid_notifier.notifier_call)
  466. acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
  467. drm_sysfs_connector_remove(connector);
  468. drm_connector_cleanup(connector);
  469. kfree(connector);
  470. }
  471. static int intel_lvds_set_property(struct drm_connector *connector,
  472. struct drm_property *property,
  473. uint64_t value)
  474. {
  475. struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
  476. struct drm_device *dev = connector->dev;
  477. if (property == dev->mode_config.scaling_mode_property) {
  478. struct drm_crtc *crtc = intel_lvds->base.base.crtc;
  479. if (value == DRM_MODE_SCALE_NONE) {
  480. DRM_DEBUG_KMS("no scaling not supported\n");
  481. return -EINVAL;
  482. }
  483. if (intel_lvds->fitting_mode == value) {
  484. /* the LVDS scaling property is not changed */
  485. return 0;
  486. }
  487. intel_lvds->fitting_mode = value;
  488. if (crtc && crtc->enabled) {
  489. /*
  490. * If the CRTC is enabled, the display will be changed
  491. * according to the new panel fitting mode.
  492. */
  493. intel_set_mode(crtc, &crtc->mode,
  494. crtc->x, crtc->y, crtc->fb);
  495. }
  496. }
  497. return 0;
  498. }
  499. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  500. .mode_fixup = intel_lvds_mode_fixup,
  501. .mode_set = intel_lvds_mode_set,
  502. .disable = intel_encoder_noop,
  503. };
  504. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  505. .get_modes = intel_lvds_get_modes,
  506. .mode_valid = intel_lvds_mode_valid,
  507. .best_encoder = intel_best_encoder,
  508. };
  509. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  510. .dpms = intel_connector_dpms,
  511. .detect = intel_lvds_detect,
  512. .fill_modes = drm_helper_probe_single_connector_modes,
  513. .set_property = intel_lvds_set_property,
  514. .destroy = intel_lvds_destroy,
  515. };
  516. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  517. .destroy = intel_encoder_destroy,
  518. };
  519. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  520. {
  521. DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
  522. return 1;
  523. }
  524. /* These systems claim to have LVDS, but really don't */
  525. static const struct dmi_system_id intel_no_lvds[] = {
  526. {
  527. .callback = intel_no_lvds_dmi_callback,
  528. .ident = "Apple Mac Mini (Core series)",
  529. .matches = {
  530. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  531. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  532. },
  533. },
  534. {
  535. .callback = intel_no_lvds_dmi_callback,
  536. .ident = "Apple Mac Mini (Core 2 series)",
  537. .matches = {
  538. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  539. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  540. },
  541. },
  542. {
  543. .callback = intel_no_lvds_dmi_callback,
  544. .ident = "MSI IM-945GSE-A",
  545. .matches = {
  546. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  547. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  548. },
  549. },
  550. {
  551. .callback = intel_no_lvds_dmi_callback,
  552. .ident = "Dell Studio Hybrid",
  553. .matches = {
  554. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  555. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  556. },
  557. },
  558. {
  559. .callback = intel_no_lvds_dmi_callback,
  560. .ident = "Dell OptiPlex FX170",
  561. .matches = {
  562. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  563. DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
  564. },
  565. },
  566. {
  567. .callback = intel_no_lvds_dmi_callback,
  568. .ident = "AOpen Mini PC",
  569. .matches = {
  570. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  571. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  572. },
  573. },
  574. {
  575. .callback = intel_no_lvds_dmi_callback,
  576. .ident = "AOpen Mini PC MP915",
  577. .matches = {
  578. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  579. DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
  580. },
  581. },
  582. {
  583. .callback = intel_no_lvds_dmi_callback,
  584. .ident = "AOpen i915GMm-HFS",
  585. .matches = {
  586. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  587. DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
  588. },
  589. },
  590. {
  591. .callback = intel_no_lvds_dmi_callback,
  592. .ident = "AOpen i45GMx-I",
  593. .matches = {
  594. DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
  595. DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
  596. },
  597. },
  598. {
  599. .callback = intel_no_lvds_dmi_callback,
  600. .ident = "Aopen i945GTt-VFA",
  601. .matches = {
  602. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  603. },
  604. },
  605. {
  606. .callback = intel_no_lvds_dmi_callback,
  607. .ident = "Clientron U800",
  608. .matches = {
  609. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  610. DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
  611. },
  612. },
  613. {
  614. .callback = intel_no_lvds_dmi_callback,
  615. .ident = "Clientron E830",
  616. .matches = {
  617. DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
  618. DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
  619. },
  620. },
  621. {
  622. .callback = intel_no_lvds_dmi_callback,
  623. .ident = "Asus EeeBox PC EB1007",
  624. .matches = {
  625. DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
  626. DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
  627. },
  628. },
  629. {
  630. .callback = intel_no_lvds_dmi_callback,
  631. .ident = "Asus AT5NM10T-I",
  632. .matches = {
  633. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  634. DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
  635. },
  636. },
  637. {
  638. .callback = intel_no_lvds_dmi_callback,
  639. .ident = "Hewlett-Packard HP t5740e Thin Client",
  640. .matches = {
  641. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  642. DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
  643. },
  644. },
  645. {
  646. .callback = intel_no_lvds_dmi_callback,
  647. .ident = "Hewlett-Packard t5745",
  648. .matches = {
  649. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  650. DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
  651. },
  652. },
  653. {
  654. .callback = intel_no_lvds_dmi_callback,
  655. .ident = "Hewlett-Packard st5747",
  656. .matches = {
  657. DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
  658. DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
  659. },
  660. },
  661. {
  662. .callback = intel_no_lvds_dmi_callback,
  663. .ident = "MSI Wind Box DC500",
  664. .matches = {
  665. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  666. DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
  667. },
  668. },
  669. {
  670. .callback = intel_no_lvds_dmi_callback,
  671. .ident = "ZOTAC ZBOXSD-ID12/ID13",
  672. .matches = {
  673. DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
  674. DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
  675. },
  676. },
  677. { } /* terminating entry */
  678. };
  679. /**
  680. * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  681. * @dev: drm device
  682. * @connector: LVDS connector
  683. *
  684. * Find the reduced downclock for LVDS in EDID.
  685. */
  686. static void intel_find_lvds_downclock(struct drm_device *dev,
  687. struct drm_display_mode *fixed_mode,
  688. struct drm_connector *connector)
  689. {
  690. struct drm_i915_private *dev_priv = dev->dev_private;
  691. struct drm_display_mode *scan;
  692. int temp_downclock;
  693. temp_downclock = fixed_mode->clock;
  694. list_for_each_entry(scan, &connector->probed_modes, head) {
  695. /*
  696. * If one mode has the same resolution with the fixed_panel
  697. * mode while they have the different refresh rate, it means
  698. * that the reduced downclock is found for the LVDS. In such
  699. * case we can set the different FPx0/1 to dynamically select
  700. * between low and high frequency.
  701. */
  702. if (scan->hdisplay == fixed_mode->hdisplay &&
  703. scan->hsync_start == fixed_mode->hsync_start &&
  704. scan->hsync_end == fixed_mode->hsync_end &&
  705. scan->htotal == fixed_mode->htotal &&
  706. scan->vdisplay == fixed_mode->vdisplay &&
  707. scan->vsync_start == fixed_mode->vsync_start &&
  708. scan->vsync_end == fixed_mode->vsync_end &&
  709. scan->vtotal == fixed_mode->vtotal) {
  710. if (scan->clock < temp_downclock) {
  711. /*
  712. * The downclock is already found. But we
  713. * expect to find the lower downclock.
  714. */
  715. temp_downclock = scan->clock;
  716. }
  717. }
  718. }
  719. if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
  720. /* We found the downclock for LVDS. */
  721. dev_priv->lvds_downclock_avail = 1;
  722. dev_priv->lvds_downclock = temp_downclock;
  723. DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
  724. "Normal clock %dKhz, downclock %dKhz\n",
  725. fixed_mode->clock, temp_downclock);
  726. }
  727. }
  728. /*
  729. * Enumerate the child dev array parsed from VBT to check whether
  730. * the LVDS is present.
  731. * If it is present, return 1.
  732. * If it is not present, return false.
  733. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  734. */
  735. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  736. u8 *i2c_pin)
  737. {
  738. struct drm_i915_private *dev_priv = dev->dev_private;
  739. int i;
  740. if (!dev_priv->child_dev_num)
  741. return true;
  742. for (i = 0; i < dev_priv->child_dev_num; i++) {
  743. struct child_device_config *child = dev_priv->child_dev + i;
  744. /* If the device type is not LFP, continue.
  745. * We have to check both the new identifiers as well as the
  746. * old for compatibility with some BIOSes.
  747. */
  748. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  749. child->device_type != DEVICE_TYPE_LFP)
  750. continue;
  751. if (intel_gmbus_is_port_valid(child->i2c_pin))
  752. *i2c_pin = child->i2c_pin;
  753. /* However, we cannot trust the BIOS writers to populate
  754. * the VBT correctly. Since LVDS requires additional
  755. * information from AIM blocks, a non-zero addin offset is
  756. * a good indicator that the LVDS is actually present.
  757. */
  758. if (child->addin_offset)
  759. return true;
  760. /* But even then some BIOS writers perform some black magic
  761. * and instantiate the device without reference to any
  762. * additional data. Trust that if the VBT was written into
  763. * the OpRegion then they have validated the LVDS's existence.
  764. */
  765. if (dev_priv->opregion.vbt)
  766. return true;
  767. }
  768. return false;
  769. }
  770. static bool intel_lvds_supported(struct drm_device *dev)
  771. {
  772. /* With the introduction of the PCH we gained a dedicated
  773. * LVDS presence pin, use it. */
  774. if (HAS_PCH_SPLIT(dev))
  775. return true;
  776. /* Otherwise LVDS was only attached to mobile products,
  777. * except for the inglorious 830gm */
  778. return IS_MOBILE(dev) && !IS_I830(dev);
  779. }
  780. /**
  781. * intel_lvds_init - setup LVDS connectors on this device
  782. * @dev: drm device
  783. *
  784. * Create the connector, register the LVDS DDC bus, and try to figure out what
  785. * modes we can display on the LVDS panel (if present).
  786. */
  787. bool intel_lvds_init(struct drm_device *dev)
  788. {
  789. struct drm_i915_private *dev_priv = dev->dev_private;
  790. struct intel_lvds *intel_lvds;
  791. struct intel_encoder *intel_encoder;
  792. struct intel_connector *intel_connector;
  793. struct drm_connector *connector;
  794. struct drm_encoder *encoder;
  795. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  796. struct drm_crtc *crtc;
  797. u32 lvds;
  798. int pipe;
  799. u8 pin;
  800. if (!intel_lvds_supported(dev))
  801. return false;
  802. /* Skip init on machines we know falsely report LVDS */
  803. if (dmi_check_system(intel_no_lvds))
  804. return false;
  805. pin = GMBUS_PORT_PANEL;
  806. if (!lvds_is_present_in_vbt(dev, &pin)) {
  807. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  808. return false;
  809. }
  810. if (HAS_PCH_SPLIT(dev)) {
  811. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  812. return false;
  813. if (dev_priv->edp.support) {
  814. DRM_DEBUG_KMS("disable LVDS for eDP support\n");
  815. return false;
  816. }
  817. }
  818. intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
  819. if (!intel_lvds) {
  820. return false;
  821. }
  822. intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
  823. if (!intel_connector) {
  824. kfree(intel_lvds);
  825. return false;
  826. }
  827. if (!HAS_PCH_SPLIT(dev)) {
  828. intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
  829. }
  830. intel_encoder = &intel_lvds->base;
  831. encoder = &intel_encoder->base;
  832. connector = &intel_connector->base;
  833. drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
  834. DRM_MODE_CONNECTOR_LVDS);
  835. drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
  836. DRM_MODE_ENCODER_LVDS);
  837. intel_encoder->enable = intel_enable_lvds;
  838. intel_encoder->disable = intel_disable_lvds;
  839. intel_encoder->get_hw_state = intel_lvds_get_hw_state;
  840. intel_connector->get_hw_state = intel_connector_get_hw_state;
  841. intel_connector_attach_encoder(intel_connector, intel_encoder);
  842. intel_encoder->type = INTEL_OUTPUT_LVDS;
  843. intel_encoder->cloneable = false;
  844. if (HAS_PCH_SPLIT(dev))
  845. intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  846. else if (IS_GEN4(dev))
  847. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  848. else
  849. intel_encoder->crtc_mask = (1 << 1);
  850. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  851. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  852. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  853. connector->interlace_allowed = false;
  854. connector->doublescan_allowed = false;
  855. /* create the scaling mode property */
  856. drm_mode_create_scaling_mode_property(dev);
  857. /*
  858. * the initial panel fitting mode will be FULL_SCREEN.
  859. */
  860. drm_connector_attach_property(&intel_connector->base,
  861. dev->mode_config.scaling_mode_property,
  862. DRM_MODE_SCALE_ASPECT);
  863. intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
  864. /*
  865. * LVDS discovery:
  866. * 1) check for EDID on DDC
  867. * 2) check for VBT data
  868. * 3) check to see if LVDS is already on
  869. * if none of the above, no panel
  870. * 4) make sure lid is open
  871. * if closed, act like it's not there for now
  872. */
  873. /*
  874. * Attempt to get the fixed panel mode from DDC. Assume that the
  875. * preferred mode is the right one.
  876. */
  877. intel_lvds->edid = drm_get_edid(connector,
  878. intel_gmbus_get_adapter(dev_priv,
  879. pin));
  880. if (intel_lvds->edid) {
  881. if (drm_add_edid_modes(connector,
  882. intel_lvds->edid)) {
  883. drm_mode_connector_update_edid_property(connector,
  884. intel_lvds->edid);
  885. } else {
  886. kfree(intel_lvds->edid);
  887. intel_lvds->edid = NULL;
  888. }
  889. }
  890. if (!intel_lvds->edid) {
  891. /* Didn't get an EDID, so
  892. * Set wide sync ranges so we get all modes
  893. * handed to valid_mode for checking
  894. */
  895. connector->display_info.min_vfreq = 0;
  896. connector->display_info.max_vfreq = 200;
  897. connector->display_info.min_hfreq = 0;
  898. connector->display_info.max_hfreq = 200;
  899. }
  900. list_for_each_entry(scan, &connector->probed_modes, head) {
  901. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  902. intel_lvds->fixed_mode =
  903. drm_mode_duplicate(dev, scan);
  904. intel_find_lvds_downclock(dev,
  905. intel_lvds->fixed_mode,
  906. connector);
  907. goto out;
  908. }
  909. }
  910. /* Failed to get EDID, what about VBT? */
  911. if (dev_priv->lfp_lvds_vbt_mode) {
  912. intel_lvds->fixed_mode =
  913. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  914. if (intel_lvds->fixed_mode) {
  915. intel_lvds->fixed_mode->type |=
  916. DRM_MODE_TYPE_PREFERRED;
  917. goto out;
  918. }
  919. }
  920. /*
  921. * If we didn't get EDID, try checking if the panel is already turned
  922. * on. If so, assume that whatever is currently programmed is the
  923. * correct mode.
  924. */
  925. /* Ironlake: FIXME if still fail, not try pipe mode now */
  926. if (HAS_PCH_SPLIT(dev))
  927. goto failed;
  928. lvds = I915_READ(LVDS);
  929. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  930. crtc = intel_get_crtc_for_pipe(dev, pipe);
  931. if (crtc && (lvds & LVDS_PORT_EN)) {
  932. intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
  933. if (intel_lvds->fixed_mode) {
  934. intel_lvds->fixed_mode->type |=
  935. DRM_MODE_TYPE_PREFERRED;
  936. goto out;
  937. }
  938. }
  939. /* If we still don't have a mode after all that, give up. */
  940. if (!intel_lvds->fixed_mode)
  941. goto failed;
  942. out:
  943. /*
  944. * Unlock registers and just
  945. * leave them unlocked
  946. */
  947. if (HAS_PCH_SPLIT(dev)) {
  948. I915_WRITE(PCH_PP_CONTROL,
  949. I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
  950. } else {
  951. I915_WRITE(PP_CONTROL,
  952. I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
  953. }
  954. dev_priv->lid_notifier.notifier_call = intel_lid_notify;
  955. if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
  956. DRM_DEBUG_KMS("lid notifier registration failed\n");
  957. dev_priv->lid_notifier.notifier_call = NULL;
  958. }
  959. /* keep the LVDS connector */
  960. dev_priv->int_lvds_connector = connector;
  961. drm_sysfs_connector_add(connector);
  962. intel_panel_setup_backlight(dev);
  963. return true;
  964. failed:
  965. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  966. drm_connector_cleanup(connector);
  967. drm_encoder_cleanup(encoder);
  968. kfree(intel_lvds);
  969. kfree(intel_connector);
  970. return false;
  971. }