setup.c 17 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All rights reserved.
  7. */
  8. #include <linux/config.h>
  9. #include <linux/module.h>
  10. #include <linux/init.h>
  11. #include <linux/delay.h>
  12. #include <linux/kernel.h>
  13. #include <linux/kdev_t.h>
  14. #include <linux/string.h>
  15. #include <linux/tty.h>
  16. #include <linux/console.h>
  17. #include <linux/timex.h>
  18. #include <linux/sched.h>
  19. #include <linux/ioport.h>
  20. #include <linux/mm.h>
  21. #include <linux/serial.h>
  22. #include <linux/irq.h>
  23. #include <linux/bootmem.h>
  24. #include <linux/mmzone.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/acpi.h>
  27. #include <linux/compiler.h>
  28. #include <linux/sched.h>
  29. #include <linux/root_dev.h>
  30. #include <linux/nodemask.h>
  31. #include <linux/pm.h>
  32. #include <asm/io.h>
  33. #include <asm/sal.h>
  34. #include <asm/machvec.h>
  35. #include <asm/system.h>
  36. #include <asm/processor.h>
  37. #include <asm/vga.h>
  38. #include <asm/sn/arch.h>
  39. #include <asm/sn/addrs.h>
  40. #include <asm/sn/pda.h>
  41. #include <asm/sn/nodepda.h>
  42. #include <asm/sn/sn_cpuid.h>
  43. #include <asm/sn/simulator.h>
  44. #include <asm/sn/leds.h>
  45. #include <asm/sn/bte.h>
  46. #include <asm/sn/shub_mmr.h>
  47. #include <asm/sn/clksupport.h>
  48. #include <asm/sn/sn_sal.h>
  49. #include <asm/sn/geo.h>
  50. #include <asm/sn/sn_feature_sets.h>
  51. #include "xtalk/xwidgetdev.h"
  52. #include "xtalk/hubdev.h"
  53. #include <asm/sn/klconfig.h>
  54. DEFINE_PER_CPU(struct pda_s, pda_percpu);
  55. #define MAX_PHYS_MEMORY (1UL << 49) /* 1 TB */
  56. lboard_t *root_lboard[MAX_COMPACT_NODES];
  57. extern void bte_init_node(nodepda_t *, cnodeid_t);
  58. extern void sn_timer_init(void);
  59. extern unsigned long last_time_offset;
  60. extern void (*ia64_mark_idle) (int);
  61. extern void snidle(int);
  62. extern unsigned char acpi_kbd_controller_present;
  63. unsigned long sn_rtc_cycles_per_second;
  64. EXPORT_SYMBOL(sn_rtc_cycles_per_second);
  65. DEFINE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
  66. EXPORT_PER_CPU_SYMBOL(__sn_hub_info);
  67. DEFINE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
  68. EXPORT_PER_CPU_SYMBOL(__sn_cnodeid_to_nasid);
  69. DEFINE_PER_CPU(struct nodepda_s *, __sn_nodepda);
  70. EXPORT_PER_CPU_SYMBOL(__sn_nodepda);
  71. partid_t sn_partid = -1;
  72. EXPORT_SYMBOL(sn_partid);
  73. char sn_system_serial_number_string[128];
  74. EXPORT_SYMBOL(sn_system_serial_number_string);
  75. u64 sn_partition_serial_number;
  76. EXPORT_SYMBOL(sn_partition_serial_number);
  77. u8 sn_partition_id;
  78. EXPORT_SYMBOL(sn_partition_id);
  79. u8 sn_system_size;
  80. EXPORT_SYMBOL(sn_system_size);
  81. u8 sn_sharing_domain_size;
  82. EXPORT_SYMBOL(sn_sharing_domain_size);
  83. u8 sn_coherency_id;
  84. EXPORT_SYMBOL(sn_coherency_id);
  85. u8 sn_region_size;
  86. EXPORT_SYMBOL(sn_region_size);
  87. int sn_prom_type; /* 0=hardware, 1=medusa/realprom, 2=medusa/fakeprom */
  88. short physical_node_map[MAX_PHYSNODE_ID];
  89. static unsigned long sn_prom_features[MAX_PROM_FEATURE_SETS];
  90. EXPORT_SYMBOL(physical_node_map);
  91. int numionodes;
  92. static void sn_init_pdas(char **);
  93. static void scan_for_ionodes(void);
  94. static nodepda_t *nodepdaindr[MAX_COMPACT_NODES];
  95. /*
  96. * The format of "screen_info" is strange, and due to early i386-setup
  97. * code. This is just enough to make the console code think we're on a
  98. * VGA color display.
  99. */
  100. struct screen_info sn_screen_info = {
  101. .orig_x = 0,
  102. .orig_y = 0,
  103. .orig_video_mode = 3,
  104. .orig_video_cols = 80,
  105. .orig_video_ega_bx = 3,
  106. .orig_video_lines = 25,
  107. .orig_video_isVGA = 1,
  108. .orig_video_points = 16
  109. };
  110. /*
  111. * This is here so we can use the CMOS detection in ide-probe.c to
  112. * determine what drives are present. In theory, we don't need this
  113. * as the auto-detection could be done via ide-probe.c:do_probe() but
  114. * in practice that would be much slower, which is painful when
  115. * running in the simulator. Note that passing zeroes in DRIVE_INFO
  116. * is sufficient (the IDE driver will autodetect the drive geometry).
  117. */
  118. #ifdef CONFIG_IA64_GENERIC
  119. extern char drive_info[4 * 16];
  120. #else
  121. char drive_info[4 * 16];
  122. #endif
  123. /*
  124. * Get nasid of current cpu early in boot before nodepda is initialized
  125. */
  126. static int
  127. boot_get_nasid(void)
  128. {
  129. int nasid;
  130. if (ia64_sn_get_sapic_info(get_sapicid(), &nasid, NULL, NULL))
  131. BUG();
  132. return nasid;
  133. }
  134. /*
  135. * This routine can only be used during init, since
  136. * smp_boot_data is an init data structure.
  137. * We have to use smp_boot_data.cpu_phys_id to find
  138. * the physical id of the processor because the normal
  139. * cpu_physical_id() relies on data structures that
  140. * may not be initialized yet.
  141. */
  142. static int __init pxm_to_nasid(int pxm)
  143. {
  144. int i;
  145. int nid;
  146. nid = pxm_to_nid_map[pxm];
  147. for (i = 0; i < num_node_memblks; i++) {
  148. if (node_memblk[i].nid == nid) {
  149. return NASID_GET(node_memblk[i].start_paddr);
  150. }
  151. }
  152. return -1;
  153. }
  154. /**
  155. * early_sn_setup - early setup routine for SN platforms
  156. *
  157. * Sets up an initial console to aid debugging. Intended primarily
  158. * for bringup. See start_kernel() in init/main.c.
  159. */
  160. void __init early_sn_setup(void)
  161. {
  162. efi_system_table_t *efi_systab;
  163. efi_config_table_t *config_tables;
  164. struct ia64_sal_systab *sal_systab;
  165. struct ia64_sal_desc_entry_point *ep;
  166. char *p;
  167. int i, j;
  168. /*
  169. * Parse enough of the SAL tables to locate the SAL entry point. Since, console
  170. * IO on SN2 is done via SAL calls, early_printk won't work without this.
  171. *
  172. * This code duplicates some of the ACPI table parsing that is in efi.c & sal.c.
  173. * Any changes to those file may have to be made hereas well.
  174. */
  175. efi_systab = (efi_system_table_t *) __va(ia64_boot_param->efi_systab);
  176. config_tables = __va(efi_systab->tables);
  177. for (i = 0; i < efi_systab->nr_tables; i++) {
  178. if (efi_guidcmp(config_tables[i].guid, SAL_SYSTEM_TABLE_GUID) ==
  179. 0) {
  180. sal_systab = __va(config_tables[i].table);
  181. p = (char *)(sal_systab + 1);
  182. for (j = 0; j < sal_systab->entry_count; j++) {
  183. if (*p == SAL_DESC_ENTRY_POINT) {
  184. ep = (struct ia64_sal_desc_entry_point
  185. *)p;
  186. ia64_sal_handler_init(__va
  187. (ep->sal_proc),
  188. __va(ep->gp));
  189. return;
  190. }
  191. p += SAL_DESC_SIZE(*p);
  192. }
  193. }
  194. }
  195. /* Uh-oh, SAL not available?? */
  196. printk(KERN_ERR "failed to find SAL entry point\n");
  197. }
  198. extern int platform_intr_list[];
  199. extern nasid_t master_nasid;
  200. static int __initdata shub_1_1_found = 0;
  201. /*
  202. * sn_check_for_wars
  203. *
  204. * Set flag for enabling shub specific wars
  205. */
  206. static inline int __init is_shub_1_1(int nasid)
  207. {
  208. unsigned long id;
  209. int rev;
  210. if (is_shub2())
  211. return 0;
  212. id = REMOTE_HUB_L(nasid, SH1_SHUB_ID);
  213. rev = (id & SH1_SHUB_ID_REVISION_MASK) >> SH1_SHUB_ID_REVISION_SHFT;
  214. return rev <= 2;
  215. }
  216. static void __init sn_check_for_wars(void)
  217. {
  218. int cnode;
  219. if (is_shub2()) {
  220. /* none yet */
  221. } else {
  222. for_each_online_node(cnode) {
  223. if (is_shub_1_1(cnodeid_to_nasid(cnode)))
  224. shub_1_1_found = 1;
  225. }
  226. }
  227. }
  228. /**
  229. * sn_setup - SN platform setup routine
  230. * @cmdline_p: kernel command line
  231. *
  232. * Handles platform setup for SN machines. This includes determining
  233. * the RTC frequency (via a SAL call), initializing secondary CPUs, and
  234. * setting up per-node data areas. The console is also initialized here.
  235. */
  236. void __init sn_setup(char **cmdline_p)
  237. {
  238. long status, ticks_per_sec, drift;
  239. int pxm;
  240. u32 version = sn_sal_rev();
  241. extern void sn_cpu_init(void);
  242. ia64_sn_plat_set_error_handling_features(); // obsolete
  243. ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV);
  244. ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES);
  245. #if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
  246. /*
  247. * If there was a primary vga adapter identified through the
  248. * EFI PCDP table, make it the preferred console. Otherwise
  249. * zero out conswitchp.
  250. */
  251. if (vga_console_membase) {
  252. /* usable vga ... make tty0 the preferred default console */
  253. add_preferred_console("tty", 0, NULL);
  254. } else {
  255. printk(KERN_DEBUG "SGI: Disabling VGA console\n");
  256. #ifdef CONFIG_DUMMY_CONSOLE
  257. conswitchp = &dummy_con;
  258. #else
  259. conswitchp = NULL;
  260. #endif /* CONFIG_DUMMY_CONSOLE */
  261. }
  262. #endif /* def(CONFIG_VT) && def(CONFIG_VGA_CONSOLE) */
  263. MAX_DMA_ADDRESS = PAGE_OFFSET + MAX_PHYS_MEMORY;
  264. memset(physical_node_map, -1, sizeof(physical_node_map));
  265. for (pxm = 0; pxm < MAX_PXM_DOMAINS; pxm++)
  266. if (pxm_to_nid_map[pxm] != -1)
  267. physical_node_map[pxm_to_nasid(pxm)] =
  268. pxm_to_nid_map[pxm];
  269. /*
  270. * Old PROMs do not provide an ACPI FADT. Disable legacy keyboard
  271. * support here so we don't have to listen to failed keyboard probe
  272. * messages.
  273. */
  274. if (version <= 0x0209 && acpi_kbd_controller_present) {
  275. printk(KERN_INFO "Disabling legacy keyboard support as prom "
  276. "is too old and doesn't provide FADT\n");
  277. acpi_kbd_controller_present = 0;
  278. }
  279. printk("SGI SAL version %x.%02x\n", version >> 8, version & 0x00FF);
  280. master_nasid = boot_get_nasid();
  281. status =
  282. ia64_sal_freq_base(SAL_FREQ_BASE_REALTIME_CLOCK, &ticks_per_sec,
  283. &drift);
  284. if (status != 0 || ticks_per_sec < 100000) {
  285. printk(KERN_WARNING
  286. "unable to determine platform RTC clock frequency, guessing.\n");
  287. /* PROM gives wrong value for clock freq. so guess */
  288. sn_rtc_cycles_per_second = 1000000000000UL / 30000UL;
  289. } else
  290. sn_rtc_cycles_per_second = ticks_per_sec;
  291. platform_intr_list[ACPI_INTERRUPT_CPEI] = IA64_CPE_VECTOR;
  292. /*
  293. * we set the default root device to /dev/hda
  294. * to make simulation easy
  295. */
  296. ROOT_DEV = Root_HDA1;
  297. /*
  298. * Create the PDAs and NODEPDAs for all the cpus.
  299. */
  300. sn_init_pdas(cmdline_p);
  301. ia64_mark_idle = &snidle;
  302. /*
  303. * For the bootcpu, we do this here. All other cpus will make the
  304. * call as part of cpu_init in slave cpu initialization.
  305. */
  306. sn_cpu_init();
  307. #ifdef CONFIG_SMP
  308. init_smp_config();
  309. #endif
  310. screen_info = sn_screen_info;
  311. sn_timer_init();
  312. /*
  313. * set pm_power_off to a SAL call to allow
  314. * sn machines to power off. The SAL call can be replaced
  315. * by an ACPI interface call when ACPI is fully implemented
  316. * for sn.
  317. */
  318. pm_power_off = ia64_sn_power_down;
  319. }
  320. /**
  321. * sn_init_pdas - setup node data areas
  322. *
  323. * One time setup for Node Data Area. Called by sn_setup().
  324. */
  325. static void __init sn_init_pdas(char **cmdline_p)
  326. {
  327. cnodeid_t cnode;
  328. memset(sn_cnodeid_to_nasid, -1,
  329. sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
  330. for_each_online_node(cnode)
  331. sn_cnodeid_to_nasid[cnode] =
  332. pxm_to_nasid(nid_to_pxm_map[cnode]);
  333. numionodes = num_online_nodes();
  334. scan_for_ionodes();
  335. /*
  336. * Allocate & initalize the nodepda for each node.
  337. */
  338. for_each_online_node(cnode) {
  339. nodepdaindr[cnode] =
  340. alloc_bootmem_node(NODE_DATA(cnode), sizeof(nodepda_t));
  341. memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
  342. memset(nodepdaindr[cnode]->phys_cpuid, -1,
  343. sizeof(nodepdaindr[cnode]->phys_cpuid));
  344. }
  345. /*
  346. * Allocate & initialize nodepda for TIOs. For now, put them on node 0.
  347. */
  348. for (cnode = num_online_nodes(); cnode < numionodes; cnode++) {
  349. nodepdaindr[cnode] =
  350. alloc_bootmem_node(NODE_DATA(0), sizeof(nodepda_t));
  351. memset(nodepdaindr[cnode], 0, sizeof(nodepda_t));
  352. }
  353. /*
  354. * Now copy the array of nodepda pointers to each nodepda.
  355. */
  356. for (cnode = 0; cnode < numionodes; cnode++)
  357. memcpy(nodepdaindr[cnode]->pernode_pdaindr, nodepdaindr,
  358. sizeof(nodepdaindr));
  359. /*
  360. * Set up IO related platform-dependent nodepda fields.
  361. * The following routine actually sets up the hubinfo struct
  362. * in nodepda.
  363. */
  364. for_each_online_node(cnode) {
  365. bte_init_node(nodepdaindr[cnode], cnode);
  366. }
  367. /*
  368. * Initialize the per node hubdev. This includes IO Nodes and
  369. * headless/memless nodes.
  370. */
  371. for (cnode = 0; cnode < numionodes; cnode++) {
  372. hubdev_init_node(nodepdaindr[cnode], cnode);
  373. }
  374. }
  375. /**
  376. * sn_cpu_init - initialize per-cpu data areas
  377. * @cpuid: cpuid of the caller
  378. *
  379. * Called during cpu initialization on each cpu as it starts.
  380. * Currently, initializes the per-cpu data area for SNIA.
  381. * Also sets up a few fields in the nodepda. Also known as
  382. * platform_cpu_init() by the ia64 machvec code.
  383. */
  384. void __init sn_cpu_init(void)
  385. {
  386. int cpuid;
  387. int cpuphyid;
  388. int nasid;
  389. int subnode;
  390. int slice;
  391. int cnode;
  392. int i;
  393. static int wars_have_been_checked;
  394. if (smp_processor_id() == 0 && IS_MEDUSA()) {
  395. if (ia64_sn_is_fake_prom())
  396. sn_prom_type = 2;
  397. else
  398. sn_prom_type = 1;
  399. printk("Running on medusa with %s PROM\n", (sn_prom_type == 1) ? "real" : "fake");
  400. }
  401. memset(pda, 0, sizeof(pda));
  402. if (ia64_sn_get_sn_info(0, &sn_hub_info->shub2, &sn_hub_info->nasid_bitmask, &sn_hub_info->nasid_shift,
  403. &sn_system_size, &sn_sharing_domain_size, &sn_partition_id,
  404. &sn_coherency_id, &sn_region_size))
  405. BUG();
  406. sn_hub_info->as_shift = sn_hub_info->nasid_shift - 2;
  407. /*
  408. * The boot cpu makes this call again after platform initialization is
  409. * complete.
  410. */
  411. if (nodepdaindr[0] == NULL)
  412. return;
  413. for (i = 0; i < MAX_PROM_FEATURE_SETS; i++)
  414. if (ia64_sn_get_prom_feature_set(i, &sn_prom_features[i]) != 0)
  415. break;
  416. cpuid = smp_processor_id();
  417. cpuphyid = get_sapicid();
  418. if (ia64_sn_get_sapic_info(cpuphyid, &nasid, &subnode, &slice))
  419. BUG();
  420. for (i=0; i < MAX_NUMNODES; i++) {
  421. if (nodepdaindr[i]) {
  422. nodepdaindr[i]->phys_cpuid[cpuid].nasid = nasid;
  423. nodepdaindr[i]->phys_cpuid[cpuid].slice = slice;
  424. nodepdaindr[i]->phys_cpuid[cpuid].subnode = subnode;
  425. }
  426. }
  427. cnode = nasid_to_cnodeid(nasid);
  428. sn_nodepda = nodepdaindr[cnode];
  429. pda->led_address =
  430. (typeof(pda->led_address)) (LED0 + (slice << LED_CPU_SHIFT));
  431. pda->led_state = LED_ALWAYS_SET;
  432. pda->hb_count = HZ / 2;
  433. pda->hb_state = 0;
  434. pda->idle_flag = 0;
  435. if (cpuid != 0) {
  436. /* copy cpu 0's sn_cnodeid_to_nasid table to this cpu's */
  437. memcpy(sn_cnodeid_to_nasid,
  438. (&per_cpu(__sn_cnodeid_to_nasid, 0)),
  439. sizeof(__ia64_per_cpu_var(__sn_cnodeid_to_nasid)));
  440. }
  441. /*
  442. * Check for WARs.
  443. * Only needs to be done once, on BSP.
  444. * Has to be done after loop above, because it uses this cpu's
  445. * sn_cnodeid_to_nasid table which was just initialized if this
  446. * isn't cpu 0.
  447. * Has to be done before assignment below.
  448. */
  449. if (!wars_have_been_checked) {
  450. sn_check_for_wars();
  451. wars_have_been_checked = 1;
  452. }
  453. sn_hub_info->shub_1_1_found = shub_1_1_found;
  454. /*
  455. * Set up addresses of PIO/MEM write status registers.
  456. */
  457. {
  458. u64 pio1[] = {SH1_PIO_WRITE_STATUS_0, 0, SH1_PIO_WRITE_STATUS_1, 0};
  459. u64 pio2[] = {SH2_PIO_WRITE_STATUS_0, SH2_PIO_WRITE_STATUS_1,
  460. SH2_PIO_WRITE_STATUS_2, SH2_PIO_WRITE_STATUS_3};
  461. u64 *pio;
  462. pio = is_shub1() ? pio1 : pio2;
  463. pda->pio_write_status_addr = (volatile unsigned long *) LOCAL_MMR_ADDR(pio[slice]);
  464. pda->pio_write_status_val = is_shub1() ? SH_PIO_WRITE_STATUS_PENDING_WRITE_COUNT_MASK : 0;
  465. }
  466. /*
  467. * WAR addresses for SHUB 1.x.
  468. */
  469. if (local_node_data->active_cpu_count++ == 0 && is_shub1()) {
  470. int buddy_nasid;
  471. buddy_nasid =
  472. cnodeid_to_nasid(numa_node_id() ==
  473. num_online_nodes() - 1 ? 0 : numa_node_id() + 1);
  474. pda->pio_shub_war_cam_addr =
  475. (volatile unsigned long *)GLOBAL_MMR_ADDR(nasid,
  476. SH1_PI_CAM_CONTROL);
  477. }
  478. }
  479. /*
  480. * Scan klconfig for ionodes. Add the nasids to the
  481. * physical_node_map and the pda and increment numionodes.
  482. */
  483. static void __init scan_for_ionodes(void)
  484. {
  485. int nasid = 0;
  486. lboard_t *brd;
  487. /* fakeprom does not support klgraph */
  488. if (IS_RUNNING_ON_FAKE_PROM())
  489. return;
  490. /* Setup ionodes with memory */
  491. for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
  492. char *klgraph_header;
  493. cnodeid_t cnodeid;
  494. if (physical_node_map[nasid] == -1)
  495. continue;
  496. cnodeid = -1;
  497. klgraph_header = __va(ia64_sn_get_klconfig_addr(nasid));
  498. if (!klgraph_header) {
  499. BUG(); /* All nodes must have klconfig tables! */
  500. }
  501. cnodeid = nasid_to_cnodeid(nasid);
  502. root_lboard[cnodeid] = (lboard_t *)
  503. NODE_OFFSET_TO_LBOARD((nasid),
  504. ((kl_config_hdr_t
  505. *) (klgraph_header))->
  506. ch_board_info);
  507. }
  508. /* Scan headless/memless IO Nodes. */
  509. for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
  510. /* if there's no nasid, don't try to read the klconfig on the node */
  511. if (physical_node_map[nasid] == -1)
  512. continue;
  513. brd = find_lboard_any((lboard_t *)
  514. root_lboard[nasid_to_cnodeid(nasid)],
  515. KLTYPE_SNIA);
  516. if (brd) {
  517. brd = KLCF_NEXT_ANY(brd); /* Skip this node's lboard */
  518. if (!brd)
  519. continue;
  520. }
  521. brd = find_lboard_any(brd, KLTYPE_SNIA);
  522. while (brd) {
  523. sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
  524. physical_node_map[brd->brd_nasid] = numionodes;
  525. root_lboard[numionodes] = brd;
  526. numionodes++;
  527. brd = KLCF_NEXT_ANY(brd);
  528. if (!brd)
  529. break;
  530. brd = find_lboard_any(brd, KLTYPE_SNIA);
  531. }
  532. }
  533. /* Scan for TIO nodes. */
  534. for (nasid = 0; nasid < MAX_PHYSNODE_ID; nasid += 2) {
  535. /* if there's no nasid, don't try to read the klconfig on the node */
  536. if (physical_node_map[nasid] == -1)
  537. continue;
  538. brd = find_lboard_any((lboard_t *)
  539. root_lboard[nasid_to_cnodeid(nasid)],
  540. KLTYPE_TIO);
  541. while (brd) {
  542. sn_cnodeid_to_nasid[numionodes] = brd->brd_nasid;
  543. physical_node_map[brd->brd_nasid] = numionodes;
  544. root_lboard[numionodes] = brd;
  545. numionodes++;
  546. brd = KLCF_NEXT_ANY(brd);
  547. if (!brd)
  548. break;
  549. brd = find_lboard_any(brd, KLTYPE_TIO);
  550. }
  551. }
  552. }
  553. int
  554. nasid_slice_to_cpuid(int nasid, int slice)
  555. {
  556. long cpu;
  557. for (cpu=0; cpu < NR_CPUS; cpu++)
  558. if (cpuid_to_nasid(cpu) == nasid &&
  559. cpuid_to_slice(cpu) == slice)
  560. return cpu;
  561. return -1;
  562. }
  563. int sn_prom_feature_available(int id)
  564. {
  565. if (id >= BITS_PER_LONG * MAX_PROM_FEATURE_SETS)
  566. return 0;
  567. return test_bit(id, sn_prom_features);
  568. }
  569. EXPORT_SYMBOL(sn_prom_feature_available);