fimc-lite.c 40 KB

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  1. /*
  2. * Samsung EXYNOS FIMC-LITE (camera host interface) driver
  3. *
  4. * Copyright (C) 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
  12. #include <linux/bug.h>
  13. #include <linux/device.h>
  14. #include <linux/errno.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/types.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/pm_runtime.h>
  22. #include <linux/slab.h>
  23. #include <linux/videodev2.h>
  24. #include <media/v4l2-device.h>
  25. #include <media/v4l2-ioctl.h>
  26. #include <media/v4l2-mem2mem.h>
  27. #include <media/videobuf2-core.h>
  28. #include <media/videobuf2-dma-contig.h>
  29. #include "fimc-mdevice.h"
  30. #include "fimc-core.h"
  31. #include "fimc-lite-reg.h"
  32. static int debug;
  33. module_param(debug, int, 0644);
  34. static const struct fimc_fmt fimc_lite_formats[] = {
  35. {
  36. .name = "YUV 4:2:2 packed, YCbYCr",
  37. .fourcc = V4L2_PIX_FMT_YUYV,
  38. .depth = { 16 },
  39. .color = FIMC_FMT_YCBYCR422,
  40. .memplanes = 1,
  41. .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
  42. }, {
  43. .name = "YUV 4:2:2 packed, CbYCrY",
  44. .fourcc = V4L2_PIX_FMT_UYVY,
  45. .depth = { 16 },
  46. .color = FIMC_FMT_CBYCRY422,
  47. .memplanes = 1,
  48. .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
  49. }, {
  50. .name = "YUV 4:2:2 packed, CrYCbY",
  51. .fourcc = V4L2_PIX_FMT_VYUY,
  52. .depth = { 16 },
  53. .color = FIMC_FMT_CRYCBY422,
  54. .memplanes = 1,
  55. .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
  56. }, {
  57. .name = "YUV 4:2:2 packed, YCrYCb",
  58. .fourcc = V4L2_PIX_FMT_YVYU,
  59. .depth = { 16 },
  60. .color = FIMC_FMT_YCRYCB422,
  61. .memplanes = 1,
  62. .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
  63. }, {
  64. .name = "RAW8 (GRBG)",
  65. .fourcc = V4L2_PIX_FMT_SGRBG8,
  66. .depth = { 8 },
  67. .color = FIMC_FMT_RAW8,
  68. .memplanes = 1,
  69. .mbus_code = V4L2_MBUS_FMT_SGRBG8_1X8,
  70. }, {
  71. .name = "RAW10 (GRBG)",
  72. .fourcc = V4L2_PIX_FMT_SGRBG10,
  73. .depth = { 10 },
  74. .color = FIMC_FMT_RAW10,
  75. .memplanes = 1,
  76. .mbus_code = V4L2_MBUS_FMT_SGRBG10_1X10,
  77. }, {
  78. .name = "RAW12 (GRBG)",
  79. .fourcc = V4L2_PIX_FMT_SGRBG12,
  80. .depth = { 12 },
  81. .color = FIMC_FMT_RAW12,
  82. .memplanes = 1,
  83. .mbus_code = V4L2_MBUS_FMT_SGRBG12_1X12,
  84. },
  85. };
  86. /**
  87. * fimc_lite_find_format - lookup fimc color format by fourcc or media bus code
  88. * @pixelformat: fourcc to match, ignored if null
  89. * @mbus_code: media bus code to match, ignored if null
  90. * @index: index to the fimc_lite_formats array, ignored if negative
  91. */
  92. static const struct fimc_fmt *fimc_lite_find_format(const u32 *pixelformat,
  93. const u32 *mbus_code, int index)
  94. {
  95. const struct fimc_fmt *fmt, *def_fmt = NULL;
  96. unsigned int i;
  97. int id = 0;
  98. if (index >= (int)ARRAY_SIZE(fimc_lite_formats))
  99. return NULL;
  100. for (i = 0; i < ARRAY_SIZE(fimc_lite_formats); ++i) {
  101. fmt = &fimc_lite_formats[i];
  102. if (pixelformat && fmt->fourcc == *pixelformat)
  103. return fmt;
  104. if (mbus_code && fmt->mbus_code == *mbus_code)
  105. return fmt;
  106. if (index == id)
  107. def_fmt = fmt;
  108. id++;
  109. }
  110. return def_fmt;
  111. }
  112. static int fimc_lite_hw_init(struct fimc_lite *fimc)
  113. {
  114. struct fimc_pipeline *pipeline = &fimc->pipeline;
  115. struct fimc_sensor_info *sensor;
  116. unsigned long flags;
  117. if (pipeline->subdevs[IDX_SENSOR] == NULL)
  118. return -ENXIO;
  119. if (fimc->fmt == NULL)
  120. return -EINVAL;
  121. sensor = v4l2_get_subdev_hostdata(pipeline->subdevs[IDX_SENSOR]);
  122. spin_lock_irqsave(&fimc->slock, flags);
  123. flite_hw_set_camera_bus(fimc, sensor->pdata);
  124. flite_hw_set_source_format(fimc, &fimc->inp_frame);
  125. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  126. flite_hw_set_output_dma(fimc, &fimc->out_frame, true);
  127. flite_hw_set_interrupt_mask(fimc);
  128. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  129. if (debug > 0)
  130. flite_hw_dump_regs(fimc, __func__);
  131. spin_unlock_irqrestore(&fimc->slock, flags);
  132. return 0;
  133. }
  134. /*
  135. * Reinitialize the driver so it is ready to start the streaming again.
  136. * Set fimc->state to indicate stream off and the hardware shut down state.
  137. * If not suspending (@suspend is false), return any buffers to videobuf2.
  138. * Otherwise put any owned buffers onto the pending buffers queue, so they
  139. * can be re-spun when the device is being resumed. Also perform FIMC
  140. * software reset and disable streaming on the whole pipeline if required.
  141. */
  142. static int fimc_lite_reinit(struct fimc_lite *fimc, bool suspend)
  143. {
  144. struct flite_buffer *buf;
  145. unsigned long flags;
  146. bool streaming;
  147. spin_lock_irqsave(&fimc->slock, flags);
  148. streaming = fimc->state & (1 << ST_SENSOR_STREAM);
  149. fimc->state &= ~(1 << ST_FLITE_RUN | 1 << ST_FLITE_OFF |
  150. 1 << ST_FLITE_STREAM | 1 << ST_SENSOR_STREAM);
  151. if (suspend)
  152. fimc->state |= (1 << ST_FLITE_SUSPENDED);
  153. else
  154. fimc->state &= ~(1 << ST_FLITE_PENDING |
  155. 1 << ST_FLITE_SUSPENDED);
  156. /* Release unused buffers */
  157. while (!suspend && !list_empty(&fimc->pending_buf_q)) {
  158. buf = fimc_lite_pending_queue_pop(fimc);
  159. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  160. }
  161. /* If suspending put unused buffers onto pending queue */
  162. while (!list_empty(&fimc->active_buf_q)) {
  163. buf = fimc_lite_active_queue_pop(fimc);
  164. if (suspend)
  165. fimc_lite_pending_queue_add(fimc, buf);
  166. else
  167. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  168. }
  169. spin_unlock_irqrestore(&fimc->slock, flags);
  170. flite_hw_reset(fimc);
  171. if (!streaming)
  172. return 0;
  173. return fimc_pipeline_s_stream(&fimc->pipeline, 0);
  174. }
  175. static int fimc_lite_stop_capture(struct fimc_lite *fimc, bool suspend)
  176. {
  177. unsigned long flags;
  178. if (!fimc_lite_active(fimc))
  179. return 0;
  180. spin_lock_irqsave(&fimc->slock, flags);
  181. set_bit(ST_FLITE_OFF, &fimc->state);
  182. flite_hw_capture_stop(fimc);
  183. spin_unlock_irqrestore(&fimc->slock, flags);
  184. wait_event_timeout(fimc->irq_queue,
  185. !test_bit(ST_FLITE_OFF, &fimc->state),
  186. (2*HZ/10)); /* 200 ms */
  187. return fimc_lite_reinit(fimc, suspend);
  188. }
  189. /* Must be called with fimc.slock spinlock held. */
  190. static void fimc_lite_config_update(struct fimc_lite *fimc)
  191. {
  192. flite_hw_set_window_offset(fimc, &fimc->inp_frame);
  193. flite_hw_set_dma_window(fimc, &fimc->out_frame);
  194. flite_hw_set_test_pattern(fimc, fimc->test_pattern->val);
  195. clear_bit(ST_FLITE_CONFIG, &fimc->state);
  196. }
  197. static irqreturn_t flite_irq_handler(int irq, void *priv)
  198. {
  199. struct fimc_lite *fimc = priv;
  200. struct flite_buffer *vbuf;
  201. unsigned long flags;
  202. struct timeval *tv;
  203. struct timespec ts;
  204. u32 intsrc;
  205. spin_lock_irqsave(&fimc->slock, flags);
  206. intsrc = flite_hw_get_interrupt_source(fimc);
  207. flite_hw_clear_pending_irq(fimc);
  208. if (test_and_clear_bit(ST_FLITE_OFF, &fimc->state)) {
  209. wake_up(&fimc->irq_queue);
  210. goto done;
  211. }
  212. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_OVERFLOW) {
  213. clear_bit(ST_FLITE_RUN, &fimc->state);
  214. fimc->events.data_overflow++;
  215. }
  216. if (intsrc & FLITE_REG_CISTATUS_IRQ_SRC_LASTCAPEND) {
  217. flite_hw_clear_last_capture_end(fimc);
  218. clear_bit(ST_FLITE_STREAM, &fimc->state);
  219. wake_up(&fimc->irq_queue);
  220. }
  221. if (fimc->out_path != FIMC_IO_DMA)
  222. goto done;
  223. if ((intsrc & FLITE_REG_CISTATUS_IRQ_SRC_FRMSTART) &&
  224. test_bit(ST_FLITE_RUN, &fimc->state) &&
  225. !list_empty(&fimc->active_buf_q) &&
  226. !list_empty(&fimc->pending_buf_q)) {
  227. vbuf = fimc_lite_active_queue_pop(fimc);
  228. ktime_get_ts(&ts);
  229. tv = &vbuf->vb.v4l2_buf.timestamp;
  230. tv->tv_sec = ts.tv_sec;
  231. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  232. vbuf->vb.v4l2_buf.sequence = fimc->frame_count++;
  233. vb2_buffer_done(&vbuf->vb, VB2_BUF_STATE_DONE);
  234. vbuf = fimc_lite_pending_queue_pop(fimc);
  235. flite_hw_set_output_addr(fimc, vbuf->paddr);
  236. fimc_lite_active_queue_add(fimc, vbuf);
  237. }
  238. if (test_bit(ST_FLITE_CONFIG, &fimc->state))
  239. fimc_lite_config_update(fimc);
  240. if (list_empty(&fimc->pending_buf_q)) {
  241. flite_hw_capture_stop(fimc);
  242. clear_bit(ST_FLITE_STREAM, &fimc->state);
  243. }
  244. done:
  245. set_bit(ST_FLITE_RUN, &fimc->state);
  246. spin_unlock_irqrestore(&fimc->slock, flags);
  247. return IRQ_HANDLED;
  248. }
  249. static int start_streaming(struct vb2_queue *q, unsigned int count)
  250. {
  251. struct fimc_lite *fimc = q->drv_priv;
  252. int ret;
  253. fimc->frame_count = 0;
  254. ret = fimc_lite_hw_init(fimc);
  255. if (ret) {
  256. fimc_lite_reinit(fimc, false);
  257. return ret;
  258. }
  259. set_bit(ST_FLITE_PENDING, &fimc->state);
  260. if (!list_empty(&fimc->active_buf_q) &&
  261. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  262. flite_hw_capture_start(fimc);
  263. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  264. fimc_pipeline_s_stream(&fimc->pipeline, 1);
  265. }
  266. if (debug > 0)
  267. flite_hw_dump_regs(fimc, __func__);
  268. return 0;
  269. }
  270. static int stop_streaming(struct vb2_queue *q)
  271. {
  272. struct fimc_lite *fimc = q->drv_priv;
  273. if (!fimc_lite_active(fimc))
  274. return -EINVAL;
  275. return fimc_lite_stop_capture(fimc, false);
  276. }
  277. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  278. unsigned int *num_buffers, unsigned int *num_planes,
  279. unsigned int sizes[], void *allocators[])
  280. {
  281. const struct v4l2_pix_format_mplane *pixm = NULL;
  282. struct fimc_lite *fimc = vq->drv_priv;
  283. struct flite_frame *frame = &fimc->out_frame;
  284. const struct fimc_fmt *fmt = fimc->fmt;
  285. unsigned long wh;
  286. int i;
  287. if (pfmt) {
  288. pixm = &pfmt->fmt.pix_mp;
  289. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, -1);
  290. wh = pixm->width * pixm->height;
  291. } else {
  292. wh = frame->f_width * frame->f_height;
  293. }
  294. if (fmt == NULL)
  295. return -EINVAL;
  296. *num_planes = fmt->memplanes;
  297. for (i = 0; i < fmt->memplanes; i++) {
  298. unsigned int size = (wh * fmt->depth[i]) / 8;
  299. if (pixm)
  300. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  301. else
  302. sizes[i] = size;
  303. allocators[i] = fimc->alloc_ctx;
  304. }
  305. return 0;
  306. }
  307. static int buffer_prepare(struct vb2_buffer *vb)
  308. {
  309. struct vb2_queue *vq = vb->vb2_queue;
  310. struct fimc_lite *fimc = vq->drv_priv;
  311. int i;
  312. if (fimc->fmt == NULL)
  313. return -EINVAL;
  314. for (i = 0; i < fimc->fmt->memplanes; i++) {
  315. unsigned long size = fimc->payload[i];
  316. if (vb2_plane_size(vb, i) < size) {
  317. v4l2_err(fimc->vfd,
  318. "User buffer too small (%ld < %ld)\n",
  319. vb2_plane_size(vb, i), size);
  320. return -EINVAL;
  321. }
  322. vb2_set_plane_payload(vb, i, size);
  323. }
  324. return 0;
  325. }
  326. static void buffer_queue(struct vb2_buffer *vb)
  327. {
  328. struct flite_buffer *buf
  329. = container_of(vb, struct flite_buffer, vb);
  330. struct fimc_lite *fimc = vb2_get_drv_priv(vb->vb2_queue);
  331. unsigned long flags;
  332. spin_lock_irqsave(&fimc->slock, flags);
  333. buf->paddr = vb2_dma_contig_plane_dma_addr(vb, 0);
  334. if (!test_bit(ST_FLITE_SUSPENDED, &fimc->state) &&
  335. !test_bit(ST_FLITE_STREAM, &fimc->state) &&
  336. list_empty(&fimc->active_buf_q)) {
  337. flite_hw_set_output_addr(fimc, buf->paddr);
  338. fimc_lite_active_queue_add(fimc, buf);
  339. } else {
  340. fimc_lite_pending_queue_add(fimc, buf);
  341. }
  342. if (vb2_is_streaming(&fimc->vb_queue) &&
  343. !list_empty(&fimc->pending_buf_q) &&
  344. !test_and_set_bit(ST_FLITE_STREAM, &fimc->state)) {
  345. flite_hw_capture_start(fimc);
  346. spin_unlock_irqrestore(&fimc->slock, flags);
  347. if (!test_and_set_bit(ST_SENSOR_STREAM, &fimc->state))
  348. fimc_pipeline_s_stream(&fimc->pipeline, 1);
  349. return;
  350. }
  351. spin_unlock_irqrestore(&fimc->slock, flags);
  352. }
  353. static void fimc_lock(struct vb2_queue *vq)
  354. {
  355. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  356. mutex_lock(&fimc->lock);
  357. }
  358. static void fimc_unlock(struct vb2_queue *vq)
  359. {
  360. struct fimc_lite *fimc = vb2_get_drv_priv(vq);
  361. mutex_unlock(&fimc->lock);
  362. }
  363. static const struct vb2_ops fimc_lite_qops = {
  364. .queue_setup = queue_setup,
  365. .buf_prepare = buffer_prepare,
  366. .buf_queue = buffer_queue,
  367. .wait_prepare = fimc_unlock,
  368. .wait_finish = fimc_lock,
  369. .start_streaming = start_streaming,
  370. .stop_streaming = stop_streaming,
  371. };
  372. static void fimc_lite_clear_event_counters(struct fimc_lite *fimc)
  373. {
  374. unsigned long flags;
  375. spin_lock_irqsave(&fimc->slock, flags);
  376. memset(&fimc->events, 0, sizeof(fimc->events));
  377. spin_unlock_irqrestore(&fimc->slock, flags);
  378. }
  379. static int fimc_lite_open(struct file *file)
  380. {
  381. struct fimc_lite *fimc = video_drvdata(file);
  382. int ret;
  383. set_bit(ST_FLITE_IN_USE, &fimc->state);
  384. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  385. if (ret < 0)
  386. return ret;
  387. if (++fimc->ref_count != 1 || fimc->out_path != FIMC_IO_DMA)
  388. return 0;
  389. ret = v4l2_fh_open(file);
  390. if (ret < 0)
  391. return ret;
  392. ret = fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity,
  393. true);
  394. if (ret < 0) {
  395. pm_runtime_put_sync(&fimc->pdev->dev);
  396. fimc->ref_count--;
  397. v4l2_fh_release(file);
  398. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  399. }
  400. fimc_lite_clear_event_counters(fimc);
  401. return ret;
  402. }
  403. static int fimc_lite_close(struct file *file)
  404. {
  405. struct fimc_lite *fimc = video_drvdata(file);
  406. if (--fimc->ref_count == 0 && fimc->out_path == FIMC_IO_DMA) {
  407. clear_bit(ST_FLITE_IN_USE, &fimc->state);
  408. fimc_lite_stop_capture(fimc, false);
  409. fimc_pipeline_shutdown(&fimc->pipeline);
  410. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  411. }
  412. pm_runtime_put(&fimc->pdev->dev);
  413. if (fimc->ref_count == 0)
  414. vb2_queue_release(&fimc->vb_queue);
  415. return v4l2_fh_release(file);
  416. }
  417. static unsigned int fimc_lite_poll(struct file *file,
  418. struct poll_table_struct *wait)
  419. {
  420. struct fimc_lite *fimc = video_drvdata(file);
  421. return vb2_poll(&fimc->vb_queue, file, wait);
  422. }
  423. static int fimc_lite_mmap(struct file *file, struct vm_area_struct *vma)
  424. {
  425. struct fimc_lite *fimc = video_drvdata(file);
  426. return vb2_mmap(&fimc->vb_queue, vma);
  427. }
  428. static const struct v4l2_file_operations fimc_lite_fops = {
  429. .owner = THIS_MODULE,
  430. .open = fimc_lite_open,
  431. .release = fimc_lite_close,
  432. .poll = fimc_lite_poll,
  433. .unlocked_ioctl = video_ioctl2,
  434. .mmap = fimc_lite_mmap,
  435. };
  436. /*
  437. * Format and crop negotiation helpers
  438. */
  439. static const struct fimc_fmt *fimc_lite_try_format(struct fimc_lite *fimc,
  440. u32 *width, u32 *height,
  441. u32 *code, u32 *fourcc, int pad)
  442. {
  443. struct flite_variant *variant = fimc->variant;
  444. const struct fimc_fmt *fmt;
  445. fmt = fimc_lite_find_format(fourcc, code, 0);
  446. if (WARN_ON(!fmt))
  447. return NULL;
  448. if (code)
  449. *code = fmt->mbus_code;
  450. if (fourcc)
  451. *fourcc = fmt->fourcc;
  452. if (pad == FLITE_SD_PAD_SINK) {
  453. v4l_bound_align_image(width, 8, variant->max_width,
  454. ffs(variant->out_width_align) - 1,
  455. height, 0, variant->max_height, 0, 0);
  456. } else {
  457. v4l_bound_align_image(width, 8, fimc->inp_frame.rect.width,
  458. ffs(variant->out_width_align) - 1,
  459. height, 0, fimc->inp_frame.rect.height,
  460. 0, 0);
  461. }
  462. v4l2_dbg(1, debug, &fimc->subdev, "code: 0x%x, %dx%d\n",
  463. code ? *code : 0, *width, *height);
  464. return fmt;
  465. }
  466. static void fimc_lite_try_crop(struct fimc_lite *fimc, struct v4l2_rect *r)
  467. {
  468. struct flite_frame *frame = &fimc->inp_frame;
  469. v4l_bound_align_image(&r->width, 0, frame->f_width, 0,
  470. &r->height, 0, frame->f_height, 0, 0);
  471. /* Adjust left/top if cropping rectangle got out of bounds */
  472. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  473. r->left = round_down(r->left, fimc->variant->win_hor_offs_align);
  474. r->top = clamp_t(u32, r->top, 0, frame->f_height - r->height);
  475. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, sink fmt: %dx%d",
  476. r->left, r->top, r->width, r->height,
  477. frame->f_width, frame->f_height);
  478. }
  479. static void fimc_lite_try_compose(struct fimc_lite *fimc, struct v4l2_rect *r)
  480. {
  481. struct flite_frame *frame = &fimc->out_frame;
  482. struct v4l2_rect *crop_rect = &fimc->inp_frame.rect;
  483. /* Scaling is not supported so we enforce compose rectangle size
  484. same as size of the sink crop rectangle. */
  485. r->width = crop_rect->width;
  486. r->height = crop_rect->height;
  487. /* Adjust left/top if the composing rectangle got out of bounds */
  488. r->left = clamp_t(u32, r->left, 0, frame->f_width - r->width);
  489. r->left = round_down(r->left, fimc->variant->out_hor_offs_align);
  490. r->top = clamp_t(u32, r->top, 0, fimc->out_frame.f_height - r->height);
  491. v4l2_dbg(1, debug, &fimc->subdev, "(%d,%d)/%dx%d, source fmt: %dx%d",
  492. r->left, r->top, r->width, r->height,
  493. frame->f_width, frame->f_height);
  494. }
  495. /*
  496. * Video node ioctl operations
  497. */
  498. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  499. struct v4l2_capability *cap)
  500. {
  501. strlcpy(cap->driver, FIMC_LITE_DRV_NAME, sizeof(cap->driver));
  502. cap->bus_info[0] = 0;
  503. cap->card[0] = 0;
  504. cap->capabilities = V4L2_CAP_STREAMING;
  505. return 0;
  506. }
  507. static int fimc_lite_enum_fmt_mplane(struct file *file, void *priv,
  508. struct v4l2_fmtdesc *f)
  509. {
  510. const struct fimc_fmt *fmt;
  511. if (f->index >= ARRAY_SIZE(fimc_lite_formats))
  512. return -EINVAL;
  513. fmt = &fimc_lite_formats[f->index];
  514. strlcpy(f->description, fmt->name, sizeof(f->description));
  515. f->pixelformat = fmt->fourcc;
  516. return 0;
  517. }
  518. static int fimc_lite_g_fmt_mplane(struct file *file, void *fh,
  519. struct v4l2_format *f)
  520. {
  521. struct fimc_lite *fimc = video_drvdata(file);
  522. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  523. struct v4l2_plane_pix_format *plane_fmt = &pixm->plane_fmt[0];
  524. struct flite_frame *frame = &fimc->out_frame;
  525. const struct fimc_fmt *fmt = fimc->fmt;
  526. plane_fmt->bytesperline = (frame->f_width * fmt->depth[0]) / 8;
  527. plane_fmt->sizeimage = plane_fmt->bytesperline * frame->f_height;
  528. pixm->num_planes = fmt->memplanes;
  529. pixm->pixelformat = fmt->fourcc;
  530. pixm->width = frame->f_width;
  531. pixm->height = frame->f_height;
  532. pixm->field = V4L2_FIELD_NONE;
  533. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  534. return 0;
  535. }
  536. static int fimc_lite_try_fmt(struct fimc_lite *fimc,
  537. struct v4l2_pix_format_mplane *pixm,
  538. const struct fimc_fmt **ffmt)
  539. {
  540. struct flite_variant *variant = fimc->variant;
  541. u32 bpl = pixm->plane_fmt[0].bytesperline;
  542. const struct fimc_fmt *fmt;
  543. fmt = fimc_lite_find_format(&pixm->pixelformat, NULL, 0);
  544. if (WARN_ON(fmt == NULL))
  545. return -EINVAL;
  546. if (ffmt)
  547. *ffmt = fmt;
  548. v4l_bound_align_image(&pixm->width, 8, variant->max_width,
  549. ffs(variant->out_width_align) - 1,
  550. &pixm->height, 0, variant->max_height, 0, 0);
  551. if ((bpl == 0 || ((bpl * 8) / fmt->depth[0]) < pixm->width))
  552. pixm->plane_fmt[0].bytesperline = (pixm->width *
  553. fmt->depth[0]) / 8;
  554. if (pixm->plane_fmt[0].sizeimage == 0)
  555. pixm->plane_fmt[0].sizeimage = (pixm->width * pixm->height *
  556. fmt->depth[0]) / 8;
  557. pixm->num_planes = fmt->memplanes;
  558. pixm->pixelformat = fmt->fourcc;
  559. pixm->colorspace = V4L2_COLORSPACE_JPEG;
  560. pixm->field = V4L2_FIELD_NONE;
  561. return 0;
  562. }
  563. static int fimc_lite_try_fmt_mplane(struct file *file, void *fh,
  564. struct v4l2_format *f)
  565. {
  566. struct fimc_lite *fimc = video_drvdata(file);
  567. return fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, NULL);
  568. }
  569. static int fimc_lite_s_fmt_mplane(struct file *file, void *priv,
  570. struct v4l2_format *f)
  571. {
  572. struct v4l2_pix_format_mplane *pixm = &f->fmt.pix_mp;
  573. struct fimc_lite *fimc = video_drvdata(file);
  574. struct flite_frame *frame = &fimc->out_frame;
  575. const struct fimc_fmt *fmt = NULL;
  576. int ret;
  577. if (vb2_is_busy(&fimc->vb_queue))
  578. return -EBUSY;
  579. ret = fimc_lite_try_fmt(fimc, &f->fmt.pix_mp, &fmt);
  580. if (ret < 0)
  581. return ret;
  582. fimc->fmt = fmt;
  583. fimc->payload[0] = max((pixm->width * pixm->height * fmt->depth[0]) / 8,
  584. pixm->plane_fmt[0].sizeimage);
  585. frame->f_width = pixm->width;
  586. frame->f_height = pixm->height;
  587. return 0;
  588. }
  589. static int fimc_pipeline_validate(struct fimc_lite *fimc)
  590. {
  591. struct v4l2_subdev *sd = &fimc->subdev;
  592. struct v4l2_subdev_format sink_fmt, src_fmt;
  593. struct media_pad *pad;
  594. int ret;
  595. while (1) {
  596. /* Retrieve format at the sink pad */
  597. pad = &sd->entity.pads[0];
  598. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  599. break;
  600. /* Don't call FIMC subdev operation to avoid nested locking */
  601. if (sd == &fimc->subdev) {
  602. struct flite_frame *ff = &fimc->out_frame;
  603. sink_fmt.format.width = ff->f_width;
  604. sink_fmt.format.height = ff->f_height;
  605. sink_fmt.format.code = fimc->fmt->mbus_code;
  606. } else {
  607. sink_fmt.pad = pad->index;
  608. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  609. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL,
  610. &sink_fmt);
  611. if (ret < 0 && ret != -ENOIOCTLCMD)
  612. return -EPIPE;
  613. }
  614. /* Retrieve format at the source pad */
  615. pad = media_entity_remote_source(pad);
  616. if (pad == NULL ||
  617. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  618. break;
  619. sd = media_entity_to_v4l2_subdev(pad->entity);
  620. src_fmt.pad = pad->index;
  621. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  622. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  623. if (ret < 0 && ret != -ENOIOCTLCMD)
  624. return -EPIPE;
  625. if (src_fmt.format.width != sink_fmt.format.width ||
  626. src_fmt.format.height != sink_fmt.format.height ||
  627. src_fmt.format.code != sink_fmt.format.code)
  628. return -EPIPE;
  629. }
  630. return 0;
  631. }
  632. static int fimc_lite_streamon(struct file *file, void *priv,
  633. enum v4l2_buf_type type)
  634. {
  635. struct fimc_lite *fimc = video_drvdata(file);
  636. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  637. struct fimc_pipeline *p = &fimc->pipeline;
  638. int ret;
  639. if (fimc_lite_active(fimc))
  640. return -EBUSY;
  641. ret = media_entity_pipeline_start(&sensor->entity, p->m_pipeline);
  642. if (ret < 0)
  643. return ret;
  644. ret = fimc_pipeline_validate(fimc);
  645. if (ret) {
  646. media_entity_pipeline_stop(&sensor->entity);
  647. return ret;
  648. }
  649. return vb2_streamon(&fimc->vb_queue, type);
  650. }
  651. static int fimc_lite_streamoff(struct file *file, void *priv,
  652. enum v4l2_buf_type type)
  653. {
  654. struct fimc_lite *fimc = video_drvdata(file);
  655. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  656. int ret;
  657. ret = vb2_streamoff(&fimc->vb_queue, type);
  658. if (ret == 0)
  659. media_entity_pipeline_stop(&sd->entity);
  660. return ret;
  661. }
  662. static int fimc_lite_reqbufs(struct file *file, void *priv,
  663. struct v4l2_requestbuffers *reqbufs)
  664. {
  665. struct fimc_lite *fimc = video_drvdata(file);
  666. int ret;
  667. reqbufs->count = max_t(u32, FLITE_REQ_BUFS_MIN, reqbufs->count);
  668. ret = vb2_reqbufs(&fimc->vb_queue, reqbufs);
  669. if (!ret < 0)
  670. fimc->reqbufs_count = reqbufs->count;
  671. return ret;
  672. }
  673. static int fimc_lite_querybuf(struct file *file, void *priv,
  674. struct v4l2_buffer *buf)
  675. {
  676. struct fimc_lite *fimc = video_drvdata(file);
  677. return vb2_querybuf(&fimc->vb_queue, buf);
  678. }
  679. static int fimc_lite_qbuf(struct file *file, void *priv,
  680. struct v4l2_buffer *buf)
  681. {
  682. struct fimc_lite *fimc = video_drvdata(file);
  683. return vb2_qbuf(&fimc->vb_queue, buf);
  684. }
  685. static int fimc_lite_dqbuf(struct file *file, void *priv,
  686. struct v4l2_buffer *buf)
  687. {
  688. struct fimc_lite *fimc = video_drvdata(file);
  689. return vb2_dqbuf(&fimc->vb_queue, buf, file->f_flags & O_NONBLOCK);
  690. }
  691. static int fimc_lite_create_bufs(struct file *file, void *priv,
  692. struct v4l2_create_buffers *create)
  693. {
  694. struct fimc_lite *fimc = video_drvdata(file);
  695. return vb2_create_bufs(&fimc->vb_queue, create);
  696. }
  697. static int fimc_lite_prepare_buf(struct file *file, void *priv,
  698. struct v4l2_buffer *b)
  699. {
  700. struct fimc_lite *fimc = video_drvdata(file);
  701. return vb2_prepare_buf(&fimc->vb_queue, b);
  702. }
  703. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  704. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  705. {
  706. if (a->left < b->left || a->top < b->top)
  707. return 0;
  708. if (a->left + a->width > b->left + b->width)
  709. return 0;
  710. if (a->top + a->height > b->top + b->height)
  711. return 0;
  712. return 1;
  713. }
  714. static int fimc_lite_g_selection(struct file *file, void *fh,
  715. struct v4l2_selection *sel)
  716. {
  717. struct fimc_lite *fimc = video_drvdata(file);
  718. struct flite_frame *f = &fimc->out_frame;
  719. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  720. return -EINVAL;
  721. switch (sel->target) {
  722. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  723. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  724. sel->r.left = 0;
  725. sel->r.top = 0;
  726. sel->r.width = f->f_width;
  727. sel->r.height = f->f_height;
  728. return 0;
  729. case V4L2_SEL_TGT_COMPOSE_ACTIVE:
  730. sel->r = f->rect;
  731. return 0;
  732. }
  733. return -EINVAL;
  734. }
  735. static int fimc_lite_s_selection(struct file *file, void *fh,
  736. struct v4l2_selection *sel)
  737. {
  738. struct fimc_lite *fimc = video_drvdata(file);
  739. struct flite_frame *f = &fimc->out_frame;
  740. struct v4l2_rect rect = sel->r;
  741. unsigned long flags;
  742. if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE ||
  743. sel->target != V4L2_SEL_TGT_COMPOSE_ACTIVE)
  744. return -EINVAL;
  745. fimc_lite_try_compose(fimc, &rect);
  746. if ((sel->flags & V4L2_SEL_FLAG_LE) &&
  747. !enclosed_rectangle(&rect, &sel->r))
  748. return -ERANGE;
  749. if ((sel->flags & V4L2_SEL_FLAG_GE) &&
  750. !enclosed_rectangle(&sel->r, &rect))
  751. return -ERANGE;
  752. sel->r = rect;
  753. spin_lock_irqsave(&fimc->slock, flags);
  754. f->rect = rect;
  755. set_bit(ST_FLITE_CONFIG, &fimc->state);
  756. spin_unlock_irqrestore(&fimc->slock, flags);
  757. return 0;
  758. }
  759. static const struct v4l2_ioctl_ops fimc_lite_ioctl_ops = {
  760. .vidioc_querycap = fimc_vidioc_querycap_capture,
  761. .vidioc_enum_fmt_vid_cap_mplane = fimc_lite_enum_fmt_mplane,
  762. .vidioc_try_fmt_vid_cap_mplane = fimc_lite_try_fmt_mplane,
  763. .vidioc_s_fmt_vid_cap_mplane = fimc_lite_s_fmt_mplane,
  764. .vidioc_g_fmt_vid_cap_mplane = fimc_lite_g_fmt_mplane,
  765. .vidioc_g_selection = fimc_lite_g_selection,
  766. .vidioc_s_selection = fimc_lite_s_selection,
  767. .vidioc_reqbufs = fimc_lite_reqbufs,
  768. .vidioc_querybuf = fimc_lite_querybuf,
  769. .vidioc_prepare_buf = fimc_lite_prepare_buf,
  770. .vidioc_create_bufs = fimc_lite_create_bufs,
  771. .vidioc_qbuf = fimc_lite_qbuf,
  772. .vidioc_dqbuf = fimc_lite_dqbuf,
  773. .vidioc_streamon = fimc_lite_streamon,
  774. .vidioc_streamoff = fimc_lite_streamoff,
  775. };
  776. /* Capture subdev media entity operations */
  777. static int fimc_lite_link_setup(struct media_entity *entity,
  778. const struct media_pad *local,
  779. const struct media_pad *remote, u32 flags)
  780. {
  781. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  782. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  783. unsigned int remote_ent_type = media_entity_type(remote->entity);
  784. if (WARN_ON(fimc == NULL))
  785. return 0;
  786. v4l2_dbg(1, debug, sd, "%s: %s --> %s, flags: 0x%x. source_id: 0x%x",
  787. __func__, local->entity->name, remote->entity->name,
  788. flags, fimc->source_subdev_grp_id);
  789. switch (local->index) {
  790. case FIMC_SD_PAD_SINK:
  791. if (remote_ent_type != MEDIA_ENT_T_V4L2_SUBDEV)
  792. return -EINVAL;
  793. if (flags & MEDIA_LNK_FL_ENABLED) {
  794. if (fimc->source_subdev_grp_id != 0)
  795. return -EBUSY;
  796. fimc->source_subdev_grp_id = sd->grp_id;
  797. return 0;
  798. }
  799. fimc->source_subdev_grp_id = 0;
  800. break;
  801. case FIMC_SD_PAD_SOURCE:
  802. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  803. fimc->out_path = FIMC_IO_NONE;
  804. return 0;
  805. }
  806. if (remote_ent_type == MEDIA_ENT_T_V4L2_SUBDEV)
  807. fimc->out_path = FIMC_IO_ISP;
  808. else
  809. fimc->out_path = FIMC_IO_DMA;
  810. break;
  811. default:
  812. v4l2_err(sd, "Invalid pad index\n");
  813. return -EINVAL;
  814. }
  815. return 0;
  816. }
  817. static const struct media_entity_operations fimc_lite_subdev_media_ops = {
  818. .link_setup = fimc_lite_link_setup,
  819. };
  820. static int fimc_lite_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  821. struct v4l2_subdev_fh *fh,
  822. struct v4l2_subdev_mbus_code_enum *code)
  823. {
  824. const struct fimc_fmt *fmt;
  825. fmt = fimc_lite_find_format(NULL, NULL, code->index);
  826. if (!fmt)
  827. return -EINVAL;
  828. code->code = fmt->mbus_code;
  829. return 0;
  830. }
  831. static int fimc_lite_subdev_get_fmt(struct v4l2_subdev *sd,
  832. struct v4l2_subdev_fh *fh,
  833. struct v4l2_subdev_format *fmt)
  834. {
  835. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  836. struct v4l2_mbus_framefmt *mf = &fmt->format;
  837. struct flite_frame *f = &fimc->out_frame;
  838. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  839. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  840. fmt->format = *mf;
  841. return 0;
  842. }
  843. mf->colorspace = V4L2_COLORSPACE_JPEG;
  844. mutex_lock(&fimc->lock);
  845. mf->code = fimc->fmt->mbus_code;
  846. if (fmt->pad == FLITE_SD_PAD_SINK) {
  847. /* full camera input frame size */
  848. mf->width = f->f_width;
  849. mf->height = f->f_height;
  850. } else {
  851. /* crop size */
  852. mf->width = f->rect.width;
  853. mf->height = f->rect.height;
  854. }
  855. mutex_unlock(&fimc->lock);
  856. return 0;
  857. }
  858. static int fimc_lite_subdev_set_fmt(struct v4l2_subdev *sd,
  859. struct v4l2_subdev_fh *fh,
  860. struct v4l2_subdev_format *fmt)
  861. {
  862. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  863. struct v4l2_mbus_framefmt *mf = &fmt->format;
  864. struct flite_frame *sink = &fimc->inp_frame;
  865. const struct fimc_fmt *ffmt;
  866. v4l2_dbg(1, debug, sd, "pad%d: code: 0x%x, %dx%d",
  867. fmt->pad, mf->code, mf->width, mf->height);
  868. mf->colorspace = V4L2_COLORSPACE_JPEG;
  869. mutex_lock(&fimc->lock);
  870. if ((fimc->out_path == FIMC_IO_ISP && sd->entity.stream_count > 0) ||
  871. (fimc->out_path == FIMC_IO_DMA && vb2_is_busy(&fimc->vb_queue))) {
  872. mutex_unlock(&fimc->lock);
  873. return -EBUSY;
  874. }
  875. ffmt = fimc_lite_try_format(fimc, &mf->width, &mf->height,
  876. &mf->code, NULL, fmt->pad);
  877. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  878. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  879. *mf = fmt->format;
  880. mutex_unlock(&fimc->lock);
  881. return 0;
  882. }
  883. if (fmt->pad == FLITE_SD_PAD_SINK) {
  884. sink->f_width = mf->width;
  885. sink->f_height = mf->height;
  886. fimc->fmt = ffmt;
  887. /* Set sink crop rectangle */
  888. sink->rect.width = mf->width;
  889. sink->rect.height = mf->height;
  890. sink->rect.left = 0;
  891. sink->rect.top = 0;
  892. /* Reset source crop rectangle */
  893. fimc->out_frame.rect = sink->rect;
  894. } else {
  895. /* Allow changing format only on sink pad */
  896. mf->code = fimc->fmt->mbus_code;
  897. mf->width = sink->rect.width;
  898. mf->height = sink->rect.height;
  899. }
  900. mutex_unlock(&fimc->lock);
  901. return 0;
  902. }
  903. static int fimc_lite_subdev_get_selection(struct v4l2_subdev *sd,
  904. struct v4l2_subdev_fh *fh,
  905. struct v4l2_subdev_selection *sel)
  906. {
  907. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  908. struct flite_frame *f = &fimc->inp_frame;
  909. if ((sel->target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL &&
  910. sel->target != V4L2_SUBDEV_SEL_TGT_CROP_BOUNDS) ||
  911. sel->pad != FLITE_SD_PAD_SINK)
  912. return -EINVAL;
  913. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  914. sel->r = *v4l2_subdev_get_try_crop(fh, sel->pad);
  915. return 0;
  916. }
  917. mutex_lock(&fimc->lock);
  918. if (sel->target == V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL) {
  919. sel->r = f->rect;
  920. } else {
  921. sel->r.left = 0;
  922. sel->r.top = 0;
  923. sel->r.width = f->f_width;
  924. sel->r.height = f->f_height;
  925. }
  926. mutex_unlock(&fimc->lock);
  927. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  928. __func__, f->rect.left, f->rect.top, f->rect.width,
  929. f->rect.height, f->f_width, f->f_height);
  930. return 0;
  931. }
  932. static int fimc_lite_subdev_set_selection(struct v4l2_subdev *sd,
  933. struct v4l2_subdev_fh *fh,
  934. struct v4l2_subdev_selection *sel)
  935. {
  936. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  937. struct flite_frame *f = &fimc->inp_frame;
  938. int ret = 0;
  939. if (sel->target != V4L2_SUBDEV_SEL_TGT_CROP_ACTUAL ||
  940. sel->pad != FLITE_SD_PAD_SINK)
  941. return -EINVAL;
  942. mutex_lock(&fimc->lock);
  943. fimc_lite_try_crop(fimc, &sel->r);
  944. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  945. *v4l2_subdev_get_try_crop(fh, sel->pad) = sel->r;
  946. } else {
  947. unsigned long flags;
  948. spin_lock_irqsave(&fimc->slock, flags);
  949. f->rect = sel->r;
  950. /* Same crop rectangle on the source pad */
  951. fimc->out_frame.rect = sel->r;
  952. set_bit(ST_FLITE_CONFIG, &fimc->state);
  953. spin_unlock_irqrestore(&fimc->slock, flags);
  954. }
  955. mutex_unlock(&fimc->lock);
  956. v4l2_dbg(1, debug, sd, "%s: (%d,%d) %dx%d, f_w: %d, f_h: %d",
  957. __func__, f->rect.left, f->rect.top, f->rect.width,
  958. f->rect.height, f->f_width, f->f_height);
  959. return ret;
  960. }
  961. static int fimc_lite_subdev_s_stream(struct v4l2_subdev *sd, int on)
  962. {
  963. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  964. if (fimc->out_path == FIMC_IO_DMA)
  965. return -ENOIOCTLCMD;
  966. /* TODO: */
  967. return 0;
  968. }
  969. static int fimc_lite_subdev_s_power(struct v4l2_subdev *sd, int on)
  970. {
  971. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  972. if (fimc->out_path == FIMC_IO_DMA)
  973. return -ENOIOCTLCMD;
  974. /* TODO: */
  975. return 0;
  976. }
  977. static int fimc_lite_log_status(struct v4l2_subdev *sd)
  978. {
  979. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  980. flite_hw_dump_regs(fimc, __func__);
  981. return 0;
  982. }
  983. static int fimc_lite_subdev_registered(struct v4l2_subdev *sd)
  984. {
  985. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  986. struct vb2_queue *q = &fimc->vb_queue;
  987. struct video_device *vfd;
  988. int ret;
  989. fimc->fmt = &fimc_lite_formats[0];
  990. fimc->out_path = FIMC_IO_DMA;
  991. vfd = video_device_alloc();
  992. if (!vfd) {
  993. v4l2_err(sd->v4l2_dev, "Failed to allocate video device\n");
  994. return -ENOMEM;
  995. }
  996. snprintf(vfd->name, sizeof(vfd->name), "fimc-lite.%d.capture",
  997. fimc->index);
  998. vfd->fops = &fimc_lite_fops;
  999. vfd->ioctl_ops = &fimc_lite_ioctl_ops;
  1000. vfd->v4l2_dev = sd->v4l2_dev;
  1001. vfd->minor = -1;
  1002. vfd->release = video_device_release;
  1003. vfd->lock = &fimc->lock;
  1004. fimc->vfd = vfd;
  1005. fimc->ref_count = 0;
  1006. fimc->reqbufs_count = 0;
  1007. INIT_LIST_HEAD(&fimc->pending_buf_q);
  1008. INIT_LIST_HEAD(&fimc->active_buf_q);
  1009. memset(q, 0, sizeof(*q));
  1010. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1011. q->io_modes = VB2_MMAP | VB2_USERPTR;
  1012. q->ops = &fimc_lite_qops;
  1013. q->mem_ops = &vb2_dma_contig_memops;
  1014. q->buf_struct_size = sizeof(struct flite_buffer);
  1015. q->drv_priv = fimc;
  1016. vb2_queue_init(q);
  1017. fimc->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1018. ret = media_entity_init(&vfd->entity, 1, &fimc->vd_pad, 0);
  1019. if (ret)
  1020. goto err;
  1021. video_set_drvdata(vfd, fimc);
  1022. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1023. if (ret)
  1024. goto err_vd;
  1025. v4l2_info(sd->v4l2_dev, "Registered %s as /dev/%s\n",
  1026. vfd->name, video_device_node_name(vfd));
  1027. return 0;
  1028. err_vd:
  1029. media_entity_cleanup(&vfd->entity);
  1030. err:
  1031. video_device_release(vfd);
  1032. return ret;
  1033. }
  1034. static void fimc_lite_subdev_unregistered(struct v4l2_subdev *sd)
  1035. {
  1036. struct fimc_lite *fimc = v4l2_get_subdevdata(sd);
  1037. if (fimc == NULL)
  1038. return;
  1039. if (fimc->vfd) {
  1040. video_unregister_device(fimc->vfd);
  1041. media_entity_cleanup(&fimc->vfd->entity);
  1042. fimc->vfd = NULL;
  1043. }
  1044. }
  1045. static const struct v4l2_subdev_internal_ops fimc_lite_subdev_internal_ops = {
  1046. .registered = fimc_lite_subdev_registered,
  1047. .unregistered = fimc_lite_subdev_unregistered,
  1048. };
  1049. static const struct v4l2_subdev_pad_ops fimc_lite_subdev_pad_ops = {
  1050. .enum_mbus_code = fimc_lite_subdev_enum_mbus_code,
  1051. .get_selection = fimc_lite_subdev_get_selection,
  1052. .set_selection = fimc_lite_subdev_set_selection,
  1053. .get_fmt = fimc_lite_subdev_get_fmt,
  1054. .set_fmt = fimc_lite_subdev_set_fmt,
  1055. };
  1056. static const struct v4l2_subdev_video_ops fimc_lite_subdev_video_ops = {
  1057. .s_stream = fimc_lite_subdev_s_stream,
  1058. };
  1059. static const struct v4l2_subdev_core_ops fimc_lite_core_ops = {
  1060. .s_power = fimc_lite_subdev_s_power,
  1061. .log_status = fimc_lite_log_status,
  1062. };
  1063. static struct v4l2_subdev_ops fimc_lite_subdev_ops = {
  1064. .core = &fimc_lite_core_ops,
  1065. .video = &fimc_lite_subdev_video_ops,
  1066. .pad = &fimc_lite_subdev_pad_ops,
  1067. };
  1068. static int fimc_lite_s_ctrl(struct v4l2_ctrl *ctrl)
  1069. {
  1070. struct fimc_lite *fimc = container_of(ctrl->handler, struct fimc_lite,
  1071. ctrl_handler);
  1072. set_bit(ST_FLITE_CONFIG, &fimc->state);
  1073. return 0;
  1074. }
  1075. static const struct v4l2_ctrl_ops fimc_lite_ctrl_ops = {
  1076. .s_ctrl = fimc_lite_s_ctrl,
  1077. };
  1078. static const struct v4l2_ctrl_config fimc_lite_ctrl = {
  1079. .ops = &fimc_lite_ctrl_ops,
  1080. .id = V4L2_CTRL_CLASS_USER | 0x1001,
  1081. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1082. .name = "Test Pattern 640x480",
  1083. };
  1084. static int fimc_lite_create_capture_subdev(struct fimc_lite *fimc)
  1085. {
  1086. struct v4l2_ctrl_handler *handler = &fimc->ctrl_handler;
  1087. struct v4l2_subdev *sd = &fimc->subdev;
  1088. int ret;
  1089. v4l2_subdev_init(sd, &fimc_lite_subdev_ops);
  1090. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1091. snprintf(sd->name, sizeof(sd->name), "FIMC-LITE.%d", fimc->index);
  1092. fimc->subdev_pads[FIMC_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  1093. fimc->subdev_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1094. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1095. fimc->subdev_pads, 0);
  1096. if (ret)
  1097. return ret;
  1098. v4l2_ctrl_handler_init(handler, 1);
  1099. fimc->test_pattern = v4l2_ctrl_new_custom(handler, &fimc_lite_ctrl,
  1100. NULL);
  1101. if (handler->error) {
  1102. media_entity_cleanup(&sd->entity);
  1103. return handler->error;
  1104. }
  1105. sd->ctrl_handler = handler;
  1106. sd->internal_ops = &fimc_lite_subdev_internal_ops;
  1107. sd->entity.ops = &fimc_lite_subdev_media_ops;
  1108. v4l2_set_subdevdata(sd, fimc);
  1109. return 0;
  1110. }
  1111. static void fimc_lite_unregister_capture_subdev(struct fimc_lite *fimc)
  1112. {
  1113. struct v4l2_subdev *sd = &fimc->subdev;
  1114. v4l2_device_unregister_subdev(sd);
  1115. media_entity_cleanup(&sd->entity);
  1116. v4l2_ctrl_handler_free(&fimc->ctrl_handler);
  1117. v4l2_set_subdevdata(sd, NULL);
  1118. }
  1119. static void fimc_lite_clk_put(struct fimc_lite *fimc)
  1120. {
  1121. if (IS_ERR_OR_NULL(fimc->clock))
  1122. return;
  1123. clk_unprepare(fimc->clock);
  1124. clk_put(fimc->clock);
  1125. fimc->clock = NULL;
  1126. }
  1127. static int fimc_lite_clk_get(struct fimc_lite *fimc)
  1128. {
  1129. int ret;
  1130. fimc->clock = clk_get(&fimc->pdev->dev, FLITE_CLK_NAME);
  1131. if (IS_ERR(fimc->clock))
  1132. return PTR_ERR(fimc->clock);
  1133. ret = clk_prepare(fimc->clock);
  1134. if (ret < 0) {
  1135. clk_put(fimc->clock);
  1136. fimc->clock = NULL;
  1137. }
  1138. return ret;
  1139. }
  1140. static int __devinit fimc_lite_probe(struct platform_device *pdev)
  1141. {
  1142. struct flite_drvdata *drv_data = fimc_lite_get_drvdata(pdev);
  1143. struct fimc_lite *fimc;
  1144. struct resource *res;
  1145. int ret;
  1146. fimc = devm_kzalloc(&pdev->dev, sizeof(*fimc), GFP_KERNEL);
  1147. if (!fimc)
  1148. return -ENOMEM;
  1149. fimc->index = pdev->id;
  1150. fimc->variant = drv_data->variant[fimc->index];
  1151. fimc->pdev = pdev;
  1152. init_waitqueue_head(&fimc->irq_queue);
  1153. spin_lock_init(&fimc->slock);
  1154. mutex_init(&fimc->lock);
  1155. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1156. fimc->regs = devm_request_and_ioremap(&pdev->dev, res);
  1157. if (fimc->regs == NULL) {
  1158. dev_err(&pdev->dev, "Failed to obtain io memory\n");
  1159. return -ENOENT;
  1160. }
  1161. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1162. if (res == NULL) {
  1163. dev_err(&pdev->dev, "Failed to get IRQ resource\n");
  1164. return -ENXIO;
  1165. }
  1166. ret = fimc_lite_clk_get(fimc);
  1167. if (ret)
  1168. return ret;
  1169. ret = devm_request_irq(&pdev->dev, res->start, flite_irq_handler,
  1170. 0, dev_name(&pdev->dev), fimc);
  1171. if (ret) {
  1172. dev_err(&pdev->dev, "Failed to install irq (%d)\n", ret);
  1173. goto err_clk;
  1174. }
  1175. /* The video node will be created within the subdev's registered() op */
  1176. ret = fimc_lite_create_capture_subdev(fimc);
  1177. if (ret)
  1178. goto err_clk;
  1179. platform_set_drvdata(pdev, fimc);
  1180. pm_runtime_enable(&pdev->dev);
  1181. ret = pm_runtime_get_sync(&pdev->dev);
  1182. if (ret < 0)
  1183. goto err_sd;
  1184. fimc->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  1185. if (IS_ERR(fimc->alloc_ctx)) {
  1186. ret = PTR_ERR(fimc->alloc_ctx);
  1187. goto err_pm;
  1188. }
  1189. pm_runtime_put(&pdev->dev);
  1190. dev_dbg(&pdev->dev, "FIMC-LITE.%d registered successfully\n",
  1191. fimc->index);
  1192. return 0;
  1193. err_pm:
  1194. pm_runtime_put(&pdev->dev);
  1195. err_sd:
  1196. fimc_lite_unregister_capture_subdev(fimc);
  1197. err_clk:
  1198. fimc_lite_clk_put(fimc);
  1199. return ret;
  1200. }
  1201. static int fimc_lite_runtime_resume(struct device *dev)
  1202. {
  1203. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1204. clk_enable(fimc->clock);
  1205. return 0;
  1206. }
  1207. static int fimc_lite_runtime_suspend(struct device *dev)
  1208. {
  1209. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1210. clk_disable(fimc->clock);
  1211. return 0;
  1212. }
  1213. #ifdef CONFIG_PM_SLEEP
  1214. static int fimc_lite_resume(struct device *dev)
  1215. {
  1216. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1217. struct flite_buffer *buf;
  1218. unsigned long flags;
  1219. int i;
  1220. spin_lock_irqsave(&fimc->slock, flags);
  1221. if (!test_and_clear_bit(ST_LPM, &fimc->state) ||
  1222. !test_bit(ST_FLITE_IN_USE, &fimc->state)) {
  1223. spin_unlock_irqrestore(&fimc->slock, flags);
  1224. return 0;
  1225. }
  1226. flite_hw_reset(fimc);
  1227. spin_unlock_irqrestore(&fimc->slock, flags);
  1228. if (!test_and_clear_bit(ST_FLITE_SUSPENDED, &fimc->state))
  1229. return 0;
  1230. INIT_LIST_HEAD(&fimc->active_buf_q);
  1231. fimc_pipeline_initialize(&fimc->pipeline, &fimc->vfd->entity, false);
  1232. fimc_lite_hw_init(fimc);
  1233. clear_bit(ST_FLITE_SUSPENDED, &fimc->state);
  1234. for (i = 0; i < fimc->reqbufs_count; i++) {
  1235. if (list_empty(&fimc->pending_buf_q))
  1236. break;
  1237. buf = fimc_lite_pending_queue_pop(fimc);
  1238. buffer_queue(&buf->vb);
  1239. }
  1240. return 0;
  1241. }
  1242. static int fimc_lite_suspend(struct device *dev)
  1243. {
  1244. struct fimc_lite *fimc = dev_get_drvdata(dev);
  1245. bool suspend = test_bit(ST_FLITE_IN_USE, &fimc->state);
  1246. int ret;
  1247. if (test_and_set_bit(ST_LPM, &fimc->state))
  1248. return 0;
  1249. ret = fimc_lite_stop_capture(fimc, suspend);
  1250. if (ret < 0 || !fimc_lite_active(fimc))
  1251. return ret;
  1252. return fimc_pipeline_shutdown(&fimc->pipeline);
  1253. }
  1254. #endif /* CONFIG_PM_SLEEP */
  1255. static int __devexit fimc_lite_remove(struct platform_device *pdev)
  1256. {
  1257. struct fimc_lite *fimc = platform_get_drvdata(pdev);
  1258. struct device *dev = &pdev->dev;
  1259. pm_runtime_disable(dev);
  1260. pm_runtime_set_suspended(dev);
  1261. fimc_lite_unregister_capture_subdev(fimc);
  1262. vb2_dma_contig_cleanup_ctx(fimc->alloc_ctx);
  1263. fimc_lite_clk_put(fimc);
  1264. dev_info(dev, "Driver unloaded\n");
  1265. return 0;
  1266. }
  1267. static struct flite_variant fimc_lite0_variant_exynos4 = {
  1268. .max_width = 8192,
  1269. .max_height = 8192,
  1270. .out_width_align = 8,
  1271. .win_hor_offs_align = 2,
  1272. .out_hor_offs_align = 8,
  1273. };
  1274. /* EXYNOS4212, EXYNOS4412 */
  1275. static struct flite_drvdata fimc_lite_drvdata_exynos4 = {
  1276. .variant = {
  1277. [0] = &fimc_lite0_variant_exynos4,
  1278. [1] = &fimc_lite0_variant_exynos4,
  1279. },
  1280. };
  1281. static struct platform_device_id fimc_lite_driver_ids[] = {
  1282. {
  1283. .name = "exynos-fimc-lite",
  1284. .driver_data = (unsigned long)&fimc_lite_drvdata_exynos4,
  1285. },
  1286. { /* sentinel */ },
  1287. };
  1288. MODULE_DEVICE_TABLE(platform, fimc_lite_driver_ids);
  1289. static const struct dev_pm_ops fimc_lite_pm_ops = {
  1290. SET_SYSTEM_SLEEP_PM_OPS(fimc_lite_suspend, fimc_lite_resume)
  1291. SET_RUNTIME_PM_OPS(fimc_lite_runtime_suspend, fimc_lite_runtime_resume,
  1292. NULL)
  1293. };
  1294. static struct platform_driver fimc_lite_driver = {
  1295. .probe = fimc_lite_probe,
  1296. .remove = __devexit_p(fimc_lite_remove),
  1297. .id_table = fimc_lite_driver_ids,
  1298. .driver = {
  1299. .name = FIMC_LITE_DRV_NAME,
  1300. .owner = THIS_MODULE,
  1301. .pm = &fimc_lite_pm_ops,
  1302. }
  1303. };
  1304. module_platform_driver(fimc_lite_driver);
  1305. MODULE_LICENSE("GPL");
  1306. MODULE_ALIAS("platform:" FIMC_LITE_DRV_NAME);