core-transaction.c 34 KB

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  1. /*
  2. * Core IEEE1394 transaction logic
  3. *
  4. * Copyright (C) 2004-2006 Kristian Hoegsberg <krh@bitplanet.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software Foundation,
  18. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include <linux/bug.h>
  21. #include <linux/completion.h>
  22. #include <linux/device.h>
  23. #include <linux/errno.h>
  24. #include <linux/firewire.h>
  25. #include <linux/firewire-constants.h>
  26. #include <linux/fs.h>
  27. #include <linux/init.h>
  28. #include <linux/idr.h>
  29. #include <linux/jiffies.h>
  30. #include <linux/kernel.h>
  31. #include <linux/list.h>
  32. #include <linux/module.h>
  33. #include <linux/slab.h>
  34. #include <linux/spinlock.h>
  35. #include <linux/string.h>
  36. #include <linux/timer.h>
  37. #include <linux/types.h>
  38. #include <asm/byteorder.h>
  39. #include "core.h"
  40. #define HEADER_PRI(pri) ((pri) << 0)
  41. #define HEADER_TCODE(tcode) ((tcode) << 4)
  42. #define HEADER_RETRY(retry) ((retry) << 8)
  43. #define HEADER_TLABEL(tlabel) ((tlabel) << 10)
  44. #define HEADER_DESTINATION(destination) ((destination) << 16)
  45. #define HEADER_SOURCE(source) ((source) << 16)
  46. #define HEADER_RCODE(rcode) ((rcode) << 12)
  47. #define HEADER_OFFSET_HIGH(offset_high) ((offset_high) << 0)
  48. #define HEADER_DATA_LENGTH(length) ((length) << 16)
  49. #define HEADER_EXTENDED_TCODE(tcode) ((tcode) << 0)
  50. #define HEADER_GET_TCODE(q) (((q) >> 4) & 0x0f)
  51. #define HEADER_GET_TLABEL(q) (((q) >> 10) & 0x3f)
  52. #define HEADER_GET_RCODE(q) (((q) >> 12) & 0x0f)
  53. #define HEADER_GET_DESTINATION(q) (((q) >> 16) & 0xffff)
  54. #define HEADER_GET_SOURCE(q) (((q) >> 16) & 0xffff)
  55. #define HEADER_GET_OFFSET_HIGH(q) (((q) >> 0) & 0xffff)
  56. #define HEADER_GET_DATA_LENGTH(q) (((q) >> 16) & 0xffff)
  57. #define HEADER_GET_EXTENDED_TCODE(q) (((q) >> 0) & 0xffff)
  58. #define HEADER_DESTINATION_IS_BROADCAST(q) \
  59. (((q) & HEADER_DESTINATION(0x3f)) == HEADER_DESTINATION(0x3f))
  60. #define PHY_PACKET_CONFIG 0x0
  61. #define PHY_PACKET_LINK_ON 0x1
  62. #define PHY_PACKET_SELF_ID 0x2
  63. #define PHY_CONFIG_GAP_COUNT(gap_count) (((gap_count) << 16) | (1 << 22))
  64. #define PHY_CONFIG_ROOT_ID(node_id) ((((node_id) & 0x3f) << 24) | (1 << 23))
  65. #define PHY_IDENTIFIER(id) ((id) << 30)
  66. static int close_transaction(struct fw_transaction *transaction,
  67. struct fw_card *card, int rcode)
  68. {
  69. struct fw_transaction *t;
  70. unsigned long flags;
  71. spin_lock_irqsave(&card->lock, flags);
  72. list_for_each_entry(t, &card->transaction_list, link) {
  73. if (t == transaction) {
  74. list_del_init(&t->link);
  75. card->tlabel_mask &= ~(1ULL << t->tlabel);
  76. break;
  77. }
  78. }
  79. spin_unlock_irqrestore(&card->lock, flags);
  80. if (&t->link != &card->transaction_list) {
  81. del_timer_sync(&t->split_timeout_timer);
  82. t->callback(card, rcode, NULL, 0, t->callback_data);
  83. return 0;
  84. }
  85. return -ENOENT;
  86. }
  87. /*
  88. * Only valid for transactions that are potentially pending (ie have
  89. * been sent).
  90. */
  91. int fw_cancel_transaction(struct fw_card *card,
  92. struct fw_transaction *transaction)
  93. {
  94. /*
  95. * Cancel the packet transmission if it's still queued. That
  96. * will call the packet transmission callback which cancels
  97. * the transaction.
  98. */
  99. if (card->driver->cancel_packet(card, &transaction->packet) == 0)
  100. return 0;
  101. /*
  102. * If the request packet has already been sent, we need to see
  103. * if the transaction is still pending and remove it in that case.
  104. */
  105. return close_transaction(transaction, card, RCODE_CANCELLED);
  106. }
  107. EXPORT_SYMBOL(fw_cancel_transaction);
  108. static void split_transaction_timeout_callback(unsigned long data)
  109. {
  110. struct fw_transaction *t = (struct fw_transaction *)data;
  111. struct fw_card *card = t->card;
  112. unsigned long flags;
  113. spin_lock_irqsave(&card->lock, flags);
  114. if (list_empty(&t->link)) {
  115. spin_unlock_irqrestore(&card->lock, flags);
  116. return;
  117. }
  118. list_del(&t->link);
  119. card->tlabel_mask &= ~(1ULL << t->tlabel);
  120. spin_unlock_irqrestore(&card->lock, flags);
  121. card->driver->cancel_packet(card, &t->packet);
  122. /*
  123. * At this point cancel_packet will never call the transaction
  124. * callback, since we just took the transaction out of the list.
  125. * So do it here.
  126. */
  127. t->callback(card, RCODE_CANCELLED, NULL, 0, t->callback_data);
  128. }
  129. static void transmit_complete_callback(struct fw_packet *packet,
  130. struct fw_card *card, int status)
  131. {
  132. struct fw_transaction *t =
  133. container_of(packet, struct fw_transaction, packet);
  134. switch (status) {
  135. case ACK_COMPLETE:
  136. close_transaction(t, card, RCODE_COMPLETE);
  137. break;
  138. case ACK_PENDING:
  139. t->timestamp = packet->timestamp;
  140. break;
  141. case ACK_BUSY_X:
  142. case ACK_BUSY_A:
  143. case ACK_BUSY_B:
  144. close_transaction(t, card, RCODE_BUSY);
  145. break;
  146. case ACK_DATA_ERROR:
  147. close_transaction(t, card, RCODE_DATA_ERROR);
  148. break;
  149. case ACK_TYPE_ERROR:
  150. close_transaction(t, card, RCODE_TYPE_ERROR);
  151. break;
  152. default:
  153. /*
  154. * In this case the ack is really a juju specific
  155. * rcode, so just forward that to the callback.
  156. */
  157. close_transaction(t, card, status);
  158. break;
  159. }
  160. }
  161. static void fw_fill_request(struct fw_packet *packet, int tcode, int tlabel,
  162. int destination_id, int source_id, int generation, int speed,
  163. unsigned long long offset, void *payload, size_t length)
  164. {
  165. int ext_tcode;
  166. if (tcode == TCODE_STREAM_DATA) {
  167. packet->header[0] =
  168. HEADER_DATA_LENGTH(length) |
  169. destination_id |
  170. HEADER_TCODE(TCODE_STREAM_DATA);
  171. packet->header_length = 4;
  172. packet->payload = payload;
  173. packet->payload_length = length;
  174. goto common;
  175. }
  176. if (tcode > 0x10) {
  177. ext_tcode = tcode & ~0x10;
  178. tcode = TCODE_LOCK_REQUEST;
  179. } else
  180. ext_tcode = 0;
  181. packet->header[0] =
  182. HEADER_RETRY(RETRY_X) |
  183. HEADER_TLABEL(tlabel) |
  184. HEADER_TCODE(tcode) |
  185. HEADER_DESTINATION(destination_id);
  186. packet->header[1] =
  187. HEADER_OFFSET_HIGH(offset >> 32) | HEADER_SOURCE(source_id);
  188. packet->header[2] =
  189. offset;
  190. switch (tcode) {
  191. case TCODE_WRITE_QUADLET_REQUEST:
  192. packet->header[3] = *(u32 *)payload;
  193. packet->header_length = 16;
  194. packet->payload_length = 0;
  195. break;
  196. case TCODE_LOCK_REQUEST:
  197. case TCODE_WRITE_BLOCK_REQUEST:
  198. packet->header[3] =
  199. HEADER_DATA_LENGTH(length) |
  200. HEADER_EXTENDED_TCODE(ext_tcode);
  201. packet->header_length = 16;
  202. packet->payload = payload;
  203. packet->payload_length = length;
  204. break;
  205. case TCODE_READ_QUADLET_REQUEST:
  206. packet->header_length = 12;
  207. packet->payload_length = 0;
  208. break;
  209. case TCODE_READ_BLOCK_REQUEST:
  210. packet->header[3] =
  211. HEADER_DATA_LENGTH(length) |
  212. HEADER_EXTENDED_TCODE(ext_tcode);
  213. packet->header_length = 16;
  214. packet->payload_length = 0;
  215. break;
  216. default:
  217. WARN(1, "wrong tcode %d", tcode);
  218. }
  219. common:
  220. packet->speed = speed;
  221. packet->generation = generation;
  222. packet->ack = 0;
  223. packet->payload_mapped = false;
  224. }
  225. static int allocate_tlabel(struct fw_card *card)
  226. {
  227. int tlabel;
  228. tlabel = card->current_tlabel;
  229. while (card->tlabel_mask & (1ULL << tlabel)) {
  230. tlabel = (tlabel + 1) & 0x3f;
  231. if (tlabel == card->current_tlabel)
  232. return -EBUSY;
  233. }
  234. card->current_tlabel = (tlabel + 1) & 0x3f;
  235. card->tlabel_mask |= 1ULL << tlabel;
  236. return tlabel;
  237. }
  238. /**
  239. * This function provides low-level access to the IEEE1394 transaction
  240. * logic. Most C programs would use either fw_read(), fw_write() or
  241. * fw_lock() instead - those function are convenience wrappers for
  242. * this function. The fw_send_request() function is primarily
  243. * provided as a flexible, one-stop entry point for languages bindings
  244. * and protocol bindings.
  245. *
  246. * FIXME: Document this function further, in particular the possible
  247. * values for rcode in the callback. In short, we map ACK_COMPLETE to
  248. * RCODE_COMPLETE, internal errors set errno and set rcode to
  249. * RCODE_SEND_ERROR (which is out of range for standard ieee1394
  250. * rcodes). All other rcodes are forwarded unchanged. For all
  251. * errors, payload is NULL, length is 0.
  252. *
  253. * Can not expect the callback to be called before the function
  254. * returns, though this does happen in some cases (ACK_COMPLETE and
  255. * errors).
  256. *
  257. * The payload is only used for write requests and must not be freed
  258. * until the callback has been called.
  259. *
  260. * @param card the card from which to send the request
  261. * @param tcode the tcode for this transaction. Do not use
  262. * TCODE_LOCK_REQUEST directly, instead use TCODE_LOCK_MASK_SWAP
  263. * etc. to specify tcode and ext_tcode.
  264. * @param node_id the destination node ID (bus ID and PHY ID concatenated)
  265. * @param generation the generation for which node_id is valid
  266. * @param speed the speed to use for sending the request
  267. * @param offset the 48 bit offset on the destination node
  268. * @param payload the data payload for the request subaction
  269. * @param length the length in bytes of the data to read
  270. * @param callback function to be called when the transaction is completed
  271. * @param callback_data pointer to arbitrary data, which will be
  272. * passed to the callback
  273. *
  274. * In case of asynchronous stream packets i.e. TCODE_STREAM_DATA, the caller
  275. * needs to synthesize @destination_id with fw_stream_packet_destination_id().
  276. */
  277. void fw_send_request(struct fw_card *card, struct fw_transaction *t, int tcode,
  278. int destination_id, int generation, int speed,
  279. unsigned long long offset, void *payload, size_t length,
  280. fw_transaction_callback_t callback, void *callback_data)
  281. {
  282. unsigned long flags;
  283. int tlabel;
  284. /*
  285. * Allocate tlabel from the bitmap and put the transaction on
  286. * the list while holding the card spinlock.
  287. */
  288. spin_lock_irqsave(&card->lock, flags);
  289. tlabel = allocate_tlabel(card);
  290. if (tlabel < 0) {
  291. spin_unlock_irqrestore(&card->lock, flags);
  292. callback(card, RCODE_SEND_ERROR, NULL, 0, callback_data);
  293. return;
  294. }
  295. t->node_id = destination_id;
  296. t->tlabel = tlabel;
  297. t->card = card;
  298. setup_timer(&t->split_timeout_timer,
  299. split_transaction_timeout_callback, (unsigned long)t);
  300. /* FIXME: start this timer later, relative to t->timestamp */
  301. mod_timer(&t->split_timeout_timer,
  302. jiffies + card->split_timeout_jiffies);
  303. t->callback = callback;
  304. t->callback_data = callback_data;
  305. fw_fill_request(&t->packet, tcode, t->tlabel,
  306. destination_id, card->node_id, generation,
  307. speed, offset, payload, length);
  308. t->packet.callback = transmit_complete_callback;
  309. list_add_tail(&t->link, &card->transaction_list);
  310. spin_unlock_irqrestore(&card->lock, flags);
  311. card->driver->send_request(card, &t->packet);
  312. }
  313. EXPORT_SYMBOL(fw_send_request);
  314. struct transaction_callback_data {
  315. struct completion done;
  316. void *payload;
  317. int rcode;
  318. };
  319. static void transaction_callback(struct fw_card *card, int rcode,
  320. void *payload, size_t length, void *data)
  321. {
  322. struct transaction_callback_data *d = data;
  323. if (rcode == RCODE_COMPLETE)
  324. memcpy(d->payload, payload, length);
  325. d->rcode = rcode;
  326. complete(&d->done);
  327. }
  328. /**
  329. * fw_run_transaction - send request and sleep until transaction is completed
  330. *
  331. * Returns the RCODE.
  332. */
  333. int fw_run_transaction(struct fw_card *card, int tcode, int destination_id,
  334. int generation, int speed, unsigned long long offset,
  335. void *payload, size_t length)
  336. {
  337. struct transaction_callback_data d;
  338. struct fw_transaction t;
  339. init_timer_on_stack(&t.split_timeout_timer);
  340. init_completion(&d.done);
  341. d.payload = payload;
  342. fw_send_request(card, &t, tcode, destination_id, generation, speed,
  343. offset, payload, length, transaction_callback, &d);
  344. wait_for_completion(&d.done);
  345. destroy_timer_on_stack(&t.split_timeout_timer);
  346. return d.rcode;
  347. }
  348. EXPORT_SYMBOL(fw_run_transaction);
  349. static DEFINE_MUTEX(phy_config_mutex);
  350. static DECLARE_COMPLETION(phy_config_done);
  351. static void transmit_phy_packet_callback(struct fw_packet *packet,
  352. struct fw_card *card, int status)
  353. {
  354. complete(&phy_config_done);
  355. }
  356. static struct fw_packet phy_config_packet = {
  357. .header_length = 8,
  358. .payload_length = 0,
  359. .speed = SCODE_100,
  360. .callback = transmit_phy_packet_callback,
  361. };
  362. void fw_send_phy_config(struct fw_card *card,
  363. int node_id, int generation, int gap_count)
  364. {
  365. long timeout = DIV_ROUND_UP(HZ, 10);
  366. u32 data = PHY_IDENTIFIER(PHY_PACKET_CONFIG) |
  367. PHY_CONFIG_ROOT_ID(node_id) |
  368. PHY_CONFIG_GAP_COUNT(gap_count);
  369. mutex_lock(&phy_config_mutex);
  370. phy_config_packet.header[0] = data;
  371. phy_config_packet.header[1] = ~data;
  372. phy_config_packet.generation = generation;
  373. INIT_COMPLETION(phy_config_done);
  374. card->driver->send_request(card, &phy_config_packet);
  375. wait_for_completion_timeout(&phy_config_done, timeout);
  376. mutex_unlock(&phy_config_mutex);
  377. }
  378. static struct fw_address_handler *lookup_overlapping_address_handler(
  379. struct list_head *list, unsigned long long offset, size_t length)
  380. {
  381. struct fw_address_handler *handler;
  382. list_for_each_entry(handler, list, link) {
  383. if (handler->offset < offset + length &&
  384. offset < handler->offset + handler->length)
  385. return handler;
  386. }
  387. return NULL;
  388. }
  389. static bool is_enclosing_handler(struct fw_address_handler *handler,
  390. unsigned long long offset, size_t length)
  391. {
  392. return handler->offset <= offset &&
  393. offset + length <= handler->offset + handler->length;
  394. }
  395. static struct fw_address_handler *lookup_enclosing_address_handler(
  396. struct list_head *list, unsigned long long offset, size_t length)
  397. {
  398. struct fw_address_handler *handler;
  399. list_for_each_entry(handler, list, link) {
  400. if (is_enclosing_handler(handler, offset, length))
  401. return handler;
  402. }
  403. return NULL;
  404. }
  405. static DEFINE_SPINLOCK(address_handler_lock);
  406. static LIST_HEAD(address_handler_list);
  407. const struct fw_address_region fw_high_memory_region =
  408. { .start = 0x000100000000ULL, .end = 0xffffe0000000ULL, };
  409. EXPORT_SYMBOL(fw_high_memory_region);
  410. #if 0
  411. const struct fw_address_region fw_low_memory_region =
  412. { .start = 0x000000000000ULL, .end = 0x000100000000ULL, };
  413. const struct fw_address_region fw_private_region =
  414. { .start = 0xffffe0000000ULL, .end = 0xfffff0000000ULL, };
  415. const struct fw_address_region fw_csr_region =
  416. { .start = CSR_REGISTER_BASE,
  417. .end = CSR_REGISTER_BASE | CSR_CONFIG_ROM_END, };
  418. const struct fw_address_region fw_unit_space_region =
  419. { .start = 0xfffff0000900ULL, .end = 0x1000000000000ULL, };
  420. #endif /* 0 */
  421. static bool is_in_fcp_region(u64 offset, size_t length)
  422. {
  423. return offset >= (CSR_REGISTER_BASE | CSR_FCP_COMMAND) &&
  424. offset + length <= (CSR_REGISTER_BASE | CSR_FCP_END);
  425. }
  426. /**
  427. * fw_core_add_address_handler - register for incoming requests
  428. * @handler: callback
  429. * @region: region in the IEEE 1212 node space address range
  430. *
  431. * region->start, ->end, and handler->length have to be quadlet-aligned.
  432. *
  433. * When a request is received that falls within the specified address range,
  434. * the specified callback is invoked. The parameters passed to the callback
  435. * give the details of the particular request.
  436. *
  437. * Return value: 0 on success, non-zero otherwise.
  438. *
  439. * The start offset of the handler's address region is determined by
  440. * fw_core_add_address_handler() and is returned in handler->offset.
  441. *
  442. * Address allocations are exclusive, except for the FCP registers.
  443. */
  444. int fw_core_add_address_handler(struct fw_address_handler *handler,
  445. const struct fw_address_region *region)
  446. {
  447. struct fw_address_handler *other;
  448. unsigned long flags;
  449. int ret = -EBUSY;
  450. if (region->start & 0xffff000000000003ULL ||
  451. region->end & 0xffff000000000003ULL ||
  452. region->start >= region->end ||
  453. handler->length & 3 ||
  454. handler->length == 0)
  455. return -EINVAL;
  456. spin_lock_irqsave(&address_handler_lock, flags);
  457. handler->offset = region->start;
  458. while (handler->offset + handler->length <= region->end) {
  459. if (is_in_fcp_region(handler->offset, handler->length))
  460. other = NULL;
  461. else
  462. other = lookup_overlapping_address_handler
  463. (&address_handler_list,
  464. handler->offset, handler->length);
  465. if (other != NULL) {
  466. handler->offset += other->length;
  467. } else {
  468. list_add_tail(&handler->link, &address_handler_list);
  469. ret = 0;
  470. break;
  471. }
  472. }
  473. spin_unlock_irqrestore(&address_handler_lock, flags);
  474. return ret;
  475. }
  476. EXPORT_SYMBOL(fw_core_add_address_handler);
  477. /**
  478. * fw_core_remove_address_handler - unregister an address handler
  479. */
  480. void fw_core_remove_address_handler(struct fw_address_handler *handler)
  481. {
  482. unsigned long flags;
  483. spin_lock_irqsave(&address_handler_lock, flags);
  484. list_del(&handler->link);
  485. spin_unlock_irqrestore(&address_handler_lock, flags);
  486. }
  487. EXPORT_SYMBOL(fw_core_remove_address_handler);
  488. struct fw_request {
  489. struct fw_packet response;
  490. u32 request_header[4];
  491. int ack;
  492. u32 length;
  493. u32 data[0];
  494. };
  495. static void free_response_callback(struct fw_packet *packet,
  496. struct fw_card *card, int status)
  497. {
  498. struct fw_request *request;
  499. request = container_of(packet, struct fw_request, response);
  500. kfree(request);
  501. }
  502. int fw_get_response_length(struct fw_request *r)
  503. {
  504. int tcode, ext_tcode, data_length;
  505. tcode = HEADER_GET_TCODE(r->request_header[0]);
  506. switch (tcode) {
  507. case TCODE_WRITE_QUADLET_REQUEST:
  508. case TCODE_WRITE_BLOCK_REQUEST:
  509. return 0;
  510. case TCODE_READ_QUADLET_REQUEST:
  511. return 4;
  512. case TCODE_READ_BLOCK_REQUEST:
  513. data_length = HEADER_GET_DATA_LENGTH(r->request_header[3]);
  514. return data_length;
  515. case TCODE_LOCK_REQUEST:
  516. ext_tcode = HEADER_GET_EXTENDED_TCODE(r->request_header[3]);
  517. data_length = HEADER_GET_DATA_LENGTH(r->request_header[3]);
  518. switch (ext_tcode) {
  519. case EXTCODE_FETCH_ADD:
  520. case EXTCODE_LITTLE_ADD:
  521. return data_length;
  522. default:
  523. return data_length / 2;
  524. }
  525. default:
  526. WARN(1, "wrong tcode %d", tcode);
  527. return 0;
  528. }
  529. }
  530. void fw_fill_response(struct fw_packet *response, u32 *request_header,
  531. int rcode, void *payload, size_t length)
  532. {
  533. int tcode, tlabel, extended_tcode, source, destination;
  534. tcode = HEADER_GET_TCODE(request_header[0]);
  535. tlabel = HEADER_GET_TLABEL(request_header[0]);
  536. source = HEADER_GET_DESTINATION(request_header[0]);
  537. destination = HEADER_GET_SOURCE(request_header[1]);
  538. extended_tcode = HEADER_GET_EXTENDED_TCODE(request_header[3]);
  539. response->header[0] =
  540. HEADER_RETRY(RETRY_1) |
  541. HEADER_TLABEL(tlabel) |
  542. HEADER_DESTINATION(destination);
  543. response->header[1] =
  544. HEADER_SOURCE(source) |
  545. HEADER_RCODE(rcode);
  546. response->header[2] = 0;
  547. switch (tcode) {
  548. case TCODE_WRITE_QUADLET_REQUEST:
  549. case TCODE_WRITE_BLOCK_REQUEST:
  550. response->header[0] |= HEADER_TCODE(TCODE_WRITE_RESPONSE);
  551. response->header_length = 12;
  552. response->payload_length = 0;
  553. break;
  554. case TCODE_READ_QUADLET_REQUEST:
  555. response->header[0] |=
  556. HEADER_TCODE(TCODE_READ_QUADLET_RESPONSE);
  557. if (payload != NULL)
  558. response->header[3] = *(u32 *)payload;
  559. else
  560. response->header[3] = 0;
  561. response->header_length = 16;
  562. response->payload_length = 0;
  563. break;
  564. case TCODE_READ_BLOCK_REQUEST:
  565. case TCODE_LOCK_REQUEST:
  566. response->header[0] |= HEADER_TCODE(tcode + 2);
  567. response->header[3] =
  568. HEADER_DATA_LENGTH(length) |
  569. HEADER_EXTENDED_TCODE(extended_tcode);
  570. response->header_length = 16;
  571. response->payload = payload;
  572. response->payload_length = length;
  573. break;
  574. default:
  575. WARN(1, "wrong tcode %d", tcode);
  576. }
  577. response->payload_mapped = false;
  578. }
  579. EXPORT_SYMBOL(fw_fill_response);
  580. static u32 compute_split_timeout_timestamp(struct fw_card *card,
  581. u32 request_timestamp)
  582. {
  583. unsigned int cycles;
  584. u32 timestamp;
  585. cycles = card->split_timeout_cycles;
  586. cycles += request_timestamp & 0x1fff;
  587. timestamp = request_timestamp & ~0x1fff;
  588. timestamp += (cycles / 8000) << 13;
  589. timestamp |= cycles % 8000;
  590. return timestamp;
  591. }
  592. static struct fw_request *allocate_request(struct fw_card *card,
  593. struct fw_packet *p)
  594. {
  595. struct fw_request *request;
  596. u32 *data, length;
  597. int request_tcode;
  598. request_tcode = HEADER_GET_TCODE(p->header[0]);
  599. switch (request_tcode) {
  600. case TCODE_WRITE_QUADLET_REQUEST:
  601. data = &p->header[3];
  602. length = 4;
  603. break;
  604. case TCODE_WRITE_BLOCK_REQUEST:
  605. case TCODE_LOCK_REQUEST:
  606. data = p->payload;
  607. length = HEADER_GET_DATA_LENGTH(p->header[3]);
  608. break;
  609. case TCODE_READ_QUADLET_REQUEST:
  610. data = NULL;
  611. length = 4;
  612. break;
  613. case TCODE_READ_BLOCK_REQUEST:
  614. data = NULL;
  615. length = HEADER_GET_DATA_LENGTH(p->header[3]);
  616. break;
  617. default:
  618. fw_error("ERROR - corrupt request received - %08x %08x %08x\n",
  619. p->header[0], p->header[1], p->header[2]);
  620. return NULL;
  621. }
  622. request = kmalloc(sizeof(*request) + length, GFP_ATOMIC);
  623. if (request == NULL)
  624. return NULL;
  625. request->response.speed = p->speed;
  626. request->response.timestamp =
  627. compute_split_timeout_timestamp(card, p->timestamp);
  628. request->response.generation = p->generation;
  629. request->response.ack = 0;
  630. request->response.callback = free_response_callback;
  631. request->ack = p->ack;
  632. request->length = length;
  633. if (data)
  634. memcpy(request->data, data, length);
  635. memcpy(request->request_header, p->header, sizeof(p->header));
  636. return request;
  637. }
  638. void fw_send_response(struct fw_card *card,
  639. struct fw_request *request, int rcode)
  640. {
  641. if (WARN_ONCE(!request, "invalid for FCP address handlers"))
  642. return;
  643. /* unified transaction or broadcast transaction: don't respond */
  644. if (request->ack != ACK_PENDING ||
  645. HEADER_DESTINATION_IS_BROADCAST(request->request_header[0])) {
  646. kfree(request);
  647. return;
  648. }
  649. if (rcode == RCODE_COMPLETE)
  650. fw_fill_response(&request->response, request->request_header,
  651. rcode, request->data,
  652. fw_get_response_length(request));
  653. else
  654. fw_fill_response(&request->response, request->request_header,
  655. rcode, NULL, 0);
  656. card->driver->send_response(card, &request->response);
  657. }
  658. EXPORT_SYMBOL(fw_send_response);
  659. static void handle_exclusive_region_request(struct fw_card *card,
  660. struct fw_packet *p,
  661. struct fw_request *request,
  662. unsigned long long offset)
  663. {
  664. struct fw_address_handler *handler;
  665. unsigned long flags;
  666. int tcode, destination, source;
  667. tcode = HEADER_GET_TCODE(p->header[0]);
  668. destination = HEADER_GET_DESTINATION(p->header[0]);
  669. source = HEADER_GET_SOURCE(p->header[1]);
  670. spin_lock_irqsave(&address_handler_lock, flags);
  671. handler = lookup_enclosing_address_handler(&address_handler_list,
  672. offset, request->length);
  673. spin_unlock_irqrestore(&address_handler_lock, flags);
  674. /*
  675. * FIXME: lookup the fw_node corresponding to the sender of
  676. * this request and pass that to the address handler instead
  677. * of the node ID. We may also want to move the address
  678. * allocations to fw_node so we only do this callback if the
  679. * upper layers registered it for this node.
  680. */
  681. if (handler == NULL)
  682. fw_send_response(card, request, RCODE_ADDRESS_ERROR);
  683. else
  684. handler->address_callback(card, request,
  685. tcode, destination, source,
  686. p->generation, p->speed, offset,
  687. request->data, request->length,
  688. handler->callback_data);
  689. }
  690. static void handle_fcp_region_request(struct fw_card *card,
  691. struct fw_packet *p,
  692. struct fw_request *request,
  693. unsigned long long offset)
  694. {
  695. struct fw_address_handler *handler;
  696. unsigned long flags;
  697. int tcode, destination, source;
  698. if ((offset != (CSR_REGISTER_BASE | CSR_FCP_COMMAND) &&
  699. offset != (CSR_REGISTER_BASE | CSR_FCP_RESPONSE)) ||
  700. request->length > 0x200) {
  701. fw_send_response(card, request, RCODE_ADDRESS_ERROR);
  702. return;
  703. }
  704. tcode = HEADER_GET_TCODE(p->header[0]);
  705. destination = HEADER_GET_DESTINATION(p->header[0]);
  706. source = HEADER_GET_SOURCE(p->header[1]);
  707. if (tcode != TCODE_WRITE_QUADLET_REQUEST &&
  708. tcode != TCODE_WRITE_BLOCK_REQUEST) {
  709. fw_send_response(card, request, RCODE_TYPE_ERROR);
  710. return;
  711. }
  712. spin_lock_irqsave(&address_handler_lock, flags);
  713. list_for_each_entry(handler, &address_handler_list, link) {
  714. if (is_enclosing_handler(handler, offset, request->length))
  715. handler->address_callback(card, NULL, tcode,
  716. destination, source,
  717. p->generation, p->speed,
  718. offset, request->data,
  719. request->length,
  720. handler->callback_data);
  721. }
  722. spin_unlock_irqrestore(&address_handler_lock, flags);
  723. fw_send_response(card, request, RCODE_COMPLETE);
  724. }
  725. void fw_core_handle_request(struct fw_card *card, struct fw_packet *p)
  726. {
  727. struct fw_request *request;
  728. unsigned long long offset;
  729. if (p->ack != ACK_PENDING && p->ack != ACK_COMPLETE)
  730. return;
  731. request = allocate_request(card, p);
  732. if (request == NULL) {
  733. /* FIXME: send statically allocated busy packet. */
  734. return;
  735. }
  736. offset = ((u64)HEADER_GET_OFFSET_HIGH(p->header[1]) << 32) |
  737. p->header[2];
  738. if (!is_in_fcp_region(offset, request->length))
  739. handle_exclusive_region_request(card, p, request, offset);
  740. else
  741. handle_fcp_region_request(card, p, request, offset);
  742. }
  743. EXPORT_SYMBOL(fw_core_handle_request);
  744. void fw_core_handle_response(struct fw_card *card, struct fw_packet *p)
  745. {
  746. struct fw_transaction *t;
  747. unsigned long flags;
  748. u32 *data;
  749. size_t data_length;
  750. int tcode, tlabel, destination, source, rcode;
  751. tcode = HEADER_GET_TCODE(p->header[0]);
  752. tlabel = HEADER_GET_TLABEL(p->header[0]);
  753. destination = HEADER_GET_DESTINATION(p->header[0]);
  754. source = HEADER_GET_SOURCE(p->header[1]);
  755. rcode = HEADER_GET_RCODE(p->header[1]);
  756. spin_lock_irqsave(&card->lock, flags);
  757. list_for_each_entry(t, &card->transaction_list, link) {
  758. if (t->node_id == source && t->tlabel == tlabel) {
  759. list_del_init(&t->link);
  760. card->tlabel_mask &= ~(1ULL << t->tlabel);
  761. break;
  762. }
  763. }
  764. spin_unlock_irqrestore(&card->lock, flags);
  765. if (&t->link == &card->transaction_list) {
  766. fw_notify("Unsolicited response (source %x, tlabel %x)\n",
  767. source, tlabel);
  768. return;
  769. }
  770. /*
  771. * FIXME: sanity check packet, is length correct, does tcodes
  772. * and addresses match.
  773. */
  774. switch (tcode) {
  775. case TCODE_READ_QUADLET_RESPONSE:
  776. data = (u32 *) &p->header[3];
  777. data_length = 4;
  778. break;
  779. case TCODE_WRITE_RESPONSE:
  780. data = NULL;
  781. data_length = 0;
  782. break;
  783. case TCODE_READ_BLOCK_RESPONSE:
  784. case TCODE_LOCK_RESPONSE:
  785. data = p->payload;
  786. data_length = HEADER_GET_DATA_LENGTH(p->header[3]);
  787. break;
  788. default:
  789. /* Should never happen, this is just to shut up gcc. */
  790. data = NULL;
  791. data_length = 0;
  792. break;
  793. }
  794. del_timer_sync(&t->split_timeout_timer);
  795. /*
  796. * The response handler may be executed while the request handler
  797. * is still pending. Cancel the request handler.
  798. */
  799. card->driver->cancel_packet(card, &t->packet);
  800. t->callback(card, rcode, data, data_length, t->callback_data);
  801. }
  802. EXPORT_SYMBOL(fw_core_handle_response);
  803. static const struct fw_address_region topology_map_region =
  804. { .start = CSR_REGISTER_BASE | CSR_TOPOLOGY_MAP,
  805. .end = CSR_REGISTER_BASE | CSR_TOPOLOGY_MAP_END, };
  806. static void handle_topology_map(struct fw_card *card, struct fw_request *request,
  807. int tcode, int destination, int source, int generation,
  808. int speed, unsigned long long offset,
  809. void *payload, size_t length, void *callback_data)
  810. {
  811. int start;
  812. if (!TCODE_IS_READ_REQUEST(tcode)) {
  813. fw_send_response(card, request, RCODE_TYPE_ERROR);
  814. return;
  815. }
  816. if ((offset & 3) > 0 || (length & 3) > 0) {
  817. fw_send_response(card, request, RCODE_ADDRESS_ERROR);
  818. return;
  819. }
  820. start = (offset - topology_map_region.start) / 4;
  821. memcpy(payload, &card->topology_map[start], length);
  822. fw_send_response(card, request, RCODE_COMPLETE);
  823. }
  824. static struct fw_address_handler topology_map = {
  825. .length = 0x400,
  826. .address_callback = handle_topology_map,
  827. };
  828. static const struct fw_address_region registers_region =
  829. { .start = CSR_REGISTER_BASE,
  830. .end = CSR_REGISTER_BASE | CSR_CONFIG_ROM, };
  831. static u32 read_state_register(struct fw_card *card)
  832. {
  833. /*
  834. * Fixed bits (IEEE 1394-2008 8.3.2.2.1):
  835. * Bits 0-1 (state) always read 00=running.
  836. * Bits 2,3 (off, atn) are not implemented as per the spec.
  837. * Bit 4 (elog) is not implemented because there is no error log.
  838. * Bit 6 (dreq) cannot be set. It is intended to "disable requests
  839. * from unreliable nodes"; however, IEEE 1212 states that devices
  840. * may "clear their own dreq bit when it has been improperly set".
  841. * Our implementation might be seen as an improperly extensive
  842. * interpretation of "improperly", but the 1212-2001 revision
  843. * dropped this bit altogether, so we're in the clear. :o)
  844. * Bit 7 (lost) always reads 0 because a power reset has never occurred
  845. * during normal operation.
  846. * Bit 9 (linkoff) is not implemented because the PC is not powered
  847. * from the FireWire cable.
  848. * Bit 15 (gone) always reads 0. It must be set at a power/command/bus
  849. * reset, but then cleared when the units are ready again, which
  850. * happens immediately for us.
  851. */
  852. return 0;
  853. }
  854. static void update_split_timeout(struct fw_card *card)
  855. {
  856. unsigned int cycles;
  857. cycles = card->split_timeout_hi * 8000 + (card->split_timeout_lo >> 19);
  858. cycles = max(cycles, 800u); /* minimum as per the spec */
  859. cycles = min(cycles, 3u * 8000u); /* maximum OHCI timeout */
  860. card->split_timeout_cycles = cycles;
  861. card->split_timeout_jiffies = DIV_ROUND_UP(cycles * HZ, 8000);
  862. }
  863. static void handle_registers(struct fw_card *card, struct fw_request *request,
  864. int tcode, int destination, int source, int generation,
  865. int speed, unsigned long long offset,
  866. void *payload, size_t length, void *callback_data)
  867. {
  868. int reg = offset & ~CSR_REGISTER_BASE;
  869. __be32 *data = payload;
  870. int rcode = RCODE_COMPLETE;
  871. unsigned long flags;
  872. switch (reg) {
  873. case CSR_STATE_CLEAR:
  874. if (tcode == TCODE_READ_QUADLET_REQUEST) {
  875. *data = cpu_to_be32(read_state_register(card));
  876. } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
  877. } else {
  878. rcode = RCODE_TYPE_ERROR;
  879. }
  880. break;
  881. case CSR_STATE_SET:
  882. if (tcode == TCODE_READ_QUADLET_REQUEST) {
  883. *data = cpu_to_be32(read_state_register(card));
  884. } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
  885. /* FIXME: implement cmstr */
  886. /* FIXME: implement abdicate */
  887. } else {
  888. rcode = RCODE_TYPE_ERROR;
  889. }
  890. break;
  891. case CSR_NODE_IDS:
  892. if (tcode == TCODE_READ_QUADLET_REQUEST)
  893. *data = cpu_to_be32(card->driver->
  894. read_csr_reg(card, CSR_NODE_IDS));
  895. else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
  896. card->driver->write_csr_reg(card, CSR_NODE_IDS,
  897. be32_to_cpu(*data));
  898. else
  899. rcode = RCODE_TYPE_ERROR;
  900. break;
  901. case CSR_RESET_START:
  902. if (tcode != TCODE_WRITE_QUADLET_REQUEST)
  903. rcode = RCODE_TYPE_ERROR;
  904. break;
  905. case CSR_SPLIT_TIMEOUT_HI:
  906. if (tcode == TCODE_READ_QUADLET_REQUEST) {
  907. *data = cpu_to_be32(card->split_timeout_hi);
  908. } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
  909. spin_lock_irqsave(&card->lock, flags);
  910. card->split_timeout_hi = be32_to_cpu(*data) & 7;
  911. update_split_timeout(card);
  912. spin_unlock_irqrestore(&card->lock, flags);
  913. } else {
  914. rcode = RCODE_TYPE_ERROR;
  915. }
  916. break;
  917. case CSR_SPLIT_TIMEOUT_LO:
  918. if (tcode == TCODE_READ_QUADLET_REQUEST) {
  919. *data = cpu_to_be32(card->split_timeout_lo);
  920. } else if (tcode == TCODE_WRITE_QUADLET_REQUEST) {
  921. spin_lock_irqsave(&card->lock, flags);
  922. card->split_timeout_lo =
  923. be32_to_cpu(*data) & 0xfff80000;
  924. update_split_timeout(card);
  925. spin_unlock_irqrestore(&card->lock, flags);
  926. } else {
  927. rcode = RCODE_TYPE_ERROR;
  928. }
  929. break;
  930. case CSR_CYCLE_TIME:
  931. if (TCODE_IS_READ_REQUEST(tcode) && length == 4)
  932. *data = cpu_to_be32(card->driver->
  933. read_csr_reg(card, CSR_CYCLE_TIME));
  934. else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
  935. card->driver->write_csr_reg(card, CSR_CYCLE_TIME,
  936. be32_to_cpu(*data));
  937. else
  938. rcode = RCODE_TYPE_ERROR;
  939. break;
  940. case CSR_BUS_TIME:
  941. if (tcode == TCODE_READ_QUADLET_REQUEST)
  942. *data = cpu_to_be32(card->driver->
  943. read_csr_reg(card, CSR_BUS_TIME));
  944. else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
  945. card->driver->write_csr_reg(card, CSR_BUS_TIME,
  946. be32_to_cpu(*data));
  947. else
  948. rcode = RCODE_TYPE_ERROR;
  949. break;
  950. case CSR_BUSY_TIMEOUT:
  951. if (tcode == TCODE_READ_QUADLET_REQUEST)
  952. *data = cpu_to_be32(card->driver->
  953. read_csr_reg(card, CSR_BUSY_TIMEOUT));
  954. else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
  955. card->driver->write_csr_reg(card, CSR_BUSY_TIMEOUT,
  956. be32_to_cpu(*data));
  957. else
  958. rcode = RCODE_TYPE_ERROR;
  959. break;
  960. case CSR_PRIORITY_BUDGET:
  961. if (!(card->driver->get_features(card) &
  962. FEATURE_PRIORITY_BUDGET))
  963. rcode = RCODE_ADDRESS_ERROR;
  964. else if (tcode == TCODE_READ_QUADLET_REQUEST)
  965. *data = cpu_to_be32(card->driver->
  966. read_csr_reg(card, CSR_PRIORITY_BUDGET));
  967. else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
  968. card->driver->write_csr_reg(card, CSR_PRIORITY_BUDGET,
  969. be32_to_cpu(*data));
  970. else
  971. rcode = RCODE_TYPE_ERROR;
  972. break;
  973. case CSR_BROADCAST_CHANNEL:
  974. if (tcode == TCODE_READ_QUADLET_REQUEST)
  975. *data = cpu_to_be32(card->broadcast_channel);
  976. else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
  977. card->broadcast_channel =
  978. (be32_to_cpu(*data) & BROADCAST_CHANNEL_VALID) |
  979. BROADCAST_CHANNEL_INITIAL;
  980. else
  981. rcode = RCODE_TYPE_ERROR;
  982. break;
  983. case CSR_BUS_MANAGER_ID:
  984. case CSR_BANDWIDTH_AVAILABLE:
  985. case CSR_CHANNELS_AVAILABLE_HI:
  986. case CSR_CHANNELS_AVAILABLE_LO:
  987. /*
  988. * FIXME: these are handled by the OHCI hardware and
  989. * the stack never sees these request. If we add
  990. * support for a new type of controller that doesn't
  991. * handle this in hardware we need to deal with these
  992. * transactions.
  993. */
  994. BUG();
  995. break;
  996. default:
  997. rcode = RCODE_ADDRESS_ERROR;
  998. break;
  999. }
  1000. fw_send_response(card, request, rcode);
  1001. }
  1002. static struct fw_address_handler registers = {
  1003. .length = 0x400,
  1004. .address_callback = handle_registers,
  1005. };
  1006. MODULE_AUTHOR("Kristian Hoegsberg <krh@bitplanet.net>");
  1007. MODULE_DESCRIPTION("Core IEEE1394 transaction logic");
  1008. MODULE_LICENSE("GPL");
  1009. static const u32 vendor_textual_descriptor[] = {
  1010. /* textual descriptor leaf () */
  1011. 0x00060000,
  1012. 0x00000000,
  1013. 0x00000000,
  1014. 0x4c696e75, /* L i n u */
  1015. 0x78204669, /* x F i */
  1016. 0x72657769, /* r e w i */
  1017. 0x72650000, /* r e */
  1018. };
  1019. static const u32 model_textual_descriptor[] = {
  1020. /* model descriptor leaf () */
  1021. 0x00030000,
  1022. 0x00000000,
  1023. 0x00000000,
  1024. 0x4a756a75, /* J u j u */
  1025. };
  1026. static struct fw_descriptor vendor_id_descriptor = {
  1027. .length = ARRAY_SIZE(vendor_textual_descriptor),
  1028. .immediate = 0x03d00d1e,
  1029. .key = 0x81000000,
  1030. .data = vendor_textual_descriptor,
  1031. };
  1032. static struct fw_descriptor model_id_descriptor = {
  1033. .length = ARRAY_SIZE(model_textual_descriptor),
  1034. .immediate = 0x17000001,
  1035. .key = 0x81000000,
  1036. .data = model_textual_descriptor,
  1037. };
  1038. static int __init fw_core_init(void)
  1039. {
  1040. int ret;
  1041. ret = bus_register(&fw_bus_type);
  1042. if (ret < 0)
  1043. return ret;
  1044. fw_cdev_major = register_chrdev(0, "firewire", &fw_device_ops);
  1045. if (fw_cdev_major < 0) {
  1046. bus_unregister(&fw_bus_type);
  1047. return fw_cdev_major;
  1048. }
  1049. fw_core_add_address_handler(&topology_map, &topology_map_region);
  1050. fw_core_add_address_handler(&registers, &registers_region);
  1051. fw_core_add_descriptor(&vendor_id_descriptor);
  1052. fw_core_add_descriptor(&model_id_descriptor);
  1053. return 0;
  1054. }
  1055. static void __exit fw_core_cleanup(void)
  1056. {
  1057. unregister_chrdev(fw_cdev_major, "firewire");
  1058. bus_unregister(&fw_bus_type);
  1059. idr_destroy(&fw_device_idr);
  1060. }
  1061. module_init(fw_core_init);
  1062. module_exit(fw_core_cleanup);