clock36xx.c 2.0 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970
  1. /*
  2. * OMAP36xx-specific clkops
  3. *
  4. * Copyright (C) 2010 Texas Instruments, Inc.
  5. * Copyright (C) 2010 Nokia Corporation
  6. *
  7. * Mike Turquette
  8. * Vijaykumar GN
  9. * Paul Walmsley
  10. *
  11. * Parts of this code are based on code written by
  12. * Richard Woodruff, Tony Lindgren, Tuukka Tikkanen, Karthik Dasu,
  13. * Russell King
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. #undef DEBUG
  20. #include <linux/kernel.h>
  21. #include <linux/clk.h>
  22. #include <linux/io.h>
  23. #include "clock.h"
  24. #include "clock36xx.h"
  25. /**
  26. * omap36xx_pwrdn_clk_enable_with_hsdiv_restore - enable clocks suffering
  27. * from HSDivider PWRDN problem Implements Errata ID: i556.
  28. * @clk: DPLL output struct clk
  29. *
  30. * 3630 only: dpll3_m3_ck, dpll4_m2_ck, dpll4_m3_ck, dpll4_m4_ck,
  31. * dpll4_m5_ck & dpll4_m6_ck dividers gets loaded with reset
  32. * valueafter their respective PWRDN bits are set. Any dummy write
  33. * (Any other value different from the Read value) to the
  34. * corresponding CM_CLKSEL register will refresh the dividers.
  35. */
  36. static int omap36xx_pwrdn_clk_enable_with_hsdiv_restore(struct clk *clk)
  37. {
  38. u32 dummy_v, orig_v, clksel_shift;
  39. int ret;
  40. /* Clear PWRDN bit of HSDIVIDER */
  41. ret = omap2_dflt_clk_enable(clk);
  42. /* Restore the dividers */
  43. if (!ret) {
  44. clksel_shift = __ffs(clk->parent->clksel_mask);
  45. orig_v = __raw_readl(clk->parent->clksel_reg);
  46. dummy_v = orig_v;
  47. /* Write any other value different from the Read value */
  48. dummy_v ^= (1 << clksel_shift);
  49. __raw_writel(dummy_v, clk->parent->clksel_reg);
  50. /* Write the original divider */
  51. __raw_writel(orig_v, clk->parent->clksel_reg);
  52. }
  53. return ret;
  54. }
  55. const struct clkops clkops_omap36xx_pwrdn_with_hsdiv_wait_restore = {
  56. .enable = omap36xx_pwrdn_clk_enable_with_hsdiv_restore,
  57. .disable = omap2_dflt_clk_disable,
  58. .find_companion = omap2_clk_dflt_find_companion,
  59. .find_idlest = omap2_clk_dflt_find_idlest,
  60. };