wl1271_spi.c 10 KB

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  1. /*
  2. * This file is part of wl1271
  3. *
  4. * Copyright (C) 2008-2009 Nokia Corporation
  5. *
  6. * Contact: Luciano Coelho <luciano.coelho@nokia.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. */
  23. #include <linux/irq.h>
  24. #include <linux/module.h>
  25. #include <linux/crc7.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/spi/wl12xx.h>
  28. #include "wl1271.h"
  29. #include "wl12xx_80211.h"
  30. #include "wl1271_io.h"
  31. #include "wl1271_reg.h"
  32. #define WSPI_CMD_READ 0x40000000
  33. #define WSPI_CMD_WRITE 0x00000000
  34. #define WSPI_CMD_FIXED 0x20000000
  35. #define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
  36. #define WSPI_CMD_BYTE_LENGTH_OFFSET 17
  37. #define WSPI_CMD_BYTE_ADDR 0x0001FFFF
  38. #define WSPI_INIT_CMD_CRC_LEN 5
  39. #define WSPI_INIT_CMD_START 0x00
  40. #define WSPI_INIT_CMD_TX 0x40
  41. /* the extra bypass bit is sampled by the TNET as '1' */
  42. #define WSPI_INIT_CMD_BYPASS_BIT 0x80
  43. #define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
  44. #define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
  45. #define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
  46. #define WSPI_INIT_CMD_IOD 0x40
  47. #define WSPI_INIT_CMD_IP 0x20
  48. #define WSPI_INIT_CMD_CS 0x10
  49. #define WSPI_INIT_CMD_WS 0x08
  50. #define WSPI_INIT_CMD_WSPI 0x01
  51. #define WSPI_INIT_CMD_END 0x01
  52. #define WSPI_INIT_CMD_LEN 8
  53. #define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
  54. ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
  55. #define HW_ACCESS_WSPI_INIT_CMD_MASK 0
  56. static inline struct spi_device *wl_to_spi(struct wl1271 *wl)
  57. {
  58. return wl->if_priv;
  59. }
  60. static struct device *wl1271_spi_wl_to_dev(struct wl1271 *wl)
  61. {
  62. return &(wl_to_spi(wl)->dev);
  63. }
  64. static void wl1271_spi_disable_interrupts(struct wl1271 *wl)
  65. {
  66. disable_irq(wl->irq);
  67. }
  68. static void wl1271_spi_enable_interrupts(struct wl1271 *wl)
  69. {
  70. enable_irq(wl->irq);
  71. }
  72. static void wl1271_spi_reset(struct wl1271 *wl)
  73. {
  74. u8 *cmd;
  75. struct spi_transfer t;
  76. struct spi_message m;
  77. cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
  78. if (!cmd) {
  79. wl1271_error("could not allocate cmd for spi reset");
  80. return;
  81. }
  82. memset(&t, 0, sizeof(t));
  83. spi_message_init(&m);
  84. memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
  85. t.tx_buf = cmd;
  86. t.len = WSPI_INIT_CMD_LEN;
  87. spi_message_add_tail(&t, &m);
  88. spi_sync(wl_to_spi(wl), &m);
  89. kfree(cmd);
  90. wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN);
  91. }
  92. static void wl1271_spi_init(struct wl1271 *wl)
  93. {
  94. u8 crc[WSPI_INIT_CMD_CRC_LEN], *cmd;
  95. struct spi_transfer t;
  96. struct spi_message m;
  97. cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
  98. if (!cmd) {
  99. wl1271_error("could not allocate cmd for spi init");
  100. return;
  101. }
  102. memset(crc, 0, sizeof(crc));
  103. memset(&t, 0, sizeof(t));
  104. spi_message_init(&m);
  105. /*
  106. * Set WSPI_INIT_COMMAND
  107. * the data is being send from the MSB to LSB
  108. */
  109. cmd[2] = 0xff;
  110. cmd[3] = 0xff;
  111. cmd[1] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
  112. cmd[0] = 0;
  113. cmd[7] = 0;
  114. cmd[6] |= HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
  115. cmd[6] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
  116. if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
  117. cmd[5] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
  118. else
  119. cmd[5] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
  120. cmd[5] |= WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
  121. | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
  122. crc[0] = cmd[1];
  123. crc[1] = cmd[0];
  124. crc[2] = cmd[7];
  125. crc[3] = cmd[6];
  126. crc[4] = cmd[5];
  127. cmd[4] |= crc7(0, crc, WSPI_INIT_CMD_CRC_LEN) << 1;
  128. cmd[4] |= WSPI_INIT_CMD_END;
  129. t.tx_buf = cmd;
  130. t.len = WSPI_INIT_CMD_LEN;
  131. spi_message_add_tail(&t, &m);
  132. spi_sync(wl_to_spi(wl), &m);
  133. kfree(cmd);
  134. wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
  135. }
  136. #define WL1271_BUSY_WORD_TIMEOUT 1000
  137. static int wl1271_spi_read_busy(struct wl1271 *wl)
  138. {
  139. struct spi_transfer t[1];
  140. struct spi_message m;
  141. u32 *busy_buf;
  142. int num_busy_bytes = 0;
  143. /*
  144. * Read further busy words from SPI until a non-busy word is
  145. * encountered, then read the data itself into the buffer.
  146. */
  147. num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
  148. busy_buf = wl->buffer_busyword;
  149. while (num_busy_bytes) {
  150. num_busy_bytes--;
  151. spi_message_init(&m);
  152. memset(t, 0, sizeof(t));
  153. t[0].rx_buf = busy_buf;
  154. t[0].len = sizeof(u32);
  155. t[0].cs_change = true;
  156. spi_message_add_tail(&t[0], &m);
  157. spi_sync(wl_to_spi(wl), &m);
  158. if (*busy_buf & 0x1)
  159. return 0;
  160. }
  161. /* The SPI bus is unresponsive, the read failed. */
  162. wl1271_error("SPI read busy-word timeout!\n");
  163. return -ETIMEDOUT;
  164. }
  165. static void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
  166. size_t len, bool fixed)
  167. {
  168. struct spi_transfer t[3];
  169. struct spi_message m;
  170. u32 *busy_buf;
  171. u32 *cmd;
  172. cmd = &wl->buffer_cmd;
  173. busy_buf = wl->buffer_busyword;
  174. *cmd = 0;
  175. *cmd |= WSPI_CMD_READ;
  176. *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
  177. *cmd |= addr & WSPI_CMD_BYTE_ADDR;
  178. if (fixed)
  179. *cmd |= WSPI_CMD_FIXED;
  180. spi_message_init(&m);
  181. memset(t, 0, sizeof(t));
  182. t[0].tx_buf = cmd;
  183. t[0].len = 4;
  184. t[0].cs_change = true;
  185. spi_message_add_tail(&t[0], &m);
  186. /* Busy and non busy words read */
  187. t[1].rx_buf = busy_buf;
  188. t[1].len = WL1271_BUSY_WORD_LEN;
  189. t[1].cs_change = true;
  190. spi_message_add_tail(&t[1], &m);
  191. spi_sync(wl_to_spi(wl), &m);
  192. if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
  193. wl1271_spi_read_busy(wl)) {
  194. memset(buf, 0, len);
  195. return;
  196. }
  197. spi_message_init(&m);
  198. memset(t, 0, sizeof(t));
  199. t[0].rx_buf = buf;
  200. t[0].len = len;
  201. t[0].cs_change = true;
  202. spi_message_add_tail(&t[0], &m);
  203. spi_sync(wl_to_spi(wl), &m);
  204. wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
  205. wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, len);
  206. }
  207. static void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
  208. size_t len, bool fixed)
  209. {
  210. struct spi_transfer t[2];
  211. struct spi_message m;
  212. u32 *cmd;
  213. cmd = &wl->buffer_cmd;
  214. *cmd = 0;
  215. *cmd |= WSPI_CMD_WRITE;
  216. *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH;
  217. *cmd |= addr & WSPI_CMD_BYTE_ADDR;
  218. if (fixed)
  219. *cmd |= WSPI_CMD_FIXED;
  220. spi_message_init(&m);
  221. memset(t, 0, sizeof(t));
  222. t[0].tx_buf = cmd;
  223. t[0].len = sizeof(*cmd);
  224. spi_message_add_tail(&t[0], &m);
  225. t[1].tx_buf = buf;
  226. t[1].len = len;
  227. spi_message_add_tail(&t[1], &m);
  228. spi_sync(wl_to_spi(wl), &m);
  229. wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
  230. wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, len);
  231. }
  232. static irqreturn_t wl1271_irq(int irq, void *cookie)
  233. {
  234. struct wl1271 *wl;
  235. unsigned long flags;
  236. wl1271_debug(DEBUG_IRQ, "IRQ");
  237. wl = cookie;
  238. /* complete the ELP completion */
  239. spin_lock_irqsave(&wl->wl_lock, flags);
  240. if (wl->elp_compl) {
  241. complete(wl->elp_compl);
  242. wl->elp_compl = NULL;
  243. }
  244. if (!test_and_set_bit(WL1271_FLAG_IRQ_RUNNING, &wl->flags))
  245. ieee80211_queue_work(wl->hw, &wl->irq_work);
  246. set_bit(WL1271_FLAG_IRQ_PENDING, &wl->flags);
  247. spin_unlock_irqrestore(&wl->wl_lock, flags);
  248. return IRQ_HANDLED;
  249. }
  250. static void wl1271_spi_set_power(struct wl1271 *wl, bool enable)
  251. {
  252. if (wl->set_power)
  253. wl->set_power(enable);
  254. }
  255. static struct wl1271_if_operations spi_ops = {
  256. .read = wl1271_spi_raw_read,
  257. .write = wl1271_spi_raw_write,
  258. .reset = wl1271_spi_reset,
  259. .init = wl1271_spi_init,
  260. .power = wl1271_spi_set_power,
  261. .dev = wl1271_spi_wl_to_dev,
  262. .enable_irq = wl1271_spi_enable_interrupts,
  263. .disable_irq = wl1271_spi_disable_interrupts
  264. };
  265. static int __devinit wl1271_probe(struct spi_device *spi)
  266. {
  267. struct wl12xx_platform_data *pdata;
  268. struct ieee80211_hw *hw;
  269. struct wl1271 *wl;
  270. int ret;
  271. pdata = spi->dev.platform_data;
  272. if (!pdata) {
  273. wl1271_error("no platform data");
  274. return -ENODEV;
  275. }
  276. hw = wl1271_alloc_hw();
  277. if (IS_ERR(hw))
  278. return PTR_ERR(hw);
  279. wl = hw->priv;
  280. dev_set_drvdata(&spi->dev, wl);
  281. wl->if_priv = spi;
  282. wl->if_ops = &spi_ops;
  283. /* This is the only SPI value that we need to set here, the rest
  284. * comes from the board-peripherals file */
  285. spi->bits_per_word = 32;
  286. ret = spi_setup(spi);
  287. if (ret < 0) {
  288. wl1271_error("spi_setup failed");
  289. goto out_free;
  290. }
  291. wl->set_power = pdata->set_power;
  292. if (!wl->set_power) {
  293. wl1271_error("set power function missing in platform data");
  294. ret = -ENODEV;
  295. goto out_free;
  296. }
  297. wl->irq = spi->irq;
  298. if (wl->irq < 0) {
  299. wl1271_error("irq missing in platform data");
  300. ret = -ENODEV;
  301. goto out_free;
  302. }
  303. ret = request_irq(wl->irq, wl1271_irq, 0, DRIVER_NAME, wl);
  304. if (ret < 0) {
  305. wl1271_error("request_irq() failed: %d", ret);
  306. goto out_free;
  307. }
  308. set_irq_type(wl->irq, IRQ_TYPE_EDGE_RISING);
  309. disable_irq(wl->irq);
  310. ret = wl1271_init_ieee80211(wl);
  311. if (ret)
  312. goto out_irq;
  313. ret = wl1271_register_hw(wl);
  314. if (ret)
  315. goto out_irq;
  316. wl1271_notice("initialized");
  317. return 0;
  318. out_irq:
  319. free_irq(wl->irq, wl);
  320. out_free:
  321. wl1271_free_hw(wl);
  322. return ret;
  323. }
  324. static int __devexit wl1271_remove(struct spi_device *spi)
  325. {
  326. struct wl1271 *wl = dev_get_drvdata(&spi->dev);
  327. free_irq(wl->irq, wl);
  328. wl1271_unregister_hw(wl);
  329. wl1271_free_hw(wl);
  330. return 0;
  331. }
  332. static struct spi_driver wl1271_spi_driver = {
  333. .driver = {
  334. .name = "wl1271_spi",
  335. .bus = &spi_bus_type,
  336. .owner = THIS_MODULE,
  337. },
  338. .probe = wl1271_probe,
  339. .remove = __devexit_p(wl1271_remove),
  340. };
  341. static int __init wl1271_init(void)
  342. {
  343. int ret;
  344. ret = spi_register_driver(&wl1271_spi_driver);
  345. if (ret < 0) {
  346. wl1271_error("failed to register spi driver: %d", ret);
  347. goto out;
  348. }
  349. out:
  350. return ret;
  351. }
  352. static void __exit wl1271_exit(void)
  353. {
  354. spi_unregister_driver(&wl1271_spi_driver);
  355. wl1271_notice("unloaded");
  356. }
  357. module_init(wl1271_init);
  358. module_exit(wl1271_exit);
  359. MODULE_LICENSE("GPL");
  360. MODULE_AUTHOR("Luciano Coelho <luciano.coelho@nokia.com>");
  361. MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
  362. MODULE_FIRMWARE(WL1271_FW_NAME);