patch_cirrus.c 30 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162
  1. /*
  2. * HD audio interface patch for Cirrus Logic CS420x chip
  3. *
  4. * Copyright (c) 2009 Takashi Iwai <tiwai@suse.de>
  5. *
  6. * This driver is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This driver is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/init.h>
  21. #include <linux/slab.h>
  22. #include <linux/pci.h>
  23. #include <linux/module.h>
  24. #include <sound/core.h>
  25. #include <sound/tlv.h>
  26. #include "hda_codec.h"
  27. #include "hda_local.h"
  28. #include "hda_auto_parser.h"
  29. #include "hda_jack.h"
  30. #include "hda_generic.h"
  31. /*
  32. */
  33. struct cs_spec {
  34. struct hda_gen_spec gen;
  35. unsigned int gpio_mask;
  36. unsigned int gpio_dir;
  37. unsigned int gpio_data;
  38. unsigned int gpio_eapd_hp; /* EAPD GPIO bit for headphones */
  39. unsigned int gpio_eapd_speaker; /* EAPD GPIO bit for speakers */
  40. /* CS421x */
  41. unsigned int spdif_detect:1;
  42. unsigned int spdif_present:1;
  43. unsigned int sense_b:1;
  44. hda_nid_t vendor_nid;
  45. };
  46. /* available models with CS420x */
  47. enum {
  48. CS420X_MBP53,
  49. CS420X_MBP55,
  50. CS420X_IMAC27,
  51. CS420X_GPIO_13,
  52. CS420X_GPIO_23,
  53. CS420X_MBP101,
  54. CS420X_MBP81,
  55. CS420X_MBA42,
  56. CS420X_AUTO,
  57. /* aliases */
  58. CS420X_IMAC27_122 = CS420X_GPIO_23,
  59. CS420X_APPLE = CS420X_GPIO_13,
  60. };
  61. /* CS421x boards */
  62. enum {
  63. CS421X_CDB4210,
  64. CS421X_SENSE_B,
  65. CS421X_STUMPY,
  66. };
  67. /* Vendor-specific processing widget */
  68. #define CS420X_VENDOR_NID 0x11
  69. #define CS_DIG_OUT1_PIN_NID 0x10
  70. #define CS_DIG_OUT2_PIN_NID 0x15
  71. #define CS_DMIC1_PIN_NID 0x0e
  72. #define CS_DMIC2_PIN_NID 0x12
  73. /* coef indices */
  74. #define IDX_SPDIF_STAT 0x0000
  75. #define IDX_SPDIF_CTL 0x0001
  76. #define IDX_ADC_CFG 0x0002
  77. /* SZC bitmask, 4 modes below:
  78. * 0 = immediate,
  79. * 1 = digital immediate, analog zero-cross
  80. * 2 = digtail & analog soft-ramp
  81. * 3 = digital soft-ramp, analog zero-cross
  82. */
  83. #define CS_COEF_ADC_SZC_MASK (3 << 0)
  84. #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
  85. #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
  86. /* PGA mode: 0 = differential, 1 = signle-ended */
  87. #define CS_COEF_ADC_MIC_PGA_MODE (1 << 5) /* PGA setup for mic */
  88. #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
  89. #define IDX_DAC_CFG 0x0003
  90. /* SZC bitmask, 4 modes below:
  91. * 0 = Immediate
  92. * 1 = zero-cross
  93. * 2 = soft-ramp
  94. * 3 = soft-ramp on zero-cross
  95. */
  96. #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
  97. #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
  98. #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
  99. #define IDX_BEEP_CFG 0x0004
  100. /* 0x0008 - test reg key */
  101. /* 0x0009 - 0x0014 -> 12 test regs */
  102. /* 0x0015 - visibility reg */
  103. /* Cirrus Logic CS4208 */
  104. #define CS4208_VENDOR_NID 0x24
  105. /*
  106. * Cirrus Logic CS4210
  107. *
  108. * 1 DAC => HP(sense) / Speakers,
  109. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  110. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  111. */
  112. #define CS4210_DAC_NID 0x02
  113. #define CS4210_ADC_NID 0x03
  114. #define CS4210_VENDOR_NID 0x0B
  115. #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
  116. #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
  117. #define CS421X_IDX_DEV_CFG 0x01
  118. #define CS421X_IDX_ADC_CFG 0x02
  119. #define CS421X_IDX_DAC_CFG 0x03
  120. #define CS421X_IDX_SPK_CTL 0x04
  121. #define SPDIF_EVENT 0x04
  122. /* Cirrus Logic CS4213 is like CS4210 but does not have SPDIF input/output */
  123. #define CS4213_VENDOR_NID 0x09
  124. static inline int cs_vendor_coef_get(struct hda_codec *codec, unsigned int idx)
  125. {
  126. struct cs_spec *spec = codec->spec;
  127. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  128. AC_VERB_SET_COEF_INDEX, idx);
  129. return snd_hda_codec_read(codec, spec->vendor_nid, 0,
  130. AC_VERB_GET_PROC_COEF, 0);
  131. }
  132. static inline void cs_vendor_coef_set(struct hda_codec *codec, unsigned int idx,
  133. unsigned int coef)
  134. {
  135. struct cs_spec *spec = codec->spec;
  136. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  137. AC_VERB_SET_COEF_INDEX, idx);
  138. snd_hda_codec_write(codec, spec->vendor_nid, 0,
  139. AC_VERB_SET_PROC_COEF, coef);
  140. }
  141. /*
  142. * auto-mute and auto-mic switching
  143. * CS421x auto-output redirecting
  144. * HP/SPK/SPDIF
  145. */
  146. static void cs_automute(struct hda_codec *codec)
  147. {
  148. struct cs_spec *spec = codec->spec;
  149. /* mute HPs if spdif jack (SENSE_B) is present */
  150. spec->gen.master_mute = !!(spec->spdif_present && spec->sense_b);
  151. snd_hda_gen_update_outputs(codec);
  152. if (spec->gpio_eapd_hp || spec->gpio_eapd_speaker) {
  153. spec->gpio_data = spec->gen.hp_jack_present ?
  154. spec->gpio_eapd_hp : spec->gpio_eapd_speaker;
  155. snd_hda_codec_write(codec, 0x01, 0,
  156. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  157. }
  158. }
  159. static bool is_active_pin(struct hda_codec *codec, hda_nid_t nid)
  160. {
  161. unsigned int val;
  162. val = snd_hda_codec_get_pincfg(codec, nid);
  163. return (get_defcfg_connect(val) != AC_JACK_PORT_NONE);
  164. }
  165. static void init_input_coef(struct hda_codec *codec)
  166. {
  167. struct cs_spec *spec = codec->spec;
  168. unsigned int coef;
  169. /* CS420x has multiple ADC, CS421x has single ADC */
  170. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  171. coef = cs_vendor_coef_get(codec, IDX_BEEP_CFG);
  172. if (is_active_pin(codec, CS_DMIC2_PIN_NID))
  173. coef |= 1 << 4; /* DMIC2 2 chan on, GPIO1 off */
  174. if (is_active_pin(codec, CS_DMIC1_PIN_NID))
  175. coef |= 1 << 3; /* DMIC1 2 chan on, GPIO0 off
  176. * No effect if SPDIF_OUT2 is
  177. * selected in IDX_SPDIF_CTL.
  178. */
  179. cs_vendor_coef_set(codec, IDX_BEEP_CFG, coef);
  180. }
  181. }
  182. static const struct hda_verb cs_coef_init_verbs[] = {
  183. {0x11, AC_VERB_SET_PROC_STATE, 1},
  184. {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
  185. {0x11, AC_VERB_SET_PROC_COEF,
  186. (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
  187. | 0x0040 /* Mute DACs on FIFO error */
  188. | 0x1000 /* Enable DACs High Pass Filter */
  189. | 0x0400 /* Disable Coefficient Auto increment */
  190. )},
  191. /* ADC1/2 - Digital and Analog Soft Ramp */
  192. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  193. {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
  194. /* Beep */
  195. {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
  196. {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
  197. {} /* terminator */
  198. };
  199. static const struct hda_verb cs4208_coef_init_verbs[] = {
  200. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  201. {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  202. {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
  203. {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
  204. {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
  205. {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
  206. {} /* terminator */
  207. };
  208. /* Errata: CS4207 rev C0/C1/C2 Silicon
  209. *
  210. * http://www.cirrus.com/en/pubs/errata/ER880C3.pdf
  211. *
  212. * 6. At high temperature (TA > +85°C), the digital supply current (IVD)
  213. * may be excessive (up to an additional 200 μA), which is most easily
  214. * observed while the part is being held in reset (RESET# active low).
  215. *
  216. * Root Cause: At initial powerup of the device, the logic that drives
  217. * the clock and write enable to the S/PDIF SRC RAMs is not properly
  218. * initialized.
  219. * Certain random patterns will cause a steady leakage current in those
  220. * RAM cells. The issue will resolve once the SRCs are used (turned on).
  221. *
  222. * Workaround: The following verb sequence briefly turns on the S/PDIF SRC
  223. * blocks, which will alleviate the issue.
  224. */
  225. static const struct hda_verb cs_errata_init_verbs[] = {
  226. {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
  227. {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  228. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  229. {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
  230. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  231. {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
  232. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  233. {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
  234. {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
  235. {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
  236. {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
  237. {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
  238. {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
  239. {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
  240. {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
  241. {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
  242. {0x11, AC_VERB_SET_PROC_STATE, 0x00},
  243. #if 0 /* Don't to set to D3 as we are in power-up sequence */
  244. {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
  245. {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
  246. /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
  247. #endif
  248. {} /* terminator */
  249. };
  250. /* SPDIF setup */
  251. static void init_digital_coef(struct hda_codec *codec)
  252. {
  253. unsigned int coef;
  254. coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */
  255. coef |= 0x0008; /* Replace with mute on error */
  256. if (is_active_pin(codec, CS_DIG_OUT2_PIN_NID))
  257. coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2
  258. * SPDIF_OUT2 is shared with GPIO1 and
  259. * DMIC_SDA2.
  260. */
  261. cs_vendor_coef_set(codec, IDX_SPDIF_CTL, coef);
  262. }
  263. static int cs_init(struct hda_codec *codec)
  264. {
  265. struct cs_spec *spec = codec->spec;
  266. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  267. /* init_verb sequence for C0/C1/C2 errata*/
  268. snd_hda_sequence_write(codec, cs_errata_init_verbs);
  269. snd_hda_sequence_write(codec, cs_coef_init_verbs);
  270. } else if (spec->vendor_nid == CS4208_VENDOR_NID) {
  271. snd_hda_sequence_write(codec, cs4208_coef_init_verbs);
  272. }
  273. snd_hda_gen_init(codec);
  274. if (spec->gpio_mask) {
  275. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  276. spec->gpio_mask);
  277. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  278. spec->gpio_dir);
  279. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  280. spec->gpio_data);
  281. }
  282. if (spec->vendor_nid == CS420X_VENDOR_NID) {
  283. init_input_coef(codec);
  284. init_digital_coef(codec);
  285. }
  286. return 0;
  287. }
  288. #define cs_free snd_hda_gen_free
  289. static const struct hda_codec_ops cs_patch_ops = {
  290. .build_controls = snd_hda_gen_build_controls,
  291. .build_pcms = snd_hda_gen_build_pcms,
  292. .init = cs_init,
  293. .free = cs_free,
  294. .unsol_event = snd_hda_jack_unsol_event,
  295. };
  296. static int cs_parse_auto_config(struct hda_codec *codec)
  297. {
  298. struct cs_spec *spec = codec->spec;
  299. int err;
  300. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  301. if (err < 0)
  302. return err;
  303. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  304. if (err < 0)
  305. return err;
  306. return 0;
  307. }
  308. static const struct hda_model_fixup cs420x_models[] = {
  309. { .id = CS420X_MBP53, .name = "mbp53" },
  310. { .id = CS420X_MBP55, .name = "mbp55" },
  311. { .id = CS420X_IMAC27, .name = "imac27" },
  312. { .id = CS420X_IMAC27_122, .name = "imac27_122" },
  313. { .id = CS420X_APPLE, .name = "apple" },
  314. { .id = CS420X_MBP101, .name = "mbp101" },
  315. { .id = CS420X_MBP81, .name = "mbp81" },
  316. { .id = CS420X_MBA42, .name = "mba42" },
  317. {}
  318. };
  319. static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
  320. SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
  321. SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
  322. SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
  323. SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
  324. /* this conflicts with too many other models */
  325. /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
  326. /* codec SSID */
  327. SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
  328. SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
  329. SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
  330. SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
  331. SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
  332. {} /* terminator */
  333. };
  334. static const struct hda_pintbl mbp53_pincfgs[] = {
  335. { 0x09, 0x012b4050 },
  336. { 0x0a, 0x90100141 },
  337. { 0x0b, 0x90100140 },
  338. { 0x0c, 0x018b3020 },
  339. { 0x0d, 0x90a00110 },
  340. { 0x0e, 0x400000f0 },
  341. { 0x0f, 0x01cbe030 },
  342. { 0x10, 0x014be060 },
  343. { 0x12, 0x400000f0 },
  344. { 0x15, 0x400000f0 },
  345. {} /* terminator */
  346. };
  347. static const struct hda_pintbl mbp55_pincfgs[] = {
  348. { 0x09, 0x012b4030 },
  349. { 0x0a, 0x90100121 },
  350. { 0x0b, 0x90100120 },
  351. { 0x0c, 0x400000f0 },
  352. { 0x0d, 0x90a00110 },
  353. { 0x0e, 0x400000f0 },
  354. { 0x0f, 0x400000f0 },
  355. { 0x10, 0x014be040 },
  356. { 0x12, 0x400000f0 },
  357. { 0x15, 0x400000f0 },
  358. {} /* terminator */
  359. };
  360. static const struct hda_pintbl imac27_pincfgs[] = {
  361. { 0x09, 0x012b4050 },
  362. { 0x0a, 0x90100140 },
  363. { 0x0b, 0x90100142 },
  364. { 0x0c, 0x018b3020 },
  365. { 0x0d, 0x90a00110 },
  366. { 0x0e, 0x400000f0 },
  367. { 0x0f, 0x01cbe030 },
  368. { 0x10, 0x014be060 },
  369. { 0x12, 0x01ab9070 },
  370. { 0x15, 0x400000f0 },
  371. {} /* terminator */
  372. };
  373. static const struct hda_pintbl mbp101_pincfgs[] = {
  374. { 0x0d, 0x40ab90f0 },
  375. { 0x0e, 0x90a600f0 },
  376. { 0x12, 0x50a600f0 },
  377. {} /* terminator */
  378. };
  379. static const struct hda_pintbl mba42_pincfgs[] = {
  380. { 0x09, 0x012b4030 }, /* HP */
  381. { 0x0a, 0x400000f0 },
  382. { 0x0b, 0x90100120 }, /* speaker */
  383. { 0x0c, 0x400000f0 },
  384. { 0x0d, 0x90a00110 }, /* mic */
  385. { 0x0e, 0x400000f0 },
  386. { 0x0f, 0x400000f0 },
  387. { 0x10, 0x400000f0 },
  388. { 0x12, 0x400000f0 },
  389. { 0x15, 0x400000f0 },
  390. {} /* terminator */
  391. };
  392. static const struct hda_pintbl mba6_pincfgs[] = {
  393. { 0x10, 0x032120f0 }, /* HP */
  394. { 0x11, 0x500000f0 },
  395. { 0x12, 0x90100010 }, /* Speaker */
  396. { 0x13, 0x500000f0 },
  397. { 0x14, 0x500000f0 },
  398. { 0x15, 0x770000f0 },
  399. { 0x16, 0x770000f0 },
  400. { 0x17, 0x430000f0 },
  401. { 0x18, 0x43ab9030 }, /* Mic */
  402. { 0x19, 0x770000f0 },
  403. { 0x1a, 0x770000f0 },
  404. { 0x1b, 0x770000f0 },
  405. { 0x1c, 0x90a00090 },
  406. { 0x1d, 0x500000f0 },
  407. { 0x1e, 0x500000f0 },
  408. { 0x1f, 0x500000f0 },
  409. { 0x20, 0x500000f0 },
  410. { 0x21, 0x430000f0 },
  411. { 0x22, 0x430000f0 },
  412. {} /* terminator */
  413. };
  414. static void cs420x_fixup_gpio_13(struct hda_codec *codec,
  415. const struct hda_fixup *fix, int action)
  416. {
  417. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  418. struct cs_spec *spec = codec->spec;
  419. spec->gpio_eapd_hp = 2; /* GPIO1 = headphones */
  420. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  421. spec->gpio_mask = spec->gpio_dir =
  422. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  423. }
  424. }
  425. static void cs420x_fixup_gpio_23(struct hda_codec *codec,
  426. const struct hda_fixup *fix, int action)
  427. {
  428. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  429. struct cs_spec *spec = codec->spec;
  430. spec->gpio_eapd_hp = 4; /* GPIO2 = headphones */
  431. spec->gpio_eapd_speaker = 8; /* GPIO3 = speakers */
  432. spec->gpio_mask = spec->gpio_dir =
  433. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  434. }
  435. }
  436. static const struct hda_fixup cs420x_fixups[] = {
  437. [CS420X_MBP53] = {
  438. .type = HDA_FIXUP_PINS,
  439. .v.pins = mbp53_pincfgs,
  440. .chained = true,
  441. .chain_id = CS420X_APPLE,
  442. },
  443. [CS420X_MBP55] = {
  444. .type = HDA_FIXUP_PINS,
  445. .v.pins = mbp55_pincfgs,
  446. .chained = true,
  447. .chain_id = CS420X_GPIO_13,
  448. },
  449. [CS420X_IMAC27] = {
  450. .type = HDA_FIXUP_PINS,
  451. .v.pins = imac27_pincfgs,
  452. .chained = true,
  453. .chain_id = CS420X_GPIO_13,
  454. },
  455. [CS420X_GPIO_13] = {
  456. .type = HDA_FIXUP_FUNC,
  457. .v.func = cs420x_fixup_gpio_13,
  458. },
  459. [CS420X_GPIO_23] = {
  460. .type = HDA_FIXUP_FUNC,
  461. .v.func = cs420x_fixup_gpio_23,
  462. },
  463. [CS420X_MBP101] = {
  464. .type = HDA_FIXUP_PINS,
  465. .v.pins = mbp101_pincfgs,
  466. .chained = true,
  467. .chain_id = CS420X_GPIO_13,
  468. },
  469. [CS420X_MBP81] = {
  470. .type = HDA_FIXUP_VERBS,
  471. .v.verbs = (const struct hda_verb[]) {
  472. /* internal mic ADC2: right only, single ended */
  473. {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
  474. {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
  475. {}
  476. },
  477. .chained = true,
  478. .chain_id = CS420X_GPIO_13,
  479. },
  480. [CS420X_MBA42] = {
  481. .type = HDA_FIXUP_PINS,
  482. .v.pins = mba42_pincfgs,
  483. .chained = true,
  484. .chain_id = CS420X_GPIO_13,
  485. },
  486. };
  487. static struct cs_spec *cs_alloc_spec(struct hda_codec *codec, int vendor_nid)
  488. {
  489. struct cs_spec *spec;
  490. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  491. if (!spec)
  492. return NULL;
  493. codec->spec = spec;
  494. spec->vendor_nid = vendor_nid;
  495. snd_hda_gen_spec_init(&spec->gen);
  496. return spec;
  497. }
  498. static int patch_cs420x(struct hda_codec *codec)
  499. {
  500. struct cs_spec *spec;
  501. int err;
  502. spec = cs_alloc_spec(codec, CS420X_VENDOR_NID);
  503. if (!spec)
  504. return -ENOMEM;
  505. spec->gen.automute_hook = cs_automute;
  506. snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
  507. cs420x_fixups);
  508. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  509. err = cs_parse_auto_config(codec);
  510. if (err < 0)
  511. goto error;
  512. codec->patch_ops = cs_patch_ops;
  513. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  514. return 0;
  515. error:
  516. cs_free(codec);
  517. return err;
  518. }
  519. /*
  520. * CS4208 support:
  521. * Its layout is no longer compatible with CS4206/CS4207
  522. */
  523. enum {
  524. CS4208_MBA6,
  525. CS4208_GPIO0,
  526. };
  527. static const struct hda_model_fixup cs4208_models[] = {
  528. { .id = CS4208_GPIO0, .name = "gpio0" },
  529. { .id = CS4208_MBA6, .name = "mba6" },
  530. {}
  531. };
  532. static const struct snd_pci_quirk cs4208_fixup_tbl[] = {
  533. /* codec SSID */
  534. SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
  535. SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
  536. {} /* terminator */
  537. };
  538. static void cs4208_fixup_gpio0(struct hda_codec *codec,
  539. const struct hda_fixup *fix, int action)
  540. {
  541. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  542. struct cs_spec *spec = codec->spec;
  543. spec->gpio_eapd_hp = 0;
  544. spec->gpio_eapd_speaker = 1;
  545. spec->gpio_mask = spec->gpio_dir =
  546. spec->gpio_eapd_hp | spec->gpio_eapd_speaker;
  547. }
  548. }
  549. static const struct hda_fixup cs4208_fixups[] = {
  550. [CS4208_MBA6] = {
  551. .type = HDA_FIXUP_PINS,
  552. .v.pins = mba6_pincfgs,
  553. .chained = true,
  554. .chain_id = CS4208_GPIO0,
  555. },
  556. [CS4208_GPIO0] = {
  557. .type = HDA_FIXUP_FUNC,
  558. .v.func = cs4208_fixup_gpio0,
  559. },
  560. };
  561. /* correct the 0dB offset of input pins */
  562. static void cs4208_fix_amp_caps(struct hda_codec *codec, hda_nid_t adc)
  563. {
  564. unsigned int caps;
  565. caps = query_amp_caps(codec, adc, HDA_INPUT);
  566. caps &= ~(AC_AMPCAP_OFFSET);
  567. caps |= 0x02;
  568. snd_hda_override_amp_caps(codec, adc, HDA_INPUT, caps);
  569. }
  570. static int patch_cs4208(struct hda_codec *codec)
  571. {
  572. struct cs_spec *spec;
  573. int err;
  574. spec = cs_alloc_spec(codec, CS4208_VENDOR_NID);
  575. if (!spec)
  576. return -ENOMEM;
  577. spec->gen.automute_hook = cs_automute;
  578. /* exclude NID 0x10 (HP) from output volumes due to different steps */
  579. spec->gen.out_vol_mask = 1ULL << 0x10;
  580. snd_hda_pick_fixup(codec, cs4208_models, cs4208_fixup_tbl,
  581. cs4208_fixups);
  582. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  583. snd_hda_override_wcaps(codec, 0x18,
  584. get_wcaps(codec, 0x18) | AC_WCAP_STEREO);
  585. cs4208_fix_amp_caps(codec, 0x18);
  586. cs4208_fix_amp_caps(codec, 0x1b);
  587. cs4208_fix_amp_caps(codec, 0x1c);
  588. err = cs_parse_auto_config(codec);
  589. if (err < 0)
  590. goto error;
  591. codec->patch_ops = cs_patch_ops;
  592. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  593. return 0;
  594. error:
  595. cs_free(codec);
  596. return err;
  597. }
  598. /*
  599. * Cirrus Logic CS4210
  600. *
  601. * 1 DAC => HP(sense) / Speakers,
  602. * 1 ADC <= LineIn(sense) / MicIn / DMicIn,
  603. * 1 SPDIF OUT => SPDIF Trasmitter(sense)
  604. */
  605. /* CS4210 board names */
  606. static const struct hda_model_fixup cs421x_models[] = {
  607. { .id = CS421X_CDB4210, .name = "cdb4210" },
  608. { .id = CS421X_STUMPY, .name = "stumpy" },
  609. {}
  610. };
  611. static const struct snd_pci_quirk cs421x_fixup_tbl[] = {
  612. /* Test Intel board + CDB2410 */
  613. SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
  614. {} /* terminator */
  615. };
  616. /* CS4210 board pinconfigs */
  617. /* Default CS4210 (CDB4210)*/
  618. static const struct hda_pintbl cdb4210_pincfgs[] = {
  619. { 0x05, 0x0321401f },
  620. { 0x06, 0x90170010 },
  621. { 0x07, 0x03813031 },
  622. { 0x08, 0xb7a70037 },
  623. { 0x09, 0xb7a6003e },
  624. { 0x0a, 0x034510f0 },
  625. {} /* terminator */
  626. };
  627. /* Stumpy ChromeBox */
  628. static const struct hda_pintbl stumpy_pincfgs[] = {
  629. { 0x05, 0x022120f0 },
  630. { 0x06, 0x901700f0 },
  631. { 0x07, 0x02a120f0 },
  632. { 0x08, 0x77a70037 },
  633. { 0x09, 0x77a6003e },
  634. { 0x0a, 0x434510f0 },
  635. {} /* terminator */
  636. };
  637. /* Setup GPIO/SENSE for each board (if used) */
  638. static void cs421x_fixup_sense_b(struct hda_codec *codec,
  639. const struct hda_fixup *fix, int action)
  640. {
  641. struct cs_spec *spec = codec->spec;
  642. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  643. spec->sense_b = 1;
  644. }
  645. static const struct hda_fixup cs421x_fixups[] = {
  646. [CS421X_CDB4210] = {
  647. .type = HDA_FIXUP_PINS,
  648. .v.pins = cdb4210_pincfgs,
  649. .chained = true,
  650. .chain_id = CS421X_SENSE_B,
  651. },
  652. [CS421X_SENSE_B] = {
  653. .type = HDA_FIXUP_FUNC,
  654. .v.func = cs421x_fixup_sense_b,
  655. },
  656. [CS421X_STUMPY] = {
  657. .type = HDA_FIXUP_PINS,
  658. .v.pins = stumpy_pincfgs,
  659. },
  660. };
  661. static const struct hda_verb cs421x_coef_init_verbs[] = {
  662. {0x0B, AC_VERB_SET_PROC_STATE, 1},
  663. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
  664. /*
  665. Disable Coefficient Index Auto-Increment(DAI)=1,
  666. PDREF=0
  667. */
  668. {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
  669. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
  670. /* ADC SZCMode = Digital Soft Ramp */
  671. {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
  672. {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
  673. {0x0B, AC_VERB_SET_PROC_COEF,
  674. (0x0002 /* DAC SZCMode = Digital Soft Ramp */
  675. | 0x0004 /* Mute DAC on FIFO error */
  676. | 0x0008 /* Enable DAC High Pass Filter */
  677. )},
  678. {} /* terminator */
  679. };
  680. /* Errata: CS4210 rev A1 Silicon
  681. *
  682. * http://www.cirrus.com/en/pubs/errata/
  683. *
  684. * Description:
  685. * 1. Performance degredation is present in the ADC.
  686. * 2. Speaker output is not completely muted upon HP detect.
  687. * 3. Noise is present when clipping occurs on the amplified
  688. * speaker outputs.
  689. *
  690. * Workaround:
  691. * The following verb sequence written to the registers during
  692. * initialization will correct the issues listed above.
  693. */
  694. static const struct hda_verb cs421x_coef_init_verbs_A1_silicon_fixes[] = {
  695. {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
  696. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
  697. {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
  698. {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
  699. {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
  700. {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
  701. {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
  702. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
  703. {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
  704. {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
  705. {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
  706. {} /* terminator */
  707. };
  708. /* Speaker Amp Gain is controlled by the vendor widget's coef 4 */
  709. static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
  710. static int cs421x_boost_vol_info(struct snd_kcontrol *kcontrol,
  711. struct snd_ctl_elem_info *uinfo)
  712. {
  713. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  714. uinfo->count = 1;
  715. uinfo->value.integer.min = 0;
  716. uinfo->value.integer.max = 3;
  717. return 0;
  718. }
  719. static int cs421x_boost_vol_get(struct snd_kcontrol *kcontrol,
  720. struct snd_ctl_elem_value *ucontrol)
  721. {
  722. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  723. ucontrol->value.integer.value[0] =
  724. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003;
  725. return 0;
  726. }
  727. static int cs421x_boost_vol_put(struct snd_kcontrol *kcontrol,
  728. struct snd_ctl_elem_value *ucontrol)
  729. {
  730. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  731. unsigned int vol = ucontrol->value.integer.value[0];
  732. unsigned int coef =
  733. cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL);
  734. unsigned int original_coef = coef;
  735. coef &= ~0x0003;
  736. coef |= (vol & 0x0003);
  737. if (original_coef == coef)
  738. return 0;
  739. else {
  740. cs_vendor_coef_set(codec, CS421X_IDX_SPK_CTL, coef);
  741. return 1;
  742. }
  743. }
  744. static const struct snd_kcontrol_new cs421x_speaker_boost_ctl = {
  745. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  746. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  747. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  748. .name = "Speaker Boost Playback Volume",
  749. .info = cs421x_boost_vol_info,
  750. .get = cs421x_boost_vol_get,
  751. .put = cs421x_boost_vol_put,
  752. .tlv = { .p = cs421x_speaker_boost_db_scale },
  753. };
  754. static void cs4210_pinmux_init(struct hda_codec *codec)
  755. {
  756. struct cs_spec *spec = codec->spec;
  757. unsigned int def_conf, coef;
  758. /* GPIO, DMIC_SCL, DMIC_SDA and SENSE_B are multiplexed */
  759. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  760. if (spec->gpio_mask)
  761. coef |= 0x0008; /* B1,B2 are GPIOs */
  762. else
  763. coef &= ~0x0008;
  764. if (spec->sense_b)
  765. coef |= 0x0010; /* B2 is SENSE_B, not inverted */
  766. else
  767. coef &= ~0x0010;
  768. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  769. if ((spec->gpio_mask || spec->sense_b) &&
  770. is_active_pin(codec, CS421X_DMIC_PIN_NID)) {
  771. /*
  772. GPIO or SENSE_B forced - disconnect the DMIC pin.
  773. */
  774. def_conf = snd_hda_codec_get_pincfg(codec, CS421X_DMIC_PIN_NID);
  775. def_conf &= ~AC_DEFCFG_PORT_CONN;
  776. def_conf |= (AC_JACK_PORT_NONE << AC_DEFCFG_PORT_CONN_SHIFT);
  777. snd_hda_codec_set_pincfg(codec, CS421X_DMIC_PIN_NID, def_conf);
  778. }
  779. }
  780. static void cs4210_spdif_automute(struct hda_codec *codec,
  781. struct hda_jack_tbl *tbl)
  782. {
  783. struct cs_spec *spec = codec->spec;
  784. bool spdif_present = false;
  785. hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0];
  786. /* detect on spdif is specific to CS4210 */
  787. if (!spec->spdif_detect ||
  788. spec->vendor_nid != CS4210_VENDOR_NID)
  789. return;
  790. spdif_present = snd_hda_jack_detect(codec, spdif_pin);
  791. if (spdif_present == spec->spdif_present)
  792. return;
  793. spec->spdif_present = spdif_present;
  794. /* SPDIF TX on/off */
  795. if (spdif_present)
  796. snd_hda_set_pin_ctl(codec, spdif_pin,
  797. spdif_present ? PIN_OUT : 0);
  798. cs_automute(codec);
  799. }
  800. static void parse_cs421x_digital(struct hda_codec *codec)
  801. {
  802. struct cs_spec *spec = codec->spec;
  803. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  804. int i;
  805. for (i = 0; i < cfg->dig_outs; i++) {
  806. hda_nid_t nid = cfg->dig_out_pins[i];
  807. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP) {
  808. spec->spdif_detect = 1;
  809. snd_hda_jack_detect_enable_callback(codec, nid,
  810. SPDIF_EVENT,
  811. cs4210_spdif_automute);
  812. }
  813. }
  814. }
  815. static int cs421x_init(struct hda_codec *codec)
  816. {
  817. struct cs_spec *spec = codec->spec;
  818. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  819. snd_hda_sequence_write(codec, cs421x_coef_init_verbs);
  820. snd_hda_sequence_write(codec, cs421x_coef_init_verbs_A1_silicon_fixes);
  821. cs4210_pinmux_init(codec);
  822. }
  823. snd_hda_gen_init(codec);
  824. if (spec->gpio_mask) {
  825. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK,
  826. spec->gpio_mask);
  827. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION,
  828. spec->gpio_dir);
  829. snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA,
  830. spec->gpio_data);
  831. }
  832. init_input_coef(codec);
  833. cs4210_spdif_automute(codec, NULL);
  834. return 0;
  835. }
  836. static int cs421x_build_controls(struct hda_codec *codec)
  837. {
  838. struct cs_spec *spec = codec->spec;
  839. int err;
  840. err = snd_hda_gen_build_controls(codec);
  841. if (err < 0)
  842. return err;
  843. if (spec->gen.autocfg.speaker_outs &&
  844. spec->vendor_nid == CS4210_VENDOR_NID) {
  845. err = snd_hda_ctl_add(codec, 0,
  846. snd_ctl_new1(&cs421x_speaker_boost_ctl, codec));
  847. if (err < 0)
  848. return err;
  849. }
  850. return 0;
  851. }
  852. static void fix_volume_caps(struct hda_codec *codec, hda_nid_t dac)
  853. {
  854. unsigned int caps;
  855. /* set the upper-limit for mixer amp to 0dB */
  856. caps = query_amp_caps(codec, dac, HDA_OUTPUT);
  857. caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT);
  858. caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f)
  859. << AC_AMPCAP_NUM_STEPS_SHIFT;
  860. snd_hda_override_amp_caps(codec, dac, HDA_OUTPUT, caps);
  861. }
  862. static int cs421x_parse_auto_config(struct hda_codec *codec)
  863. {
  864. struct cs_spec *spec = codec->spec;
  865. hda_nid_t dac = CS4210_DAC_NID;
  866. int err;
  867. fix_volume_caps(codec, dac);
  868. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  869. if (err < 0)
  870. return err;
  871. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  872. if (err < 0)
  873. return err;
  874. parse_cs421x_digital(codec);
  875. return 0;
  876. }
  877. #ifdef CONFIG_PM
  878. /*
  879. Manage PDREF, when transitioning to D3hot
  880. (DAC,ADC) -> D3, PDREF=1, AFG->D3
  881. */
  882. static int cs421x_suspend(struct hda_codec *codec)
  883. {
  884. struct cs_spec *spec = codec->spec;
  885. unsigned int coef;
  886. snd_hda_shutup_pins(codec);
  887. snd_hda_codec_write(codec, CS4210_DAC_NID, 0,
  888. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  889. snd_hda_codec_write(codec, CS4210_ADC_NID, 0,
  890. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  891. if (spec->vendor_nid == CS4210_VENDOR_NID) {
  892. coef = cs_vendor_coef_get(codec, CS421X_IDX_DEV_CFG);
  893. coef |= 0x0004; /* PDREF */
  894. cs_vendor_coef_set(codec, CS421X_IDX_DEV_CFG, coef);
  895. }
  896. return 0;
  897. }
  898. #endif
  899. static const struct hda_codec_ops cs421x_patch_ops = {
  900. .build_controls = cs421x_build_controls,
  901. .build_pcms = snd_hda_gen_build_pcms,
  902. .init = cs421x_init,
  903. .free = cs_free,
  904. .unsol_event = snd_hda_jack_unsol_event,
  905. #ifdef CONFIG_PM
  906. .suspend = cs421x_suspend,
  907. #endif
  908. };
  909. static int patch_cs4210(struct hda_codec *codec)
  910. {
  911. struct cs_spec *spec;
  912. int err;
  913. spec = cs_alloc_spec(codec, CS4210_VENDOR_NID);
  914. if (!spec)
  915. return -ENOMEM;
  916. spec->gen.automute_hook = cs_automute;
  917. snd_hda_pick_fixup(codec, cs421x_models, cs421x_fixup_tbl,
  918. cs421x_fixups);
  919. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  920. /*
  921. Update the GPIO/DMIC/SENSE_B pinmux before the configuration
  922. is auto-parsed. If GPIO or SENSE_B is forced, DMIC input
  923. is disabled.
  924. */
  925. cs4210_pinmux_init(codec);
  926. err = cs421x_parse_auto_config(codec);
  927. if (err < 0)
  928. goto error;
  929. codec->patch_ops = cs421x_patch_ops;
  930. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  931. return 0;
  932. error:
  933. cs_free(codec);
  934. return err;
  935. }
  936. static int patch_cs4213(struct hda_codec *codec)
  937. {
  938. struct cs_spec *spec;
  939. int err;
  940. spec = cs_alloc_spec(codec, CS4213_VENDOR_NID);
  941. if (!spec)
  942. return -ENOMEM;
  943. err = cs421x_parse_auto_config(codec);
  944. if (err < 0)
  945. goto error;
  946. codec->patch_ops = cs421x_patch_ops;
  947. return 0;
  948. error:
  949. cs_free(codec);
  950. return err;
  951. }
  952. /*
  953. * patch entries
  954. */
  955. static const struct hda_codec_preset snd_hda_preset_cirrus[] = {
  956. { .id = 0x10134206, .name = "CS4206", .patch = patch_cs420x },
  957. { .id = 0x10134207, .name = "CS4207", .patch = patch_cs420x },
  958. { .id = 0x10134208, .name = "CS4208", .patch = patch_cs4208 },
  959. { .id = 0x10134210, .name = "CS4210", .patch = patch_cs4210 },
  960. { .id = 0x10134213, .name = "CS4213", .patch = patch_cs4213 },
  961. {} /* terminator */
  962. };
  963. MODULE_ALIAS("snd-hda-codec-id:10134206");
  964. MODULE_ALIAS("snd-hda-codec-id:10134207");
  965. MODULE_ALIAS("snd-hda-codec-id:10134208");
  966. MODULE_ALIAS("snd-hda-codec-id:10134210");
  967. MODULE_ALIAS("snd-hda-codec-id:10134213");
  968. MODULE_LICENSE("GPL");
  969. MODULE_DESCRIPTION("Cirrus Logic HD-audio codec");
  970. static struct hda_codec_preset_list cirrus_list = {
  971. .preset = snd_hda_preset_cirrus,
  972. .owner = THIS_MODULE,
  973. };
  974. static int __init patch_cirrus_init(void)
  975. {
  976. return snd_hda_add_codec_preset(&cirrus_list);
  977. }
  978. static void __exit patch_cirrus_exit(void)
  979. {
  980. snd_hda_delete_codec_preset(&cirrus_list);
  981. }
  982. module_init(patch_cirrus_init)
  983. module_exit(patch_cirrus_exit)