iwl-trans.c 6.2 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  22. * USA
  23. *
  24. * The full GNU General Public License is included in this distribution
  25. * in the file called LICENSE.GPL.
  26. *
  27. * Contact Information:
  28. * Intel Linux Wireless <ilw@linux.intel.com>
  29. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  30. *
  31. * BSD LICENSE
  32. *
  33. * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
  34. * All rights reserved.
  35. *
  36. * Redistribution and use in source and binary forms, with or without
  37. * modification, are permitted provided that the following conditions
  38. * are met:
  39. *
  40. * * Redistributions of source code must retain the above copyright
  41. * notice, this list of conditions and the following disclaimer.
  42. * * Redistributions in binary form must reproduce the above copyright
  43. * notice, this list of conditions and the following disclaimer in
  44. * the documentation and/or other materials provided with the
  45. * distribution.
  46. * * Neither the name Intel Corporation nor the names of its
  47. * contributors may be used to endorse or promote products derived
  48. * from this software without specific prior written permission.
  49. *
  50. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  51. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  52. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  53. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  54. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  55. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  56. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  57. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  58. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  59. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  60. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  61. *
  62. *****************************************************************************/
  63. #include "iwl-dev.h"
  64. #include "iwl-trans.h"
  65. static int iwl_trans_rx_alloc(struct iwl_priv *priv)
  66. {
  67. struct iwl_rx_queue *rxq = &priv->rxq;
  68. struct device *dev = priv->bus.dev;
  69. memset(&priv->rxq, 0, sizeof(priv->rxq));
  70. spin_lock_init(&rxq->lock);
  71. INIT_LIST_HEAD(&rxq->rx_free);
  72. INIT_LIST_HEAD(&rxq->rx_used);
  73. if (WARN_ON(rxq->bd || rxq->rb_stts))
  74. return -EINVAL;
  75. /* Allocate the circular buffer of Read Buffer Descriptors (RBDs) */
  76. rxq->bd = dma_alloc_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE,
  77. &rxq->bd_dma, GFP_KERNEL);
  78. if (!rxq->bd)
  79. goto err_bd;
  80. memset(rxq->bd, 0, sizeof(__le32) * RX_QUEUE_SIZE);
  81. /*Allocate the driver's pointer to receive buffer status */
  82. rxq->rb_stts = dma_alloc_coherent(dev, sizeof(*rxq->rb_stts),
  83. &rxq->rb_stts_dma, GFP_KERNEL);
  84. if (!rxq->rb_stts)
  85. goto err_rb_stts;
  86. memset(rxq->rb_stts, 0, sizeof(*rxq->rb_stts));
  87. return 0;
  88. err_rb_stts:
  89. dma_free_coherent(dev, sizeof(__le32) * RX_QUEUE_SIZE,
  90. rxq->bd, rxq->bd_dma);
  91. memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
  92. rxq->bd = NULL;
  93. err_bd:
  94. return -ENOMEM;
  95. }
  96. static void iwl_trans_rxq_free_rx_bufs(struct iwl_priv *priv)
  97. {
  98. struct iwl_rx_queue *rxq = &priv->rxq;
  99. int i;
  100. /* Fill the rx_used queue with _all_ of the Rx buffers */
  101. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  102. /* In the reset function, these buffers may have been allocated
  103. * to an SKB, so we need to unmap and free potential storage */
  104. if (rxq->pool[i].page != NULL) {
  105. dma_unmap_page(priv->bus.dev, rxq->pool[i].page_dma,
  106. PAGE_SIZE << priv->hw_params.rx_page_order,
  107. DMA_FROM_DEVICE);
  108. __iwl_free_pages(priv, rxq->pool[i].page);
  109. rxq->pool[i].page = NULL;
  110. }
  111. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  112. }
  113. }
  114. static int iwl_trans_rx_init(struct iwl_priv *priv)
  115. {
  116. struct iwl_rx_queue *rxq = &priv->rxq;
  117. int i, err;
  118. unsigned long flags;
  119. if (!rxq->bd) {
  120. err = iwl_trans_rx_alloc(priv);
  121. if (err)
  122. return err;
  123. }
  124. spin_lock_irqsave(&rxq->lock, flags);
  125. INIT_LIST_HEAD(&rxq->rx_free);
  126. INIT_LIST_HEAD(&rxq->rx_used);
  127. iwl_trans_rxq_free_rx_bufs(priv);
  128. for (i = 0; i < RX_QUEUE_SIZE; i++)
  129. rxq->queue[i] = NULL;
  130. /* Set us so that we have processed and used all buffers, but have
  131. * not restocked the Rx queue with fresh buffers */
  132. rxq->read = rxq->write = 0;
  133. rxq->write_actual = 0;
  134. rxq->free_count = 0;
  135. spin_unlock_irqrestore(&rxq->lock, flags);
  136. return 0;
  137. }
  138. static void iwl_trans_rx_free(struct iwl_priv *priv)
  139. {
  140. struct iwl_rx_queue *rxq = &priv->rxq;
  141. unsigned long flags;
  142. /*if rxq->bd is NULL, it means that nothing has been allocated,
  143. * exit now */
  144. if (!rxq->bd) {
  145. IWL_DEBUG_INFO(priv, "Free NULL rx context\n");
  146. return;
  147. }
  148. spin_lock_irqsave(&rxq->lock, flags);
  149. iwl_trans_rxq_free_rx_bufs(priv);
  150. spin_unlock_irqrestore(&rxq->lock, flags);
  151. dma_free_coherent(priv->bus.dev, sizeof(__le32) * RX_QUEUE_SIZE,
  152. rxq->bd, rxq->bd_dma);
  153. memset(&rxq->bd_dma, 0, sizeof(rxq->bd_dma));
  154. rxq->bd = NULL;
  155. if (rxq->rb_stts)
  156. dma_free_coherent(priv->bus.dev,
  157. sizeof(struct iwl_rb_status),
  158. rxq->rb_stts, rxq->rb_stts_dma);
  159. else
  160. IWL_DEBUG_INFO(priv, "Free rxq->rb_stts which is NULL\n");
  161. memset(&rxq->rb_stts_dma, 0, sizeof(rxq->rb_stts_dma));
  162. rxq->rb_stts = NULL;
  163. }
  164. static const struct iwl_trans_ops trans_ops = {
  165. .rx_init = iwl_trans_rx_init,
  166. .rx_free = iwl_trans_rx_free,
  167. };
  168. void iwl_trans_register(struct iwl_trans *trans)
  169. {
  170. trans->ops = &trans_ops;
  171. }