iwl-agn.c 106 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/slab.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/sched.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/netdevice.h>
  39. #include <linux/wireless.h>
  40. #include <linux/firmware.h>
  41. #include <linux/etherdevice.h>
  42. #include <linux/if_arp.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #include "iwl-eeprom.h"
  46. #include "iwl-dev.h"
  47. #include "iwl-core.h"
  48. #include "iwl-io.h"
  49. #include "iwl-helpers.h"
  50. #include "iwl-sta.h"
  51. #include "iwl-agn-calib.h"
  52. #include "iwl-agn.h"
  53. #include "iwl-pci.h"
  54. #include "iwl-trans.h"
  55. /******************************************************************************
  56. *
  57. * module boiler plate
  58. *
  59. ******************************************************************************/
  60. /*
  61. * module name, copyright, version, etc.
  62. */
  63. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link AGN driver for Linux"
  64. #ifdef CONFIG_IWLWIFI_DEBUG
  65. #define VD "d"
  66. #else
  67. #define VD
  68. #endif
  69. #define DRV_VERSION IWLWIFI_VERSION VD
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. static int iwlagn_ant_coupling;
  75. static bool iwlagn_bt_ch_announce = 1;
  76. void iwl_update_chain_flags(struct iwl_priv *priv)
  77. {
  78. struct iwl_rxon_context *ctx;
  79. if (priv->cfg->ops->hcmd->set_rxon_chain) {
  80. for_each_context(priv, ctx) {
  81. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  82. if (ctx->active.rx_chain != ctx->staging.rx_chain)
  83. iwlagn_commit_rxon(priv, ctx);
  84. }
  85. }
  86. }
  87. /* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
  88. static void iwl_set_beacon_tim(struct iwl_priv *priv,
  89. struct iwl_tx_beacon_cmd *tx_beacon_cmd,
  90. u8 *beacon, u32 frame_size)
  91. {
  92. u16 tim_idx;
  93. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
  94. /*
  95. * The index is relative to frame start but we start looking at the
  96. * variable-length part of the beacon.
  97. */
  98. tim_idx = mgmt->u.beacon.variable - beacon;
  99. /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
  100. while ((tim_idx < (frame_size - 2)) &&
  101. (beacon[tim_idx] != WLAN_EID_TIM))
  102. tim_idx += beacon[tim_idx+1] + 2;
  103. /* If TIM field was found, set variables */
  104. if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
  105. tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
  106. tx_beacon_cmd->tim_size = beacon[tim_idx+1];
  107. } else
  108. IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
  109. }
  110. int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
  111. {
  112. struct iwl_tx_beacon_cmd *tx_beacon_cmd;
  113. struct iwl_host_cmd cmd = {
  114. .id = REPLY_TX_BEACON,
  115. };
  116. struct ieee80211_tx_info *info;
  117. u32 frame_size;
  118. u32 rate_flags;
  119. u32 rate;
  120. /*
  121. * We have to set up the TX command, the TX Beacon command, and the
  122. * beacon contents.
  123. */
  124. lockdep_assert_held(&priv->mutex);
  125. if (!priv->beacon_ctx) {
  126. IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
  127. return 0;
  128. }
  129. if (WARN_ON(!priv->beacon_skb))
  130. return -EINVAL;
  131. /* Allocate beacon command */
  132. if (!priv->beacon_cmd)
  133. priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL);
  134. tx_beacon_cmd = priv->beacon_cmd;
  135. if (!tx_beacon_cmd)
  136. return -ENOMEM;
  137. frame_size = priv->beacon_skb->len;
  138. /* Set up TX command fields */
  139. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  140. tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
  141. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  142. tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
  143. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
  144. /* Set up TX beacon command fields */
  145. iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data,
  146. frame_size);
  147. /* Set up packet rate and flags */
  148. info = IEEE80211_SKB_CB(priv->beacon_skb);
  149. /*
  150. * Let's set up the rate at least somewhat correctly;
  151. * it will currently not actually be used by the uCode,
  152. * it uses the broadcast station's rate instead.
  153. */
  154. if (info->control.rates[0].idx < 0 ||
  155. info->control.rates[0].flags & IEEE80211_TX_RC_MCS)
  156. rate = 0;
  157. else
  158. rate = info->control.rates[0].idx;
  159. priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
  160. priv->hw_params.valid_tx_ant);
  161. rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
  162. /* In mac80211, rates for 5 GHz start at 0 */
  163. if (info->band == IEEE80211_BAND_5GHZ)
  164. rate += IWL_FIRST_OFDM_RATE;
  165. else if (rate >= IWL_FIRST_CCK_RATE && rate <= IWL_LAST_CCK_RATE)
  166. rate_flags |= RATE_MCS_CCK_MSK;
  167. tx_beacon_cmd->tx.rate_n_flags =
  168. iwl_hw_set_rate_n_flags(rate, rate_flags);
  169. /* Submit command */
  170. cmd.len[0] = sizeof(*tx_beacon_cmd);
  171. cmd.data[0] = tx_beacon_cmd;
  172. cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
  173. cmd.len[1] = frame_size;
  174. cmd.data[1] = priv->beacon_skb->data;
  175. cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
  176. return iwl_send_cmd_sync(priv, &cmd);
  177. }
  178. static void iwl_bg_beacon_update(struct work_struct *work)
  179. {
  180. struct iwl_priv *priv =
  181. container_of(work, struct iwl_priv, beacon_update);
  182. struct sk_buff *beacon;
  183. mutex_lock(&priv->mutex);
  184. if (!priv->beacon_ctx) {
  185. IWL_ERR(priv, "updating beacon w/o beacon context!\n");
  186. goto out;
  187. }
  188. if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
  189. /*
  190. * The ucode will send beacon notifications even in
  191. * IBSS mode, but we don't want to process them. But
  192. * we need to defer the type check to here due to
  193. * requiring locking around the beacon_ctx access.
  194. */
  195. goto out;
  196. }
  197. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  198. beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
  199. if (!beacon) {
  200. IWL_ERR(priv, "update beacon failed -- keeping old\n");
  201. goto out;
  202. }
  203. /* new beacon skb is allocated every time; dispose previous.*/
  204. dev_kfree_skb(priv->beacon_skb);
  205. priv->beacon_skb = beacon;
  206. iwlagn_send_beacon_cmd(priv);
  207. out:
  208. mutex_unlock(&priv->mutex);
  209. }
  210. static void iwl_bg_bt_runtime_config(struct work_struct *work)
  211. {
  212. struct iwl_priv *priv =
  213. container_of(work, struct iwl_priv, bt_runtime_config);
  214. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  215. return;
  216. /* dont send host command if rf-kill is on */
  217. if (!iwl_is_ready_rf(priv))
  218. return;
  219. priv->cfg->ops->hcmd->send_bt_config(priv);
  220. }
  221. static void iwl_bg_bt_full_concurrency(struct work_struct *work)
  222. {
  223. struct iwl_priv *priv =
  224. container_of(work, struct iwl_priv, bt_full_concurrency);
  225. struct iwl_rxon_context *ctx;
  226. mutex_lock(&priv->mutex);
  227. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  228. goto out;
  229. /* dont send host command if rf-kill is on */
  230. if (!iwl_is_ready_rf(priv))
  231. goto out;
  232. IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
  233. priv->bt_full_concurrent ?
  234. "full concurrency" : "3-wire");
  235. /*
  236. * LQ & RXON updated cmds must be sent before BT Config cmd
  237. * to avoid 3-wire collisions
  238. */
  239. for_each_context(priv, ctx) {
  240. if (priv->cfg->ops->hcmd->set_rxon_chain)
  241. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  242. iwlagn_commit_rxon(priv, ctx);
  243. }
  244. priv->cfg->ops->hcmd->send_bt_config(priv);
  245. out:
  246. mutex_unlock(&priv->mutex);
  247. }
  248. /**
  249. * iwl_bg_statistics_periodic - Timer callback to queue statistics
  250. *
  251. * This callback is provided in order to send a statistics request.
  252. *
  253. * This timer function is continually reset to execute within
  254. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  255. * was received. We need to ensure we receive the statistics in order
  256. * to update the temperature used for calibrating the TXPOWER.
  257. */
  258. static void iwl_bg_statistics_periodic(unsigned long data)
  259. {
  260. struct iwl_priv *priv = (struct iwl_priv *)data;
  261. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  262. return;
  263. /* dont send host command if rf-kill is on */
  264. if (!iwl_is_ready_rf(priv))
  265. return;
  266. iwl_send_statistics_request(priv, CMD_ASYNC, false);
  267. }
  268. static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
  269. u32 start_idx, u32 num_events,
  270. u32 mode)
  271. {
  272. u32 i;
  273. u32 ptr; /* SRAM byte address of log data */
  274. u32 ev, time, data; /* event log data */
  275. unsigned long reg_flags;
  276. if (mode == 0)
  277. ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
  278. else
  279. ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
  280. /* Make sure device is powered up for SRAM reads */
  281. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  282. if (iwl_grab_nic_access(priv)) {
  283. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  284. return;
  285. }
  286. /* Set starting address; reads will auto-increment */
  287. iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
  288. rmb();
  289. /*
  290. * "time" is actually "data" for mode 0 (no timestamp).
  291. * place event id # at far right for easier visual parsing.
  292. */
  293. for (i = 0; i < num_events; i++) {
  294. ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  295. time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  296. if (mode == 0) {
  297. trace_iwlwifi_dev_ucode_cont_event(priv,
  298. 0, time, ev);
  299. } else {
  300. data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  301. trace_iwlwifi_dev_ucode_cont_event(priv,
  302. time, data, ev);
  303. }
  304. }
  305. /* Allow device to power down */
  306. iwl_release_nic_access(priv);
  307. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  308. }
  309. static void iwl_continuous_event_trace(struct iwl_priv *priv)
  310. {
  311. u32 capacity; /* event log capacity in # entries */
  312. u32 base; /* SRAM byte address of event log header */
  313. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  314. u32 num_wraps; /* # times uCode wrapped to top of log */
  315. u32 next_entry; /* index of next entry to be written by uCode */
  316. base = priv->device_pointers.error_event_table;
  317. if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  318. capacity = iwl_read_targ_mem(priv, base);
  319. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  320. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  321. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  322. } else
  323. return;
  324. if (num_wraps == priv->event_log.num_wraps) {
  325. iwl_print_cont_event_trace(priv,
  326. base, priv->event_log.next_entry,
  327. next_entry - priv->event_log.next_entry,
  328. mode);
  329. priv->event_log.non_wraps_count++;
  330. } else {
  331. if ((num_wraps - priv->event_log.num_wraps) > 1)
  332. priv->event_log.wraps_more_count++;
  333. else
  334. priv->event_log.wraps_once_count++;
  335. trace_iwlwifi_dev_ucode_wrap_event(priv,
  336. num_wraps - priv->event_log.num_wraps,
  337. next_entry, priv->event_log.next_entry);
  338. if (next_entry < priv->event_log.next_entry) {
  339. iwl_print_cont_event_trace(priv, base,
  340. priv->event_log.next_entry,
  341. capacity - priv->event_log.next_entry,
  342. mode);
  343. iwl_print_cont_event_trace(priv, base, 0,
  344. next_entry, mode);
  345. } else {
  346. iwl_print_cont_event_trace(priv, base,
  347. next_entry, capacity - next_entry,
  348. mode);
  349. iwl_print_cont_event_trace(priv, base, 0,
  350. next_entry, mode);
  351. }
  352. }
  353. priv->event_log.num_wraps = num_wraps;
  354. priv->event_log.next_entry = next_entry;
  355. }
  356. /**
  357. * iwl_bg_ucode_trace - Timer callback to log ucode event
  358. *
  359. * The timer is continually set to execute every
  360. * UCODE_TRACE_PERIOD milliseconds after the last timer expired
  361. * this function is to perform continuous uCode event logging operation
  362. * if enabled
  363. */
  364. static void iwl_bg_ucode_trace(unsigned long data)
  365. {
  366. struct iwl_priv *priv = (struct iwl_priv *)data;
  367. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  368. return;
  369. if (priv->event_log.ucode_trace) {
  370. iwl_continuous_event_trace(priv);
  371. /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
  372. mod_timer(&priv->ucode_trace,
  373. jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
  374. }
  375. }
  376. static void iwl_bg_tx_flush(struct work_struct *work)
  377. {
  378. struct iwl_priv *priv =
  379. container_of(work, struct iwl_priv, tx_flush);
  380. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  381. return;
  382. /* do nothing if rf-kill is on */
  383. if (!iwl_is_ready_rf(priv))
  384. return;
  385. IWL_DEBUG_INFO(priv, "device request: flush all tx frames\n");
  386. iwlagn_dev_txfifo_flush(priv, IWL_DROP_ALL);
  387. }
  388. /**
  389. * iwl_rx_handle - Main entry function for receiving responses from uCode
  390. *
  391. * Uses the priv->rx_handlers callback function array to invoke
  392. * the appropriate handlers, including command responses,
  393. * frame-received notifications, and other notifications.
  394. */
  395. static void iwl_rx_handle(struct iwl_priv *priv)
  396. {
  397. struct iwl_rx_mem_buffer *rxb;
  398. struct iwl_rx_packet *pkt;
  399. struct iwl_rx_queue *rxq = &priv->rxq;
  400. u32 r, i;
  401. int reclaim;
  402. unsigned long flags;
  403. u8 fill_rx = 0;
  404. u32 count = 8;
  405. int total_empty;
  406. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  407. * buffer that the driver may process (last buffer filled by ucode). */
  408. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  409. i = rxq->read;
  410. /* Rx interrupt, but nothing sent from uCode */
  411. if (i == r)
  412. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  413. /* calculate total frames need to be restock after handling RX */
  414. total_empty = r - rxq->write_actual;
  415. if (total_empty < 0)
  416. total_empty += RX_QUEUE_SIZE;
  417. if (total_empty > (RX_QUEUE_SIZE / 2))
  418. fill_rx = 1;
  419. while (i != r) {
  420. int len;
  421. rxb = rxq->queue[i];
  422. /* If an RXB doesn't have a Rx queue slot associated with it,
  423. * then a bug has been introduced in the queue refilling
  424. * routines -- catch it here */
  425. if (WARN_ON(rxb == NULL)) {
  426. i = (i + 1) & RX_QUEUE_MASK;
  427. continue;
  428. }
  429. rxq->queue[i] = NULL;
  430. dma_unmap_page(priv->bus.dev, rxb->page_dma,
  431. PAGE_SIZE << priv->hw_params.rx_page_order,
  432. DMA_FROM_DEVICE);
  433. pkt = rxb_addr(rxb);
  434. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  435. len += sizeof(u32); /* account for status word */
  436. trace_iwlwifi_dev_rx(priv, pkt, len);
  437. /* Reclaim a command buffer only if this packet is a response
  438. * to a (driver-originated) command.
  439. * If the packet (e.g. Rx frame) originated from uCode,
  440. * there is no command buffer to reclaim.
  441. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  442. * but apparently a few don't get set; catch them here. */
  443. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  444. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  445. (pkt->hdr.cmd != REPLY_RX) &&
  446. (pkt->hdr.cmd != REPLY_RX_MPDU_CMD) &&
  447. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  448. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  449. (pkt->hdr.cmd != REPLY_TX);
  450. /*
  451. * Do the notification wait before RX handlers so
  452. * even if the RX handler consumes the RXB we have
  453. * access to it in the notification wait entry.
  454. */
  455. if (!list_empty(&priv->_agn.notif_waits)) {
  456. struct iwl_notification_wait *w;
  457. spin_lock(&priv->_agn.notif_wait_lock);
  458. list_for_each_entry(w, &priv->_agn.notif_waits, list) {
  459. if (w->cmd == pkt->hdr.cmd) {
  460. w->triggered = true;
  461. if (w->fn)
  462. w->fn(priv, pkt, w->fn_data);
  463. }
  464. }
  465. spin_unlock(&priv->_agn.notif_wait_lock);
  466. wake_up_all(&priv->_agn.notif_waitq);
  467. }
  468. if (priv->pre_rx_handler)
  469. priv->pre_rx_handler(priv, rxb);
  470. /* Based on type of command response or notification,
  471. * handle those that need handling via function in
  472. * rx_handlers table. See iwl_setup_rx_handlers() */
  473. if (priv->rx_handlers[pkt->hdr.cmd]) {
  474. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
  475. i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  476. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  477. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  478. } else {
  479. /* No handling needed */
  480. IWL_DEBUG_RX(priv,
  481. "r %d i %d No handler needed for %s, 0x%02x\n",
  482. r, i, get_cmd_string(pkt->hdr.cmd),
  483. pkt->hdr.cmd);
  484. }
  485. /*
  486. * XXX: After here, we should always check rxb->page
  487. * against NULL before touching it or its virtual
  488. * memory (pkt). Because some rx_handler might have
  489. * already taken or freed the pages.
  490. */
  491. if (reclaim) {
  492. /* Invoke any callbacks, transfer the buffer to caller,
  493. * and fire off the (possibly) blocking iwl_send_cmd()
  494. * as we reclaim the driver command queue */
  495. if (rxb->page)
  496. iwl_tx_cmd_complete(priv, rxb);
  497. else
  498. IWL_WARN(priv, "Claim null rxb?\n");
  499. }
  500. /* Reuse the page if possible. For notification packets and
  501. * SKBs that fail to Rx correctly, add them back into the
  502. * rx_free list for reuse later. */
  503. spin_lock_irqsave(&rxq->lock, flags);
  504. if (rxb->page != NULL) {
  505. rxb->page_dma = dma_map_page(priv->bus.dev, rxb->page,
  506. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  507. DMA_FROM_DEVICE);
  508. list_add_tail(&rxb->list, &rxq->rx_free);
  509. rxq->free_count++;
  510. } else
  511. list_add_tail(&rxb->list, &rxq->rx_used);
  512. spin_unlock_irqrestore(&rxq->lock, flags);
  513. i = (i + 1) & RX_QUEUE_MASK;
  514. /* If there are a lot of unused frames,
  515. * restock the Rx queue so ucode wont assert. */
  516. if (fill_rx) {
  517. count++;
  518. if (count >= 8) {
  519. rxq->read = i;
  520. iwlagn_rx_replenish_now(priv);
  521. count = 0;
  522. }
  523. }
  524. }
  525. /* Backtrack one entry */
  526. rxq->read = i;
  527. if (fill_rx)
  528. iwlagn_rx_replenish_now(priv);
  529. else
  530. iwlagn_rx_queue_restock(priv);
  531. }
  532. /* tasklet for iwlagn interrupt */
  533. static void iwl_irq_tasklet(struct iwl_priv *priv)
  534. {
  535. u32 inta = 0;
  536. u32 handled = 0;
  537. unsigned long flags;
  538. u32 i;
  539. #ifdef CONFIG_IWLWIFI_DEBUG
  540. u32 inta_mask;
  541. #endif
  542. spin_lock_irqsave(&priv->lock, flags);
  543. /* Ack/clear/reset pending uCode interrupts.
  544. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  545. */
  546. /* There is a hardware bug in the interrupt mask function that some
  547. * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
  548. * they are disabled in the CSR_INT_MASK register. Furthermore the
  549. * ICT interrupt handling mechanism has another bug that might cause
  550. * these unmasked interrupts fail to be detected. We workaround the
  551. * hardware bugs here by ACKing all the possible interrupts so that
  552. * interrupt coalescing can still be achieved.
  553. */
  554. iwl_write32(priv, CSR_INT, priv->_agn.inta | ~priv->inta_mask);
  555. inta = priv->_agn.inta;
  556. #ifdef CONFIG_IWLWIFI_DEBUG
  557. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  558. /* just for debug */
  559. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  560. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x\n ",
  561. inta, inta_mask);
  562. }
  563. #endif
  564. spin_unlock_irqrestore(&priv->lock, flags);
  565. /* saved interrupt in inta variable now we can reset priv->_agn.inta */
  566. priv->_agn.inta = 0;
  567. /* Now service all interrupt bits discovered above. */
  568. if (inta & CSR_INT_BIT_HW_ERR) {
  569. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  570. /* Tell the device to stop sending interrupts */
  571. iwl_disable_interrupts(priv);
  572. priv->isr_stats.hw++;
  573. iwl_irq_handle_error(priv);
  574. handled |= CSR_INT_BIT_HW_ERR;
  575. return;
  576. }
  577. #ifdef CONFIG_IWLWIFI_DEBUG
  578. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  579. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  580. if (inta & CSR_INT_BIT_SCD) {
  581. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  582. "the frame/frames.\n");
  583. priv->isr_stats.sch++;
  584. }
  585. /* Alive notification via Rx interrupt will do the real work */
  586. if (inta & CSR_INT_BIT_ALIVE) {
  587. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  588. priv->isr_stats.alive++;
  589. }
  590. }
  591. #endif
  592. /* Safely ignore these bits for debug checks below */
  593. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  594. /* HW RF KILL switch toggled */
  595. if (inta & CSR_INT_BIT_RF_KILL) {
  596. int hw_rf_kill = 0;
  597. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  598. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  599. hw_rf_kill = 1;
  600. IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
  601. hw_rf_kill ? "disable radio" : "enable radio");
  602. priv->isr_stats.rfkill++;
  603. /* driver only loads ucode once setting the interface up.
  604. * the driver allows loading the ucode even if the radio
  605. * is killed. Hence update the killswitch state here. The
  606. * rfkill handler will care about restarting if needed.
  607. */
  608. if (!test_bit(STATUS_ALIVE, &priv->status)) {
  609. if (hw_rf_kill)
  610. set_bit(STATUS_RF_KILL_HW, &priv->status);
  611. else
  612. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  613. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
  614. }
  615. handled |= CSR_INT_BIT_RF_KILL;
  616. }
  617. /* Chip got too hot and stopped itself */
  618. if (inta & CSR_INT_BIT_CT_KILL) {
  619. IWL_ERR(priv, "Microcode CT kill error detected.\n");
  620. priv->isr_stats.ctkill++;
  621. handled |= CSR_INT_BIT_CT_KILL;
  622. }
  623. /* Error detected by uCode */
  624. if (inta & CSR_INT_BIT_SW_ERR) {
  625. IWL_ERR(priv, "Microcode SW error detected. "
  626. " Restarting 0x%X.\n", inta);
  627. priv->isr_stats.sw++;
  628. iwl_irq_handle_error(priv);
  629. handled |= CSR_INT_BIT_SW_ERR;
  630. }
  631. /* uCode wakes up after power-down sleep */
  632. if (inta & CSR_INT_BIT_WAKEUP) {
  633. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  634. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  635. for (i = 0; i < priv->hw_params.max_txq_num; i++)
  636. iwl_txq_update_write_ptr(priv, &priv->txq[i]);
  637. priv->isr_stats.wakeup++;
  638. handled |= CSR_INT_BIT_WAKEUP;
  639. }
  640. /* All uCode command responses, including Tx command responses,
  641. * Rx "responses" (frame-received notification), and other
  642. * notifications from uCode come through here*/
  643. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX |
  644. CSR_INT_BIT_RX_PERIODIC)) {
  645. IWL_DEBUG_ISR(priv, "Rx interrupt\n");
  646. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  647. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  648. iwl_write32(priv, CSR_FH_INT_STATUS,
  649. CSR_FH_INT_RX_MASK);
  650. }
  651. if (inta & CSR_INT_BIT_RX_PERIODIC) {
  652. handled |= CSR_INT_BIT_RX_PERIODIC;
  653. iwl_write32(priv, CSR_INT, CSR_INT_BIT_RX_PERIODIC);
  654. }
  655. /* Sending RX interrupt require many steps to be done in the
  656. * the device:
  657. * 1- write interrupt to current index in ICT table.
  658. * 2- dma RX frame.
  659. * 3- update RX shared data to indicate last write index.
  660. * 4- send interrupt.
  661. * This could lead to RX race, driver could receive RX interrupt
  662. * but the shared data changes does not reflect this;
  663. * periodic interrupt will detect any dangling Rx activity.
  664. */
  665. /* Disable periodic interrupt; we use it as just a one-shot. */
  666. iwl_write8(priv, CSR_INT_PERIODIC_REG,
  667. CSR_INT_PERIODIC_DIS);
  668. iwl_rx_handle(priv);
  669. /*
  670. * Enable periodic interrupt in 8 msec only if we received
  671. * real RX interrupt (instead of just periodic int), to catch
  672. * any dangling Rx interrupt. If it was just the periodic
  673. * interrupt, there was no dangling Rx activity, and no need
  674. * to extend the periodic interrupt; one-shot is enough.
  675. */
  676. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
  677. iwl_write8(priv, CSR_INT_PERIODIC_REG,
  678. CSR_INT_PERIODIC_ENA);
  679. priv->isr_stats.rx++;
  680. }
  681. /* This "Tx" DMA channel is used only for loading uCode */
  682. if (inta & CSR_INT_BIT_FH_TX) {
  683. iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
  684. IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
  685. priv->isr_stats.tx++;
  686. handled |= CSR_INT_BIT_FH_TX;
  687. /* Wake up uCode load routine, now that load is complete */
  688. priv->ucode_write_complete = 1;
  689. wake_up_interruptible(&priv->wait_command_queue);
  690. }
  691. if (inta & ~handled) {
  692. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  693. priv->isr_stats.unhandled++;
  694. }
  695. if (inta & ~(priv->inta_mask)) {
  696. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  697. inta & ~priv->inta_mask);
  698. }
  699. /* Re-enable all interrupts */
  700. /* only Re-enable if disabled by irq */
  701. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  702. iwl_enable_interrupts(priv);
  703. /* Re-enable RF_KILL if it occurred */
  704. else if (handled & CSR_INT_BIT_RF_KILL)
  705. iwl_enable_rfkill_int(priv);
  706. }
  707. /*****************************************************************************
  708. *
  709. * sysfs attributes
  710. *
  711. *****************************************************************************/
  712. #ifdef CONFIG_IWLWIFI_DEBUG
  713. /*
  714. * The following adds a new attribute to the sysfs representation
  715. * of this device driver (i.e. a new file in /sys/class/net/wlan0/device/)
  716. * used for controlling the debug level.
  717. *
  718. * See the level definitions in iwl for details.
  719. *
  720. * The debug_level being managed using sysfs below is a per device debug
  721. * level that is used instead of the global debug level if it (the per
  722. * device debug level) is set.
  723. */
  724. static ssize_t show_debug_level(struct device *d,
  725. struct device_attribute *attr, char *buf)
  726. {
  727. struct iwl_priv *priv = dev_get_drvdata(d);
  728. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  729. }
  730. static ssize_t store_debug_level(struct device *d,
  731. struct device_attribute *attr,
  732. const char *buf, size_t count)
  733. {
  734. struct iwl_priv *priv = dev_get_drvdata(d);
  735. unsigned long val;
  736. int ret;
  737. ret = strict_strtoul(buf, 0, &val);
  738. if (ret)
  739. IWL_ERR(priv, "%s is not in hex or decimal form.\n", buf);
  740. else {
  741. priv->debug_level = val;
  742. if (iwl_alloc_traffic_mem(priv))
  743. IWL_ERR(priv,
  744. "Not enough memory to generate traffic log\n");
  745. }
  746. return strnlen(buf, count);
  747. }
  748. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  749. show_debug_level, store_debug_level);
  750. #endif /* CONFIG_IWLWIFI_DEBUG */
  751. static ssize_t show_temperature(struct device *d,
  752. struct device_attribute *attr, char *buf)
  753. {
  754. struct iwl_priv *priv = dev_get_drvdata(d);
  755. if (!iwl_is_alive(priv))
  756. return -EAGAIN;
  757. return sprintf(buf, "%d\n", priv->temperature);
  758. }
  759. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  760. static ssize_t show_tx_power(struct device *d,
  761. struct device_attribute *attr, char *buf)
  762. {
  763. struct iwl_priv *priv = dev_get_drvdata(d);
  764. if (!iwl_is_ready_rf(priv))
  765. return sprintf(buf, "off\n");
  766. else
  767. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  768. }
  769. static ssize_t store_tx_power(struct device *d,
  770. struct device_attribute *attr,
  771. const char *buf, size_t count)
  772. {
  773. struct iwl_priv *priv = dev_get_drvdata(d);
  774. unsigned long val;
  775. int ret;
  776. ret = strict_strtoul(buf, 10, &val);
  777. if (ret)
  778. IWL_INFO(priv, "%s is not in decimal form.\n", buf);
  779. else {
  780. ret = iwl_set_tx_power(priv, val, false);
  781. if (ret)
  782. IWL_ERR(priv, "failed setting tx power (0x%d).\n",
  783. ret);
  784. else
  785. ret = count;
  786. }
  787. return ret;
  788. }
  789. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  790. static struct attribute *iwl_sysfs_entries[] = {
  791. &dev_attr_temperature.attr,
  792. &dev_attr_tx_power.attr,
  793. #ifdef CONFIG_IWLWIFI_DEBUG
  794. &dev_attr_debug_level.attr,
  795. #endif
  796. NULL
  797. };
  798. static struct attribute_group iwl_attribute_group = {
  799. .name = NULL, /* put in device directory */
  800. .attrs = iwl_sysfs_entries,
  801. };
  802. /******************************************************************************
  803. *
  804. * uCode download functions
  805. *
  806. ******************************************************************************/
  807. static void iwl_free_fw_desc(struct iwl_priv *priv, struct fw_desc *desc)
  808. {
  809. if (desc->v_addr)
  810. dma_free_coherent(priv->bus.dev, desc->len,
  811. desc->v_addr, desc->p_addr);
  812. desc->v_addr = NULL;
  813. desc->len = 0;
  814. }
  815. static void iwl_free_fw_img(struct iwl_priv *priv, struct fw_img *img)
  816. {
  817. iwl_free_fw_desc(priv, &img->code);
  818. iwl_free_fw_desc(priv, &img->data);
  819. }
  820. static void iwl_dealloc_ucode(struct iwl_priv *priv)
  821. {
  822. iwl_free_fw_img(priv, &priv->ucode_rt);
  823. iwl_free_fw_img(priv, &priv->ucode_init);
  824. }
  825. static int iwl_alloc_fw_desc(struct iwl_priv *priv, struct fw_desc *desc,
  826. const void *data, size_t len)
  827. {
  828. if (!len) {
  829. desc->v_addr = NULL;
  830. return -EINVAL;
  831. }
  832. desc->v_addr = dma_alloc_coherent(priv->bus.dev, len,
  833. &desc->p_addr, GFP_KERNEL);
  834. if (!desc->v_addr)
  835. return -ENOMEM;
  836. desc->len = len;
  837. memcpy(desc->v_addr, data, len);
  838. return 0;
  839. }
  840. struct iwlagn_ucode_capabilities {
  841. u32 max_probe_length;
  842. u32 standard_phy_calibration_size;
  843. u32 flags;
  844. };
  845. static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
  846. static int iwl_mac_setup_register(struct iwl_priv *priv,
  847. struct iwlagn_ucode_capabilities *capa);
  848. #define UCODE_EXPERIMENTAL_INDEX 100
  849. #define UCODE_EXPERIMENTAL_TAG "exp"
  850. static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
  851. {
  852. const char *name_pre = priv->cfg->fw_name_pre;
  853. char tag[8];
  854. if (first) {
  855. #ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
  856. priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
  857. strcpy(tag, UCODE_EXPERIMENTAL_TAG);
  858. } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
  859. #endif
  860. priv->fw_index = priv->cfg->ucode_api_max;
  861. sprintf(tag, "%d", priv->fw_index);
  862. } else {
  863. priv->fw_index--;
  864. sprintf(tag, "%d", priv->fw_index);
  865. }
  866. if (priv->fw_index < priv->cfg->ucode_api_min) {
  867. IWL_ERR(priv, "no suitable firmware found!\n");
  868. return -ENOENT;
  869. }
  870. sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
  871. IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
  872. (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
  873. ? "EXPERIMENTAL " : "",
  874. priv->firmware_name);
  875. return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
  876. priv->bus.dev,
  877. GFP_KERNEL, priv, iwl_ucode_callback);
  878. }
  879. struct iwlagn_firmware_pieces {
  880. const void *inst, *data, *init, *init_data;
  881. size_t inst_size, data_size, init_size, init_data_size;
  882. u32 build;
  883. u32 init_evtlog_ptr, init_evtlog_size, init_errlog_ptr;
  884. u32 inst_evtlog_ptr, inst_evtlog_size, inst_errlog_ptr;
  885. };
  886. static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
  887. const struct firmware *ucode_raw,
  888. struct iwlagn_firmware_pieces *pieces)
  889. {
  890. struct iwl_ucode_header *ucode = (void *)ucode_raw->data;
  891. u32 api_ver, hdr_size;
  892. const u8 *src;
  893. priv->ucode_ver = le32_to_cpu(ucode->ver);
  894. api_ver = IWL_UCODE_API(priv->ucode_ver);
  895. switch (api_ver) {
  896. default:
  897. hdr_size = 28;
  898. if (ucode_raw->size < hdr_size) {
  899. IWL_ERR(priv, "File size too small!\n");
  900. return -EINVAL;
  901. }
  902. pieces->build = le32_to_cpu(ucode->u.v2.build);
  903. pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
  904. pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
  905. pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
  906. pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
  907. src = ucode->u.v2.data;
  908. break;
  909. case 0:
  910. case 1:
  911. case 2:
  912. hdr_size = 24;
  913. if (ucode_raw->size < hdr_size) {
  914. IWL_ERR(priv, "File size too small!\n");
  915. return -EINVAL;
  916. }
  917. pieces->build = 0;
  918. pieces->inst_size = le32_to_cpu(ucode->u.v1.inst_size);
  919. pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
  920. pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
  921. pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
  922. src = ucode->u.v1.data;
  923. break;
  924. }
  925. /* Verify size of file vs. image size info in file's header */
  926. if (ucode_raw->size != hdr_size + pieces->inst_size +
  927. pieces->data_size + pieces->init_size +
  928. pieces->init_data_size) {
  929. IWL_ERR(priv,
  930. "uCode file size %d does not match expected size\n",
  931. (int)ucode_raw->size);
  932. return -EINVAL;
  933. }
  934. pieces->inst = src;
  935. src += pieces->inst_size;
  936. pieces->data = src;
  937. src += pieces->data_size;
  938. pieces->init = src;
  939. src += pieces->init_size;
  940. pieces->init_data = src;
  941. src += pieces->init_data_size;
  942. return 0;
  943. }
  944. static int iwlagn_wanted_ucode_alternative = 1;
  945. static int iwlagn_load_firmware(struct iwl_priv *priv,
  946. const struct firmware *ucode_raw,
  947. struct iwlagn_firmware_pieces *pieces,
  948. struct iwlagn_ucode_capabilities *capa)
  949. {
  950. struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data;
  951. struct iwl_ucode_tlv *tlv;
  952. size_t len = ucode_raw->size;
  953. const u8 *data;
  954. int wanted_alternative = iwlagn_wanted_ucode_alternative, tmp;
  955. u64 alternatives;
  956. u32 tlv_len;
  957. enum iwl_ucode_tlv_type tlv_type;
  958. const u8 *tlv_data;
  959. if (len < sizeof(*ucode)) {
  960. IWL_ERR(priv, "uCode has invalid length: %zd\n", len);
  961. return -EINVAL;
  962. }
  963. if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) {
  964. IWL_ERR(priv, "invalid uCode magic: 0X%x\n",
  965. le32_to_cpu(ucode->magic));
  966. return -EINVAL;
  967. }
  968. /*
  969. * Check which alternatives are present, and "downgrade"
  970. * when the chosen alternative is not present, warning
  971. * the user when that happens. Some files may not have
  972. * any alternatives, so don't warn in that case.
  973. */
  974. alternatives = le64_to_cpu(ucode->alternatives);
  975. tmp = wanted_alternative;
  976. if (wanted_alternative > 63)
  977. wanted_alternative = 63;
  978. while (wanted_alternative && !(alternatives & BIT(wanted_alternative)))
  979. wanted_alternative--;
  980. if (wanted_alternative && wanted_alternative != tmp)
  981. IWL_WARN(priv,
  982. "uCode alternative %d not available, choosing %d\n",
  983. tmp, wanted_alternative);
  984. priv->ucode_ver = le32_to_cpu(ucode->ver);
  985. pieces->build = le32_to_cpu(ucode->build);
  986. data = ucode->data;
  987. len -= sizeof(*ucode);
  988. while (len >= sizeof(*tlv)) {
  989. u16 tlv_alt;
  990. len -= sizeof(*tlv);
  991. tlv = (void *)data;
  992. tlv_len = le32_to_cpu(tlv->length);
  993. tlv_type = le16_to_cpu(tlv->type);
  994. tlv_alt = le16_to_cpu(tlv->alternative);
  995. tlv_data = tlv->data;
  996. if (len < tlv_len) {
  997. IWL_ERR(priv, "invalid TLV len: %zd/%u\n",
  998. len, tlv_len);
  999. return -EINVAL;
  1000. }
  1001. len -= ALIGN(tlv_len, 4);
  1002. data += sizeof(*tlv) + ALIGN(tlv_len, 4);
  1003. /*
  1004. * Alternative 0 is always valid.
  1005. *
  1006. * Skip alternative TLVs that are not selected.
  1007. */
  1008. if (tlv_alt != 0 && tlv_alt != wanted_alternative)
  1009. continue;
  1010. switch (tlv_type) {
  1011. case IWL_UCODE_TLV_INST:
  1012. pieces->inst = tlv_data;
  1013. pieces->inst_size = tlv_len;
  1014. break;
  1015. case IWL_UCODE_TLV_DATA:
  1016. pieces->data = tlv_data;
  1017. pieces->data_size = tlv_len;
  1018. break;
  1019. case IWL_UCODE_TLV_INIT:
  1020. pieces->init = tlv_data;
  1021. pieces->init_size = tlv_len;
  1022. break;
  1023. case IWL_UCODE_TLV_INIT_DATA:
  1024. pieces->init_data = tlv_data;
  1025. pieces->init_data_size = tlv_len;
  1026. break;
  1027. case IWL_UCODE_TLV_BOOT:
  1028. IWL_ERR(priv, "Found unexpected BOOT ucode\n");
  1029. break;
  1030. case IWL_UCODE_TLV_PROBE_MAX_LEN:
  1031. if (tlv_len != sizeof(u32))
  1032. goto invalid_tlv_len;
  1033. capa->max_probe_length =
  1034. le32_to_cpup((__le32 *)tlv_data);
  1035. break;
  1036. case IWL_UCODE_TLV_PAN:
  1037. if (tlv_len)
  1038. goto invalid_tlv_len;
  1039. capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
  1040. break;
  1041. case IWL_UCODE_TLV_FLAGS:
  1042. /* must be at least one u32 */
  1043. if (tlv_len < sizeof(u32))
  1044. goto invalid_tlv_len;
  1045. /* and a proper number of u32s */
  1046. if (tlv_len % sizeof(u32))
  1047. goto invalid_tlv_len;
  1048. /*
  1049. * This driver only reads the first u32 as
  1050. * right now no more features are defined,
  1051. * if that changes then either the driver
  1052. * will not work with the new firmware, or
  1053. * it'll not take advantage of new features.
  1054. */
  1055. capa->flags = le32_to_cpup((__le32 *)tlv_data);
  1056. break;
  1057. case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
  1058. if (tlv_len != sizeof(u32))
  1059. goto invalid_tlv_len;
  1060. pieces->init_evtlog_ptr =
  1061. le32_to_cpup((__le32 *)tlv_data);
  1062. break;
  1063. case IWL_UCODE_TLV_INIT_EVTLOG_SIZE:
  1064. if (tlv_len != sizeof(u32))
  1065. goto invalid_tlv_len;
  1066. pieces->init_evtlog_size =
  1067. le32_to_cpup((__le32 *)tlv_data);
  1068. break;
  1069. case IWL_UCODE_TLV_INIT_ERRLOG_PTR:
  1070. if (tlv_len != sizeof(u32))
  1071. goto invalid_tlv_len;
  1072. pieces->init_errlog_ptr =
  1073. le32_to_cpup((__le32 *)tlv_data);
  1074. break;
  1075. case IWL_UCODE_TLV_RUNT_EVTLOG_PTR:
  1076. if (tlv_len != sizeof(u32))
  1077. goto invalid_tlv_len;
  1078. pieces->inst_evtlog_ptr =
  1079. le32_to_cpup((__le32 *)tlv_data);
  1080. break;
  1081. case IWL_UCODE_TLV_RUNT_EVTLOG_SIZE:
  1082. if (tlv_len != sizeof(u32))
  1083. goto invalid_tlv_len;
  1084. pieces->inst_evtlog_size =
  1085. le32_to_cpup((__le32 *)tlv_data);
  1086. break;
  1087. case IWL_UCODE_TLV_RUNT_ERRLOG_PTR:
  1088. if (tlv_len != sizeof(u32))
  1089. goto invalid_tlv_len;
  1090. pieces->inst_errlog_ptr =
  1091. le32_to_cpup((__le32 *)tlv_data);
  1092. break;
  1093. case IWL_UCODE_TLV_ENHANCE_SENS_TBL:
  1094. if (tlv_len)
  1095. goto invalid_tlv_len;
  1096. priv->enhance_sensitivity_table = true;
  1097. break;
  1098. case IWL_UCODE_TLV_PHY_CALIBRATION_SIZE:
  1099. if (tlv_len != sizeof(u32))
  1100. goto invalid_tlv_len;
  1101. capa->standard_phy_calibration_size =
  1102. le32_to_cpup((__le32 *)tlv_data);
  1103. break;
  1104. default:
  1105. IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
  1106. break;
  1107. }
  1108. }
  1109. if (len) {
  1110. IWL_ERR(priv, "invalid TLV after parsing: %zd\n", len);
  1111. iwl_print_hex_dump(priv, IWL_DL_FW, (u8 *)data, len);
  1112. return -EINVAL;
  1113. }
  1114. return 0;
  1115. invalid_tlv_len:
  1116. IWL_ERR(priv, "TLV %d has invalid size: %u\n", tlv_type, tlv_len);
  1117. iwl_print_hex_dump(priv, IWL_DL_FW, tlv_data, tlv_len);
  1118. return -EINVAL;
  1119. }
  1120. /**
  1121. * iwl_ucode_callback - callback when firmware was loaded
  1122. *
  1123. * If loaded successfully, copies the firmware into buffers
  1124. * for the card to fetch (via DMA).
  1125. */
  1126. static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
  1127. {
  1128. struct iwl_priv *priv = context;
  1129. struct iwl_ucode_header *ucode;
  1130. int err;
  1131. struct iwlagn_firmware_pieces pieces;
  1132. const unsigned int api_max = priv->cfg->ucode_api_max;
  1133. const unsigned int api_min = priv->cfg->ucode_api_min;
  1134. u32 api_ver;
  1135. char buildstr[25];
  1136. u32 build;
  1137. struct iwlagn_ucode_capabilities ucode_capa = {
  1138. .max_probe_length = 200,
  1139. .standard_phy_calibration_size =
  1140. IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
  1141. };
  1142. memset(&pieces, 0, sizeof(pieces));
  1143. if (!ucode_raw) {
  1144. if (priv->fw_index <= priv->cfg->ucode_api_max)
  1145. IWL_ERR(priv,
  1146. "request for firmware file '%s' failed.\n",
  1147. priv->firmware_name);
  1148. goto try_again;
  1149. }
  1150. IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
  1151. priv->firmware_name, ucode_raw->size);
  1152. /* Make sure that we got at least the API version number */
  1153. if (ucode_raw->size < 4) {
  1154. IWL_ERR(priv, "File size way too small!\n");
  1155. goto try_again;
  1156. }
  1157. /* Data from ucode file: header followed by uCode images */
  1158. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1159. if (ucode->ver)
  1160. err = iwlagn_load_legacy_firmware(priv, ucode_raw, &pieces);
  1161. else
  1162. err = iwlagn_load_firmware(priv, ucode_raw, &pieces,
  1163. &ucode_capa);
  1164. if (err)
  1165. goto try_again;
  1166. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1167. build = pieces.build;
  1168. /*
  1169. * api_ver should match the api version forming part of the
  1170. * firmware filename ... but we don't check for that and only rely
  1171. * on the API version read from firmware header from here on forward
  1172. */
  1173. /* no api version check required for experimental uCode */
  1174. if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
  1175. if (api_ver < api_min || api_ver > api_max) {
  1176. IWL_ERR(priv,
  1177. "Driver unable to support your firmware API. "
  1178. "Driver supports v%u, firmware is v%u.\n",
  1179. api_max, api_ver);
  1180. goto try_again;
  1181. }
  1182. if (api_ver != api_max)
  1183. IWL_ERR(priv,
  1184. "Firmware has old API version. Expected v%u, "
  1185. "got v%u. New firmware can be obtained "
  1186. "from http://www.intellinuxwireless.org.\n",
  1187. api_max, api_ver);
  1188. }
  1189. if (build)
  1190. sprintf(buildstr, " build %u%s", build,
  1191. (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
  1192. ? " (EXP)" : "");
  1193. else
  1194. buildstr[0] = '\0';
  1195. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u%s\n",
  1196. IWL_UCODE_MAJOR(priv->ucode_ver),
  1197. IWL_UCODE_MINOR(priv->ucode_ver),
  1198. IWL_UCODE_API(priv->ucode_ver),
  1199. IWL_UCODE_SERIAL(priv->ucode_ver),
  1200. buildstr);
  1201. snprintf(priv->hw->wiphy->fw_version,
  1202. sizeof(priv->hw->wiphy->fw_version),
  1203. "%u.%u.%u.%u%s",
  1204. IWL_UCODE_MAJOR(priv->ucode_ver),
  1205. IWL_UCODE_MINOR(priv->ucode_ver),
  1206. IWL_UCODE_API(priv->ucode_ver),
  1207. IWL_UCODE_SERIAL(priv->ucode_ver),
  1208. buildstr);
  1209. /*
  1210. * For any of the failures below (before allocating pci memory)
  1211. * we will try to load a version with a smaller API -- maybe the
  1212. * user just got a corrupted version of the latest API.
  1213. */
  1214. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1215. priv->ucode_ver);
  1216. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %Zd\n",
  1217. pieces.inst_size);
  1218. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %Zd\n",
  1219. pieces.data_size);
  1220. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %Zd\n",
  1221. pieces.init_size);
  1222. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
  1223. pieces.init_data_size);
  1224. /* Verify that uCode images will fit in card's SRAM */
  1225. if (pieces.inst_size > priv->hw_params.max_inst_size) {
  1226. IWL_ERR(priv, "uCode instr len %Zd too large to fit in\n",
  1227. pieces.inst_size);
  1228. goto try_again;
  1229. }
  1230. if (pieces.data_size > priv->hw_params.max_data_size) {
  1231. IWL_ERR(priv, "uCode data len %Zd too large to fit in\n",
  1232. pieces.data_size);
  1233. goto try_again;
  1234. }
  1235. if (pieces.init_size > priv->hw_params.max_inst_size) {
  1236. IWL_ERR(priv, "uCode init instr len %Zd too large to fit in\n",
  1237. pieces.init_size);
  1238. goto try_again;
  1239. }
  1240. if (pieces.init_data_size > priv->hw_params.max_data_size) {
  1241. IWL_ERR(priv, "uCode init data len %Zd too large to fit in\n",
  1242. pieces.init_data_size);
  1243. goto try_again;
  1244. }
  1245. /* Allocate ucode buffers for card's bus-master loading ... */
  1246. /* Runtime instructions and 2 copies of data:
  1247. * 1) unmodified from disk
  1248. * 2) backup cache for save/restore during power-downs */
  1249. if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.code,
  1250. pieces.inst, pieces.inst_size))
  1251. goto err_pci_alloc;
  1252. if (iwl_alloc_fw_desc(priv, &priv->ucode_rt.data,
  1253. pieces.data, pieces.data_size))
  1254. goto err_pci_alloc;
  1255. /* Initialization instructions and data */
  1256. if (pieces.init_size && pieces.init_data_size) {
  1257. if (iwl_alloc_fw_desc(priv, &priv->ucode_init.code,
  1258. pieces.init, pieces.init_size))
  1259. goto err_pci_alloc;
  1260. if (iwl_alloc_fw_desc(priv, &priv->ucode_init.data,
  1261. pieces.init_data, pieces.init_data_size))
  1262. goto err_pci_alloc;
  1263. }
  1264. /* Now that we can no longer fail, copy information */
  1265. /*
  1266. * The (size - 16) / 12 formula is based on the information recorded
  1267. * for each event, which is of mode 1 (including timestamp) for all
  1268. * new microcodes that include this information.
  1269. */
  1270. priv->_agn.init_evtlog_ptr = pieces.init_evtlog_ptr;
  1271. if (pieces.init_evtlog_size)
  1272. priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
  1273. else
  1274. priv->_agn.init_evtlog_size =
  1275. priv->cfg->base_params->max_event_log_size;
  1276. priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
  1277. priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
  1278. if (pieces.inst_evtlog_size)
  1279. priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
  1280. else
  1281. priv->_agn.inst_evtlog_size =
  1282. priv->cfg->base_params->max_event_log_size;
  1283. priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
  1284. priv->new_scan_threshold_behaviour =
  1285. !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
  1286. if ((priv->cfg->sku & EEPROM_SKU_CAP_IPAN_ENABLE) &&
  1287. (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN)) {
  1288. priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
  1289. priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
  1290. } else
  1291. priv->sta_key_max_num = STA_KEY_MAX_NUM;
  1292. if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
  1293. priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
  1294. else
  1295. priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
  1296. /*
  1297. * figure out the offset of chain noise reset and gain commands
  1298. * base on the size of standard phy calibration commands table size
  1299. */
  1300. if (ucode_capa.standard_phy_calibration_size >
  1301. IWL_MAX_PHY_CALIBRATE_TBL_SIZE)
  1302. ucode_capa.standard_phy_calibration_size =
  1303. IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE;
  1304. priv->_agn.phy_calib_chain_noise_reset_cmd =
  1305. ucode_capa.standard_phy_calibration_size;
  1306. priv->_agn.phy_calib_chain_noise_gain_cmd =
  1307. ucode_capa.standard_phy_calibration_size + 1;
  1308. /**************************************************
  1309. * This is still part of probe() in a sense...
  1310. *
  1311. * 9. Setup and register with mac80211 and debugfs
  1312. **************************************************/
  1313. err = iwl_mac_setup_register(priv, &ucode_capa);
  1314. if (err)
  1315. goto out_unbind;
  1316. err = iwl_dbgfs_register(priv, DRV_NAME);
  1317. if (err)
  1318. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  1319. err = sysfs_create_group(&(priv->bus.dev->kobj),
  1320. &iwl_attribute_group);
  1321. if (err) {
  1322. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  1323. goto out_unbind;
  1324. }
  1325. /* We have our copies now, allow OS release its copies */
  1326. release_firmware(ucode_raw);
  1327. complete(&priv->_agn.firmware_loading_complete);
  1328. return;
  1329. try_again:
  1330. /* try next, if any */
  1331. if (iwl_request_firmware(priv, false))
  1332. goto out_unbind;
  1333. release_firmware(ucode_raw);
  1334. return;
  1335. err_pci_alloc:
  1336. IWL_ERR(priv, "failed to allocate pci memory\n");
  1337. iwl_dealloc_ucode(priv);
  1338. out_unbind:
  1339. complete(&priv->_agn.firmware_loading_complete);
  1340. device_release_driver(priv->bus.dev);
  1341. release_firmware(ucode_raw);
  1342. }
  1343. static const char *desc_lookup_text[] = {
  1344. "OK",
  1345. "FAIL",
  1346. "BAD_PARAM",
  1347. "BAD_CHECKSUM",
  1348. "NMI_INTERRUPT_WDG",
  1349. "SYSASSERT",
  1350. "FATAL_ERROR",
  1351. "BAD_COMMAND",
  1352. "HW_ERROR_TUNE_LOCK",
  1353. "HW_ERROR_TEMPERATURE",
  1354. "ILLEGAL_CHAN_FREQ",
  1355. "VCC_NOT_STABLE",
  1356. "FH_ERROR",
  1357. "NMI_INTERRUPT_HOST",
  1358. "NMI_INTERRUPT_ACTION_PT",
  1359. "NMI_INTERRUPT_UNKNOWN",
  1360. "UCODE_VERSION_MISMATCH",
  1361. "HW_ERROR_ABS_LOCK",
  1362. "HW_ERROR_CAL_LOCK_FAIL",
  1363. "NMI_INTERRUPT_INST_ACTION_PT",
  1364. "NMI_INTERRUPT_DATA_ACTION_PT",
  1365. "NMI_TRM_HW_ER",
  1366. "NMI_INTERRUPT_TRM",
  1367. "NMI_INTERRUPT_BREAK_POINT"
  1368. "DEBUG_0",
  1369. "DEBUG_1",
  1370. "DEBUG_2",
  1371. "DEBUG_3",
  1372. };
  1373. static struct { char *name; u8 num; } advanced_lookup[] = {
  1374. { "NMI_INTERRUPT_WDG", 0x34 },
  1375. { "SYSASSERT", 0x35 },
  1376. { "UCODE_VERSION_MISMATCH", 0x37 },
  1377. { "BAD_COMMAND", 0x38 },
  1378. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  1379. { "FATAL_ERROR", 0x3D },
  1380. { "NMI_TRM_HW_ERR", 0x46 },
  1381. { "NMI_INTERRUPT_TRM", 0x4C },
  1382. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  1383. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  1384. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  1385. { "NMI_INTERRUPT_HOST", 0x66 },
  1386. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  1387. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  1388. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  1389. { "ADVANCED_SYSASSERT", 0 },
  1390. };
  1391. static const char *desc_lookup(u32 num)
  1392. {
  1393. int i;
  1394. int max = ARRAY_SIZE(desc_lookup_text);
  1395. if (num < max)
  1396. return desc_lookup_text[num];
  1397. max = ARRAY_SIZE(advanced_lookup) - 1;
  1398. for (i = 0; i < max; i++) {
  1399. if (advanced_lookup[i].num == num)
  1400. break;
  1401. }
  1402. return advanced_lookup[i].name;
  1403. }
  1404. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1405. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1406. void iwl_dump_nic_error_log(struct iwl_priv *priv)
  1407. {
  1408. u32 base;
  1409. struct iwl_error_event_table table;
  1410. base = priv->device_pointers.error_event_table;
  1411. if (priv->ucode_type == IWL_UCODE_INIT) {
  1412. if (!base)
  1413. base = priv->_agn.init_errlog_ptr;
  1414. } else {
  1415. if (!base)
  1416. base = priv->_agn.inst_errlog_ptr;
  1417. }
  1418. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1419. IWL_ERR(priv,
  1420. "Not valid error log pointer 0x%08X for %s uCode\n",
  1421. base,
  1422. (priv->ucode_type == IWL_UCODE_INIT)
  1423. ? "Init" : "RT");
  1424. return;
  1425. }
  1426. iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
  1427. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  1428. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1429. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1430. priv->status, table.valid);
  1431. }
  1432. priv->isr_stats.err_code = table.error_id;
  1433. trace_iwlwifi_dev_ucode_error(priv, table.error_id, table.tsf_low,
  1434. table.data1, table.data2, table.line,
  1435. table.blink1, table.blink2, table.ilink1,
  1436. table.ilink2, table.bcon_time, table.gp1,
  1437. table.gp2, table.gp3, table.ucode_ver,
  1438. table.hw_ver, table.brd_ver);
  1439. IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,
  1440. desc_lookup(table.error_id));
  1441. IWL_ERR(priv, "0x%08X | uPc\n", table.pc);
  1442. IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);
  1443. IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);
  1444. IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);
  1445. IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);
  1446. IWL_ERR(priv, "0x%08X | data1\n", table.data1);
  1447. IWL_ERR(priv, "0x%08X | data2\n", table.data2);
  1448. IWL_ERR(priv, "0x%08X | line\n", table.line);
  1449. IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);
  1450. IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);
  1451. IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);
  1452. IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);
  1453. IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);
  1454. IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);
  1455. IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);
  1456. IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);
  1457. IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);
  1458. IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);
  1459. }
  1460. #define EVENT_START_OFFSET (4 * sizeof(u32))
  1461. /**
  1462. * iwl_print_event_log - Dump error event log to syslog
  1463. *
  1464. */
  1465. static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1466. u32 num_events, u32 mode,
  1467. int pos, char **buf, size_t bufsz)
  1468. {
  1469. u32 i;
  1470. u32 base; /* SRAM byte address of event log header */
  1471. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1472. u32 ptr; /* SRAM byte address of log data */
  1473. u32 ev, time, data; /* event log data */
  1474. unsigned long reg_flags;
  1475. if (num_events == 0)
  1476. return pos;
  1477. base = priv->device_pointers.log_event_table;
  1478. if (priv->ucode_type == IWL_UCODE_INIT) {
  1479. if (!base)
  1480. base = priv->_agn.init_evtlog_ptr;
  1481. } else {
  1482. if (!base)
  1483. base = priv->_agn.inst_evtlog_ptr;
  1484. }
  1485. if (mode == 0)
  1486. event_size = 2 * sizeof(u32);
  1487. else
  1488. event_size = 3 * sizeof(u32);
  1489. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1490. /* Make sure device is powered up for SRAM reads */
  1491. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1492. iwl_grab_nic_access(priv);
  1493. /* Set starting address; reads will auto-increment */
  1494. iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1495. rmb();
  1496. /* "time" is actually "data" for mode 0 (no timestamp).
  1497. * place event id # at far right for easier visual parsing. */
  1498. for (i = 0; i < num_events; i++) {
  1499. ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1500. time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1501. if (mode == 0) {
  1502. /* data, ev */
  1503. if (bufsz) {
  1504. pos += scnprintf(*buf + pos, bufsz - pos,
  1505. "EVT_LOG:0x%08x:%04u\n",
  1506. time, ev);
  1507. } else {
  1508. trace_iwlwifi_dev_ucode_event(priv, 0,
  1509. time, ev);
  1510. IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
  1511. time, ev);
  1512. }
  1513. } else {
  1514. data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
  1515. if (bufsz) {
  1516. pos += scnprintf(*buf + pos, bufsz - pos,
  1517. "EVT_LOGT:%010u:0x%08x:%04u\n",
  1518. time, data, ev);
  1519. } else {
  1520. IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
  1521. time, data, ev);
  1522. trace_iwlwifi_dev_ucode_event(priv, time,
  1523. data, ev);
  1524. }
  1525. }
  1526. }
  1527. /* Allow device to power down */
  1528. iwl_release_nic_access(priv);
  1529. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1530. return pos;
  1531. }
  1532. /**
  1533. * iwl_print_last_event_logs - Dump the newest # of event log to syslog
  1534. */
  1535. static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1536. u32 num_wraps, u32 next_entry,
  1537. u32 size, u32 mode,
  1538. int pos, char **buf, size_t bufsz)
  1539. {
  1540. /*
  1541. * display the newest DEFAULT_LOG_ENTRIES entries
  1542. * i.e the entries just before the next ont that uCode would fill.
  1543. */
  1544. if (num_wraps) {
  1545. if (next_entry < size) {
  1546. pos = iwl_print_event_log(priv,
  1547. capacity - (size - next_entry),
  1548. size - next_entry, mode,
  1549. pos, buf, bufsz);
  1550. pos = iwl_print_event_log(priv, 0,
  1551. next_entry, mode,
  1552. pos, buf, bufsz);
  1553. } else
  1554. pos = iwl_print_event_log(priv, next_entry - size,
  1555. size, mode, pos, buf, bufsz);
  1556. } else {
  1557. if (next_entry < size) {
  1558. pos = iwl_print_event_log(priv, 0, next_entry,
  1559. mode, pos, buf, bufsz);
  1560. } else {
  1561. pos = iwl_print_event_log(priv, next_entry - size,
  1562. size, mode, pos, buf, bufsz);
  1563. }
  1564. }
  1565. return pos;
  1566. }
  1567. #define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
  1568. int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1569. char **buf, bool display)
  1570. {
  1571. u32 base; /* SRAM byte address of event log header */
  1572. u32 capacity; /* event log capacity in # entries */
  1573. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1574. u32 num_wraps; /* # times uCode wrapped to top of log */
  1575. u32 next_entry; /* index of next entry to be written by uCode */
  1576. u32 size; /* # entries that we'll print */
  1577. u32 logsize;
  1578. int pos = 0;
  1579. size_t bufsz = 0;
  1580. base = priv->device_pointers.log_event_table;
  1581. if (priv->ucode_type == IWL_UCODE_INIT) {
  1582. logsize = priv->_agn.init_evtlog_size;
  1583. if (!base)
  1584. base = priv->_agn.init_evtlog_ptr;
  1585. } else {
  1586. logsize = priv->_agn.inst_evtlog_size;
  1587. if (!base)
  1588. base = priv->_agn.inst_evtlog_ptr;
  1589. }
  1590. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  1591. IWL_ERR(priv,
  1592. "Invalid event log pointer 0x%08X for %s uCode\n",
  1593. base,
  1594. (priv->ucode_type == IWL_UCODE_INIT)
  1595. ? "Init" : "RT");
  1596. return -EINVAL;
  1597. }
  1598. /* event log header */
  1599. capacity = iwl_read_targ_mem(priv, base);
  1600. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1601. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1602. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1603. if (capacity > logsize) {
  1604. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1605. capacity, logsize);
  1606. capacity = logsize;
  1607. }
  1608. if (next_entry > logsize) {
  1609. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1610. next_entry, logsize);
  1611. next_entry = logsize;
  1612. }
  1613. size = num_wraps ? capacity : next_entry;
  1614. /* bail out if nothing in log */
  1615. if (size == 0) {
  1616. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1617. return pos;
  1618. }
  1619. /* enable/disable bt channel inhibition */
  1620. priv->bt_ch_announce = iwlagn_bt_ch_announce;
  1621. #ifdef CONFIG_IWLWIFI_DEBUG
  1622. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1623. size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
  1624. ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
  1625. #else
  1626. size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
  1627. ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
  1628. #endif
  1629. IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
  1630. size);
  1631. #ifdef CONFIG_IWLWIFI_DEBUG
  1632. if (display) {
  1633. if (full_log)
  1634. bufsz = capacity * 48;
  1635. else
  1636. bufsz = size * 48;
  1637. *buf = kmalloc(bufsz, GFP_KERNEL);
  1638. if (!*buf)
  1639. return -ENOMEM;
  1640. }
  1641. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1642. /*
  1643. * if uCode has wrapped back to top of log,
  1644. * start at the oldest entry,
  1645. * i.e the next one that uCode would fill.
  1646. */
  1647. if (num_wraps)
  1648. pos = iwl_print_event_log(priv, next_entry,
  1649. capacity - next_entry, mode,
  1650. pos, buf, bufsz);
  1651. /* (then/else) start at top of log */
  1652. pos = iwl_print_event_log(priv, 0,
  1653. next_entry, mode, pos, buf, bufsz);
  1654. } else
  1655. pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
  1656. next_entry, size, mode,
  1657. pos, buf, bufsz);
  1658. #else
  1659. pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
  1660. next_entry, size, mode,
  1661. pos, buf, bufsz);
  1662. #endif
  1663. return pos;
  1664. }
  1665. static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
  1666. {
  1667. struct iwl_ct_kill_config cmd;
  1668. struct iwl_ct_kill_throttling_config adv_cmd;
  1669. unsigned long flags;
  1670. int ret = 0;
  1671. spin_lock_irqsave(&priv->lock, flags);
  1672. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  1673. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  1674. spin_unlock_irqrestore(&priv->lock, flags);
  1675. priv->thermal_throttle.ct_kill_toggle = false;
  1676. if (priv->cfg->base_params->support_ct_kill_exit) {
  1677. adv_cmd.critical_temperature_enter =
  1678. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1679. adv_cmd.critical_temperature_exit =
  1680. cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
  1681. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1682. sizeof(adv_cmd), &adv_cmd);
  1683. if (ret)
  1684. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1685. else
  1686. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1687. "succeeded, "
  1688. "critical temperature enter is %d,"
  1689. "exit is %d\n",
  1690. priv->hw_params.ct_kill_threshold,
  1691. priv->hw_params.ct_kill_exit_threshold);
  1692. } else {
  1693. cmd.critical_temperature_R =
  1694. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  1695. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  1696. sizeof(cmd), &cmd);
  1697. if (ret)
  1698. IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
  1699. else
  1700. IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
  1701. "succeeded, "
  1702. "critical temperature is %d\n",
  1703. priv->hw_params.ct_kill_threshold);
  1704. }
  1705. }
  1706. static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
  1707. {
  1708. struct iwl_calib_cfg_cmd calib_cfg_cmd;
  1709. struct iwl_host_cmd cmd = {
  1710. .id = CALIBRATION_CFG_CMD,
  1711. .len = { sizeof(struct iwl_calib_cfg_cmd), },
  1712. .data = { &calib_cfg_cmd, },
  1713. };
  1714. memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
  1715. calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
  1716. calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
  1717. return iwl_send_cmd(priv, &cmd);
  1718. }
  1719. /**
  1720. * iwl_alive_start - called after REPLY_ALIVE notification received
  1721. * from protocol/runtime uCode (initialization uCode's
  1722. * Alive gets handled by iwl_init_alive_start()).
  1723. */
  1724. int iwl_alive_start(struct iwl_priv *priv)
  1725. {
  1726. int ret = 0;
  1727. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  1728. iwl_reset_ict(priv);
  1729. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  1730. /* After the ALIVE response, we can send host commands to the uCode */
  1731. set_bit(STATUS_ALIVE, &priv->status);
  1732. /* Enable watchdog to monitor the driver tx queues */
  1733. iwl_setup_watchdog(priv);
  1734. if (iwl_is_rfkill(priv))
  1735. return -ERFKILL;
  1736. /* download priority table before any calibration request */
  1737. if (priv->cfg->bt_params &&
  1738. priv->cfg->bt_params->advanced_bt_coexist) {
  1739. /* Configure Bluetooth device coexistence support */
  1740. priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
  1741. priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
  1742. priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
  1743. priv->cfg->ops->hcmd->send_bt_config(priv);
  1744. priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
  1745. iwlagn_send_prio_tbl(priv);
  1746. /* FIXME: w/a to force change uCode BT state machine */
  1747. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
  1748. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  1749. if (ret)
  1750. return ret;
  1751. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
  1752. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  1753. if (ret)
  1754. return ret;
  1755. }
  1756. if (priv->hw_params.calib_rt_cfg)
  1757. iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
  1758. ieee80211_wake_queues(priv->hw);
  1759. priv->active_rate = IWL_RATES_MASK;
  1760. /* Configure Tx antenna selection based on H/W config */
  1761. if (priv->cfg->ops->hcmd->set_tx_ant)
  1762. priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
  1763. if (iwl_is_associated_ctx(ctx)) {
  1764. struct iwl_rxon_cmd *active_rxon =
  1765. (struct iwl_rxon_cmd *)&ctx->active;
  1766. /* apply any changes in staging */
  1767. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1768. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1769. } else {
  1770. struct iwl_rxon_context *tmp;
  1771. /* Initialize our rx_config data */
  1772. for_each_context(priv, tmp)
  1773. iwl_connection_init_rx_config(priv, tmp);
  1774. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1775. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1776. }
  1777. if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
  1778. !priv->cfg->bt_params->advanced_bt_coexist)) {
  1779. /*
  1780. * default is 2-wire BT coexexistence support
  1781. */
  1782. priv->cfg->ops->hcmd->send_bt_config(priv);
  1783. }
  1784. iwl_reset_run_time_calib(priv);
  1785. set_bit(STATUS_READY, &priv->status);
  1786. /* Configure the adapter for unassociated operation */
  1787. ret = iwlagn_commit_rxon(priv, ctx);
  1788. if (ret)
  1789. return ret;
  1790. /* At this point, the NIC is initialized and operational */
  1791. iwl_rf_kill_ct_config(priv);
  1792. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  1793. return iwl_power_update_mode(priv, true);
  1794. }
  1795. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  1796. static void __iwl_down(struct iwl_priv *priv)
  1797. {
  1798. int exit_pending;
  1799. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  1800. iwl_scan_cancel_timeout(priv, 200);
  1801. exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
  1802. /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
  1803. * to prevent rearm timer */
  1804. del_timer_sync(&priv->watchdog);
  1805. iwl_clear_ucode_stations(priv, NULL);
  1806. iwl_dealloc_bcast_stations(priv);
  1807. iwl_clear_driver_stations(priv);
  1808. /* reset BT coex data */
  1809. priv->bt_status = 0;
  1810. if (priv->cfg->bt_params)
  1811. priv->bt_traffic_load =
  1812. priv->cfg->bt_params->bt_init_traffic_load;
  1813. else
  1814. priv->bt_traffic_load = 0;
  1815. priv->bt_full_concurrent = false;
  1816. priv->bt_ci_compliance = 0;
  1817. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1818. * exiting the module */
  1819. if (!exit_pending)
  1820. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1821. if (priv->mac80211_registered)
  1822. ieee80211_stop_queues(priv->hw);
  1823. /* Clear out all status bits but a few that are stable across reset */
  1824. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  1825. STATUS_RF_KILL_HW |
  1826. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  1827. STATUS_GEO_CONFIGURED |
  1828. test_bit(STATUS_FW_ERROR, &priv->status) <<
  1829. STATUS_FW_ERROR |
  1830. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  1831. STATUS_EXIT_PENDING;
  1832. iwlagn_stop_device(priv);
  1833. dev_kfree_skb(priv->beacon_skb);
  1834. priv->beacon_skb = NULL;
  1835. }
  1836. static void iwl_down(struct iwl_priv *priv)
  1837. {
  1838. mutex_lock(&priv->mutex);
  1839. __iwl_down(priv);
  1840. mutex_unlock(&priv->mutex);
  1841. iwl_cancel_deferred_work(priv);
  1842. }
  1843. #define HW_READY_TIMEOUT (50)
  1844. /* Note: returns poll_bit return value, which is >= 0 if success */
  1845. static int iwl_set_hw_ready(struct iwl_priv *priv)
  1846. {
  1847. int ret;
  1848. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1849. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
  1850. /* See if we got it */
  1851. ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  1852. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
  1853. CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
  1854. HW_READY_TIMEOUT);
  1855. IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
  1856. return ret;
  1857. }
  1858. /* Note: returns standard 0/-ERROR code */
  1859. int iwl_prepare_card_hw(struct iwl_priv *priv)
  1860. {
  1861. int ret;
  1862. IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
  1863. ret = iwl_set_hw_ready(priv);
  1864. if (ret >= 0)
  1865. return 0;
  1866. /* If HW is not ready, prepare the conditions to check again */
  1867. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  1868. CSR_HW_IF_CONFIG_REG_PREPARE);
  1869. ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
  1870. ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
  1871. CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
  1872. if (ret < 0)
  1873. return ret;
  1874. /* HW should be ready by now, check again. */
  1875. ret = iwl_set_hw_ready(priv);
  1876. if (ret >= 0)
  1877. return 0;
  1878. return ret;
  1879. }
  1880. #define MAX_HW_RESTARTS 5
  1881. static int __iwl_up(struct iwl_priv *priv)
  1882. {
  1883. struct iwl_rxon_context *ctx;
  1884. int ret;
  1885. lockdep_assert_held(&priv->mutex);
  1886. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  1887. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  1888. return -EIO;
  1889. }
  1890. for_each_context(priv, ctx) {
  1891. ret = iwlagn_alloc_bcast_station(priv, ctx);
  1892. if (ret) {
  1893. iwl_dealloc_bcast_stations(priv);
  1894. return ret;
  1895. }
  1896. }
  1897. ret = iwlagn_run_init_ucode(priv);
  1898. if (ret) {
  1899. IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
  1900. goto error;
  1901. }
  1902. ret = iwlagn_load_ucode_wait_alive(priv,
  1903. &priv->ucode_rt,
  1904. IWL_UCODE_REGULAR);
  1905. if (ret) {
  1906. IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
  1907. goto error;
  1908. }
  1909. ret = iwl_alive_start(priv);
  1910. if (ret)
  1911. goto error;
  1912. return 0;
  1913. error:
  1914. set_bit(STATUS_EXIT_PENDING, &priv->status);
  1915. __iwl_down(priv);
  1916. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  1917. IWL_ERR(priv, "Unable to initialize device.\n");
  1918. return ret;
  1919. }
  1920. /*****************************************************************************
  1921. *
  1922. * Workqueue callbacks
  1923. *
  1924. *****************************************************************************/
  1925. static void iwl_bg_run_time_calib_work(struct work_struct *work)
  1926. {
  1927. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  1928. run_time_calib_work);
  1929. mutex_lock(&priv->mutex);
  1930. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1931. test_bit(STATUS_SCANNING, &priv->status)) {
  1932. mutex_unlock(&priv->mutex);
  1933. return;
  1934. }
  1935. if (priv->start_calib) {
  1936. iwl_chain_noise_calibration(priv);
  1937. iwl_sensitivity_calibration(priv);
  1938. }
  1939. mutex_unlock(&priv->mutex);
  1940. }
  1941. static void iwlagn_prepare_restart(struct iwl_priv *priv)
  1942. {
  1943. struct iwl_rxon_context *ctx;
  1944. bool bt_full_concurrent;
  1945. u8 bt_ci_compliance;
  1946. u8 bt_load;
  1947. u8 bt_status;
  1948. lockdep_assert_held(&priv->mutex);
  1949. for_each_context(priv, ctx)
  1950. ctx->vif = NULL;
  1951. priv->is_open = 0;
  1952. /*
  1953. * __iwl_down() will clear the BT status variables,
  1954. * which is correct, but when we restart we really
  1955. * want to keep them so restore them afterwards.
  1956. *
  1957. * The restart process will later pick them up and
  1958. * re-configure the hw when we reconfigure the BT
  1959. * command.
  1960. */
  1961. bt_full_concurrent = priv->bt_full_concurrent;
  1962. bt_ci_compliance = priv->bt_ci_compliance;
  1963. bt_load = priv->bt_traffic_load;
  1964. bt_status = priv->bt_status;
  1965. __iwl_down(priv);
  1966. priv->bt_full_concurrent = bt_full_concurrent;
  1967. priv->bt_ci_compliance = bt_ci_compliance;
  1968. priv->bt_traffic_load = bt_load;
  1969. priv->bt_status = bt_status;
  1970. }
  1971. static void iwl_bg_restart(struct work_struct *data)
  1972. {
  1973. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  1974. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1975. return;
  1976. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  1977. mutex_lock(&priv->mutex);
  1978. iwlagn_prepare_restart(priv);
  1979. mutex_unlock(&priv->mutex);
  1980. iwl_cancel_deferred_work(priv);
  1981. ieee80211_restart_hw(priv->hw);
  1982. } else {
  1983. WARN_ON(1);
  1984. }
  1985. }
  1986. static void iwl_bg_rx_replenish(struct work_struct *data)
  1987. {
  1988. struct iwl_priv *priv =
  1989. container_of(data, struct iwl_priv, rx_replenish);
  1990. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1991. return;
  1992. mutex_lock(&priv->mutex);
  1993. iwlagn_rx_replenish(priv);
  1994. mutex_unlock(&priv->mutex);
  1995. }
  1996. static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  1997. struct ieee80211_channel *chan,
  1998. enum nl80211_channel_type channel_type,
  1999. unsigned int wait)
  2000. {
  2001. struct iwl_priv *priv = hw->priv;
  2002. int ret;
  2003. /* Not supported if we don't have PAN */
  2004. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
  2005. ret = -EOPNOTSUPP;
  2006. goto free;
  2007. }
  2008. /* Not supported on pre-P2P firmware */
  2009. if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
  2010. BIT(NL80211_IFTYPE_P2P_CLIENT))) {
  2011. ret = -EOPNOTSUPP;
  2012. goto free;
  2013. }
  2014. mutex_lock(&priv->mutex);
  2015. if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
  2016. /*
  2017. * If the PAN context is free, use the normal
  2018. * way of doing remain-on-channel offload + TX.
  2019. */
  2020. ret = 1;
  2021. goto out;
  2022. }
  2023. /* TODO: queue up if scanning? */
  2024. if (test_bit(STATUS_SCANNING, &priv->status) ||
  2025. priv->_agn.offchan_tx_skb) {
  2026. ret = -EBUSY;
  2027. goto out;
  2028. }
  2029. /*
  2030. * max_scan_ie_len doesn't include the blank SSID or the header,
  2031. * so need to add that again here.
  2032. */
  2033. if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
  2034. ret = -ENOBUFS;
  2035. goto out;
  2036. }
  2037. priv->_agn.offchan_tx_skb = skb;
  2038. priv->_agn.offchan_tx_timeout = wait;
  2039. priv->_agn.offchan_tx_chan = chan;
  2040. ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
  2041. IWL_SCAN_OFFCH_TX, chan->band);
  2042. if (ret)
  2043. priv->_agn.offchan_tx_skb = NULL;
  2044. out:
  2045. mutex_unlock(&priv->mutex);
  2046. free:
  2047. if (ret < 0)
  2048. kfree_skb(skb);
  2049. return ret;
  2050. }
  2051. static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
  2052. {
  2053. struct iwl_priv *priv = hw->priv;
  2054. int ret;
  2055. mutex_lock(&priv->mutex);
  2056. if (!priv->_agn.offchan_tx_skb) {
  2057. ret = -EINVAL;
  2058. goto unlock;
  2059. }
  2060. priv->_agn.offchan_tx_skb = NULL;
  2061. ret = iwl_scan_cancel_timeout(priv, 200);
  2062. if (ret)
  2063. ret = -EIO;
  2064. unlock:
  2065. mutex_unlock(&priv->mutex);
  2066. return ret;
  2067. }
  2068. /*****************************************************************************
  2069. *
  2070. * mac80211 entry point functions
  2071. *
  2072. *****************************************************************************/
  2073. static const struct ieee80211_iface_limit iwlagn_sta_ap_limits[] = {
  2074. {
  2075. .max = 1,
  2076. .types = BIT(NL80211_IFTYPE_STATION),
  2077. },
  2078. {
  2079. .max = 1,
  2080. .types = BIT(NL80211_IFTYPE_AP),
  2081. },
  2082. };
  2083. static const struct ieee80211_iface_limit iwlagn_2sta_limits[] = {
  2084. {
  2085. .max = 2,
  2086. .types = BIT(NL80211_IFTYPE_STATION),
  2087. },
  2088. };
  2089. static const struct ieee80211_iface_limit iwlagn_p2p_sta_go_limits[] = {
  2090. {
  2091. .max = 1,
  2092. .types = BIT(NL80211_IFTYPE_STATION),
  2093. },
  2094. {
  2095. .max = 1,
  2096. .types = BIT(NL80211_IFTYPE_P2P_GO) |
  2097. BIT(NL80211_IFTYPE_AP),
  2098. },
  2099. };
  2100. static const struct ieee80211_iface_limit iwlagn_p2p_2sta_limits[] = {
  2101. {
  2102. .max = 2,
  2103. .types = BIT(NL80211_IFTYPE_STATION),
  2104. },
  2105. {
  2106. .max = 1,
  2107. .types = BIT(NL80211_IFTYPE_P2P_CLIENT),
  2108. },
  2109. };
  2110. static const struct ieee80211_iface_combination
  2111. iwlagn_iface_combinations_dualmode[] = {
  2112. { .num_different_channels = 1,
  2113. .max_interfaces = 2,
  2114. .beacon_int_infra_match = true,
  2115. .limits = iwlagn_sta_ap_limits,
  2116. .n_limits = ARRAY_SIZE(iwlagn_sta_ap_limits),
  2117. },
  2118. { .num_different_channels = 1,
  2119. .max_interfaces = 2,
  2120. .limits = iwlagn_2sta_limits,
  2121. .n_limits = ARRAY_SIZE(iwlagn_2sta_limits),
  2122. },
  2123. };
  2124. static const struct ieee80211_iface_combination
  2125. iwlagn_iface_combinations_p2p[] = {
  2126. { .num_different_channels = 1,
  2127. .max_interfaces = 2,
  2128. .beacon_int_infra_match = true,
  2129. .limits = iwlagn_p2p_sta_go_limits,
  2130. .n_limits = ARRAY_SIZE(iwlagn_p2p_sta_go_limits),
  2131. },
  2132. { .num_different_channels = 1,
  2133. .max_interfaces = 2,
  2134. .limits = iwlagn_p2p_2sta_limits,
  2135. .n_limits = ARRAY_SIZE(iwlagn_p2p_2sta_limits),
  2136. },
  2137. };
  2138. /*
  2139. * Not a mac80211 entry point function, but it fits in with all the
  2140. * other mac80211 functions grouped here.
  2141. */
  2142. static int iwl_mac_setup_register(struct iwl_priv *priv,
  2143. struct iwlagn_ucode_capabilities *capa)
  2144. {
  2145. int ret;
  2146. struct ieee80211_hw *hw = priv->hw;
  2147. struct iwl_rxon_context *ctx;
  2148. hw->rate_control_algorithm = "iwl-agn-rs";
  2149. /* Tell mac80211 our characteristics */
  2150. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  2151. IEEE80211_HW_AMPDU_AGGREGATION |
  2152. IEEE80211_HW_NEED_DTIM_PERIOD |
  2153. IEEE80211_HW_SPECTRUM_MGMT |
  2154. IEEE80211_HW_REPORTS_TX_ACK_STATUS;
  2155. hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
  2156. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  2157. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  2158. if (priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE)
  2159. hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
  2160. IEEE80211_HW_SUPPORTS_STATIC_SMPS;
  2161. if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
  2162. hw->flags |= IEEE80211_HW_MFP_CAPABLE;
  2163. hw->sta_data_size = sizeof(struct iwl_station_priv);
  2164. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  2165. for_each_context(priv, ctx) {
  2166. hw->wiphy->interface_modes |= ctx->interface_modes;
  2167. hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
  2168. }
  2169. BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
  2170. if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_P2P_CLIENT)) {
  2171. hw->wiphy->iface_combinations = iwlagn_iface_combinations_p2p;
  2172. hw->wiphy->n_iface_combinations =
  2173. ARRAY_SIZE(iwlagn_iface_combinations_p2p);
  2174. } else if (hw->wiphy->interface_modes & BIT(NL80211_IFTYPE_AP)) {
  2175. hw->wiphy->iface_combinations = iwlagn_iface_combinations_dualmode;
  2176. hw->wiphy->n_iface_combinations =
  2177. ARRAY_SIZE(iwlagn_iface_combinations_dualmode);
  2178. }
  2179. hw->wiphy->max_remain_on_channel_duration = 1000;
  2180. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  2181. WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2182. WIPHY_FLAG_IBSS_RSN;
  2183. if (iwlagn_mod_params.power_save)
  2184. hw->wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2185. else
  2186. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  2187. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
  2188. /* we create the 802.11 header and a zero-length SSID element */
  2189. hw->wiphy->max_scan_ie_len = capa->max_probe_length - 24 - 2;
  2190. /* Default value; 4 EDCA QOS priorities */
  2191. hw->queues = 4;
  2192. hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
  2193. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  2194. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2195. &priv->bands[IEEE80211_BAND_2GHZ];
  2196. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  2197. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2198. &priv->bands[IEEE80211_BAND_5GHZ];
  2199. iwl_leds_init(priv);
  2200. ret = ieee80211_register_hw(priv->hw);
  2201. if (ret) {
  2202. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  2203. return ret;
  2204. }
  2205. priv->mac80211_registered = 1;
  2206. return 0;
  2207. }
  2208. static int iwlagn_mac_start(struct ieee80211_hw *hw)
  2209. {
  2210. struct iwl_priv *priv = hw->priv;
  2211. int ret;
  2212. IWL_DEBUG_MAC80211(priv, "enter\n");
  2213. /* we should be verifying the device is ready to be opened */
  2214. mutex_lock(&priv->mutex);
  2215. ret = __iwl_up(priv);
  2216. mutex_unlock(&priv->mutex);
  2217. if (ret)
  2218. return ret;
  2219. IWL_DEBUG_INFO(priv, "Start UP work done.\n");
  2220. /* Now we should be done, and the READY bit should be set. */
  2221. if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
  2222. ret = -EIO;
  2223. iwlagn_led_enable(priv);
  2224. priv->is_open = 1;
  2225. IWL_DEBUG_MAC80211(priv, "leave\n");
  2226. return 0;
  2227. }
  2228. static void iwlagn_mac_stop(struct ieee80211_hw *hw)
  2229. {
  2230. struct iwl_priv *priv = hw->priv;
  2231. IWL_DEBUG_MAC80211(priv, "enter\n");
  2232. if (!priv->is_open)
  2233. return;
  2234. priv->is_open = 0;
  2235. iwl_down(priv);
  2236. flush_workqueue(priv->workqueue);
  2237. /* User space software may expect getting rfkill changes
  2238. * even if interface is down */
  2239. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2240. iwl_enable_rfkill_int(priv);
  2241. IWL_DEBUG_MAC80211(priv, "leave\n");
  2242. }
  2243. static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2244. {
  2245. struct iwl_priv *priv = hw->priv;
  2246. IWL_DEBUG_MACDUMP(priv, "enter\n");
  2247. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2248. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2249. if (iwlagn_tx_skb(priv, skb))
  2250. dev_kfree_skb_any(skb);
  2251. IWL_DEBUG_MACDUMP(priv, "leave\n");
  2252. }
  2253. static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
  2254. struct ieee80211_vif *vif,
  2255. struct ieee80211_key_conf *keyconf,
  2256. struct ieee80211_sta *sta,
  2257. u32 iv32, u16 *phase1key)
  2258. {
  2259. struct iwl_priv *priv = hw->priv;
  2260. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2261. IWL_DEBUG_MAC80211(priv, "enter\n");
  2262. iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
  2263. iv32, phase1key);
  2264. IWL_DEBUG_MAC80211(priv, "leave\n");
  2265. }
  2266. static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2267. struct ieee80211_vif *vif,
  2268. struct ieee80211_sta *sta,
  2269. struct ieee80211_key_conf *key)
  2270. {
  2271. struct iwl_priv *priv = hw->priv;
  2272. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2273. struct iwl_rxon_context *ctx = vif_priv->ctx;
  2274. int ret;
  2275. u8 sta_id;
  2276. bool is_default_wep_key = false;
  2277. IWL_DEBUG_MAC80211(priv, "enter\n");
  2278. if (iwlagn_mod_params.sw_crypto) {
  2279. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2280. return -EOPNOTSUPP;
  2281. }
  2282. /*
  2283. * To support IBSS RSN, don't program group keys in IBSS, the
  2284. * hardware will then not attempt to decrypt the frames.
  2285. */
  2286. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2287. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2288. return -EOPNOTSUPP;
  2289. sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
  2290. if (sta_id == IWL_INVALID_STATION)
  2291. return -EINVAL;
  2292. mutex_lock(&priv->mutex);
  2293. iwl_scan_cancel_timeout(priv, 100);
  2294. /*
  2295. * If we are getting WEP group key and we didn't receive any key mapping
  2296. * so far, we are in legacy wep mode (group key only), otherwise we are
  2297. * in 1X mode.
  2298. * In legacy wep mode, we use another host command to the uCode.
  2299. */
  2300. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  2301. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  2302. !sta) {
  2303. if (cmd == SET_KEY)
  2304. is_default_wep_key = !ctx->key_mapping_keys;
  2305. else
  2306. is_default_wep_key =
  2307. (key->hw_key_idx == HW_KEY_DEFAULT);
  2308. }
  2309. switch (cmd) {
  2310. case SET_KEY:
  2311. if (is_default_wep_key)
  2312. ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
  2313. else
  2314. ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
  2315. key, sta_id);
  2316. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2317. break;
  2318. case DISABLE_KEY:
  2319. if (is_default_wep_key)
  2320. ret = iwl_remove_default_wep_key(priv, ctx, key);
  2321. else
  2322. ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
  2323. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2324. break;
  2325. default:
  2326. ret = -EINVAL;
  2327. }
  2328. mutex_unlock(&priv->mutex);
  2329. IWL_DEBUG_MAC80211(priv, "leave\n");
  2330. return ret;
  2331. }
  2332. static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
  2333. struct ieee80211_vif *vif,
  2334. enum ieee80211_ampdu_mlme_action action,
  2335. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  2336. u8 buf_size)
  2337. {
  2338. struct iwl_priv *priv = hw->priv;
  2339. int ret = -EINVAL;
  2340. struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
  2341. IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
  2342. sta->addr, tid);
  2343. if (!(priv->cfg->sku & EEPROM_SKU_CAP_11N_ENABLE))
  2344. return -EACCES;
  2345. mutex_lock(&priv->mutex);
  2346. switch (action) {
  2347. case IEEE80211_AMPDU_RX_START:
  2348. IWL_DEBUG_HT(priv, "start Rx\n");
  2349. ret = iwl_sta_rx_agg_start(priv, sta, tid, *ssn);
  2350. break;
  2351. case IEEE80211_AMPDU_RX_STOP:
  2352. IWL_DEBUG_HT(priv, "stop Rx\n");
  2353. ret = iwl_sta_rx_agg_stop(priv, sta, tid);
  2354. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2355. ret = 0;
  2356. break;
  2357. case IEEE80211_AMPDU_TX_START:
  2358. IWL_DEBUG_HT(priv, "start Tx\n");
  2359. ret = iwlagn_tx_agg_start(priv, vif, sta, tid, ssn);
  2360. if (ret == 0) {
  2361. priv->_agn.agg_tids_count++;
  2362. IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
  2363. priv->_agn.agg_tids_count);
  2364. }
  2365. break;
  2366. case IEEE80211_AMPDU_TX_STOP:
  2367. IWL_DEBUG_HT(priv, "stop Tx\n");
  2368. ret = iwlagn_tx_agg_stop(priv, vif, sta, tid);
  2369. if ((ret == 0) && (priv->_agn.agg_tids_count > 0)) {
  2370. priv->_agn.agg_tids_count--;
  2371. IWL_DEBUG_HT(priv, "priv->_agn.agg_tids_count = %u\n",
  2372. priv->_agn.agg_tids_count);
  2373. }
  2374. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2375. ret = 0;
  2376. if (priv->cfg->ht_params &&
  2377. priv->cfg->ht_params->use_rts_for_aggregation) {
  2378. /*
  2379. * switch off RTS/CTS if it was previously enabled
  2380. */
  2381. sta_priv->lq_sta.lq.general_params.flags &=
  2382. ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
  2383. iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
  2384. &sta_priv->lq_sta.lq, CMD_ASYNC, false);
  2385. }
  2386. break;
  2387. case IEEE80211_AMPDU_TX_OPERATIONAL:
  2388. buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
  2389. iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
  2390. /*
  2391. * If the limit is 0, then it wasn't initialised yet,
  2392. * use the default. We can do that since we take the
  2393. * minimum below, and we don't want to go above our
  2394. * default due to hardware restrictions.
  2395. */
  2396. if (sta_priv->max_agg_bufsize == 0)
  2397. sta_priv->max_agg_bufsize =
  2398. LINK_QUAL_AGG_FRAME_LIMIT_DEF;
  2399. /*
  2400. * Even though in theory the peer could have different
  2401. * aggregation reorder buffer sizes for different sessions,
  2402. * our ucode doesn't allow for that and has a global limit
  2403. * for each station. Therefore, use the minimum of all the
  2404. * aggregation sessions and our default value.
  2405. */
  2406. sta_priv->max_agg_bufsize =
  2407. min(sta_priv->max_agg_bufsize, buf_size);
  2408. if (priv->cfg->ht_params &&
  2409. priv->cfg->ht_params->use_rts_for_aggregation) {
  2410. /*
  2411. * switch to RTS/CTS if it is the prefer protection
  2412. * method for HT traffic
  2413. */
  2414. sta_priv->lq_sta.lq.general_params.flags |=
  2415. LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
  2416. }
  2417. sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
  2418. sta_priv->max_agg_bufsize;
  2419. iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
  2420. &sta_priv->lq_sta.lq, CMD_ASYNC, false);
  2421. IWL_INFO(priv, "Tx aggregation enabled on ra = %pM tid = %d\n",
  2422. sta->addr, tid);
  2423. ret = 0;
  2424. break;
  2425. }
  2426. mutex_unlock(&priv->mutex);
  2427. return ret;
  2428. }
  2429. static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
  2430. struct ieee80211_vif *vif,
  2431. struct ieee80211_sta *sta)
  2432. {
  2433. struct iwl_priv *priv = hw->priv;
  2434. struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
  2435. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  2436. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2437. int ret;
  2438. u8 sta_id;
  2439. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2440. sta->addr);
  2441. mutex_lock(&priv->mutex);
  2442. IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
  2443. sta->addr);
  2444. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2445. atomic_set(&sta_priv->pending_frames, 0);
  2446. if (vif->type == NL80211_IFTYPE_AP)
  2447. sta_priv->client = true;
  2448. ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
  2449. is_ap, sta, &sta_id);
  2450. if (ret) {
  2451. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2452. sta->addr, ret);
  2453. /* Should we return success if return code is EEXIST ? */
  2454. mutex_unlock(&priv->mutex);
  2455. return ret;
  2456. }
  2457. sta_priv->common.sta_id = sta_id;
  2458. /* Initialize rate scaling */
  2459. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2460. sta->addr);
  2461. iwl_rs_rate_init(priv, sta, sta_id);
  2462. mutex_unlock(&priv->mutex);
  2463. return 0;
  2464. }
  2465. static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
  2466. struct ieee80211_channel_switch *ch_switch)
  2467. {
  2468. struct iwl_priv *priv = hw->priv;
  2469. const struct iwl_channel_info *ch_info;
  2470. struct ieee80211_conf *conf = &hw->conf;
  2471. struct ieee80211_channel *channel = ch_switch->channel;
  2472. struct iwl_ht_config *ht_conf = &priv->current_ht_config;
  2473. /*
  2474. * MULTI-FIXME
  2475. * When we add support for multiple interfaces, we need to
  2476. * revisit this. The channel switch command in the device
  2477. * only affects the BSS context, but what does that really
  2478. * mean? And what if we get a CSA on the second interface?
  2479. * This needs a lot of work.
  2480. */
  2481. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  2482. u16 ch;
  2483. IWL_DEBUG_MAC80211(priv, "enter\n");
  2484. mutex_lock(&priv->mutex);
  2485. if (iwl_is_rfkill(priv))
  2486. goto out;
  2487. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  2488. test_bit(STATUS_SCANNING, &priv->status) ||
  2489. test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
  2490. goto out;
  2491. if (!iwl_is_associated_ctx(ctx))
  2492. goto out;
  2493. if (!priv->cfg->ops->lib->set_channel_switch)
  2494. goto out;
  2495. ch = channel->hw_value;
  2496. if (le16_to_cpu(ctx->active.channel) == ch)
  2497. goto out;
  2498. ch_info = iwl_get_channel_info(priv, channel->band, ch);
  2499. if (!is_channel_valid(ch_info)) {
  2500. IWL_DEBUG_MAC80211(priv, "invalid channel\n");
  2501. goto out;
  2502. }
  2503. spin_lock_irq(&priv->lock);
  2504. priv->current_ht_config.smps = conf->smps_mode;
  2505. /* Configure HT40 channels */
  2506. ctx->ht.enabled = conf_is_ht(conf);
  2507. if (ctx->ht.enabled) {
  2508. if (conf_is_ht40_minus(conf)) {
  2509. ctx->ht.extension_chan_offset =
  2510. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  2511. ctx->ht.is_40mhz = true;
  2512. } else if (conf_is_ht40_plus(conf)) {
  2513. ctx->ht.extension_chan_offset =
  2514. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  2515. ctx->ht.is_40mhz = true;
  2516. } else {
  2517. ctx->ht.extension_chan_offset =
  2518. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  2519. ctx->ht.is_40mhz = false;
  2520. }
  2521. } else
  2522. ctx->ht.is_40mhz = false;
  2523. if ((le16_to_cpu(ctx->staging.channel) != ch))
  2524. ctx->staging.flags = 0;
  2525. iwl_set_rxon_channel(priv, channel, ctx);
  2526. iwl_set_rxon_ht(priv, ht_conf);
  2527. iwl_set_flags_for_band(priv, ctx, channel->band, ctx->vif);
  2528. spin_unlock_irq(&priv->lock);
  2529. iwl_set_rate(priv);
  2530. /*
  2531. * at this point, staging_rxon has the
  2532. * configuration for channel switch
  2533. */
  2534. set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
  2535. priv->switch_channel = cpu_to_le16(ch);
  2536. if (priv->cfg->ops->lib->set_channel_switch(priv, ch_switch)) {
  2537. clear_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
  2538. priv->switch_channel = 0;
  2539. ieee80211_chswitch_done(ctx->vif, false);
  2540. }
  2541. out:
  2542. mutex_unlock(&priv->mutex);
  2543. IWL_DEBUG_MAC80211(priv, "leave\n");
  2544. }
  2545. static void iwlagn_configure_filter(struct ieee80211_hw *hw,
  2546. unsigned int changed_flags,
  2547. unsigned int *total_flags,
  2548. u64 multicast)
  2549. {
  2550. struct iwl_priv *priv = hw->priv;
  2551. __le32 filter_or = 0, filter_nand = 0;
  2552. struct iwl_rxon_context *ctx;
  2553. #define CHK(test, flag) do { \
  2554. if (*total_flags & (test)) \
  2555. filter_or |= (flag); \
  2556. else \
  2557. filter_nand |= (flag); \
  2558. } while (0)
  2559. IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
  2560. changed_flags, *total_flags);
  2561. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2562. /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
  2563. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
  2564. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2565. #undef CHK
  2566. mutex_lock(&priv->mutex);
  2567. for_each_context(priv, ctx) {
  2568. ctx->staging.filter_flags &= ~filter_nand;
  2569. ctx->staging.filter_flags |= filter_or;
  2570. /*
  2571. * Not committing directly because hardware can perform a scan,
  2572. * but we'll eventually commit the filter flags change anyway.
  2573. */
  2574. }
  2575. mutex_unlock(&priv->mutex);
  2576. /*
  2577. * Receiving all multicast frames is always enabled by the
  2578. * default flags setup in iwl_connection_init_rx_config()
  2579. * since we currently do not support programming multicast
  2580. * filters into the device.
  2581. */
  2582. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2583. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2584. }
  2585. static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
  2586. {
  2587. struct iwl_priv *priv = hw->priv;
  2588. mutex_lock(&priv->mutex);
  2589. IWL_DEBUG_MAC80211(priv, "enter\n");
  2590. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2591. IWL_DEBUG_TX(priv, "Aborting flush due to device shutdown\n");
  2592. goto done;
  2593. }
  2594. if (iwl_is_rfkill(priv)) {
  2595. IWL_DEBUG_TX(priv, "Aborting flush due to RF Kill\n");
  2596. goto done;
  2597. }
  2598. /*
  2599. * mac80211 will not push any more frames for transmit
  2600. * until the flush is completed
  2601. */
  2602. if (drop) {
  2603. IWL_DEBUG_MAC80211(priv, "send flush command\n");
  2604. if (iwlagn_txfifo_flush(priv, IWL_DROP_ALL)) {
  2605. IWL_ERR(priv, "flush request fail\n");
  2606. goto done;
  2607. }
  2608. }
  2609. IWL_DEBUG_MAC80211(priv, "wait transmit/flush all frames\n");
  2610. iwlagn_wait_tx_queue_empty(priv);
  2611. done:
  2612. mutex_unlock(&priv->mutex);
  2613. IWL_DEBUG_MAC80211(priv, "leave\n");
  2614. }
  2615. static void iwlagn_disable_roc(struct iwl_priv *priv)
  2616. {
  2617. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
  2618. struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
  2619. lockdep_assert_held(&priv->mutex);
  2620. if (!ctx->is_active)
  2621. return;
  2622. ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
  2623. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2624. iwl_set_rxon_channel(priv, chan, ctx);
  2625. iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
  2626. priv->_agn.hw_roc_channel = NULL;
  2627. iwlagn_commit_rxon(priv, ctx);
  2628. ctx->is_active = false;
  2629. }
  2630. static void iwlagn_bg_roc_done(struct work_struct *work)
  2631. {
  2632. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  2633. _agn.hw_roc_work.work);
  2634. mutex_lock(&priv->mutex);
  2635. ieee80211_remain_on_channel_expired(priv->hw);
  2636. iwlagn_disable_roc(priv);
  2637. mutex_unlock(&priv->mutex);
  2638. }
  2639. static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
  2640. struct ieee80211_channel *channel,
  2641. enum nl80211_channel_type channel_type,
  2642. int duration)
  2643. {
  2644. struct iwl_priv *priv = hw->priv;
  2645. int err = 0;
  2646. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
  2647. return -EOPNOTSUPP;
  2648. if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
  2649. BIT(NL80211_IFTYPE_P2P_CLIENT)))
  2650. return -EOPNOTSUPP;
  2651. mutex_lock(&priv->mutex);
  2652. if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
  2653. test_bit(STATUS_SCAN_HW, &priv->status)) {
  2654. err = -EBUSY;
  2655. goto out;
  2656. }
  2657. priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
  2658. priv->_agn.hw_roc_channel = channel;
  2659. priv->_agn.hw_roc_chantype = channel_type;
  2660. priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
  2661. iwlagn_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
  2662. queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
  2663. msecs_to_jiffies(duration + 20));
  2664. msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
  2665. ieee80211_ready_on_channel(priv->hw);
  2666. out:
  2667. mutex_unlock(&priv->mutex);
  2668. return err;
  2669. }
  2670. static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
  2671. {
  2672. struct iwl_priv *priv = hw->priv;
  2673. if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
  2674. return -EOPNOTSUPP;
  2675. cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
  2676. mutex_lock(&priv->mutex);
  2677. iwlagn_disable_roc(priv);
  2678. mutex_unlock(&priv->mutex);
  2679. return 0;
  2680. }
  2681. /*****************************************************************************
  2682. *
  2683. * driver setup and teardown
  2684. *
  2685. *****************************************************************************/
  2686. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  2687. {
  2688. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  2689. init_waitqueue_head(&priv->wait_command_queue);
  2690. INIT_WORK(&priv->restart, iwl_bg_restart);
  2691. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  2692. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  2693. INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
  2694. INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
  2695. INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
  2696. INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
  2697. INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
  2698. iwl_setup_scan_deferred_work(priv);
  2699. if (priv->cfg->ops->lib->setup_deferred_work)
  2700. priv->cfg->ops->lib->setup_deferred_work(priv);
  2701. init_timer(&priv->statistics_periodic);
  2702. priv->statistics_periodic.data = (unsigned long)priv;
  2703. priv->statistics_periodic.function = iwl_bg_statistics_periodic;
  2704. init_timer(&priv->ucode_trace);
  2705. priv->ucode_trace.data = (unsigned long)priv;
  2706. priv->ucode_trace.function = iwl_bg_ucode_trace;
  2707. init_timer(&priv->watchdog);
  2708. priv->watchdog.data = (unsigned long)priv;
  2709. priv->watchdog.function = iwl_bg_watchdog;
  2710. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  2711. iwl_irq_tasklet, (unsigned long)priv);
  2712. }
  2713. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  2714. {
  2715. if (priv->cfg->ops->lib->cancel_deferred_work)
  2716. priv->cfg->ops->lib->cancel_deferred_work(priv);
  2717. cancel_work_sync(&priv->run_time_calib_work);
  2718. cancel_work_sync(&priv->beacon_update);
  2719. iwl_cancel_scan_deferred_work(priv);
  2720. cancel_work_sync(&priv->bt_full_concurrency);
  2721. cancel_work_sync(&priv->bt_runtime_config);
  2722. del_timer_sync(&priv->statistics_periodic);
  2723. del_timer_sync(&priv->ucode_trace);
  2724. }
  2725. static void iwl_init_hw_rates(struct iwl_priv *priv,
  2726. struct ieee80211_rate *rates)
  2727. {
  2728. int i;
  2729. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  2730. rates[i].bitrate = iwl_rates[i].ieee * 5;
  2731. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  2732. rates[i].hw_value_short = i;
  2733. rates[i].flags = 0;
  2734. if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
  2735. /*
  2736. * If CCK != 1M then set short preamble rate flag.
  2737. */
  2738. rates[i].flags |=
  2739. (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  2740. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  2741. }
  2742. }
  2743. }
  2744. static int iwl_init_drv(struct iwl_priv *priv)
  2745. {
  2746. int ret;
  2747. spin_lock_init(&priv->sta_lock);
  2748. spin_lock_init(&priv->hcmd_lock);
  2749. mutex_init(&priv->mutex);
  2750. priv->ieee_channels = NULL;
  2751. priv->ieee_rates = NULL;
  2752. priv->band = IEEE80211_BAND_2GHZ;
  2753. priv->iw_mode = NL80211_IFTYPE_STATION;
  2754. priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
  2755. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  2756. priv->_agn.agg_tids_count = 0;
  2757. /* initialize force reset */
  2758. priv->force_reset[IWL_RF_RESET].reset_duration =
  2759. IWL_DELAY_NEXT_FORCE_RF_RESET;
  2760. priv->force_reset[IWL_FW_RESET].reset_duration =
  2761. IWL_DELAY_NEXT_FORCE_FW_RELOAD;
  2762. priv->rx_statistics_jiffies = jiffies;
  2763. /* Choose which receivers/antennas to use */
  2764. if (priv->cfg->ops->hcmd->set_rxon_chain)
  2765. priv->cfg->ops->hcmd->set_rxon_chain(priv,
  2766. &priv->contexts[IWL_RXON_CTX_BSS]);
  2767. iwl_init_scan_params(priv);
  2768. /* init bt coex */
  2769. if (priv->cfg->bt_params &&
  2770. priv->cfg->bt_params->advanced_bt_coexist) {
  2771. priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
  2772. priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
  2773. priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
  2774. priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
  2775. priv->bt_duration = BT_DURATION_LIMIT_DEF;
  2776. priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
  2777. }
  2778. ret = iwl_init_channel_map(priv);
  2779. if (ret) {
  2780. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  2781. goto err;
  2782. }
  2783. ret = iwlcore_init_geos(priv);
  2784. if (ret) {
  2785. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  2786. goto err_free_channel_map;
  2787. }
  2788. iwl_init_hw_rates(priv, priv->ieee_rates);
  2789. return 0;
  2790. err_free_channel_map:
  2791. iwl_free_channel_map(priv);
  2792. err:
  2793. return ret;
  2794. }
  2795. static void iwl_uninit_drv(struct iwl_priv *priv)
  2796. {
  2797. iwl_calib_free_results(priv);
  2798. iwlcore_free_geos(priv);
  2799. iwl_free_channel_map(priv);
  2800. kfree(priv->scan_cmd);
  2801. kfree(priv->beacon_cmd);
  2802. }
  2803. struct ieee80211_ops iwlagn_hw_ops = {
  2804. .tx = iwlagn_mac_tx,
  2805. .start = iwlagn_mac_start,
  2806. .stop = iwlagn_mac_stop,
  2807. .add_interface = iwl_mac_add_interface,
  2808. .remove_interface = iwl_mac_remove_interface,
  2809. .change_interface = iwl_mac_change_interface,
  2810. .config = iwlagn_mac_config,
  2811. .configure_filter = iwlagn_configure_filter,
  2812. .set_key = iwlagn_mac_set_key,
  2813. .update_tkip_key = iwlagn_mac_update_tkip_key,
  2814. .conf_tx = iwl_mac_conf_tx,
  2815. .bss_info_changed = iwlagn_bss_info_changed,
  2816. .ampdu_action = iwlagn_mac_ampdu_action,
  2817. .hw_scan = iwl_mac_hw_scan,
  2818. .sta_notify = iwlagn_mac_sta_notify,
  2819. .sta_add = iwlagn_mac_sta_add,
  2820. .sta_remove = iwl_mac_sta_remove,
  2821. .channel_switch = iwlagn_mac_channel_switch,
  2822. .flush = iwlagn_mac_flush,
  2823. .tx_last_beacon = iwl_mac_tx_last_beacon,
  2824. .remain_on_channel = iwl_mac_remain_on_channel,
  2825. .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
  2826. .offchannel_tx = iwl_mac_offchannel_tx,
  2827. .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
  2828. CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
  2829. CFG80211_TESTMODE_DUMP(iwl_testmode_dump)
  2830. };
  2831. static u32 iwl_hw_detect(struct iwl_priv *priv)
  2832. {
  2833. return iwl_read32(priv, CSR_HW_REV);
  2834. }
  2835. static int iwl_set_hw_params(struct iwl_priv *priv)
  2836. {
  2837. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  2838. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  2839. if (iwlagn_mod_params.amsdu_size_8K)
  2840. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
  2841. else
  2842. priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
  2843. priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
  2844. if (iwlagn_mod_params.disable_11n)
  2845. priv->cfg->sku &= ~EEPROM_SKU_CAP_11N_ENABLE;
  2846. /* Device-specific setup */
  2847. return priv->cfg->ops->lib->set_hw_params(priv);
  2848. }
  2849. static const u8 iwlagn_bss_ac_to_fifo[] = {
  2850. IWL_TX_FIFO_VO,
  2851. IWL_TX_FIFO_VI,
  2852. IWL_TX_FIFO_BE,
  2853. IWL_TX_FIFO_BK,
  2854. };
  2855. static const u8 iwlagn_bss_ac_to_queue[] = {
  2856. 0, 1, 2, 3,
  2857. };
  2858. static const u8 iwlagn_pan_ac_to_fifo[] = {
  2859. IWL_TX_FIFO_VO_IPAN,
  2860. IWL_TX_FIFO_VI_IPAN,
  2861. IWL_TX_FIFO_BE_IPAN,
  2862. IWL_TX_FIFO_BK_IPAN,
  2863. };
  2864. static const u8 iwlagn_pan_ac_to_queue[] = {
  2865. 7, 6, 5, 4,
  2866. };
  2867. /* This function both allocates and initializes hw and priv. */
  2868. static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
  2869. {
  2870. struct iwl_priv *priv;
  2871. /* mac80211 allocates memory for this device instance, including
  2872. * space for this driver's private structure */
  2873. struct ieee80211_hw *hw;
  2874. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
  2875. if (hw == NULL) {
  2876. pr_err("%s: Can not allocate network device\n",
  2877. cfg->name);
  2878. goto out;
  2879. }
  2880. priv = hw->priv;
  2881. priv->hw = hw;
  2882. out:
  2883. return hw;
  2884. }
  2885. static void iwl_init_context(struct iwl_priv *priv)
  2886. {
  2887. int i;
  2888. /*
  2889. * The default context is always valid,
  2890. * more may be discovered when firmware
  2891. * is loaded.
  2892. */
  2893. priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
  2894. for (i = 0; i < NUM_IWL_RXON_CTX; i++)
  2895. priv->contexts[i].ctxid = i;
  2896. priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
  2897. priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
  2898. priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
  2899. priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
  2900. priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
  2901. priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
  2902. priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
  2903. priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
  2904. priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
  2905. priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
  2906. priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
  2907. BIT(NL80211_IFTYPE_ADHOC);
  2908. priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
  2909. BIT(NL80211_IFTYPE_STATION);
  2910. priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
  2911. priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
  2912. priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
  2913. priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
  2914. priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
  2915. priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd =
  2916. REPLY_WIPAN_RXON_TIMING;
  2917. priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd =
  2918. REPLY_WIPAN_RXON_ASSOC;
  2919. priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
  2920. priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
  2921. priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
  2922. priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
  2923. priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
  2924. priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
  2925. priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
  2926. priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
  2927. priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
  2928. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
  2929. #ifdef CONFIG_IWL_P2P
  2930. priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
  2931. BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
  2932. #endif
  2933. priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
  2934. priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
  2935. priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
  2936. BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
  2937. }
  2938. int iwl_probe(void *bus_specific, struct iwl_bus_ops *bus_ops,
  2939. struct iwl_cfg *cfg)
  2940. {
  2941. int err = 0;
  2942. struct iwl_priv *priv;
  2943. struct ieee80211_hw *hw;
  2944. u16 num_mac;
  2945. u32 hw_rev;
  2946. /************************
  2947. * 1. Allocating HW data
  2948. ************************/
  2949. hw = iwl_alloc_all(cfg);
  2950. if (!hw) {
  2951. err = -ENOMEM;
  2952. goto out;
  2953. }
  2954. priv = hw->priv;
  2955. priv->bus.priv = priv;
  2956. priv->bus.bus_specific = bus_specific;
  2957. priv->bus.ops = bus_ops;
  2958. priv->bus.irq = priv->bus.ops->get_irq(&priv->bus);
  2959. priv->bus.ops->set_drv_data(&priv->bus, priv);
  2960. priv->bus.dev = priv->bus.ops->get_dev(&priv->bus);
  2961. iwl_trans_register(&priv->trans);
  2962. /* At this point both hw and priv are allocated. */
  2963. SET_IEEE80211_DEV(hw, priv->bus.dev);
  2964. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  2965. priv->cfg = cfg;
  2966. priv->inta_mask = CSR_INI_SET_MASK;
  2967. /* is antenna coupling more than 35dB ? */
  2968. priv->bt_ant_couple_ok =
  2969. (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
  2970. true : false;
  2971. /* enable/disable bt channel inhibition */
  2972. priv->bt_ch_announce = iwlagn_bt_ch_announce;
  2973. IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
  2974. (priv->bt_ch_announce) ? "On" : "Off");
  2975. if (iwl_alloc_traffic_mem(priv))
  2976. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  2977. /* these spin locks will be used in apm_ops.init and EEPROM access
  2978. * we should init now
  2979. */
  2980. spin_lock_init(&priv->reg_lock);
  2981. spin_lock_init(&priv->lock);
  2982. /*
  2983. * stop and reset the on-board processor just in case it is in a
  2984. * strange state ... like being left stranded by a primary kernel
  2985. * and this is now the kdump kernel trying to start up
  2986. */
  2987. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2988. /***********************
  2989. * 3. Read REV register
  2990. ***********************/
  2991. hw_rev = iwl_hw_detect(priv);
  2992. IWL_INFO(priv, "Detected %s, REV=0x%X\n",
  2993. priv->cfg->name, hw_rev);
  2994. if (iwl_prepare_card_hw(priv)) {
  2995. err = -EIO;
  2996. IWL_WARN(priv, "Failed, HW not ready\n");
  2997. goto out_free_traffic_mem;
  2998. }
  2999. /*****************
  3000. * 4. Read EEPROM
  3001. *****************/
  3002. /* Read the EEPROM */
  3003. err = iwl_eeprom_init(priv, hw_rev);
  3004. if (err) {
  3005. IWL_ERR(priv, "Unable to init EEPROM\n");
  3006. goto out_free_traffic_mem;
  3007. }
  3008. err = iwl_eeprom_check_version(priv);
  3009. if (err)
  3010. goto out_free_eeprom;
  3011. err = iwl_eeprom_check_sku(priv);
  3012. if (err)
  3013. goto out_free_eeprom;
  3014. /* extract MAC Address */
  3015. iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
  3016. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
  3017. priv->hw->wiphy->addresses = priv->addresses;
  3018. priv->hw->wiphy->n_addresses = 1;
  3019. num_mac = iwl_eeprom_query16(priv, EEPROM_NUM_MAC_ADDRESS);
  3020. if (num_mac > 1) {
  3021. memcpy(priv->addresses[1].addr, priv->addresses[0].addr,
  3022. ETH_ALEN);
  3023. priv->addresses[1].addr[5]++;
  3024. priv->hw->wiphy->n_addresses++;
  3025. }
  3026. /* initialize all valid contexts */
  3027. iwl_init_context(priv);
  3028. /************************
  3029. * 5. Setup HW constants
  3030. ************************/
  3031. if (iwl_set_hw_params(priv)) {
  3032. err = -ENOENT;
  3033. IWL_ERR(priv, "failed to set hw parameters\n");
  3034. goto out_free_eeprom;
  3035. }
  3036. /*******************
  3037. * 6. Setup priv
  3038. *******************/
  3039. err = iwl_init_drv(priv);
  3040. if (err)
  3041. goto out_free_eeprom;
  3042. /* At this point both hw and priv are initialized. */
  3043. /********************
  3044. * 7. Setup services
  3045. ********************/
  3046. iwl_alloc_isr_ict(priv);
  3047. err = request_irq(priv->bus.irq, iwl_isr_ict, IRQF_SHARED,
  3048. DRV_NAME, priv);
  3049. if (err) {
  3050. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->bus.irq);
  3051. goto out_uninit_drv;
  3052. }
  3053. iwl_setup_deferred_work(priv);
  3054. iwl_setup_rx_handlers(priv);
  3055. iwl_testmode_init(priv);
  3056. /*********************************************
  3057. * 8. Enable interrupts
  3058. *********************************************/
  3059. iwl_enable_rfkill_int(priv);
  3060. /* If platform's RF_KILL switch is NOT set to KILL */
  3061. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  3062. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3063. else
  3064. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3065. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  3066. test_bit(STATUS_RF_KILL_HW, &priv->status));
  3067. iwl_power_initialize(priv);
  3068. iwl_tt_initialize(priv);
  3069. init_completion(&priv->_agn.firmware_loading_complete);
  3070. err = iwl_request_firmware(priv, true);
  3071. if (err)
  3072. goto out_destroy_workqueue;
  3073. return 0;
  3074. out_destroy_workqueue:
  3075. destroy_workqueue(priv->workqueue);
  3076. priv->workqueue = NULL;
  3077. free_irq(priv->bus.irq, priv);
  3078. iwl_free_isr_ict(priv);
  3079. out_uninit_drv:
  3080. iwl_uninit_drv(priv);
  3081. out_free_eeprom:
  3082. iwl_eeprom_free(priv);
  3083. out_free_traffic_mem:
  3084. iwl_free_traffic_mem(priv);
  3085. ieee80211_free_hw(priv->hw);
  3086. out:
  3087. return err;
  3088. }
  3089. void __devexit iwl_remove(struct iwl_priv * priv)
  3090. {
  3091. unsigned long flags;
  3092. wait_for_completion(&priv->_agn.firmware_loading_complete);
  3093. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3094. iwl_dbgfs_unregister(priv);
  3095. sysfs_remove_group(&priv->bus.dev->kobj,
  3096. &iwl_attribute_group);
  3097. /* ieee80211_unregister_hw call wil cause iwl_mac_stop to
  3098. * to be called and iwl_down since we are removing the device
  3099. * we need to set STATUS_EXIT_PENDING bit.
  3100. */
  3101. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3102. iwl_testmode_cleanup(priv);
  3103. iwl_leds_exit(priv);
  3104. if (priv->mac80211_registered) {
  3105. ieee80211_unregister_hw(priv->hw);
  3106. priv->mac80211_registered = 0;
  3107. }
  3108. /* Reset to low power before unloading driver. */
  3109. iwl_apm_stop(priv);
  3110. iwl_tt_exit(priv);
  3111. /* make sure we flush any pending irq or
  3112. * tasklet for the driver
  3113. */
  3114. spin_lock_irqsave(&priv->lock, flags);
  3115. iwl_disable_interrupts(priv);
  3116. spin_unlock_irqrestore(&priv->lock, flags);
  3117. iwl_synchronize_irq(priv);
  3118. iwl_dealloc_ucode(priv);
  3119. priv->trans.ops->rx_free(priv);
  3120. iwlagn_hw_txq_ctx_free(priv);
  3121. iwl_eeprom_free(priv);
  3122. /*netif_stop_queue(dev); */
  3123. flush_workqueue(priv->workqueue);
  3124. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  3125. * priv->workqueue... so we can't take down the workqueue
  3126. * until now... */
  3127. destroy_workqueue(priv->workqueue);
  3128. priv->workqueue = NULL;
  3129. iwl_free_traffic_mem(priv);
  3130. free_irq(priv->bus.irq, priv);
  3131. priv->bus.ops->set_drv_data(&priv->bus, NULL);
  3132. iwl_uninit_drv(priv);
  3133. iwl_free_isr_ict(priv);
  3134. dev_kfree_skb(priv->beacon_skb);
  3135. ieee80211_free_hw(priv->hw);
  3136. }
  3137. /*****************************************************************************
  3138. *
  3139. * driver and module entry point
  3140. *
  3141. *****************************************************************************/
  3142. static int __init iwl_init(void)
  3143. {
  3144. int ret;
  3145. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3146. pr_info(DRV_COPYRIGHT "\n");
  3147. ret = iwlagn_rate_control_register();
  3148. if (ret) {
  3149. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3150. return ret;
  3151. }
  3152. ret = iwl_pci_register_driver();
  3153. if (ret)
  3154. goto error_register;
  3155. return ret;
  3156. error_register:
  3157. iwlagn_rate_control_unregister();
  3158. return ret;
  3159. }
  3160. static void __exit iwl_exit(void)
  3161. {
  3162. iwl_pci_unregister_driver();
  3163. iwlagn_rate_control_unregister();
  3164. }
  3165. module_exit(iwl_exit);
  3166. module_init(iwl_init);
  3167. #ifdef CONFIG_IWLWIFI_DEBUG
  3168. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3169. MODULE_PARM_DESC(debug, "debug output mask");
  3170. #endif
  3171. module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
  3172. MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
  3173. module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
  3174. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3175. module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
  3176. MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
  3177. module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
  3178. int, S_IRUGO);
  3179. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  3180. module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
  3181. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3182. module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
  3183. S_IRUGO);
  3184. MODULE_PARM_DESC(ucode_alternative,
  3185. "specify ucode alternative to use from ucode file");
  3186. module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
  3187. MODULE_PARM_DESC(antenna_coupling,
  3188. "specify antenna coupling in dB (defualt: 0 dB)");
  3189. module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
  3190. MODULE_PARM_DESC(bt_ch_inhibition,
  3191. "Disable BT channel inhibition (default: enable)");
  3192. module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
  3193. MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
  3194. module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
  3195. MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");
  3196. module_param_named(wd_disable, iwlagn_mod_params.wd_disable, bool, S_IRUGO);
  3197. MODULE_PARM_DESC(wd_disable,
  3198. "Disable stuck queue watchdog timer (default: 0 [enabled])");
  3199. /*
  3200. * set bt_coex_active to true, uCode will do kill/defer
  3201. * every time the priority line is asserted (BT is sending signals on the
  3202. * priority line in the PCIx).
  3203. * set bt_coex_active to false, uCode will ignore the BT activity and
  3204. * perform the normal operation
  3205. *
  3206. * User might experience transmit issue on some platform due to WiFi/BT
  3207. * co-exist problem. The possible behaviors are:
  3208. * Able to scan and finding all the available AP
  3209. * Not able to associate with any AP
  3210. * On those platforms, WiFi communication can be restored by set
  3211. * "bt_coex_active" module parameter to "false"
  3212. *
  3213. * default: bt_coex_active = true (BT_COEX_ENABLE)
  3214. */
  3215. module_param_named(bt_coex_active, iwlagn_mod_params.bt_coex_active,
  3216. bool, S_IRUGO);
  3217. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bt co-exist (default: enable)");
  3218. module_param_named(led_mode, iwlagn_mod_params.led_mode, int, S_IRUGO);
  3219. MODULE_PARM_DESC(led_mode, "0=system default, "
  3220. "1=On(RF On)/Off(RF Off), 2=blinking (default: 0)");
  3221. module_param_named(power_save, iwlagn_mod_params.power_save,
  3222. bool, S_IRUGO);
  3223. MODULE_PARM_DESC(power_save,
  3224. "enable WiFi power management (default: disable)");
  3225. module_param_named(power_level, iwlagn_mod_params.power_level,
  3226. int, S_IRUGO);
  3227. MODULE_PARM_DESC(power_level,
  3228. "default power save level (range from 1 - 5, default: 1)");
  3229. /*
  3230. * For now, keep using power level 1 instead of automatically
  3231. * adjusting ...
  3232. */
  3233. module_param_named(no_sleep_autoadjust, iwlagn_mod_params.no_sleep_autoadjust,
  3234. bool, S_IRUGO);
  3235. MODULE_PARM_DESC(no_sleep_autoadjust,
  3236. "don't automatically adjust sleep level "
  3237. "according to maximum network latency (default: true)");