phantom.c 13 KB

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  1. /*
  2. * Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * You need a userspace library to cooperate with this driver. It (and other
  10. * info) may be obtained here:
  11. * http://www.fi.muni.cz/~xslaby/phantom.html
  12. * or alternatively, you might use OpenHaptics provided by Sensable.
  13. */
  14. #include <linux/compat.h>
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/device.h>
  18. #include <linux/pci.h>
  19. #include <linux/fs.h>
  20. #include <linux/poll.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/cdev.h>
  23. #include <linux/slab.h>
  24. #include <linux/phantom.h>
  25. #include <linux/sched.h>
  26. #include <linux/smp_lock.h>
  27. #include <asm/atomic.h>
  28. #include <asm/io.h>
  29. #define PHANTOM_VERSION "n0.9.8"
  30. #define PHANTOM_MAX_MINORS 8
  31. #define PHN_IRQCTL 0x4c /* irq control in caddr space */
  32. #define PHB_RUNNING 1
  33. #define PHB_NOT_OH 2
  34. static struct class *phantom_class;
  35. static int phantom_major;
  36. struct phantom_device {
  37. unsigned int opened;
  38. void __iomem *caddr;
  39. u32 __iomem *iaddr;
  40. u32 __iomem *oaddr;
  41. unsigned long status;
  42. atomic_t counter;
  43. wait_queue_head_t wait;
  44. struct cdev cdev;
  45. struct mutex open_lock;
  46. spinlock_t regs_lock;
  47. /* used in NOT_OH mode */
  48. struct phm_regs oregs;
  49. u32 ctl_reg;
  50. };
  51. static unsigned char phantom_devices[PHANTOM_MAX_MINORS];
  52. static int phantom_status(struct phantom_device *dev, unsigned long newstat)
  53. {
  54. pr_debug("phantom_status %lx %lx\n", dev->status, newstat);
  55. if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
  56. atomic_set(&dev->counter, 0);
  57. iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
  58. iowrite32(0x43, dev->caddr + PHN_IRQCTL);
  59. ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
  60. } else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
  61. iowrite32(0, dev->caddr + PHN_IRQCTL);
  62. ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
  63. }
  64. dev->status = newstat;
  65. return 0;
  66. }
  67. /*
  68. * File ops
  69. */
  70. static long phantom_ioctl(struct file *file, unsigned int cmd,
  71. unsigned long arg)
  72. {
  73. struct phantom_device *dev = file->private_data;
  74. struct phm_regs rs;
  75. struct phm_reg r;
  76. void __user *argp = (void __user *)arg;
  77. unsigned long flags;
  78. unsigned int i;
  79. switch (cmd) {
  80. case PHN_SETREG:
  81. case PHN_SET_REG:
  82. if (copy_from_user(&r, argp, sizeof(r)))
  83. return -EFAULT;
  84. if (r.reg > 7)
  85. return -EINVAL;
  86. spin_lock_irqsave(&dev->regs_lock, flags);
  87. if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
  88. phantom_status(dev, dev->status | PHB_RUNNING)){
  89. spin_unlock_irqrestore(&dev->regs_lock, flags);
  90. return -ENODEV;
  91. }
  92. pr_debug("phantom: writing %x to %u\n", r.value, r.reg);
  93. /* preserve amp bit (don't allow to change it when in NOT_OH) */
  94. if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
  95. r.value &= ~PHN_CTL_AMP;
  96. r.value |= dev->ctl_reg & PHN_CTL_AMP;
  97. dev->ctl_reg = r.value;
  98. }
  99. iowrite32(r.value, dev->iaddr + r.reg);
  100. ioread32(dev->iaddr); /* PCI posting */
  101. if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
  102. phantom_status(dev, dev->status & ~PHB_RUNNING);
  103. spin_unlock_irqrestore(&dev->regs_lock, flags);
  104. break;
  105. case PHN_SETREGS:
  106. case PHN_SET_REGS:
  107. if (copy_from_user(&rs, argp, sizeof(rs)))
  108. return -EFAULT;
  109. pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
  110. spin_lock_irqsave(&dev->regs_lock, flags);
  111. if (dev->status & PHB_NOT_OH)
  112. memcpy(&dev->oregs, &rs, sizeof(rs));
  113. else {
  114. u32 m = min(rs.count, 8U);
  115. for (i = 0; i < m; i++)
  116. if (rs.mask & BIT(i))
  117. iowrite32(rs.values[i], dev->oaddr + i);
  118. ioread32(dev->iaddr); /* PCI posting */
  119. }
  120. spin_unlock_irqrestore(&dev->regs_lock, flags);
  121. break;
  122. case PHN_GETREG:
  123. case PHN_GET_REG:
  124. if (copy_from_user(&r, argp, sizeof(r)))
  125. return -EFAULT;
  126. if (r.reg > 7)
  127. return -EINVAL;
  128. r.value = ioread32(dev->iaddr + r.reg);
  129. if (copy_to_user(argp, &r, sizeof(r)))
  130. return -EFAULT;
  131. break;
  132. case PHN_GETREGS:
  133. case PHN_GET_REGS: {
  134. u32 m;
  135. if (copy_from_user(&rs, argp, sizeof(rs)))
  136. return -EFAULT;
  137. m = min(rs.count, 8U);
  138. pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
  139. spin_lock_irqsave(&dev->regs_lock, flags);
  140. for (i = 0; i < m; i++)
  141. if (rs.mask & BIT(i))
  142. rs.values[i] = ioread32(dev->iaddr + i);
  143. atomic_set(&dev->counter, 0);
  144. spin_unlock_irqrestore(&dev->regs_lock, flags);
  145. if (copy_to_user(argp, &rs, sizeof(rs)))
  146. return -EFAULT;
  147. break;
  148. } case PHN_NOT_OH:
  149. spin_lock_irqsave(&dev->regs_lock, flags);
  150. if (dev->status & PHB_RUNNING) {
  151. printk(KERN_ERR "phantom: you need to set NOT_OH "
  152. "before you start the device!\n");
  153. spin_unlock_irqrestore(&dev->regs_lock, flags);
  154. return -EINVAL;
  155. }
  156. dev->status |= PHB_NOT_OH;
  157. spin_unlock_irqrestore(&dev->regs_lock, flags);
  158. break;
  159. default:
  160. return -ENOTTY;
  161. }
  162. return 0;
  163. }
  164. #ifdef CONFIG_COMPAT
  165. static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
  166. unsigned long arg)
  167. {
  168. if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
  169. cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
  170. cmd |= sizeof(void *) << _IOC_SIZESHIFT;
  171. }
  172. return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
  173. }
  174. #else
  175. #define phantom_compat_ioctl NULL
  176. #endif
  177. static int phantom_open(struct inode *inode, struct file *file)
  178. {
  179. struct phantom_device *dev = container_of(inode->i_cdev,
  180. struct phantom_device, cdev);
  181. lock_kernel();
  182. nonseekable_open(inode, file);
  183. if (mutex_lock_interruptible(&dev->open_lock)) {
  184. unlock_kernel();
  185. return -ERESTARTSYS;
  186. }
  187. if (dev->opened) {
  188. mutex_unlock(&dev->open_lock);
  189. unlock_kernel();
  190. return -EINVAL;
  191. }
  192. WARN_ON(dev->status & PHB_NOT_OH);
  193. file->private_data = dev;
  194. atomic_set(&dev->counter, 0);
  195. dev->opened++;
  196. mutex_unlock(&dev->open_lock);
  197. unlock_kernel();
  198. return 0;
  199. }
  200. static int phantom_release(struct inode *inode, struct file *file)
  201. {
  202. struct phantom_device *dev = file->private_data;
  203. mutex_lock(&dev->open_lock);
  204. dev->opened = 0;
  205. phantom_status(dev, dev->status & ~PHB_RUNNING);
  206. dev->status &= ~PHB_NOT_OH;
  207. mutex_unlock(&dev->open_lock);
  208. return 0;
  209. }
  210. static unsigned int phantom_poll(struct file *file, poll_table *wait)
  211. {
  212. struct phantom_device *dev = file->private_data;
  213. unsigned int mask = 0;
  214. pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
  215. poll_wait(file, &dev->wait, wait);
  216. if (!(dev->status & PHB_RUNNING))
  217. mask = POLLERR;
  218. else if (atomic_read(&dev->counter))
  219. mask = POLLIN | POLLRDNORM;
  220. pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));
  221. return mask;
  222. }
  223. static const struct file_operations phantom_file_ops = {
  224. .open = phantom_open,
  225. .release = phantom_release,
  226. .unlocked_ioctl = phantom_ioctl,
  227. .compat_ioctl = phantom_compat_ioctl,
  228. .poll = phantom_poll,
  229. };
  230. static irqreturn_t phantom_isr(int irq, void *data)
  231. {
  232. struct phantom_device *dev = data;
  233. unsigned int i;
  234. u32 ctl;
  235. spin_lock(&dev->regs_lock);
  236. ctl = ioread32(dev->iaddr + PHN_CONTROL);
  237. if (!(ctl & PHN_CTL_IRQ)) {
  238. spin_unlock(&dev->regs_lock);
  239. return IRQ_NONE;
  240. }
  241. iowrite32(0, dev->iaddr);
  242. iowrite32(0xc0, dev->iaddr);
  243. if (dev->status & PHB_NOT_OH) {
  244. struct phm_regs *r = &dev->oregs;
  245. u32 m = min(r->count, 8U);
  246. for (i = 0; i < m; i++)
  247. if (r->mask & BIT(i))
  248. iowrite32(r->values[i], dev->oaddr + i);
  249. dev->ctl_reg ^= PHN_CTL_AMP;
  250. iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
  251. }
  252. spin_unlock(&dev->regs_lock);
  253. ioread32(dev->iaddr); /* PCI posting */
  254. atomic_inc(&dev->counter);
  255. wake_up_interruptible(&dev->wait);
  256. return IRQ_HANDLED;
  257. }
  258. /*
  259. * Init and deinit driver
  260. */
  261. static unsigned int __devinit phantom_get_free(void)
  262. {
  263. unsigned int i;
  264. for (i = 0; i < PHANTOM_MAX_MINORS; i++)
  265. if (phantom_devices[i] == 0)
  266. break;
  267. return i;
  268. }
  269. static int __devinit phantom_probe(struct pci_dev *pdev,
  270. const struct pci_device_id *pci_id)
  271. {
  272. struct phantom_device *pht;
  273. unsigned int minor;
  274. int retval;
  275. retval = pci_enable_device(pdev);
  276. if (retval)
  277. goto err;
  278. minor = phantom_get_free();
  279. if (minor == PHANTOM_MAX_MINORS) {
  280. dev_err(&pdev->dev, "too many devices found!\n");
  281. retval = -EIO;
  282. goto err_dis;
  283. }
  284. phantom_devices[minor] = 1;
  285. retval = pci_request_regions(pdev, "phantom");
  286. if (retval)
  287. goto err_null;
  288. retval = -ENOMEM;
  289. pht = kzalloc(sizeof(*pht), GFP_KERNEL);
  290. if (pht == NULL) {
  291. dev_err(&pdev->dev, "unable to allocate device\n");
  292. goto err_reg;
  293. }
  294. pht->caddr = pci_iomap(pdev, 0, 0);
  295. if (pht->caddr == NULL) {
  296. dev_err(&pdev->dev, "can't remap conf space\n");
  297. goto err_fr;
  298. }
  299. pht->iaddr = pci_iomap(pdev, 2, 0);
  300. if (pht->iaddr == NULL) {
  301. dev_err(&pdev->dev, "can't remap input space\n");
  302. goto err_unmc;
  303. }
  304. pht->oaddr = pci_iomap(pdev, 3, 0);
  305. if (pht->oaddr == NULL) {
  306. dev_err(&pdev->dev, "can't remap output space\n");
  307. goto err_unmi;
  308. }
  309. mutex_init(&pht->open_lock);
  310. spin_lock_init(&pht->regs_lock);
  311. init_waitqueue_head(&pht->wait);
  312. cdev_init(&pht->cdev, &phantom_file_ops);
  313. pht->cdev.owner = THIS_MODULE;
  314. iowrite32(0, pht->caddr + PHN_IRQCTL);
  315. ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
  316. retval = request_irq(pdev->irq, phantom_isr,
  317. IRQF_SHARED | IRQF_DISABLED, "phantom", pht);
  318. if (retval) {
  319. dev_err(&pdev->dev, "can't establish ISR\n");
  320. goto err_unmo;
  321. }
  322. retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
  323. if (retval) {
  324. dev_err(&pdev->dev, "chardev registration failed\n");
  325. goto err_irq;
  326. }
  327. if (IS_ERR(device_create(phantom_class, &pdev->dev,
  328. MKDEV(phantom_major, minor), NULL,
  329. "phantom%u", minor)))
  330. dev_err(&pdev->dev, "can't create device\n");
  331. pci_set_drvdata(pdev, pht);
  332. return 0;
  333. err_irq:
  334. free_irq(pdev->irq, pht);
  335. err_unmo:
  336. pci_iounmap(pdev, pht->oaddr);
  337. err_unmi:
  338. pci_iounmap(pdev, pht->iaddr);
  339. err_unmc:
  340. pci_iounmap(pdev, pht->caddr);
  341. err_fr:
  342. kfree(pht);
  343. err_reg:
  344. pci_release_regions(pdev);
  345. err_null:
  346. phantom_devices[minor] = 0;
  347. err_dis:
  348. pci_disable_device(pdev);
  349. err:
  350. return retval;
  351. }
  352. static void __devexit phantom_remove(struct pci_dev *pdev)
  353. {
  354. struct phantom_device *pht = pci_get_drvdata(pdev);
  355. unsigned int minor = MINOR(pht->cdev.dev);
  356. device_destroy(phantom_class, MKDEV(phantom_major, minor));
  357. cdev_del(&pht->cdev);
  358. iowrite32(0, pht->caddr + PHN_IRQCTL);
  359. ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
  360. free_irq(pdev->irq, pht);
  361. pci_iounmap(pdev, pht->oaddr);
  362. pci_iounmap(pdev, pht->iaddr);
  363. pci_iounmap(pdev, pht->caddr);
  364. kfree(pht);
  365. pci_release_regions(pdev);
  366. phantom_devices[minor] = 0;
  367. pci_disable_device(pdev);
  368. }
  369. #ifdef CONFIG_PM
  370. static int phantom_suspend(struct pci_dev *pdev, pm_message_t state)
  371. {
  372. struct phantom_device *dev = pci_get_drvdata(pdev);
  373. iowrite32(0, dev->caddr + PHN_IRQCTL);
  374. ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
  375. synchronize_irq(pdev->irq);
  376. return 0;
  377. }
  378. static int phantom_resume(struct pci_dev *pdev)
  379. {
  380. struct phantom_device *dev = pci_get_drvdata(pdev);
  381. iowrite32(0, dev->caddr + PHN_IRQCTL);
  382. return 0;
  383. }
  384. #else
  385. #define phantom_suspend NULL
  386. #define phantom_resume NULL
  387. #endif
  388. static struct pci_device_id phantom_pci_tbl[] __devinitdata = {
  389. { .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
  390. .subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
  391. .class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
  392. { 0, }
  393. };
  394. MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);
  395. static struct pci_driver phantom_pci_driver = {
  396. .name = "phantom",
  397. .id_table = phantom_pci_tbl,
  398. .probe = phantom_probe,
  399. .remove = __devexit_p(phantom_remove),
  400. .suspend = phantom_suspend,
  401. .resume = phantom_resume
  402. };
  403. static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);
  404. static int __init phantom_init(void)
  405. {
  406. int retval;
  407. dev_t dev;
  408. phantom_class = class_create(THIS_MODULE, "phantom");
  409. if (IS_ERR(phantom_class)) {
  410. retval = PTR_ERR(phantom_class);
  411. printk(KERN_ERR "phantom: can't register phantom class\n");
  412. goto err;
  413. }
  414. retval = class_create_file(phantom_class, &class_attr_version.attr);
  415. if (retval) {
  416. printk(KERN_ERR "phantom: can't create sysfs version file\n");
  417. goto err_class;
  418. }
  419. retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
  420. if (retval) {
  421. printk(KERN_ERR "phantom: can't register character device\n");
  422. goto err_attr;
  423. }
  424. phantom_major = MAJOR(dev);
  425. retval = pci_register_driver(&phantom_pci_driver);
  426. if (retval) {
  427. printk(KERN_ERR "phantom: can't register pci driver\n");
  428. goto err_unchr;
  429. }
  430. printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
  431. "init OK\n");
  432. return 0;
  433. err_unchr:
  434. unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
  435. err_attr:
  436. class_remove_file(phantom_class, &class_attr_version.attr);
  437. err_class:
  438. class_destroy(phantom_class);
  439. err:
  440. return retval;
  441. }
  442. static void __exit phantom_exit(void)
  443. {
  444. pci_unregister_driver(&phantom_pci_driver);
  445. unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);
  446. class_remove_file(phantom_class, &class_attr_version.attr);
  447. class_destroy(phantom_class);
  448. pr_debug("phantom: module successfully removed\n");
  449. }
  450. module_init(phantom_init);
  451. module_exit(phantom_exit);
  452. MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
  453. MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
  454. MODULE_LICENSE("GPL");
  455. MODULE_VERSION(PHANTOM_VERSION);