ad525x_dpot.c 18 KB

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  1. /*
  2. * ad525x_dpot: Driver for the Analog Devices digital potentiometers
  3. * Copyright (c) 2009-2010 Analog Devices, Inc.
  4. * Author: Michael Hennerich <hennerich@blackfin.uclinux.org>
  5. *
  6. * DEVID #Wipers #Positions Resistor Options (kOhm)
  7. * AD5258 1 64 1, 10, 50, 100
  8. * AD5259 1 256 5, 10, 50, 100
  9. * AD5251 2 64 1, 10, 50, 100
  10. * AD5252 2 256 1, 10, 50, 100
  11. * AD5255 3 512 25, 250
  12. * AD5253 4 64 1, 10, 50, 100
  13. * AD5254 4 256 1, 10, 50, 100
  14. * AD5160 1 256 5, 10, 50, 100
  15. * AD5161 1 256 5, 10, 50, 100
  16. * AD5162 2 256 2.5, 10, 50, 100
  17. * AD5165 1 256 100
  18. * AD5200 1 256 10, 50
  19. * AD5201 1 33 10, 50
  20. * AD5203 4 64 10, 100
  21. * AD5204 4 256 10, 50, 100
  22. * AD5206 6 256 10, 50, 100
  23. * AD5207 2 256 10, 50, 100
  24. * AD5231 1 1024 10, 50, 100
  25. * AD5232 2 256 10, 50, 100
  26. * AD5233 4 64 10, 50, 100
  27. * AD5235 2 1024 25, 250
  28. * AD5260 1 256 20, 50, 200
  29. * AD5262 2 256 20, 50, 200
  30. * AD5263 4 256 20, 50, 200
  31. * AD5290 1 256 10, 50, 100
  32. * AD5291 1 256 20
  33. * AD5292 1 1024 20
  34. * AD5293 1 1024 20
  35. * AD7376 1 128 10, 50, 100, 1M
  36. * AD8400 1 256 1, 10, 50, 100
  37. * AD8402 2 256 1, 10, 50, 100
  38. * AD8403 4 256 1, 10, 50, 100
  39. * ADN2850 3 512 25, 250
  40. * AD5241 1 256 10, 100, 1M
  41. * AD5246 1 128 5, 10, 50, 100
  42. * AD5247 1 128 5, 10, 50, 100
  43. * AD5245 1 256 5, 10, 50, 100
  44. * AD5243 2 256 2.5, 10, 50, 100
  45. * AD5248 2 256 2.5, 10, 50, 100
  46. * AD5242 2 256 20, 50, 200
  47. * AD5280 1 256 20, 50, 200
  48. * AD5282 2 256 20, 50, 200
  49. * ADN2860 3 512 25, 250
  50. * AD5273 1 64 1, 10, 50, 100 (OTP)
  51. * AD5171 1 64 5, 10, 50, 100 (OTP)
  52. * AD5170 1 256 2.5, 10, 50, 100 (OTP)
  53. * AD5172 2 256 2.5, 10, 50, 100 (OTP)
  54. * AD5173 2 256 2.5, 10, 50, 100 (OTP)
  55. *
  56. * See Documentation/misc-devices/ad525x_dpot.txt for more info.
  57. *
  58. * derived from ad5258.c
  59. * Copyright (c) 2009 Cyber Switching, Inc.
  60. * Author: Chris Verges <chrisv@cyberswitching.com>
  61. *
  62. * derived from ad5252.c
  63. * Copyright (c) 2006 Michael Hennerich <hennerich@blackfin.uclinux.org>
  64. *
  65. * Licensed under the GPL-2 or later.
  66. */
  67. #include <linux/module.h>
  68. #include <linux/device.h>
  69. #include <linux/kernel.h>
  70. #include <linux/init.h>
  71. #include <linux/delay.h>
  72. #include <linux/slab.h>
  73. #define DRIVER_VERSION "0.2"
  74. #include "ad525x_dpot.h"
  75. /*
  76. * Client data (each client gets its own)
  77. */
  78. struct dpot_data {
  79. struct ad_dpot_bus_data bdata;
  80. struct mutex update_lock;
  81. unsigned rdac_mask;
  82. unsigned max_pos;
  83. unsigned long devid;
  84. unsigned uid;
  85. unsigned feat;
  86. unsigned wipers;
  87. u16 rdac_cache[MAX_RDACS];
  88. DECLARE_BITMAP(otp_en_mask, MAX_RDACS);
  89. };
  90. static inline int dpot_read_d8(struct dpot_data *dpot)
  91. {
  92. return dpot->bdata.bops->read_d8(dpot->bdata.client);
  93. }
  94. static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg)
  95. {
  96. return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg);
  97. }
  98. static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg)
  99. {
  100. return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg);
  101. }
  102. static inline int dpot_write_d8(struct dpot_data *dpot, u8 val)
  103. {
  104. return dpot->bdata.bops->write_d8(dpot->bdata.client, val);
  105. }
  106. static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val)
  107. {
  108. return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val);
  109. }
  110. static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
  111. {
  112. return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val);
  113. }
  114. static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
  115. {
  116. unsigned ctrl = 0;
  117. if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
  118. if (dpot->feat & F_RDACS_WONLY)
  119. return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
  120. if (dpot->uid == DPOT_UID(AD5291_ID) ||
  121. dpot->uid == DPOT_UID(AD5292_ID) ||
  122. dpot->uid == DPOT_UID(AD5293_ID))
  123. return dpot_read_r8d8(dpot,
  124. DPOT_AD5291_READ_RDAC << 2);
  125. ctrl = DPOT_SPI_READ_RDAC;
  126. } else if (reg & DPOT_ADDR_EEPROM) {
  127. ctrl = DPOT_SPI_READ_EEPROM;
  128. }
  129. if (dpot->feat & F_SPI_16BIT)
  130. return dpot_read_r8d8(dpot, ctrl);
  131. else if (dpot->feat & F_SPI_24BIT)
  132. return dpot_read_r8d16(dpot, ctrl);
  133. return -EFAULT;
  134. }
  135. static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
  136. {
  137. unsigned ctrl = 0;
  138. switch (dpot->uid) {
  139. case DPOT_UID(AD5246_ID):
  140. case DPOT_UID(AD5247_ID):
  141. return dpot_read_d8(dpot);
  142. case DPOT_UID(AD5245_ID):
  143. case DPOT_UID(AD5241_ID):
  144. case DPOT_UID(AD5242_ID):
  145. case DPOT_UID(AD5243_ID):
  146. case DPOT_UID(AD5248_ID):
  147. case DPOT_UID(AD5280_ID):
  148. case DPOT_UID(AD5282_ID):
  149. ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
  150. 0 : DPOT_AD5291_RDAC_AB;
  151. return dpot_read_r8d8(dpot, ctrl);
  152. case DPOT_UID(AD5170_ID):
  153. case DPOT_UID(AD5171_ID):
  154. case DPOT_UID(AD5273_ID):
  155. return dpot_read_d8(dpot);
  156. case DPOT_UID(AD5172_ID):
  157. case DPOT_UID(AD5173_ID):
  158. ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
  159. 0 : DPOT_AD5272_3_A0;
  160. return dpot_read_r8d8(dpot, ctrl);
  161. default:
  162. if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
  163. return dpot_read_r8d16(dpot, (reg & 0xF8) |
  164. ((reg & 0x7) << 1));
  165. else
  166. return dpot_read_r8d8(dpot, reg);
  167. }
  168. }
  169. static s32 dpot_read(struct dpot_data *dpot, u8 reg)
  170. {
  171. if (dpot->feat & F_SPI)
  172. return dpot_read_spi(dpot, reg);
  173. else
  174. return dpot_read_i2c(dpot, reg);
  175. }
  176. static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
  177. {
  178. unsigned val = 0;
  179. if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
  180. if (dpot->feat & F_RDACS_WONLY)
  181. dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
  182. if (dpot->feat & F_AD_APPDATA) {
  183. if (dpot->feat & F_SPI_8BIT) {
  184. val = ((reg & DPOT_RDAC_MASK) <<
  185. DPOT_MAX_POS(dpot->devid)) |
  186. value;
  187. return dpot_write_d8(dpot, val);
  188. } else if (dpot->feat & F_SPI_16BIT) {
  189. val = ((reg & DPOT_RDAC_MASK) <<
  190. DPOT_MAX_POS(dpot->devid)) |
  191. value;
  192. return dpot_write_r8d8(dpot, val >> 8,
  193. val & 0xFF);
  194. } else
  195. BUG();
  196. } else {
  197. if (dpot->uid == DPOT_UID(AD5291_ID) ||
  198. dpot->uid == DPOT_UID(AD5292_ID) ||
  199. dpot->uid == DPOT_UID(AD5293_ID))
  200. return dpot_write_r8d8(dpot,
  201. (DPOT_AD5291_RDAC << 2) |
  202. (value >> 8), value & 0xFF);
  203. val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
  204. }
  205. } else if (reg & DPOT_ADDR_EEPROM) {
  206. val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK);
  207. } else if (reg & DPOT_ADDR_CMD) {
  208. switch (reg) {
  209. case DPOT_DEC_ALL_6DB:
  210. val = DPOT_SPI_DEC_ALL_6DB;
  211. break;
  212. case DPOT_INC_ALL_6DB:
  213. val = DPOT_SPI_INC_ALL_6DB;
  214. break;
  215. case DPOT_DEC_ALL:
  216. val = DPOT_SPI_DEC_ALL;
  217. break;
  218. case DPOT_INC_ALL:
  219. val = DPOT_SPI_INC_ALL;
  220. break;
  221. }
  222. } else
  223. BUG();
  224. if (dpot->feat & F_SPI_16BIT)
  225. return dpot_write_r8d8(dpot, val, value);
  226. else if (dpot->feat & F_SPI_24BIT)
  227. return dpot_write_r8d16(dpot, val, value);
  228. return -EFAULT;
  229. }
  230. static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
  231. {
  232. /* Only write the instruction byte for certain commands */
  233. unsigned tmp = 0, ctrl = 0;
  234. switch (dpot->uid) {
  235. case DPOT_UID(AD5246_ID):
  236. case DPOT_UID(AD5247_ID):
  237. return dpot_write_d8(dpot, value);
  238. break;
  239. case DPOT_UID(AD5245_ID):
  240. case DPOT_UID(AD5241_ID):
  241. case DPOT_UID(AD5242_ID):
  242. case DPOT_UID(AD5243_ID):
  243. case DPOT_UID(AD5248_ID):
  244. case DPOT_UID(AD5280_ID):
  245. case DPOT_UID(AD5282_ID):
  246. ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
  247. 0 : DPOT_AD5291_RDAC_AB;
  248. return dpot_write_r8d8(dpot, ctrl, value);
  249. break;
  250. case DPOT_UID(AD5171_ID):
  251. case DPOT_UID(AD5273_ID):
  252. if (reg & DPOT_ADDR_OTP) {
  253. tmp = dpot_read_d8(dpot);
  254. if (tmp >> 6) /* Ready to Program? */
  255. return -EFAULT;
  256. ctrl = DPOT_AD5273_FUSE;
  257. }
  258. return dpot_write_r8d8(dpot, ctrl, value);
  259. break;
  260. case DPOT_UID(AD5172_ID):
  261. case DPOT_UID(AD5173_ID):
  262. ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
  263. 0 : DPOT_AD5272_3_A0;
  264. if (reg & DPOT_ADDR_OTP) {
  265. tmp = dpot_read_r8d16(dpot, ctrl);
  266. if (tmp >> 14) /* Ready to Program? */
  267. return -EFAULT;
  268. ctrl |= DPOT_AD5270_2_3_FUSE;
  269. }
  270. return dpot_write_r8d8(dpot, ctrl, value);
  271. break;
  272. case DPOT_UID(AD5170_ID):
  273. if (reg & DPOT_ADDR_OTP) {
  274. tmp = dpot_read_r8d16(dpot, tmp);
  275. if (tmp >> 14) /* Ready to Program? */
  276. return -EFAULT;
  277. ctrl = DPOT_AD5270_2_3_FUSE;
  278. }
  279. return dpot_write_r8d8(dpot, ctrl, value);
  280. break;
  281. default:
  282. if (reg & DPOT_ADDR_CMD)
  283. return dpot_write_d8(dpot, reg);
  284. if (dpot->max_pos > 256)
  285. return dpot_write_r8d16(dpot, (reg & 0xF8) |
  286. ((reg & 0x7) << 1), value);
  287. else
  288. /* All other registers require instruction + data bytes */
  289. return dpot_write_r8d8(dpot, reg, value);
  290. }
  291. }
  292. static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
  293. {
  294. if (dpot->feat & F_SPI)
  295. return dpot_write_spi(dpot, reg, value);
  296. else
  297. return dpot_write_i2c(dpot, reg, value);
  298. }
  299. /* sysfs functions */
  300. static ssize_t sysfs_show_reg(struct device *dev,
  301. struct device_attribute *attr,
  302. char *buf, u32 reg)
  303. {
  304. struct dpot_data *data = dev_get_drvdata(dev);
  305. s32 value;
  306. if (reg & DPOT_ADDR_OTP_EN)
  307. return sprintf(buf, "%s\n",
  308. test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask) ?
  309. "enabled" : "disabled");
  310. mutex_lock(&data->update_lock);
  311. value = dpot_read(data, reg);
  312. mutex_unlock(&data->update_lock);
  313. if (value < 0)
  314. return -EINVAL;
  315. /*
  316. * Let someone else deal with converting this ...
  317. * the tolerance is a two-byte value where the MSB
  318. * is a sign + integer value, and the LSB is a
  319. * decimal value. See page 18 of the AD5258
  320. * datasheet (Rev. A) for more details.
  321. */
  322. if (reg & DPOT_REG_TOL)
  323. return sprintf(buf, "0x%04x\n", value & 0xFFFF);
  324. else
  325. return sprintf(buf, "%u\n", value & data->rdac_mask);
  326. }
  327. static ssize_t sysfs_set_reg(struct device *dev,
  328. struct device_attribute *attr,
  329. const char *buf, size_t count, u32 reg)
  330. {
  331. struct dpot_data *data = dev_get_drvdata(dev);
  332. unsigned long value;
  333. int err;
  334. if (reg & DPOT_ADDR_OTP_EN) {
  335. if (!strncmp(buf, "enabled", sizeof("enabled")))
  336. set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
  337. else
  338. clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
  339. return count;
  340. }
  341. if ((reg & DPOT_ADDR_OTP) &&
  342. !test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask))
  343. return -EPERM;
  344. err = strict_strtoul(buf, 10, &value);
  345. if (err)
  346. return err;
  347. if (value > data->rdac_mask)
  348. value = data->rdac_mask;
  349. mutex_lock(&data->update_lock);
  350. dpot_write(data, reg, value);
  351. if (reg & DPOT_ADDR_EEPROM)
  352. msleep(26); /* Sleep while the EEPROM updates */
  353. else if (reg & DPOT_ADDR_OTP)
  354. msleep(400); /* Sleep while the OTP updates */
  355. mutex_unlock(&data->update_lock);
  356. return count;
  357. }
  358. static ssize_t sysfs_do_cmd(struct device *dev,
  359. struct device_attribute *attr,
  360. const char *buf, size_t count, u32 reg)
  361. {
  362. struct dpot_data *data = dev_get_drvdata(dev);
  363. mutex_lock(&data->update_lock);
  364. dpot_write(data, reg, 0);
  365. mutex_unlock(&data->update_lock);
  366. return count;
  367. }
  368. /* ------------------------------------------------------------------------- */
  369. #define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \
  370. show_##_name(struct device *dev, \
  371. struct device_attribute *attr, char *buf) \
  372. { \
  373. return sysfs_show_reg(dev, attr, buf, _reg); \
  374. }
  375. #define DPOT_DEVICE_SET(_name, _reg) static ssize_t \
  376. set_##_name(struct device *dev, \
  377. struct device_attribute *attr, \
  378. const char *buf, size_t count) \
  379. { \
  380. return sysfs_set_reg(dev, attr, buf, count, _reg); \
  381. }
  382. #define DPOT_DEVICE_SHOW_SET(name, reg) \
  383. DPOT_DEVICE_SHOW(name, reg) \
  384. DPOT_DEVICE_SET(name, reg) \
  385. static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name);
  386. #define DPOT_DEVICE_SHOW_ONLY(name, reg) \
  387. DPOT_DEVICE_SHOW(name, reg) \
  388. static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL);
  389. DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0);
  390. DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0);
  391. DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0);
  392. DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0);
  393. DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0);
  394. DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1);
  395. DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1);
  396. DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1);
  397. DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1);
  398. DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1);
  399. DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2);
  400. DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2);
  401. DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2);
  402. DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2);
  403. DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2);
  404. DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3);
  405. DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3);
  406. DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3);
  407. DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3);
  408. DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3);
  409. DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4);
  410. DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4);
  411. DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4);
  412. DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4);
  413. DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4);
  414. DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5);
  415. DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5);
  416. DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5);
  417. DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5);
  418. DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5);
  419. static const struct attribute *dpot_attrib_wipers[] = {
  420. &dev_attr_rdac0.attr,
  421. &dev_attr_rdac1.attr,
  422. &dev_attr_rdac2.attr,
  423. &dev_attr_rdac3.attr,
  424. &dev_attr_rdac4.attr,
  425. &dev_attr_rdac5.attr,
  426. NULL
  427. };
  428. static const struct attribute *dpot_attrib_eeprom[] = {
  429. &dev_attr_eeprom0.attr,
  430. &dev_attr_eeprom1.attr,
  431. &dev_attr_eeprom2.attr,
  432. &dev_attr_eeprom3.attr,
  433. &dev_attr_eeprom4.attr,
  434. &dev_attr_eeprom5.attr,
  435. NULL
  436. };
  437. static const struct attribute *dpot_attrib_otp[] = {
  438. &dev_attr_otp0.attr,
  439. &dev_attr_otp1.attr,
  440. &dev_attr_otp2.attr,
  441. &dev_attr_otp3.attr,
  442. &dev_attr_otp4.attr,
  443. &dev_attr_otp5.attr,
  444. NULL
  445. };
  446. static const struct attribute *dpot_attrib_otp_en[] = {
  447. &dev_attr_otp0en.attr,
  448. &dev_attr_otp1en.attr,
  449. &dev_attr_otp2en.attr,
  450. &dev_attr_otp3en.attr,
  451. &dev_attr_otp4en.attr,
  452. &dev_attr_otp5en.attr,
  453. NULL
  454. };
  455. static const struct attribute *dpot_attrib_tolerance[] = {
  456. &dev_attr_tolerance0.attr,
  457. &dev_attr_tolerance1.attr,
  458. &dev_attr_tolerance2.attr,
  459. &dev_attr_tolerance3.attr,
  460. &dev_attr_tolerance4.attr,
  461. &dev_attr_tolerance5.attr,
  462. NULL
  463. };
  464. /* ------------------------------------------------------------------------- */
  465. #define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \
  466. set_##_name(struct device *dev, \
  467. struct device_attribute *attr, \
  468. const char *buf, size_t count) \
  469. { \
  470. return sysfs_do_cmd(dev, attr, buf, count, _cmd); \
  471. } \
  472. static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name);
  473. DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL);
  474. DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL);
  475. DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB);
  476. DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB);
  477. static struct attribute *ad525x_attributes_commands[] = {
  478. &dev_attr_inc_all.attr,
  479. &dev_attr_dec_all.attr,
  480. &dev_attr_inc_all_6db.attr,
  481. &dev_attr_dec_all_6db.attr,
  482. NULL
  483. };
  484. static const struct attribute_group ad525x_group_commands = {
  485. .attrs = ad525x_attributes_commands,
  486. };
  487. __devinit int ad_dpot_add_files(struct device *dev,
  488. unsigned features, unsigned rdac)
  489. {
  490. int err = sysfs_create_file(&dev->kobj,
  491. dpot_attrib_wipers[rdac]);
  492. if (features & F_CMD_EEP)
  493. err |= sysfs_create_file(&dev->kobj,
  494. dpot_attrib_eeprom[rdac]);
  495. if (features & F_CMD_TOL)
  496. err |= sysfs_create_file(&dev->kobj,
  497. dpot_attrib_tolerance[rdac]);
  498. if (features & F_CMD_OTP) {
  499. err |= sysfs_create_file(&dev->kobj,
  500. dpot_attrib_otp_en[rdac]);
  501. err |= sysfs_create_file(&dev->kobj,
  502. dpot_attrib_otp[rdac]);
  503. }
  504. if (err)
  505. dev_err(dev, "failed to register sysfs hooks for RDAC%d\n",
  506. rdac);
  507. return err;
  508. }
  509. inline void ad_dpot_remove_files(struct device *dev,
  510. unsigned features, unsigned rdac)
  511. {
  512. sysfs_remove_file(&dev->kobj,
  513. dpot_attrib_wipers[rdac]);
  514. if (features & F_CMD_EEP)
  515. sysfs_remove_file(&dev->kobj,
  516. dpot_attrib_eeprom[rdac]);
  517. if (features & F_CMD_TOL)
  518. sysfs_remove_file(&dev->kobj,
  519. dpot_attrib_tolerance[rdac]);
  520. if (features & F_CMD_OTP) {
  521. sysfs_remove_file(&dev->kobj,
  522. dpot_attrib_otp_en[rdac]);
  523. sysfs_remove_file(&dev->kobj,
  524. dpot_attrib_otp[rdac]);
  525. }
  526. }
  527. __devinit int ad_dpot_probe(struct device *dev,
  528. struct ad_dpot_bus_data *bdata, const struct ad_dpot_id *id)
  529. {
  530. struct dpot_data *data;
  531. int i, err = 0;
  532. data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL);
  533. if (!data) {
  534. err = -ENOMEM;
  535. goto exit;
  536. }
  537. dev_set_drvdata(dev, data);
  538. mutex_init(&data->update_lock);
  539. data->bdata = *bdata;
  540. data->devid = id->devid;
  541. data->max_pos = 1 << DPOT_MAX_POS(data->devid);
  542. data->rdac_mask = data->max_pos - 1;
  543. data->feat = DPOT_FEAT(data->devid);
  544. data->uid = DPOT_UID(data->devid);
  545. data->wipers = DPOT_WIPERS(data->devid);
  546. for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
  547. if (data->wipers & (1 << i)) {
  548. err = ad_dpot_add_files(dev, data->feat, i);
  549. if (err)
  550. goto exit_remove_files;
  551. /* power-up midscale */
  552. if (data->feat & F_RDACS_WONLY)
  553. data->rdac_cache[i] = data->max_pos / 2;
  554. }
  555. if (data->feat & F_CMD_INC)
  556. err = sysfs_create_group(&dev->kobj, &ad525x_group_commands);
  557. if (err) {
  558. dev_err(dev, "failed to register sysfs hooks\n");
  559. goto exit_free;
  560. }
  561. dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
  562. id->name, data->max_pos);
  563. return 0;
  564. exit_remove_files:
  565. for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
  566. if (data->wipers & (1 << i))
  567. ad_dpot_remove_files(dev, data->feat, i);
  568. exit_free:
  569. kfree(data);
  570. dev_set_drvdata(dev, NULL);
  571. exit:
  572. dev_err(dev, "failed to create client for %s ID 0x%lX\n",
  573. id->name, id->devid);
  574. return err;
  575. }
  576. EXPORT_SYMBOL(ad_dpot_probe);
  577. __devexit int ad_dpot_remove(struct device *dev)
  578. {
  579. struct dpot_data *data = dev_get_drvdata(dev);
  580. int i;
  581. for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
  582. if (data->wipers & (1 << i))
  583. ad_dpot_remove_files(dev, data->feat, i);
  584. kfree(data);
  585. return 0;
  586. }
  587. EXPORT_SYMBOL(ad_dpot_remove);
  588. MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
  589. "Michael Hennerich <hennerich@blackfin.uclinux.org>");
  590. MODULE_DESCRIPTION("Digital potentiometer driver");
  591. MODULE_LICENSE("GPL");
  592. MODULE_VERSION(DRIVER_VERSION);