microcode_intel.c 14 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * This driver allows to upgrade microcode on Intel processors
  8. * belonging to IA-32 family - PentiumPro, Pentium II,
  9. * Pentium III, Xeon, Pentium 4, etc.
  10. *
  11. * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
  12. * Software Developer's Manual
  13. * Order Number 253668 or free download from:
  14. *
  15. * http://developer.intel.com/design/pentium4/manuals/253668.htm
  16. *
  17. * For more information, go to http://www.urbanmyth.org/microcode
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. *
  24. * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
  25. * Initial release.
  26. * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
  27. * Added read() support + cleanups.
  28. * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
  29. * Added 'device trimming' support. open(O_WRONLY) zeroes
  30. * and frees the saved copy of applied microcode.
  31. * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
  32. * Made to use devfs (/dev/cpu/microcode) + cleanups.
  33. * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
  34. * Added misc device support (now uses both devfs and misc).
  35. * Added MICROCODE_IOCFREE ioctl to clear memory.
  36. * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
  37. * Messages for error cases (non Intel & no suitable microcode).
  38. * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
  39. * Removed ->release(). Removed exclusive open and status bitmap.
  40. * Added microcode_rwsem to serialize read()/write()/ioctl().
  41. * Removed global kernel lock usage.
  42. * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
  43. * Write 0 to 0x8B msr and then cpuid before reading revision,
  44. * so that it works even if there were no update done by the
  45. * BIOS. Otherwise, reading from 0x8B gives junk (which happened
  46. * to be 0 on my machine which is why it worked even when I
  47. * disabled update by the BIOS)
  48. * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
  49. * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
  50. * Tigran Aivazian <tigran@veritas.com>
  51. * Intel Pentium 4 processor support and bugfixes.
  52. * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
  53. * Bugfix for HT (Hyper-Threading) enabled processors
  54. * whereby processor resources are shared by all logical processors
  55. * in a single CPU package.
  56. * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
  57. * Tigran Aivazian <tigran@veritas.com>,
  58. * Serialize updates as required on HT processors due to
  59. * speculative nature of implementation.
  60. * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
  61. * Fix the panic when writing zero-length microcode chunk.
  62. * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
  63. * Jun Nakajima <jun.nakajima@intel.com>
  64. * Support for the microcode updates in the new format.
  65. * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
  66. * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
  67. * because we no longer hold a copy of applied microcode
  68. * in kernel memory.
  69. * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
  70. * Fix sigmatch() macro to handle old CPUs with pf == 0.
  71. * Thanks to Stuart Swales for pointing out this bug.
  72. */
  73. /* #define DEBUG */ /* pr_debug */
  74. #include <linux/capability.h>
  75. #include <linux/kernel.h>
  76. #include <linux/init.h>
  77. #include <linux/sched.h>
  78. #include <linux/smp_lock.h>
  79. #include <linux/cpumask.h>
  80. #include <linux/module.h>
  81. #include <linux/slab.h>
  82. #include <linux/vmalloc.h>
  83. #include <linux/miscdevice.h>
  84. #include <linux/spinlock.h>
  85. #include <linux/mm.h>
  86. #include <linux/fs.h>
  87. #include <linux/mutex.h>
  88. #include <linux/cpu.h>
  89. #include <linux/firmware.h>
  90. #include <linux/platform_device.h>
  91. #include <asm/msr.h>
  92. #include <asm/uaccess.h>
  93. #include <asm/processor.h>
  94. #include <asm/microcode.h>
  95. MODULE_DESCRIPTION("Microcode Update Driver");
  96. MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
  97. MODULE_LICENSE("GPL");
  98. #define DEFAULT_UCODE_DATASIZE (2000)
  99. #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
  100. #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
  101. #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
  102. #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
  103. #define DWSIZE (sizeof(u32))
  104. #define get_totalsize(mc) \
  105. (((struct microcode_intel *)mc)->hdr.totalsize ? \
  106. ((struct microcode_intel *)mc)->hdr.totalsize : \
  107. DEFAULT_UCODE_TOTALSIZE)
  108. #define get_datasize(mc) \
  109. (((struct microcode_intel *)mc)->hdr.datasize ? \
  110. ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
  111. #define sigmatch(s1, s2, p1, p2) \
  112. (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
  113. #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
  114. /* serialize access to the physical write to MSR 0x79 */
  115. static DEFINE_SPINLOCK(microcode_update_lock);
  116. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  117. {
  118. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  119. unsigned int val[2];
  120. memset(csig, 0, sizeof(*csig));
  121. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  122. cpu_has(c, X86_FEATURE_IA64)) {
  123. printk(KERN_ERR "microcode: CPU%d not a capable Intel "
  124. "processor\n", cpu_num);
  125. return -1;
  126. }
  127. csig->sig = cpuid_eax(0x00000001);
  128. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  129. /* get processor flags from MSR 0x17 */
  130. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  131. csig->pf = 1 << ((val[1] >> 18) & 7);
  132. }
  133. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  134. /* see notes above for revision 1.07. Apparent chip bug */
  135. sync_core();
  136. /* get the current revision from MSR 0x8B */
  137. rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
  138. pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
  139. csig->sig, csig->pf, csig->rev);
  140. return 0;
  141. }
  142. static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
  143. {
  144. return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
  145. }
  146. static inline int
  147. update_match_revision(struct microcode_header_intel *mc_header, int rev)
  148. {
  149. return (mc_header->rev <= rev) ? 0 : 1;
  150. }
  151. static int microcode_sanity_check(void *mc)
  152. {
  153. struct microcode_header_intel *mc_header = mc;
  154. struct extended_sigtable *ext_header = NULL;
  155. struct extended_signature *ext_sig;
  156. unsigned long total_size, data_size, ext_table_size;
  157. int sum, orig_sum, ext_sigcount = 0, i;
  158. total_size = get_totalsize(mc_header);
  159. data_size = get_datasize(mc_header);
  160. if (data_size + MC_HEADER_SIZE > total_size) {
  161. printk(KERN_ERR "microcode: error! "
  162. "Bad data size in microcode data file\n");
  163. return -EINVAL;
  164. }
  165. if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
  166. printk(KERN_ERR "microcode: error! "
  167. "Unknown microcode update format\n");
  168. return -EINVAL;
  169. }
  170. ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
  171. if (ext_table_size) {
  172. if ((ext_table_size < EXT_HEADER_SIZE)
  173. || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
  174. printk(KERN_ERR "microcode: error! "
  175. "Small exttable size in microcode data file\n");
  176. return -EINVAL;
  177. }
  178. ext_header = mc + MC_HEADER_SIZE + data_size;
  179. if (ext_table_size != exttable_size(ext_header)) {
  180. printk(KERN_ERR "microcode: error! "
  181. "Bad exttable size in microcode data file\n");
  182. return -EFAULT;
  183. }
  184. ext_sigcount = ext_header->count;
  185. }
  186. /* check extended table checksum */
  187. if (ext_table_size) {
  188. int ext_table_sum = 0;
  189. int *ext_tablep = (int *)ext_header;
  190. i = ext_table_size / DWSIZE;
  191. while (i--)
  192. ext_table_sum += ext_tablep[i];
  193. if (ext_table_sum) {
  194. printk(KERN_WARNING "microcode: aborting, "
  195. "bad extended signature table checksum\n");
  196. return -EINVAL;
  197. }
  198. }
  199. /* calculate the checksum */
  200. orig_sum = 0;
  201. i = (MC_HEADER_SIZE + data_size) / DWSIZE;
  202. while (i--)
  203. orig_sum += ((int *)mc)[i];
  204. if (orig_sum) {
  205. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  206. return -EINVAL;
  207. }
  208. if (!ext_table_size)
  209. return 0;
  210. /* check extended signature checksum */
  211. for (i = 0; i < ext_sigcount; i++) {
  212. ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
  213. EXT_SIGNATURE_SIZE * i;
  214. sum = orig_sum
  215. - (mc_header->sig + mc_header->pf + mc_header->cksum)
  216. + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
  217. if (sum) {
  218. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  219. return -EINVAL;
  220. }
  221. }
  222. return 0;
  223. }
  224. /*
  225. * return 0 - no update found
  226. * return 1 - found update
  227. */
  228. static int
  229. get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
  230. {
  231. struct microcode_header_intel *mc_header = mc;
  232. struct extended_sigtable *ext_header;
  233. unsigned long total_size = get_totalsize(mc_header);
  234. int ext_sigcount, i;
  235. struct extended_signature *ext_sig;
  236. if (!update_match_revision(mc_header, rev))
  237. return 0;
  238. if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
  239. return 1;
  240. /* Look for ext. headers: */
  241. if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
  242. return 0;
  243. ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
  244. ext_sigcount = ext_header->count;
  245. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  246. for (i = 0; i < ext_sigcount; i++) {
  247. if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
  248. return 1;
  249. ext_sig++;
  250. }
  251. return 0;
  252. }
  253. static void apply_microcode(int cpu)
  254. {
  255. unsigned long flags;
  256. unsigned int val[2];
  257. int cpu_num = raw_smp_processor_id();
  258. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  259. /* We should bind the task to the CPU */
  260. BUG_ON(cpu_num != cpu);
  261. if (uci->mc.mc_intel == NULL)
  262. return;
  263. /* serialize access to the physical write to MSR 0x79 */
  264. spin_lock_irqsave(&microcode_update_lock, flags);
  265. /* write microcode via MSR 0x79 */
  266. wrmsr(MSR_IA32_UCODE_WRITE,
  267. (unsigned long) uci->mc.mc_intel->bits,
  268. (unsigned long) uci->mc.mc_intel->bits >> 16 >> 16);
  269. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  270. /* see notes above for revision 1.07. Apparent chip bug */
  271. sync_core();
  272. /* get the current revision from MSR 0x8B */
  273. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  274. spin_unlock_irqrestore(&microcode_update_lock, flags);
  275. if (val[1] != uci->mc.mc_intel->hdr.rev) {
  276. printk(KERN_ERR "microcode: CPU%d update from revision "
  277. "0x%x to 0x%x failed\n", cpu_num, uci->cpu_sig.rev, val[1]);
  278. return;
  279. }
  280. printk(KERN_INFO "microcode: CPU%d updated from revision "
  281. "0x%x to 0x%x, date = %04x-%02x-%02x \n",
  282. cpu_num, uci->cpu_sig.rev, val[1],
  283. uci->mc.mc_intel->hdr.date & 0xffff,
  284. uci->mc.mc_intel->hdr.date >> 24,
  285. (uci->mc.mc_intel->hdr.date >> 16) & 0xff);
  286. uci->cpu_sig.rev = val[1];
  287. }
  288. static int generic_load_microcode(int cpu, void *data, size_t size,
  289. int (*get_ucode_data)(void *, const void *, size_t))
  290. {
  291. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  292. u8 *ucode_ptr = data, *new_mc = NULL, *mc;
  293. int new_rev = uci->cpu_sig.rev;
  294. unsigned int leftover = size;
  295. while (leftover) {
  296. struct microcode_header_intel mc_header;
  297. unsigned int mc_size;
  298. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  299. break;
  300. mc_size = get_totalsize(&mc_header);
  301. if (!mc_size || mc_size > leftover) {
  302. printk(KERN_ERR "microcode: error!"
  303. "Bad data in microcode data file\n");
  304. break;
  305. }
  306. mc = vmalloc(mc_size);
  307. if (!mc)
  308. break;
  309. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  310. microcode_sanity_check(mc) < 0) {
  311. vfree(mc);
  312. break;
  313. }
  314. if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
  315. new_rev = mc_header.rev;
  316. new_mc = mc;
  317. } else
  318. vfree(mc);
  319. ucode_ptr += mc_size;
  320. leftover -= mc_size;
  321. }
  322. if (new_mc) {
  323. if (!leftover) {
  324. if (uci->mc.mc_intel)
  325. vfree(uci->mc.mc_intel);
  326. uci->mc.mc_intel = (struct microcode_intel *)new_mc;
  327. pr_debug("microcode: CPU%d found a matching microcode update with"
  328. " version 0x%x (current=0x%x)\n",
  329. cpu, uci->mc.mc_intel->hdr.rev, uci->cpu_sig.rev);
  330. } else
  331. vfree(new_mc);
  332. }
  333. return (int)leftover;
  334. }
  335. static int get_ucode_fw(void *to, const void *from, size_t n)
  336. {
  337. memcpy(to, from, n);
  338. return 0;
  339. }
  340. static int request_microcode_fw(int cpu, struct device *device)
  341. {
  342. char name[30];
  343. struct cpuinfo_x86 *c = &cpu_data(cpu);
  344. const struct firmware *firmware;
  345. int ret;
  346. /* We should bind the task to the CPU */
  347. BUG_ON(cpu != raw_smp_processor_id());
  348. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  349. c->x86, c->x86_model, c->x86_mask);
  350. ret = request_firmware(&firmware, name, device);
  351. if (ret) {
  352. pr_debug("microcode: data file %s load failed\n", name);
  353. return ret;
  354. }
  355. ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
  356. &get_ucode_fw);
  357. release_firmware(firmware);
  358. return ret;
  359. }
  360. static int get_ucode_user(void *to, const void *from, size_t n)
  361. {
  362. return copy_from_user(to, from, n);
  363. }
  364. static int request_microcode_user(int cpu, const void __user *buf, size_t size)
  365. {
  366. /* We should bind the task to the CPU */
  367. BUG_ON(cpu != raw_smp_processor_id());
  368. return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user);
  369. }
  370. static void microcode_fini_cpu(int cpu)
  371. {
  372. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  373. vfree(uci->mc.mc_intel);
  374. uci->mc.mc_intel = NULL;
  375. }
  376. static struct microcode_ops microcode_intel_ops = {
  377. .request_microcode_user = request_microcode_user,
  378. .request_microcode_fw = request_microcode_fw,
  379. .collect_cpu_info = collect_cpu_info,
  380. .apply_microcode = apply_microcode,
  381. .microcode_fini_cpu = microcode_fini_cpu,
  382. };
  383. static int __init microcode_intel_module_init(void)
  384. {
  385. struct cpuinfo_x86 *c = &cpu_data(0);
  386. if (c->x86_vendor != X86_VENDOR_INTEL) {
  387. printk(KERN_ERR "microcode: CPU platform is not Intel-capable\n");
  388. return -ENODEV;
  389. }
  390. return microcode_init(&microcode_intel_ops, THIS_MODULE);
  391. }
  392. static void __exit microcode_intel_module_exit(void)
  393. {
  394. microcode_exit();
  395. }
  396. module_init(microcode_intel_module_init)
  397. module_exit(microcode_intel_module_exit)