board-mop500-pins.c 20 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License terms: GNU General Public License (GPL) version 2
  5. */
  6. #include <linux/kernel.h>
  7. #include <linux/init.h>
  8. #include <linux/bug.h>
  9. #include <linux/string.h>
  10. #include <linux/pinctrl/machine.h>
  11. #include <asm/mach-types.h>
  12. #include <plat/pincfg.h>
  13. #include <plat/gpio-nomadik.h>
  14. #include <mach/hardware.h>
  15. #include "pins-db8500.h"
  16. #include "board-mop500.h"
  17. enum custom_pin_cfg_t {
  18. PINS_FOR_DEFAULT,
  19. PINS_FOR_U9500,
  20. };
  21. static enum custom_pin_cfg_t pinsfor;
  22. /* These simply sets bias for pins */
  23. #define BIAS(a,b) static unsigned long a[] = { b }
  24. BIAS(pd, PIN_PULL_DOWN);
  25. BIAS(slpm_gpio_nopull, PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  26. BIAS(in_nopull, PIN_INPUT_NOPULL);
  27. BIAS(in_pu, PIN_INPUT_PULLUP);
  28. BIAS(in_pd, PIN_INPUT_PULLDOWN);
  29. BIAS(in_pd_slpm_in_pu, PIN_INPUT_PULLDOWN|PIN_SLPM_INPUT_PULLUP);
  30. BIAS(in_pu_slpm_out_lo, PIN_INPUT_PULLUP|PIN_SLPM_OUTPUT_LOW);
  31. BIAS(out_hi, PIN_OUTPUT_HIGH);
  32. BIAS(out_lo, PIN_OUTPUT_LOW);
  33. /* These also force them into GPIO mode */
  34. BIAS(gpio_in_pu, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED);
  35. BIAS(gpio_in_pd, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED);
  36. BIAS(gpio_in_pu_slpm_gpio_nopull, PIN_INPUT_PULLUP|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  37. BIAS(gpio_in_pd_slpm_gpio_nopull, PIN_INPUT_PULLDOWN|PIN_GPIOMODE_ENABLED|PIN_SLPM_GPIO|PIN_SLPM_INPUT_NOPULL);
  38. BIAS(gpio_out_hi, PIN_OUTPUT_HIGH|PIN_GPIOMODE_ENABLED);
  39. BIAS(gpio_out_lo, PIN_OUTPUT_LOW|PIN_GPIOMODE_ENABLED);
  40. /* Sleep modes */
  41. BIAS(sleep_in_wkup_pdis, PIN_SLPM_DIR_INPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  42. BIAS(sleep_out_hi_wkup_pdis, PIN_SLPM_OUTPUT_HIGH|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  43. BIAS(sleep_out_wkup_pdis, PIN_SLPM_DIR_OUTPUT|PIN_SLPM_WAKEUP_ENABLE|PIN_SLPM_PDIS_DISABLED);
  44. /* We use these to define hog settings that are always done on boot */
  45. #define DB8500_MUX_HOG(group,func) \
  46. PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-db8500", group, func)
  47. #define DB8500_PIN_HOG(pin,conf) \
  48. PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-db8500", pin, conf)
  49. /* These are default states associated with device and changed runtime */
  50. #define DB8500_MUX(group,func,dev) \
  51. PIN_MAP_MUX_GROUP_DEFAULT(dev, "pinctrl-db8500", group, func)
  52. #define DB8500_PIN(pin,conf,dev) \
  53. PIN_MAP_CONFIGS_PIN_DEFAULT(dev, "pinctrl-db8500", pin, conf)
  54. #define DB8500_PIN_SLEEP(pin,conf,dev) \
  55. PIN_MAP_CONFIGS_PIN(dev, PINCTRL_STATE_SLEEP, "pinctrl-db8500", \
  56. pin, conf)
  57. /* Pin control settings */
  58. static struct pinctrl_map __initdata mop500_family_pinmap[] = {
  59. /*
  60. * uMSP0, mux in 4 pins, regular placement of RX/TX
  61. * explicitly set the pins to no pull
  62. */
  63. DB8500_MUX_HOG("msp0txrx_a_1", "msp0"),
  64. DB8500_MUX_HOG("msp0tfstck_a_1", "msp0"),
  65. DB8500_PIN_HOG("GPIO12_AC4", in_nopull), /* TXD */
  66. DB8500_PIN_HOG("GPIO15_AC3", in_nopull), /* RXD */
  67. DB8500_PIN_HOG("GPIO13_AF3", in_nopull), /* TFS */
  68. DB8500_PIN_HOG("GPIO14_AE3", in_nopull), /* TCK */
  69. /* MSP2 for HDMI, pull down TXD, TCK, TFS */
  70. DB8500_MUX_HOG("msp2_a_1", "msp2"),
  71. DB8500_PIN_HOG("GPIO193_AH27", in_pd), /* TXD */
  72. DB8500_PIN_HOG("GPIO194_AF27", in_pd), /* TCK */
  73. DB8500_PIN_HOG("GPIO195_AG28", in_pd), /* TFS */
  74. DB8500_PIN_HOG("GPIO196_AG26", out_lo), /* RXD */
  75. /*
  76. * LCD, set TE0 (using LCD VSI0) and D14 (touch screen interrupt) to
  77. * pull-up
  78. * TODO: is this really correct? Snowball doesn't have a LCD.
  79. */
  80. DB8500_MUX_HOG("lcdvsi0_a_1", "lcd"),
  81. DB8500_PIN_HOG("GPIO68_E1", in_pu),
  82. DB8500_PIN_HOG("GPIO84_C2", gpio_in_pu),
  83. /*
  84. * STMPE1601/tc35893 keypad IRQ GPIO 218
  85. * TODO: set for snowball and HREF really??
  86. */
  87. DB8500_PIN_HOG("GPIO218_AH11", gpio_in_pu),
  88. /*
  89. * UART0, we do not mux in u0 here.
  90. * uart-0 pins gpio configuration should be kept intact to prevent
  91. * a glitch in tx line when the tty dev is opened. Later these pins
  92. * are configured to uart mop500_pins_uart0
  93. */
  94. DB8500_PIN_HOG("GPIO0_AJ5", in_pu), /* CTS */
  95. DB8500_PIN_HOG("GPIO1_AJ3", out_hi), /* RTS */
  96. DB8500_PIN_HOG("GPIO2_AH4", in_pu), /* RXD */
  97. DB8500_PIN_HOG("GPIO3_AH3", out_hi), /* TXD */
  98. /*
  99. * Mux in UART2 on altfunction C and set pull-ups.
  100. * TODO: is this used on U8500 variants and Snowball really?
  101. * The setting on GPIO31 conflicts with magnetometer use on hrefv60
  102. */
  103. DB8500_MUX_HOG("u2rxtx_c_1", "u2"),
  104. DB8500_MUX_HOG("u2ctsrts_c_1", "u2"),
  105. DB8500_PIN_HOG("GPIO29_W2", in_pu), /* RXD */
  106. DB8500_PIN_HOG("GPIO30_W3", out_hi), /* TXD */
  107. DB8500_PIN_HOG("GPIO31_V3", in_pu), /* CTS */
  108. DB8500_PIN_HOG("GPIO32_V2", out_hi), /* RTS */
  109. /*
  110. * The following pin sets were known as "runtime pins" before being
  111. * converted to the pinctrl model. Here we model them as "default"
  112. * states.
  113. */
  114. /* Mux in UART0 after initialization */
  115. DB8500_MUX("u0_a_1", "u0", "uart0"),
  116. DB8500_PIN("GPIO0_AJ5", in_pu, "uart0"), /* CTS */
  117. DB8500_PIN("GPIO1_AJ3", out_hi, "uart0"), /* RTS */
  118. DB8500_PIN("GPIO2_AH4", in_pu, "uart0"), /* RXD */
  119. DB8500_PIN("GPIO3_AH3", out_hi, "uart0"), /* TXD */
  120. /* Sleep state for UART0 */
  121. DB8500_PIN_SLEEP("GPIO0_AJ5", sleep_in_wkup_pdis, "uart0"),
  122. DB8500_PIN_SLEEP("GPIO1_AJ3", sleep_out_hi_wkup_pdis, "uart0"),
  123. DB8500_PIN_SLEEP("GPIO2_AH4", sleep_in_wkup_pdis, "uart0"),
  124. DB8500_PIN_SLEEP("GPIO3_AH3", sleep_out_wkup_pdis, "uart0"),
  125. /* Mux in LCD data lines 8 thru 11 and LCDA CLK for MCDE TVOUT */
  126. DB8500_MUX("lcd_d8_d11_a_1", "lcd", "mcde-tvout"),
  127. DB8500_MUX("lcdaclk_b_1", "lcda", "mcde-tvout"),
  128. /* Mux in LCD VSI1 and pull it up for MCDE HDMI output */
  129. DB8500_MUX("lcdvsi1_a_1", "lcd", "av8100-hdmi"),
  130. /* Mux in I2C blocks, put pins into GPIO in sleepmode no pull-up */
  131. DB8500_MUX("i2c0_a_1", "i2c0", "nmk-i2c.0"),
  132. DB8500_PIN("GPIO147_C15", slpm_gpio_nopull, "nmk-i2c.0"),
  133. DB8500_PIN("GPIO148_B16", slpm_gpio_nopull, "nmk-i2c.0"),
  134. DB8500_MUX("i2c1_b_2", "i2c1", "nmk-i2c.1"),
  135. DB8500_PIN("GPIO16_AD3", slpm_gpio_nopull, "nmk-i2c.1"),
  136. DB8500_PIN("GPIO17_AD4", slpm_gpio_nopull, "nmk-i2c.1"),
  137. DB8500_MUX("i2c2_b_2", "i2c2", "nmk-i2c.2"),
  138. DB8500_PIN("GPIO10_AF5", slpm_gpio_nopull, "nmk-i2c.2"),
  139. DB8500_PIN("GPIO11_AG4", slpm_gpio_nopull, "nmk-i2c.2"),
  140. DB8500_MUX("i2c3_c_2", "i2c3", "nmk-i2c.3"),
  141. DB8500_PIN("GPIO229_AG7", slpm_gpio_nopull, "nmk-i2c.3"),
  142. DB8500_PIN("GPIO230_AF7", slpm_gpio_nopull, "nmk-i2c.3"),
  143. /* Mux in SDI0 (here called MC0) used for removable MMC/SD/SDIO cards */
  144. DB8500_MUX("mc0_a_1", "mc0", "sdi0"),
  145. DB8500_PIN("GPIO18_AC2", out_hi, "sdi0"), /* CMDDIR */
  146. DB8500_PIN("GPIO19_AC1", out_hi, "sdi0"), /* DAT0DIR */
  147. DB8500_PIN("GPIO20_AB4", out_hi, "sdi0"), /* DAT2DIR */
  148. DB8500_PIN("GPIO22_AA3", in_nopull, "sdi0"), /* FBCLK */
  149. DB8500_PIN("GPIO23_AA4", out_lo, "sdi0"), /* CLK */
  150. DB8500_PIN("GPIO24_AB2", in_pu, "sdi0"), /* CMD */
  151. DB8500_PIN("GPIO25_Y4", in_pu, "sdi0"), /* DAT0 */
  152. DB8500_PIN("GPIO26_Y2", in_pu, "sdi0"), /* DAT1 */
  153. DB8500_PIN("GPIO27_AA2", in_pu, "sdi0"), /* DAT2 */
  154. DB8500_PIN("GPIO28_AA1", in_pu, "sdi0"), /* DAT3 */
  155. /* Mux in SDI1 (here called MC1) used for SDIO for CW1200 WLAN */
  156. DB8500_MUX("mc1_a_1", "mc1", "sdi1"),
  157. DB8500_PIN("GPIO208_AH16", out_lo, "sdi1"), /* CLK */
  158. DB8500_PIN("GPIO209_AG15", in_nopull, "sdi1"), /* FBCLK */
  159. DB8500_PIN("GPIO210_AJ15", in_pu, "sdi1"), /* CMD */
  160. DB8500_PIN("GPIO211_AG14", in_pu, "sdi1"), /* DAT0 */
  161. DB8500_PIN("GPIO212_AF13", in_pu, "sdi1"), /* DAT1 */
  162. DB8500_PIN("GPIO213_AG13", in_pu, "sdi1"), /* DAT2 */
  163. DB8500_PIN("GPIO214_AH15", in_pu, "sdi1"), /* DAT3 */
  164. /* Mux in SDI2 (here called MC2) used for for PoP eMMC */
  165. DB8500_MUX("mc2_a_1", "mc2", "sdi2"),
  166. DB8500_PIN("GPIO128_A5", out_lo, "sdi2"), /* CLK */
  167. DB8500_PIN("GPIO129_B4", in_pu, "sdi2"), /* CMD */
  168. DB8500_PIN("GPIO130_C8", in_nopull, "sdi2"), /* FBCLK */
  169. DB8500_PIN("GPIO131_A12", in_pu, "sdi2"), /* DAT0 */
  170. DB8500_PIN("GPIO132_C10", in_pu, "sdi2"), /* DAT1 */
  171. DB8500_PIN("GPIO133_B10", in_pu, "sdi2"), /* DAT2 */
  172. DB8500_PIN("GPIO134_B9", in_pu, "sdi2"), /* DAT3 */
  173. DB8500_PIN("GPIO135_A9", in_pu, "sdi2"), /* DAT4 */
  174. DB8500_PIN("GPIO136_C7", in_pu, "sdi2"), /* DAT5 */
  175. DB8500_PIN("GPIO137_A7", in_pu, "sdi2"), /* DAT6 */
  176. DB8500_PIN("GPIO138_C5", in_pu, "sdi2"), /* DAT7 */
  177. /* Mux in SDI4 (here called MC4) used for for PCB-mounted eMMC */
  178. DB8500_MUX("mc4_a_1", "mc4", "sdi4"),
  179. DB8500_PIN("GPIO197_AH24", in_pu, "sdi4"), /* DAT3 */
  180. DB8500_PIN("GPIO198_AG25", in_pu, "sdi4"), /* DAT2 */
  181. DB8500_PIN("GPIO199_AH23", in_pu, "sdi4"), /* DAT1 */
  182. DB8500_PIN("GPIO200_AH26", in_pu, "sdi4"), /* DAT0 */
  183. DB8500_PIN("GPIO201_AF24", in_pu, "sdi4"), /* CMD */
  184. DB8500_PIN("GPIO202_AF25", in_nopull, "sdi4"), /* FBCLK */
  185. DB8500_PIN("GPIO203_AE23", out_lo, "sdi4"), /* CLK */
  186. DB8500_PIN("GPIO204_AF23", in_pu, "sdi4"), /* DAT7 */
  187. DB8500_PIN("GPIO205_AG23", in_pu, "sdi4"), /* DAT6 */
  188. DB8500_PIN("GPIO206_AG24", in_pu, "sdi4"), /* DAT5 */
  189. DB8500_PIN("GPIO207_AJ23", in_pu, "sdi4"), /* DAT4 */
  190. /* Mux in USB pins, drive STP high */
  191. DB8500_MUX("usb_a_1", "usb", "musb-ux500.0"),
  192. DB8500_PIN("GPIO257_AE29", out_hi, "musb-ux500.0"), /* STP */
  193. /* Mux in SPI2 pins on the "other C1" altfunction */
  194. DB8500_MUX("spi2_oc1_1", "spi2", "spi2"),
  195. DB8500_PIN("GPIO216_AG12", gpio_out_hi, "spi2"), /* FRM */
  196. DB8500_PIN("GPIO218_AH11", in_pd, "spi2"), /* RXD */
  197. DB8500_PIN("GPIO215_AH13", out_lo, "spi2"), /* TXD */
  198. DB8500_PIN("GPIO217_AH12", out_lo, "spi2"), /* CLK */
  199. };
  200. /*
  201. * These are specifically for the MOP500 and HREFP (pre-v60) version of the
  202. * board, which utilized a TC35892 GPIO expander instead of using a lot of
  203. * on-chip pins as the HREFv60 and later does.
  204. */
  205. static struct pinctrl_map __initdata mop500_pinmap[] = {
  206. /* Mux in SSP0, pull down RXD pin */
  207. DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
  208. DB8500_PIN_HOG("GPIO145_C13", pd),
  209. /*
  210. * XENON Flashgun on image processor GPIO (controlled from image
  211. * processor firmware), mux in these image processor GPIO lines 0
  212. * (XENON_FLASH_ID) and 1 (XENON_READY) on altfunction C and pull up
  213. * the pins.
  214. */
  215. DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
  216. DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
  217. DB8500_PIN_HOG("GPIO6_AF6", in_pu),
  218. DB8500_PIN_HOG("GPIO7_AG5", in_pu),
  219. /* TC35892 IRQ, pull up the line, let the driver mux in the pin */
  220. DB8500_PIN_HOG("GPIO217_AH12", gpio_in_pu),
  221. /* Mux in UART1 and set the pull-ups */
  222. DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
  223. DB8500_MUX_HOG("u1ctsrts_a_1", "u1"),
  224. DB8500_PIN_HOG("GPIO4_AH6", in_pu), /* RXD */
  225. DB8500_PIN_HOG("GPIO5_AG6", out_hi), /* TXD */
  226. DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* CTS */
  227. DB8500_PIN_HOG("GPIO7_AG5", out_hi), /* RTS */
  228. /*
  229. * Runtime stuff: make it possible to mux in the SKE keypad
  230. * and bias the pins
  231. */
  232. DB8500_MUX("kp_a_2", "kp", "ske"),
  233. DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
  234. DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
  235. DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
  236. DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
  237. DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
  238. DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
  239. DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
  240. DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
  241. DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
  242. DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
  243. DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
  244. DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
  245. DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
  246. DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
  247. DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
  248. DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
  249. /* Mux in and drive the SDI0 DAT31DIR line high at runtime */
  250. DB8500_MUX("mc0dat31dir_a_1", "mc0", "sdi0"),
  251. DB8500_PIN("GPIO21_AB3", out_hi, "sdi0"),
  252. };
  253. /*
  254. * The HREFv60 series of platforms is using available pins on the DB8500
  255. * insteaf of the Toshiba I2C GPIO expander, reusing some pins like the SSP0
  256. * and SSP1 ports (previously connected to the AB8500) as generic GPIO lines.
  257. */
  258. static struct pinctrl_map __initdata hrefv60_pinmap[] = {
  259. /* Drive WLAN_ENA low */
  260. DB8500_PIN_HOG("GPIO85_D5", gpio_out_lo), /* WLAN_ENA */
  261. /*
  262. * XENON Flashgun on image processor GPIO (controlled from image
  263. * processor firmware), mux in these image processor GPIO lines 0
  264. * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
  265. * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
  266. * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
  267. */
  268. DB8500_MUX_HOG("ipgpio0_c_1", "ipgpio"),
  269. DB8500_MUX_HOG("ipgpio1_c_1", "ipgpio"),
  270. DB8500_MUX_HOG("ipgpio4_c_1", "ipgpio"),
  271. DB8500_PIN_HOG("GPIO6_AF6", in_pu), /* XENON_FLASH_ID */
  272. DB8500_PIN_HOG("GPIO7_AG5", in_pu), /* XENON_READY */
  273. DB8500_PIN_HOG("GPIO21_AB3", gpio_out_lo), /* XENON_EN1 */
  274. DB8500_PIN_HOG("GPIO64_F3", out_lo), /* XENON_EN2 */
  275. /* Magnetometer uses GPIO 31 and 32, pull these up/down respectively */
  276. DB8500_PIN_HOG("GPIO31_V3", gpio_in_pu), /* EN1 */
  277. DB8500_PIN_HOG("GPIO32_V2", gpio_in_pd), /* DRDY */
  278. /*
  279. * Display Interface 1 uses GPIO 65 for RST (reset).
  280. * Display Interface 2 uses GPIO 66 for RST (reset).
  281. * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
  282. */
  283. DB8500_PIN_HOG("GPIO65_F1", gpio_out_hi), /* DISP1 NO RST */
  284. DB8500_PIN_HOG("GPIO66_G3", gpio_out_lo), /* DISP2 RST */
  285. /*
  286. * Touch screen uses GPIO 143 for RST1, GPIO 146 for RST2 and
  287. * GPIO 67 for interrupts. Pull-up the IRQ line and drive both
  288. * reset signals low.
  289. */
  290. DB8500_PIN_HOG("GPIO143_D12", gpio_out_lo), /* TOUCH_RST1 */
  291. DB8500_PIN_HOG("GPIO67_G2", gpio_in_pu), /* TOUCH_INT2 */
  292. DB8500_PIN_HOG("GPIO146_D13", gpio_out_lo), /* TOUCH_RST2 */
  293. /*
  294. * Drive D19-D23 for the ETM PTM trace interface low,
  295. * (presumably pins are unconnected therefore grounded here,
  296. * the "other alt C1" setting enables these pins)
  297. */
  298. DB8500_PIN_HOG("GPIO70_G5", gpio_out_lo),
  299. DB8500_PIN_HOG("GPIO71_G4", gpio_out_lo),
  300. DB8500_PIN_HOG("GPIO72_H4", gpio_out_lo),
  301. DB8500_PIN_HOG("GPIO73_H3", gpio_out_lo),
  302. DB8500_PIN_HOG("GPIO74_J3", gpio_out_lo),
  303. /* NAHJ CTRL on GPIO 76 to low, CTRL_INV on GPIO216 to high */
  304. DB8500_PIN_HOG("GPIO76_J2", gpio_out_lo), /* CTRL */
  305. DB8500_PIN_HOG("GPIO216_AG12", gpio_out_hi), /* CTRL_INV */
  306. /* NFC ENA and RESET to low, pulldown IRQ line */
  307. DB8500_PIN_HOG("GPIO77_H1", gpio_out_lo), /* NFC_ENA */
  308. DB8500_PIN_HOG("GPIO144_B13", gpio_in_pd), /* NFC_IRQ */
  309. DB8500_PIN_HOG("GPIO142_C11", gpio_out_lo), /* NFC_RESET */
  310. /*
  311. * SKE keyboard partly on alt A and partly on "Other alt C1"
  312. * Driver KP_O1,2,3,6,7 low and pull up KP_I 0,2,3 for three
  313. * rows of 6 keys, then pull up force sensing interrup and
  314. * drive reset and force sensing WU low.
  315. */
  316. DB8500_MUX_HOG("kp_a_1", "kp"),
  317. DB8500_MUX_HOG("kp_oc1_1", "kp"),
  318. DB8500_PIN_HOG("GPIO90_A3", out_lo), /* KP_O1 */
  319. DB8500_PIN_HOG("GPIO87_B3", out_lo), /* KP_O2 */
  320. DB8500_PIN_HOG("GPIO86_C6", out_lo), /* KP_O3 */
  321. DB8500_PIN_HOG("GPIO96_D8", out_lo), /* KP_O6 */
  322. DB8500_PIN_HOG("GPIO94_D7", out_lo), /* KP_O7 */
  323. DB8500_PIN_HOG("GPIO93_B7", in_pu), /* KP_I0 */
  324. DB8500_PIN_HOG("GPIO89_E6", in_pu), /* KP_I2 */
  325. DB8500_PIN_HOG("GPIO88_C4", in_pu), /* KP_I3 */
  326. DB8500_PIN_HOG("GPIO91_B6", gpio_in_pu), /* FORCE_SENSING_INT */
  327. DB8500_PIN_HOG("GPIO92_D6", gpio_out_lo), /* FORCE_SENSING_RST */
  328. DB8500_PIN_HOG("GPIO97_D9", gpio_out_lo), /* FORCE_SENSING_WU */
  329. /* DiPro Sensor interrupt */
  330. DB8500_PIN_HOG("GPIO139_C9", gpio_in_pu), /* DIPRO_INT */
  331. /* Audio Amplifier HF enable */
  332. DB8500_PIN_HOG("GPIO149_B14", gpio_out_hi), /* VAUDIO_HF_EN, enable MAX8968 */
  333. /* GBF interface, pull low to reset state */
  334. DB8500_PIN_HOG("GPIO171_D23", gpio_out_lo), /* GBF_ENA_RESET */
  335. /* MSP : HDTV INTERFACE GPIO line */
  336. DB8500_PIN_HOG("GPIO192_AJ27", gpio_in_pd),
  337. /* Accelerometer interrupt lines */
  338. DB8500_PIN_HOG("GPIO82_C1", gpio_in_pu), /* ACC_INT1 */
  339. DB8500_PIN_HOG("GPIO83_D3", gpio_in_pu), /* ACC_INT2 */
  340. /* SD card detect GPIO pin */
  341. DB8500_PIN_HOG("GPIO95_E8", gpio_in_pu),
  342. /*
  343. * Runtime stuff
  344. * Pull up/down of some sensor GPIO pins, for proximity, HAL sensor
  345. * etc.
  346. */
  347. DB8500_PIN("GPIO217_AH12", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
  348. DB8500_PIN("GPIO145_C13", gpio_in_pd_slpm_gpio_nopull, "gpio-keys.0"),
  349. DB8500_PIN("GPIO139_C9", gpio_in_pu_slpm_gpio_nopull, "gpio-keys.0"),
  350. /*
  351. * Make it possible to mux in the SKE keypad and bias the pins
  352. * FIXME: what's the point with this on HREFv60? KP/SKE is already
  353. * muxed in at another place! Enabling this will bork.
  354. */
  355. DB8500_MUX("kp_a_2", "kp", "ske"),
  356. DB8500_PIN("GPIO153_B17", in_pd_slpm_in_pu, "ske"), /* I7 */
  357. DB8500_PIN("GPIO154_C16", in_pd_slpm_in_pu, "ske"), /* I6 */
  358. DB8500_PIN("GPIO155_C19", in_pd_slpm_in_pu, "ske"), /* I5 */
  359. DB8500_PIN("GPIO156_C17", in_pd_slpm_in_pu, "ske"), /* I4 */
  360. DB8500_PIN("GPIO161_D21", in_pd_slpm_in_pu, "ske"), /* I3 */
  361. DB8500_PIN("GPIO162_D20", in_pd_slpm_in_pu, "ske"), /* I2 */
  362. DB8500_PIN("GPIO163_C20", in_pd_slpm_in_pu, "ske"), /* I1 */
  363. DB8500_PIN("GPIO164_B21", in_pd_slpm_in_pu, "ske"), /* I0 */
  364. DB8500_PIN("GPIO157_A18", in_pu_slpm_out_lo, "ske"), /* O7 */
  365. DB8500_PIN("GPIO158_C18", in_pu_slpm_out_lo, "ske"), /* O6 */
  366. DB8500_PIN("GPIO159_B19", in_pu_slpm_out_lo, "ske"), /* O5 */
  367. DB8500_PIN("GPIO160_B20", in_pu_slpm_out_lo, "ske"), /* O4 */
  368. DB8500_PIN("GPIO165_C21", in_pu_slpm_out_lo, "ske"), /* O3 */
  369. DB8500_PIN("GPIO166_A22", in_pu_slpm_out_lo, "ske"), /* O2 */
  370. DB8500_PIN("GPIO167_B24", in_pu_slpm_out_lo, "ske"), /* O1 */
  371. DB8500_PIN("GPIO168_C22", in_pu_slpm_out_lo, "ske"), /* O0 */
  372. };
  373. static struct pinctrl_map __initdata u9500_pinmap[] = {
  374. /* Mux in UART1 (just RX/TX) and set the pull-ups */
  375. DB8500_MUX_HOG("u1rxtx_a_1", "u1"),
  376. DB8500_PIN_HOG("GPIO4_AH6", in_pu),
  377. DB8500_PIN_HOG("GPIO5_AG6", out_hi),
  378. /* WLAN_IRQ line */
  379. DB8500_PIN_HOG("GPIO144_B13", gpio_in_pu),
  380. /* HSI */
  381. DB8500_MUX_HOG("hsir_a_1", "hsi"),
  382. DB8500_MUX_HOG("hsit_a_1", "hsi"),
  383. DB8500_PIN_HOG("GPIO219_AG10", in_pd), /* RX FLA0 */
  384. DB8500_PIN_HOG("GPIO220_AH10", in_pd), /* RX DAT0 */
  385. DB8500_PIN_HOG("GPIO221_AJ11", out_lo), /* RX RDY0 */
  386. DB8500_PIN_HOG("GPIO222_AJ9", out_lo), /* TX FLA0 */
  387. DB8500_PIN_HOG("GPIO223_AH9", out_lo), /* TX DAT0 */
  388. DB8500_PIN_HOG("GPIO224_AG9", in_pd), /* TX RDY0 */
  389. DB8500_PIN_HOG("GPIO225_AG8", in_pd), /* CAWAKE0 */
  390. DB8500_PIN_HOG("GPIO226_AF8", out_hi), /* ACWAKE0 */
  391. };
  392. static struct pinctrl_map __initdata u8500_pinmap[] = {
  393. DB8500_PIN_HOG("GPIO226_AF8", gpio_out_lo), /* WLAN_PMU_EN */
  394. DB8500_PIN_HOG("GPIO4_AH6", gpio_in_pu), /* WLAN_IRQ */
  395. };
  396. static struct pinctrl_map __initdata snowball_pinmap[] = {
  397. /* Mux in SSP0 connected to AB8500, pull down RXD pin */
  398. DB8500_MUX_HOG("ssp0_a_1", "ssp0"),
  399. DB8500_PIN_HOG("GPIO145_C13", pd),
  400. /* Always drive the MC0 DAT31DIR line high on these boards */
  401. DB8500_PIN_HOG("GPIO21_AB3", out_hi),
  402. /* Mux in "SM" which is used for the SMSC911x Ethernet adapter */
  403. DB8500_MUX_HOG("sm_b_1", "sm"),
  404. /* Drive RSTn_LAN high */
  405. DB8500_PIN_HOG("GPIO141_C12", gpio_out_hi),
  406. /* Accelerometer/Magnetometer */
  407. DB8500_PIN_HOG("GPIO163_C20", gpio_in_pu), /* ACCEL_IRQ1 */
  408. DB8500_PIN_HOG("GPIO164_B21", gpio_in_pu), /* ACCEL_IRQ2 */
  409. DB8500_PIN_HOG("GPIO165_C21", gpio_in_pu), /* MAG_DRDY */
  410. /* WLAN/GBF */
  411. DB8500_PIN_HOG("GPIO161_D21", gpio_out_lo), /* WLAN_PMU_EN */
  412. DB8500_PIN_HOG("GPIO171_D23", gpio_out_hi), /* GBF_ENA */
  413. DB8500_PIN_HOG("GPIO215_AH13", gpio_out_lo), /* WLAN_ENA */
  414. DB8500_PIN_HOG("GPIO216_AG12", gpio_in_pu), /* WLAN_IRQ */
  415. };
  416. /*
  417. * passing "pinsfor=" in kernel cmdline allows for custom
  418. * configuration of GPIOs on u8500 derived boards.
  419. */
  420. static int __init early_pinsfor(char *p)
  421. {
  422. pinsfor = PINS_FOR_DEFAULT;
  423. if (strcmp(p, "u9500-21") == 0)
  424. pinsfor = PINS_FOR_U9500;
  425. return 0;
  426. }
  427. early_param("pinsfor", early_pinsfor);
  428. int pins_for_u9500(void)
  429. {
  430. if (pinsfor == PINS_FOR_U9500)
  431. return 1;
  432. return 0;
  433. }
  434. static void __init mop500_href_family_pinmaps_init(void)
  435. {
  436. switch (pinsfor) {
  437. case PINS_FOR_U9500:
  438. pinctrl_register_mappings(u9500_pinmap,
  439. ARRAY_SIZE(u9500_pinmap));
  440. break;
  441. case PINS_FOR_DEFAULT:
  442. pinctrl_register_mappings(u8500_pinmap,
  443. ARRAY_SIZE(u8500_pinmap));
  444. default:
  445. break;
  446. }
  447. }
  448. void __init mop500_pinmaps_init(void)
  449. {
  450. pinctrl_register_mappings(mop500_family_pinmap,
  451. ARRAY_SIZE(mop500_family_pinmap));
  452. pinctrl_register_mappings(mop500_pinmap,
  453. ARRAY_SIZE(mop500_pinmap));
  454. mop500_href_family_pinmaps_init();
  455. }
  456. void __init snowball_pinmaps_init(void)
  457. {
  458. pinctrl_register_mappings(mop500_family_pinmap,
  459. ARRAY_SIZE(mop500_family_pinmap));
  460. pinctrl_register_mappings(snowball_pinmap,
  461. ARRAY_SIZE(snowball_pinmap));
  462. pinctrl_register_mappings(u8500_pinmap,
  463. ARRAY_SIZE(u8500_pinmap));
  464. }
  465. void __init hrefv60_pinmaps_init(void)
  466. {
  467. pinctrl_register_mappings(mop500_family_pinmap,
  468. ARRAY_SIZE(mop500_family_pinmap));
  469. pinctrl_register_mappings(hrefv60_pinmap,
  470. ARRAY_SIZE(hrefv60_pinmap));
  471. mop500_href_family_pinmaps_init();
  472. }