hugetlbpage.c 19 KB

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  1. /*
  2. * PPC64 (POWER4) Huge TLB Page Support for Kernel.
  3. *
  4. * Copyright (C) 2003 David Gibson, IBM Corporation.
  5. *
  6. * Based on the IA-32 version:
  7. * Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/fs.h>
  11. #include <linux/mm.h>
  12. #include <linux/hugetlb.h>
  13. #include <linux/pagemap.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/sysctl.h>
  17. #include <asm/mman.h>
  18. #include <asm/pgalloc.h>
  19. #include <asm/tlb.h>
  20. #include <asm/tlbflush.h>
  21. #include <asm/mmu_context.h>
  22. #include <asm/machdep.h>
  23. #include <asm/cputable.h>
  24. #include <asm/spu.h>
  25. #define PAGE_SHIFT_64K 16
  26. #define PAGE_SHIFT_16M 24
  27. #define PAGE_SHIFT_16G 34
  28. #define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT)
  29. #define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
  30. #define MAX_NUMBER_GPAGES 1024
  31. /* Tracks the 16G pages after the device tree is scanned and before the
  32. * huge_boot_pages list is ready. */
  33. static unsigned long gpage_freearray[MAX_NUMBER_GPAGES];
  34. static unsigned nr_gpages;
  35. /* Array of valid huge page sizes - non-zero value(hugepte_shift) is
  36. * stored for the huge page sizes that are valid.
  37. */
  38. unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */
  39. #define hugepte_shift mmu_huge_psizes
  40. #define HUGEPTE_INDEX_SIZE(psize) (mmu_huge_psizes[(psize)])
  41. #define PTRS_PER_HUGEPTE(psize) (1 << mmu_huge_psizes[psize])
  42. #define HUGEPD_SHIFT(psize) (mmu_psize_to_shift(psize) \
  43. + HUGEPTE_INDEX_SIZE(psize))
  44. #define HUGEPD_SIZE(psize) (1UL << HUGEPD_SHIFT(psize))
  45. #define HUGEPD_MASK(psize) (~(HUGEPD_SIZE(psize)-1))
  46. /* Flag to mark huge PD pointers. This means pmd_bad() and pud_bad()
  47. * will choke on pointers to hugepte tables, which is handy for
  48. * catching screwups early. */
  49. #define HUGEPD_OK 0x1
  50. typedef struct { unsigned long pd; } hugepd_t;
  51. #define hugepd_none(hpd) ((hpd).pd == 0)
  52. static inline int shift_to_mmu_psize(unsigned int shift)
  53. {
  54. switch (shift) {
  55. #ifndef CONFIG_PPC_64K_PAGES
  56. case PAGE_SHIFT_64K:
  57. return MMU_PAGE_64K;
  58. #endif
  59. case PAGE_SHIFT_16M:
  60. return MMU_PAGE_16M;
  61. case PAGE_SHIFT_16G:
  62. return MMU_PAGE_16G;
  63. }
  64. return -1;
  65. }
  66. static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
  67. {
  68. if (mmu_psize_defs[mmu_psize].shift)
  69. return mmu_psize_defs[mmu_psize].shift;
  70. BUG();
  71. }
  72. static inline pte_t *hugepd_page(hugepd_t hpd)
  73. {
  74. BUG_ON(!(hpd.pd & HUGEPD_OK));
  75. return (pte_t *)(hpd.pd & ~HUGEPD_OK);
  76. }
  77. static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
  78. struct hstate *hstate)
  79. {
  80. unsigned int shift = huge_page_shift(hstate);
  81. int psize = shift_to_mmu_psize(shift);
  82. unsigned long idx = ((addr >> shift) & (PTRS_PER_HUGEPTE(psize)-1));
  83. pte_t *dir = hugepd_page(*hpdp);
  84. return dir + idx;
  85. }
  86. static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
  87. unsigned long address, unsigned int psize)
  88. {
  89. pte_t *new = kmem_cache_zalloc(PGT_CACHE(hugepte_shift[psize]),
  90. GFP_KERNEL|__GFP_REPEAT);
  91. if (! new)
  92. return -ENOMEM;
  93. spin_lock(&mm->page_table_lock);
  94. if (!hugepd_none(*hpdp))
  95. kmem_cache_free(PGT_CACHE(hugepte_shift[psize]), new);
  96. else
  97. hpdp->pd = (unsigned long)new | HUGEPD_OK;
  98. spin_unlock(&mm->page_table_lock);
  99. return 0;
  100. }
  101. static pud_t *hpud_offset(pgd_t *pgd, unsigned long addr, struct hstate *hstate)
  102. {
  103. if (huge_page_shift(hstate) < PUD_SHIFT)
  104. return pud_offset(pgd, addr);
  105. else
  106. return (pud_t *) pgd;
  107. }
  108. static pud_t *hpud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long addr,
  109. struct hstate *hstate)
  110. {
  111. if (huge_page_shift(hstate) < PUD_SHIFT)
  112. return pud_alloc(mm, pgd, addr);
  113. else
  114. return (pud_t *) pgd;
  115. }
  116. static pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate)
  117. {
  118. if (huge_page_shift(hstate) < PMD_SHIFT)
  119. return pmd_offset(pud, addr);
  120. else
  121. return (pmd_t *) pud;
  122. }
  123. static pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr,
  124. struct hstate *hstate)
  125. {
  126. if (huge_page_shift(hstate) < PMD_SHIFT)
  127. return pmd_alloc(mm, pud, addr);
  128. else
  129. return (pmd_t *) pud;
  130. }
  131. /* Build list of addresses of gigantic pages. This function is used in early
  132. * boot before the buddy or bootmem allocator is setup.
  133. */
  134. void add_gpage(unsigned long addr, unsigned long page_size,
  135. unsigned long number_of_pages)
  136. {
  137. if (!addr)
  138. return;
  139. while (number_of_pages > 0) {
  140. gpage_freearray[nr_gpages] = addr;
  141. nr_gpages++;
  142. number_of_pages--;
  143. addr += page_size;
  144. }
  145. }
  146. /* Moves the gigantic page addresses from the temporary list to the
  147. * huge_boot_pages list.
  148. */
  149. int alloc_bootmem_huge_page(struct hstate *hstate)
  150. {
  151. struct huge_bootmem_page *m;
  152. if (nr_gpages == 0)
  153. return 0;
  154. m = phys_to_virt(gpage_freearray[--nr_gpages]);
  155. gpage_freearray[nr_gpages] = 0;
  156. list_add(&m->list, &huge_boot_pages);
  157. m->hstate = hstate;
  158. return 1;
  159. }
  160. /* Modelled after find_linux_pte() */
  161. pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
  162. {
  163. pgd_t *pg;
  164. pud_t *pu;
  165. pmd_t *pm;
  166. unsigned int psize;
  167. unsigned int shift;
  168. unsigned long sz;
  169. struct hstate *hstate;
  170. psize = get_slice_psize(mm, addr);
  171. shift = mmu_psize_to_shift(psize);
  172. sz = ((1UL) << shift);
  173. hstate = size_to_hstate(sz);
  174. addr &= hstate->mask;
  175. pg = pgd_offset(mm, addr);
  176. if (!pgd_none(*pg)) {
  177. pu = hpud_offset(pg, addr, hstate);
  178. if (!pud_none(*pu)) {
  179. pm = hpmd_offset(pu, addr, hstate);
  180. if (!pmd_none(*pm))
  181. return hugepte_offset((hugepd_t *)pm, addr,
  182. hstate);
  183. }
  184. }
  185. return NULL;
  186. }
  187. pte_t *huge_pte_alloc(struct mm_struct *mm,
  188. unsigned long addr, unsigned long sz)
  189. {
  190. pgd_t *pg;
  191. pud_t *pu;
  192. pmd_t *pm;
  193. hugepd_t *hpdp = NULL;
  194. struct hstate *hstate;
  195. unsigned int psize;
  196. hstate = size_to_hstate(sz);
  197. psize = get_slice_psize(mm, addr);
  198. BUG_ON(!mmu_huge_psizes[psize]);
  199. addr &= hstate->mask;
  200. pg = pgd_offset(mm, addr);
  201. pu = hpud_alloc(mm, pg, addr, hstate);
  202. if (pu) {
  203. pm = hpmd_alloc(mm, pu, addr, hstate);
  204. if (pm)
  205. hpdp = (hugepd_t *)pm;
  206. }
  207. if (! hpdp)
  208. return NULL;
  209. if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, psize))
  210. return NULL;
  211. return hugepte_offset(hpdp, addr, hstate);
  212. }
  213. int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
  214. {
  215. return 0;
  216. }
  217. static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp,
  218. unsigned int psize)
  219. {
  220. pte_t *hugepte = hugepd_page(*hpdp);
  221. hpdp->pd = 0;
  222. tlb->need_flush = 1;
  223. pgtable_free_tlb(tlb, hugepte, hugepte_shift[psize]);
  224. }
  225. static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
  226. unsigned long addr, unsigned long end,
  227. unsigned long floor, unsigned long ceiling,
  228. unsigned int psize)
  229. {
  230. pmd_t *pmd;
  231. unsigned long next;
  232. unsigned long start;
  233. start = addr;
  234. pmd = pmd_offset(pud, addr);
  235. do {
  236. next = pmd_addr_end(addr, end);
  237. if (pmd_none(*pmd))
  238. continue;
  239. free_hugepte_range(tlb, (hugepd_t *)pmd, psize);
  240. } while (pmd++, addr = next, addr != end);
  241. start &= PUD_MASK;
  242. if (start < floor)
  243. return;
  244. if (ceiling) {
  245. ceiling &= PUD_MASK;
  246. if (!ceiling)
  247. return;
  248. }
  249. if (end - 1 > ceiling - 1)
  250. return;
  251. pmd = pmd_offset(pud, start);
  252. pud_clear(pud);
  253. pmd_free_tlb(tlb, pmd, start);
  254. }
  255. static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
  256. unsigned long addr, unsigned long end,
  257. unsigned long floor, unsigned long ceiling)
  258. {
  259. pud_t *pud;
  260. unsigned long next;
  261. unsigned long start;
  262. unsigned int shift;
  263. unsigned int psize = get_slice_psize(tlb->mm, addr);
  264. shift = mmu_psize_to_shift(psize);
  265. start = addr;
  266. pud = pud_offset(pgd, addr);
  267. do {
  268. next = pud_addr_end(addr, end);
  269. if (shift < PMD_SHIFT) {
  270. if (pud_none_or_clear_bad(pud))
  271. continue;
  272. hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
  273. ceiling, psize);
  274. } else {
  275. if (pud_none(*pud))
  276. continue;
  277. free_hugepte_range(tlb, (hugepd_t *)pud, psize);
  278. }
  279. } while (pud++, addr = next, addr != end);
  280. start &= PGDIR_MASK;
  281. if (start < floor)
  282. return;
  283. if (ceiling) {
  284. ceiling &= PGDIR_MASK;
  285. if (!ceiling)
  286. return;
  287. }
  288. if (end - 1 > ceiling - 1)
  289. return;
  290. pud = pud_offset(pgd, start);
  291. pgd_clear(pgd);
  292. pud_free_tlb(tlb, pud, start);
  293. }
  294. /*
  295. * This function frees user-level page tables of a process.
  296. *
  297. * Must be called with pagetable lock held.
  298. */
  299. void hugetlb_free_pgd_range(struct mmu_gather *tlb,
  300. unsigned long addr, unsigned long end,
  301. unsigned long floor, unsigned long ceiling)
  302. {
  303. pgd_t *pgd;
  304. unsigned long next;
  305. unsigned long start;
  306. /*
  307. * Comments below take from the normal free_pgd_range(). They
  308. * apply here too. The tests against HUGEPD_MASK below are
  309. * essential, because we *don't* test for this at the bottom
  310. * level. Without them we'll attempt to free a hugepte table
  311. * when we unmap just part of it, even if there are other
  312. * active mappings using it.
  313. *
  314. * The next few lines have given us lots of grief...
  315. *
  316. * Why are we testing HUGEPD* at this top level? Because
  317. * often there will be no work to do at all, and we'd prefer
  318. * not to go all the way down to the bottom just to discover
  319. * that.
  320. *
  321. * Why all these "- 1"s? Because 0 represents both the bottom
  322. * of the address space and the top of it (using -1 for the
  323. * top wouldn't help much: the masks would do the wrong thing).
  324. * The rule is that addr 0 and floor 0 refer to the bottom of
  325. * the address space, but end 0 and ceiling 0 refer to the top
  326. * Comparisons need to use "end - 1" and "ceiling - 1" (though
  327. * that end 0 case should be mythical).
  328. *
  329. * Wherever addr is brought up or ceiling brought down, we
  330. * must be careful to reject "the opposite 0" before it
  331. * confuses the subsequent tests. But what about where end is
  332. * brought down by HUGEPD_SIZE below? no, end can't go down to
  333. * 0 there.
  334. *
  335. * Whereas we round start (addr) and ceiling down, by different
  336. * masks at different levels, in order to test whether a table
  337. * now has no other vmas using it, so can be freed, we don't
  338. * bother to round floor or end up - the tests don't need that.
  339. */
  340. unsigned int psize = get_slice_psize(tlb->mm, addr);
  341. addr &= HUGEPD_MASK(psize);
  342. if (addr < floor) {
  343. addr += HUGEPD_SIZE(psize);
  344. if (!addr)
  345. return;
  346. }
  347. if (ceiling) {
  348. ceiling &= HUGEPD_MASK(psize);
  349. if (!ceiling)
  350. return;
  351. }
  352. if (end - 1 > ceiling - 1)
  353. end -= HUGEPD_SIZE(psize);
  354. if (addr > end - 1)
  355. return;
  356. start = addr;
  357. pgd = pgd_offset(tlb->mm, addr);
  358. do {
  359. psize = get_slice_psize(tlb->mm, addr);
  360. BUG_ON(!mmu_huge_psizes[psize]);
  361. next = pgd_addr_end(addr, end);
  362. if (mmu_psize_to_shift(psize) < PUD_SHIFT) {
  363. if (pgd_none_or_clear_bad(pgd))
  364. continue;
  365. hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
  366. } else {
  367. if (pgd_none(*pgd))
  368. continue;
  369. free_hugepte_range(tlb, (hugepd_t *)pgd, psize);
  370. }
  371. } while (pgd++, addr = next, addr != end);
  372. }
  373. void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
  374. pte_t *ptep, pte_t pte)
  375. {
  376. if (pte_present(*ptep)) {
  377. /* We open-code pte_clear because we need to pass the right
  378. * argument to hpte_need_flush (huge / !huge). Might not be
  379. * necessary anymore if we make hpte_need_flush() get the
  380. * page size from the slices
  381. */
  382. pte_update(mm, addr, ptep, ~0UL, 1);
  383. }
  384. *ptep = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
  385. }
  386. pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
  387. pte_t *ptep)
  388. {
  389. unsigned long old = pte_update(mm, addr, ptep, ~0UL, 1);
  390. return __pte(old);
  391. }
  392. struct page *
  393. follow_huge_addr(struct mm_struct *mm, unsigned long address, int write)
  394. {
  395. pte_t *ptep;
  396. struct page *page;
  397. unsigned int mmu_psize = get_slice_psize(mm, address);
  398. /* Verify it is a huge page else bail. */
  399. if (!mmu_huge_psizes[mmu_psize])
  400. return ERR_PTR(-EINVAL);
  401. ptep = huge_pte_offset(mm, address);
  402. page = pte_page(*ptep);
  403. if (page) {
  404. unsigned int shift = mmu_psize_to_shift(mmu_psize);
  405. unsigned long sz = ((1UL) << shift);
  406. page += (address % sz) / PAGE_SIZE;
  407. }
  408. return page;
  409. }
  410. int pmd_huge(pmd_t pmd)
  411. {
  412. return 0;
  413. }
  414. int pud_huge(pud_t pud)
  415. {
  416. return 0;
  417. }
  418. struct page *
  419. follow_huge_pmd(struct mm_struct *mm, unsigned long address,
  420. pmd_t *pmd, int write)
  421. {
  422. BUG();
  423. return NULL;
  424. }
  425. unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
  426. unsigned long len, unsigned long pgoff,
  427. unsigned long flags)
  428. {
  429. struct hstate *hstate = hstate_file(file);
  430. int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
  431. if (!mmu_huge_psizes[mmu_psize])
  432. return -EINVAL;
  433. return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
  434. }
  435. unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
  436. {
  437. unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
  438. return 1UL << mmu_psize_to_shift(psize);
  439. }
  440. /*
  441. * Called by asm hashtable.S for doing lazy icache flush
  442. */
  443. static unsigned int hash_huge_page_do_lazy_icache(unsigned long rflags,
  444. pte_t pte, int trap, unsigned long sz)
  445. {
  446. struct page *page;
  447. int i;
  448. if (!pfn_valid(pte_pfn(pte)))
  449. return rflags;
  450. page = pte_page(pte);
  451. /* page is dirty */
  452. if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) {
  453. if (trap == 0x400) {
  454. for (i = 0; i < (sz / PAGE_SIZE); i++)
  455. __flush_dcache_icache(page_address(page+i));
  456. set_bit(PG_arch_1, &page->flags);
  457. } else {
  458. rflags |= HPTE_R_N;
  459. }
  460. }
  461. return rflags;
  462. }
  463. int hash_huge_page(struct mm_struct *mm, unsigned long access,
  464. unsigned long ea, unsigned long vsid, int local,
  465. unsigned long trap)
  466. {
  467. pte_t *ptep;
  468. unsigned long old_pte, new_pte;
  469. unsigned long va, rflags, pa, sz;
  470. long slot;
  471. int err = 1;
  472. int ssize = user_segment_size(ea);
  473. unsigned int mmu_psize;
  474. int shift;
  475. mmu_psize = get_slice_psize(mm, ea);
  476. if (!mmu_huge_psizes[mmu_psize])
  477. goto out;
  478. ptep = huge_pte_offset(mm, ea);
  479. /* Search the Linux page table for a match with va */
  480. va = hpt_va(ea, vsid, ssize);
  481. /*
  482. * If no pte found or not present, send the problem up to
  483. * do_page_fault
  484. */
  485. if (unlikely(!ptep || pte_none(*ptep)))
  486. goto out;
  487. /*
  488. * Check the user's access rights to the page. If access should be
  489. * prevented then send the problem up to do_page_fault.
  490. */
  491. if (unlikely(access & ~pte_val(*ptep)))
  492. goto out;
  493. /*
  494. * At this point, we have a pte (old_pte) which can be used to build
  495. * or update an HPTE. There are 2 cases:
  496. *
  497. * 1. There is a valid (present) pte with no associated HPTE (this is
  498. * the most common case)
  499. * 2. There is a valid (present) pte with an associated HPTE. The
  500. * current values of the pp bits in the HPTE prevent access
  501. * because we are doing software DIRTY bit management and the
  502. * page is currently not DIRTY.
  503. */
  504. do {
  505. old_pte = pte_val(*ptep);
  506. if (old_pte & _PAGE_BUSY)
  507. goto out;
  508. new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
  509. } while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
  510. old_pte, new_pte));
  511. rflags = 0x2 | (!(new_pte & _PAGE_RW));
  512. /* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */
  513. rflags |= ((new_pte & _PAGE_EXEC) ? 0 : HPTE_R_N);
  514. shift = mmu_psize_to_shift(mmu_psize);
  515. sz = ((1UL) << shift);
  516. if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
  517. /* No CPU has hugepages but lacks no execute, so we
  518. * don't need to worry about that case */
  519. rflags = hash_huge_page_do_lazy_icache(rflags, __pte(old_pte),
  520. trap, sz);
  521. /* Check if pte already has an hpte (case 2) */
  522. if (unlikely(old_pte & _PAGE_HASHPTE)) {
  523. /* There MIGHT be an HPTE for this pte */
  524. unsigned long hash, slot;
  525. hash = hpt_hash(va, shift, ssize);
  526. if (old_pte & _PAGE_F_SECOND)
  527. hash = ~hash;
  528. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  529. slot += (old_pte & _PAGE_F_GIX) >> 12;
  530. if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_psize,
  531. ssize, local) == -1)
  532. old_pte &= ~_PAGE_HPTEFLAGS;
  533. }
  534. if (likely(!(old_pte & _PAGE_HASHPTE))) {
  535. unsigned long hash = hpt_hash(va, shift, ssize);
  536. unsigned long hpte_group;
  537. pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
  538. repeat:
  539. hpte_group = ((hash & htab_hash_mask) *
  540. HPTES_PER_GROUP) & ~0x7UL;
  541. /* clear HPTE slot informations in new PTE */
  542. #ifdef CONFIG_PPC_64K_PAGES
  543. new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
  544. #else
  545. new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
  546. #endif
  547. /* Add in WIMG bits */
  548. rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
  549. _PAGE_COHERENT | _PAGE_GUARDED));
  550. /* Insert into the hash table, primary slot */
  551. slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
  552. mmu_psize, ssize);
  553. /* Primary is full, try the secondary */
  554. if (unlikely(slot == -1)) {
  555. hpte_group = ((~hash & htab_hash_mask) *
  556. HPTES_PER_GROUP) & ~0x7UL;
  557. slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags,
  558. HPTE_V_SECONDARY,
  559. mmu_psize, ssize);
  560. if (slot == -1) {
  561. if (mftb() & 0x1)
  562. hpte_group = ((hash & htab_hash_mask) *
  563. HPTES_PER_GROUP)&~0x7UL;
  564. ppc_md.hpte_remove(hpte_group);
  565. goto repeat;
  566. }
  567. }
  568. if (unlikely(slot == -2))
  569. panic("hash_huge_page: pte_insert failed\n");
  570. new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX);
  571. }
  572. /*
  573. * No need to use ldarx/stdcx here
  574. */
  575. *ptep = __pte(new_pte & ~_PAGE_BUSY);
  576. err = 0;
  577. out:
  578. return err;
  579. }
  580. static void __init set_huge_psize(int psize)
  581. {
  582. /* Check that it is a page size supported by the hardware and
  583. * that it fits within pagetable limits. */
  584. if (mmu_psize_defs[psize].shift &&
  585. mmu_psize_defs[psize].shift < SID_SHIFT_1T &&
  586. (mmu_psize_defs[psize].shift > MIN_HUGEPTE_SHIFT ||
  587. mmu_psize_defs[psize].shift == PAGE_SHIFT_64K ||
  588. mmu_psize_defs[psize].shift == PAGE_SHIFT_16G)) {
  589. /* Return if huge page size has already been setup or is the
  590. * same as the base page size. */
  591. if (mmu_huge_psizes[psize] ||
  592. mmu_psize_defs[psize].shift == PAGE_SHIFT)
  593. return;
  594. hugetlb_add_hstate(mmu_psize_defs[psize].shift - PAGE_SHIFT);
  595. switch (mmu_psize_defs[psize].shift) {
  596. case PAGE_SHIFT_64K:
  597. /* We only allow 64k hpages with 4k base page,
  598. * which was checked above, and always put them
  599. * at the PMD */
  600. hugepte_shift[psize] = PMD_SHIFT;
  601. break;
  602. case PAGE_SHIFT_16M:
  603. /* 16M pages can be at two different levels
  604. * of pagestables based on base page size */
  605. if (PAGE_SHIFT == PAGE_SHIFT_64K)
  606. hugepte_shift[psize] = PMD_SHIFT;
  607. else /* 4k base page */
  608. hugepte_shift[psize] = PUD_SHIFT;
  609. break;
  610. case PAGE_SHIFT_16G:
  611. /* 16G pages are always at PGD level */
  612. hugepte_shift[psize] = PGDIR_SHIFT;
  613. break;
  614. }
  615. hugepte_shift[psize] -= mmu_psize_defs[psize].shift;
  616. } else
  617. hugepte_shift[psize] = 0;
  618. }
  619. static int __init hugepage_setup_sz(char *str)
  620. {
  621. unsigned long long size;
  622. int mmu_psize;
  623. int shift;
  624. size = memparse(str, &str);
  625. shift = __ffs(size);
  626. mmu_psize = shift_to_mmu_psize(shift);
  627. if (mmu_psize >= 0 && mmu_psize_defs[mmu_psize].shift)
  628. set_huge_psize(mmu_psize);
  629. else
  630. printk(KERN_WARNING "Invalid huge page size specified(%llu)\n", size);
  631. return 1;
  632. }
  633. __setup("hugepagesz=", hugepage_setup_sz);
  634. static int __init hugetlbpage_init(void)
  635. {
  636. unsigned int psize;
  637. if (!cpu_has_feature(CPU_FTR_16M_PAGE))
  638. return -ENODEV;
  639. /* Add supported huge page sizes. Need to change
  640. * HUGE_MAX_HSTATE if the number of supported huge page sizes
  641. * changes.
  642. */
  643. set_huge_psize(MMU_PAGE_16M);
  644. set_huge_psize(MMU_PAGE_16G);
  645. /* Temporarily disable support for 64K huge pages when 64K SPU local
  646. * store support is enabled as the current implementation conflicts.
  647. */
  648. #ifndef CONFIG_SPU_FS_64K_LS
  649. set_huge_psize(MMU_PAGE_64K);
  650. #endif
  651. for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
  652. if (mmu_huge_psizes[psize]) {
  653. pgtable_cache_add(hugepte_shift[psize], NULL);
  654. if (!PGT_CACHE(hugepte_shift[psize]))
  655. panic("hugetlbpage_init(): could not create "
  656. "pgtable cache for %d bit pagesize\n",
  657. mmu_psize_to_shift(psize));
  658. }
  659. }
  660. return 0;
  661. }
  662. module_init(hugetlbpage_init);