board-da830-evm.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555
  1. /*
  2. * TI DA830/OMAP L137 EVM board
  3. *
  4. * Author: Mark A. Greer <mgreer@mvista.com>
  5. * Derived from: arch/arm/mach-davinci/board-dm644x-evm.c
  6. *
  7. * 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
  8. * the terms of the GNU General Public License version 2. This program
  9. * is licensed "as is" without any warranty of any kind, whether express
  10. * or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/console.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/i2c.h>
  19. #include <linux/i2c/pcf857x.h>
  20. #include <linux/i2c/at24.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/partitions.h>
  23. #include <asm/mach-types.h>
  24. #include <asm/mach/arch.h>
  25. #include <mach/cp_intc.h>
  26. #include <mach/mux.h>
  27. #include <mach/nand.h>
  28. #include <mach/da8xx.h>
  29. #include <mach/usb.h>
  30. #define DA830_EVM_PHY_MASK 0x0
  31. #define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
  32. #define DA830_EMIF25_ASYNC_DATA_CE3_BASE 0x62000000
  33. #define DA830_EMIF25_CONTROL_BASE 0x68000000
  34. static struct at24_platform_data da830_evm_i2c_eeprom_info = {
  35. .byte_len = SZ_256K / 8,
  36. .page_size = 64,
  37. .flags = AT24_FLAG_ADDR16,
  38. .setup = davinci_get_mac_addr,
  39. .context = (void *)0x7f00,
  40. };
  41. static int da830_evm_ui_expander_setup(struct i2c_client *client, int gpio,
  42. unsigned ngpio, void *context)
  43. {
  44. gpio_request(gpio + 6, "MUX_MODE");
  45. #ifdef CONFIG_DA830_UI_LCD
  46. gpio_direction_output(gpio + 6, 0);
  47. #else /* Must be NAND or NOR */
  48. gpio_direction_output(gpio + 6, 1);
  49. #endif
  50. return 0;
  51. }
  52. static int da830_evm_ui_expander_teardown(struct i2c_client *client, int gpio,
  53. unsigned ngpio, void *context)
  54. {
  55. gpio_free(gpio + 6);
  56. return 0;
  57. }
  58. static struct pcf857x_platform_data da830_evm_ui_expander_info = {
  59. .gpio_base = DAVINCI_N_GPIO,
  60. .setup = da830_evm_ui_expander_setup,
  61. .teardown = da830_evm_ui_expander_teardown,
  62. };
  63. static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
  64. {
  65. I2C_BOARD_INFO("24c256", 0x50),
  66. .platform_data = &da830_evm_i2c_eeprom_info,
  67. },
  68. {
  69. I2C_BOARD_INFO("tlv320aic3x", 0x18),
  70. },
  71. {
  72. I2C_BOARD_INFO("pcf8574", 0x3f),
  73. .platform_data = &da830_evm_ui_expander_info,
  74. },
  75. };
  76. static struct davinci_i2c_platform_data da830_evm_i2c_0_pdata = {
  77. .bus_freq = 100, /* kHz */
  78. .bus_delay = 0, /* usec */
  79. };
  80. /*
  81. * USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
  82. */
  83. #define ON_BD_USB_DRV GPIO_TO_PIN(1, 15)
  84. #define ON_BD_USB_OVC GPIO_TO_PIN(2, 4)
  85. static const short da830_evm_usb11_pins[] = {
  86. DA830_GPIO1_15, DA830_GPIO2_4,
  87. -1
  88. };
  89. static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
  90. static int da830_evm_usb_set_power(unsigned port, int on)
  91. {
  92. gpio_set_value(ON_BD_USB_DRV, on);
  93. return 0;
  94. }
  95. static int da830_evm_usb_get_power(unsigned port)
  96. {
  97. return gpio_get_value(ON_BD_USB_DRV);
  98. }
  99. static int da830_evm_usb_get_oci(unsigned port)
  100. {
  101. return !gpio_get_value(ON_BD_USB_OVC);
  102. }
  103. static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
  104. static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
  105. {
  106. int irq = gpio_to_irq(ON_BD_USB_OVC);
  107. int error = 0;
  108. if (handler != NULL) {
  109. da830_evm_usb_ocic_handler = handler;
  110. error = request_irq(irq, da830_evm_usb_ocic_irq, IRQF_DISABLED |
  111. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  112. "OHCI over-current indicator", NULL);
  113. if (error)
  114. printk(KERN_ERR "%s: could not request IRQ to watch "
  115. "over-current indicator changes\n", __func__);
  116. } else
  117. free_irq(irq, NULL);
  118. return error;
  119. }
  120. static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
  121. .set_power = da830_evm_usb_set_power,
  122. .get_power = da830_evm_usb_get_power,
  123. .get_oci = da830_evm_usb_get_oci,
  124. .ocic_notify = da830_evm_usb_ocic_notify,
  125. /* TPS2065 switch @ 5V */
  126. .potpgt = (3 + 1) / 2, /* 3 ms max */
  127. };
  128. static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
  129. {
  130. da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
  131. return IRQ_HANDLED;
  132. }
  133. static __init void da830_evm_usb_init(void)
  134. {
  135. u32 cfgchip2;
  136. int ret;
  137. /*
  138. * Set up USB clock/mode in the CFGCHIP2 register.
  139. * FYI: CFGCHIP2 is 0x0000ef00 initially.
  140. */
  141. cfgchip2 = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
  142. /* USB2.0 PHY reference clock is 24 MHz */
  143. cfgchip2 &= ~CFGCHIP2_REFFREQ;
  144. cfgchip2 |= CFGCHIP2_REFFREQ_24MHZ;
  145. /*
  146. * Select internal reference clock for USB 2.0 PHY
  147. * and use it as a clock source for USB 1.1 PHY
  148. * (this is the default setting anyway).
  149. */
  150. cfgchip2 &= ~CFGCHIP2_USB1PHYCLKMUX;
  151. cfgchip2 |= CFGCHIP2_USB2PHYCLKMUX;
  152. /*
  153. * We have to override VBUS/ID signals when MUSB is configured into the
  154. * host-only mode -- ID pin will float if no cable is connected, so the
  155. * controller won't be able to drive VBUS thinking that it's a B-device.
  156. * Otherwise, we want to use the OTG mode and enable VBUS comparators.
  157. */
  158. cfgchip2 &= ~CFGCHIP2_OTGMODE;
  159. #ifdef CONFIG_USB_MUSB_HOST
  160. cfgchip2 |= CFGCHIP2_FORCE_HOST;
  161. #else
  162. cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN;
  163. #endif
  164. __raw_writel(cfgchip2, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG));
  165. /* USB_REFCLKIN is not used. */
  166. ret = davinci_cfg_reg(DA830_USB0_DRVVBUS);
  167. if (ret)
  168. pr_warning("%s: USB 2.0 PinMux setup failed: %d\n",
  169. __func__, ret);
  170. else {
  171. /*
  172. * TPS2065 switch @ 5V supplies 1 A (sustains 1.5 A),
  173. * with the power on to power good time of 3 ms.
  174. */
  175. ret = da8xx_register_usb20(1000, 3);
  176. if (ret)
  177. pr_warning("%s: USB 2.0 registration failed: %d\n",
  178. __func__, ret);
  179. }
  180. ret = da8xx_pinmux_setup(da830_evm_usb11_pins);
  181. if (ret) {
  182. pr_warning("%s: USB 1.1 PinMux setup failed: %d\n",
  183. __func__, ret);
  184. return;
  185. }
  186. ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
  187. if (ret) {
  188. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  189. "power control: %d\n", __func__, ret);
  190. return;
  191. }
  192. gpio_direction_output(ON_BD_USB_DRV, 0);
  193. ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
  194. if (ret) {
  195. printk(KERN_ERR "%s: failed to request GPIO for USB 1.1 port "
  196. "over-current indicator: %d\n", __func__, ret);
  197. return;
  198. }
  199. gpio_direction_input(ON_BD_USB_OVC);
  200. ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
  201. if (ret)
  202. pr_warning("%s: USB 1.1 registration failed: %d\n",
  203. __func__, ret);
  204. }
  205. static struct davinci_uart_config da830_evm_uart_config __initdata = {
  206. .enabled_uarts = 0x7,
  207. };
  208. static const short da830_evm_mcasp1_pins[] = {
  209. DA830_AHCLKX1, DA830_ACLKX1, DA830_AFSX1, DA830_AHCLKR1, DA830_AFSR1,
  210. DA830_AMUTE1, DA830_AXR1_0, DA830_AXR1_1, DA830_AXR1_2, DA830_AXR1_5,
  211. DA830_ACLKR1, DA830_AXR1_6, DA830_AXR1_7, DA830_AXR1_8, DA830_AXR1_10,
  212. DA830_AXR1_11,
  213. -1
  214. };
  215. static u8 da830_iis_serializer_direction[] = {
  216. RX_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  217. INACTIVE_MODE, TX_MODE, INACTIVE_MODE, INACTIVE_MODE,
  218. INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE, INACTIVE_MODE,
  219. };
  220. static struct snd_platform_data da830_evm_snd_data = {
  221. .tx_dma_offset = 0x2000,
  222. .rx_dma_offset = 0x2000,
  223. .op_mode = DAVINCI_MCASP_IIS_MODE,
  224. .num_serializer = ARRAY_SIZE(da830_iis_serializer_direction),
  225. .tdm_slots = 2,
  226. .serial_dir = da830_iis_serializer_direction,
  227. .eventq_no = EVENTQ_0,
  228. .version = MCASP_VERSION_2,
  229. .txnumevt = 1,
  230. .rxnumevt = 1,
  231. };
  232. /*
  233. * GPIO2[1] is used as MMC_SD_WP and GPIO2[2] as MMC_SD_INS.
  234. */
  235. static const short da830_evm_mmc_sd_pins[] = {
  236. DA830_MMCSD_DAT_0, DA830_MMCSD_DAT_1, DA830_MMCSD_DAT_2,
  237. DA830_MMCSD_DAT_3, DA830_MMCSD_DAT_4, DA830_MMCSD_DAT_5,
  238. DA830_MMCSD_DAT_6, DA830_MMCSD_DAT_7, DA830_MMCSD_CLK,
  239. DA830_MMCSD_CMD, DA830_GPIO2_1, DA830_GPIO2_2,
  240. -1
  241. };
  242. #define DA830_MMCSD_WP_PIN GPIO_TO_PIN(2, 1)
  243. static int da830_evm_mmc_get_ro(int index)
  244. {
  245. return gpio_get_value(DA830_MMCSD_WP_PIN);
  246. }
  247. static struct davinci_mmc_config da830_evm_mmc_config = {
  248. .get_ro = da830_evm_mmc_get_ro,
  249. .wires = 4,
  250. .version = MMC_CTLR_VERSION_2,
  251. };
  252. static inline void da830_evm_init_mmc(void)
  253. {
  254. int ret;
  255. ret = da8xx_pinmux_setup(da830_evm_mmc_sd_pins);
  256. if (ret) {
  257. pr_warning("da830_evm_init: mmc/sd mux setup failed: %d\n",
  258. ret);
  259. return;
  260. }
  261. ret = gpio_request(DA830_MMCSD_WP_PIN, "MMC WP");
  262. if (ret) {
  263. pr_warning("da830_evm_init: can not open GPIO %d\n",
  264. DA830_MMCSD_WP_PIN);
  265. return;
  266. }
  267. gpio_direction_input(DA830_MMCSD_WP_PIN);
  268. ret = da8xx_register_mmcsd0(&da830_evm_mmc_config);
  269. if (ret) {
  270. pr_warning("da830_evm_init: mmc/sd registration failed: %d\n",
  271. ret);
  272. gpio_free(DA830_MMCSD_WP_PIN);
  273. }
  274. }
  275. /*
  276. * UI board NAND/NOR flashes only use 8-bit data bus.
  277. */
  278. static const short da830_evm_emif25_pins[] = {
  279. DA830_EMA_D_0, DA830_EMA_D_1, DA830_EMA_D_2, DA830_EMA_D_3,
  280. DA830_EMA_D_4, DA830_EMA_D_5, DA830_EMA_D_6, DA830_EMA_D_7,
  281. DA830_EMA_A_0, DA830_EMA_A_1, DA830_EMA_A_2, DA830_EMA_A_3,
  282. DA830_EMA_A_4, DA830_EMA_A_5, DA830_EMA_A_6, DA830_EMA_A_7,
  283. DA830_EMA_A_8, DA830_EMA_A_9, DA830_EMA_A_10, DA830_EMA_A_11,
  284. DA830_EMA_A_12, DA830_EMA_BA_0, DA830_EMA_BA_1, DA830_NEMA_WE,
  285. DA830_NEMA_CS_2, DA830_NEMA_CS_3, DA830_NEMA_OE, DA830_EMA_WAIT_0,
  286. -1
  287. };
  288. #ifdef CONFIG_DA830_UI_NAND
  289. static struct mtd_partition da830_evm_nand_partitions[] = {
  290. /* bootloader (U-Boot, etc) in first sector */
  291. [0] = {
  292. .name = "bootloader",
  293. .offset = 0,
  294. .size = SZ_128K,
  295. .mask_flags = MTD_WRITEABLE, /* force read-only */
  296. },
  297. /* bootloader params in the next sector */
  298. [1] = {
  299. .name = "params",
  300. .offset = MTDPART_OFS_APPEND,
  301. .size = SZ_128K,
  302. .mask_flags = MTD_WRITEABLE, /* force read-only */
  303. },
  304. /* kernel */
  305. [2] = {
  306. .name = "kernel",
  307. .offset = MTDPART_OFS_APPEND,
  308. .size = SZ_2M,
  309. .mask_flags = 0,
  310. },
  311. /* file system */
  312. [3] = {
  313. .name = "filesystem",
  314. .offset = MTDPART_OFS_APPEND,
  315. .size = MTDPART_SIZ_FULL,
  316. .mask_flags = 0,
  317. }
  318. };
  319. /* flash bbt decriptors */
  320. static uint8_t da830_evm_nand_bbt_pattern[] = { 'B', 'b', 't', '0' };
  321. static uint8_t da830_evm_nand_mirror_pattern[] = { '1', 't', 'b', 'B' };
  322. static struct nand_bbt_descr da830_evm_nand_bbt_main_descr = {
  323. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  324. NAND_BBT_WRITE | NAND_BBT_2BIT |
  325. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  326. .offs = 2,
  327. .len = 4,
  328. .veroffs = 16,
  329. .maxblocks = 4,
  330. .pattern = da830_evm_nand_bbt_pattern
  331. };
  332. static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
  333. .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE |
  334. NAND_BBT_WRITE | NAND_BBT_2BIT |
  335. NAND_BBT_VERSION | NAND_BBT_PERCHIP,
  336. .offs = 2,
  337. .len = 4,
  338. .veroffs = 16,
  339. .maxblocks = 4,
  340. .pattern = da830_evm_nand_mirror_pattern
  341. };
  342. static struct davinci_nand_pdata da830_evm_nand_pdata = {
  343. .parts = da830_evm_nand_partitions,
  344. .nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
  345. .ecc_mode = NAND_ECC_HW,
  346. .ecc_bits = 4,
  347. .options = NAND_USE_FLASH_BBT,
  348. .bbt_td = &da830_evm_nand_bbt_main_descr,
  349. .bbt_md = &da830_evm_nand_bbt_mirror_descr,
  350. };
  351. static struct resource da830_evm_nand_resources[] = {
  352. [0] = { /* First memory resource is NAND I/O window */
  353. .start = DA830_EMIF25_ASYNC_DATA_CE3_BASE,
  354. .end = DA830_EMIF25_ASYNC_DATA_CE3_BASE + PAGE_SIZE - 1,
  355. .flags = IORESOURCE_MEM,
  356. },
  357. [1] = { /* Second memory resource is AEMIF control registers */
  358. .start = DA830_EMIF25_CONTROL_BASE,
  359. .end = DA830_EMIF25_CONTROL_BASE + SZ_32K - 1,
  360. .flags = IORESOURCE_MEM,
  361. },
  362. };
  363. static struct platform_device da830_evm_nand_device = {
  364. .name = "davinci_nand",
  365. .id = 1,
  366. .dev = {
  367. .platform_data = &da830_evm_nand_pdata,
  368. },
  369. .num_resources = ARRAY_SIZE(da830_evm_nand_resources),
  370. .resource = da830_evm_nand_resources,
  371. };
  372. static inline void da830_evm_init_nand(void)
  373. {
  374. int ret;
  375. ret = da8xx_pinmux_setup(da830_evm_emif25_pins);
  376. if (ret)
  377. pr_warning("da830_evm_init: emif25 mux setup failed: %d\n",
  378. ret);
  379. ret = platform_device_register(&da830_evm_nand_device);
  380. if (ret)
  381. pr_warning("da830_evm_init: NAND device not registered.\n");
  382. }
  383. #else
  384. static inline void da830_evm_init_nand(void) { }
  385. #endif
  386. #ifdef CONFIG_DA830_UI_LCD
  387. static inline void da830_evm_init_lcdc(void)
  388. {
  389. int ret;
  390. ret = da8xx_pinmux_setup(da830_lcdcntl_pins);
  391. if (ret)
  392. pr_warning("da830_evm_init: lcdcntl mux setup failed: %d\n",
  393. ret);
  394. ret = da8xx_register_lcdc(&sharp_lcd035q3dg01_pdata);
  395. if (ret)
  396. pr_warning("da830_evm_init: lcd setup failed: %d\n", ret);
  397. }
  398. #else
  399. static inline void da830_evm_init_lcdc(void) { }
  400. #endif
  401. static __init void da830_evm_init(void)
  402. {
  403. struct davinci_soc_info *soc_info = &davinci_soc_info;
  404. int ret;
  405. ret = da8xx_register_edma();
  406. if (ret)
  407. pr_warning("da830_evm_init: edma registration failed: %d\n",
  408. ret);
  409. ret = da8xx_pinmux_setup(da830_i2c0_pins);
  410. if (ret)
  411. pr_warning("da830_evm_init: i2c0 mux setup failed: %d\n",
  412. ret);
  413. ret = da8xx_register_i2c(0, &da830_evm_i2c_0_pdata);
  414. if (ret)
  415. pr_warning("da830_evm_init: i2c0 registration failed: %d\n",
  416. ret);
  417. da830_evm_usb_init();
  418. soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
  419. soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
  420. soc_info->emac_pdata->rmii_en = 1;
  421. ret = da8xx_pinmux_setup(da830_cpgmac_pins);
  422. if (ret)
  423. pr_warning("da830_evm_init: cpgmac mux setup failed: %d\n",
  424. ret);
  425. ret = da8xx_register_emac();
  426. if (ret)
  427. pr_warning("da830_evm_init: emac registration failed: %d\n",
  428. ret);
  429. ret = da8xx_register_watchdog();
  430. if (ret)
  431. pr_warning("da830_evm_init: watchdog registration failed: %d\n",
  432. ret);
  433. davinci_serial_init(&da830_evm_uart_config);
  434. i2c_register_board_info(1, da830_evm_i2c_devices,
  435. ARRAY_SIZE(da830_evm_i2c_devices));
  436. ret = da8xx_pinmux_setup(da830_evm_mcasp1_pins);
  437. if (ret)
  438. pr_warning("da830_evm_init: mcasp1 mux setup failed: %d\n",
  439. ret);
  440. da8xx_register_mcasp(1, &da830_evm_snd_data);
  441. da830_evm_init_mmc();
  442. da830_evm_init_lcdc();
  443. da830_evm_init_nand();
  444. ret = da8xx_register_rtc();
  445. if (ret)
  446. pr_warning("da830_evm_init: rtc setup failed: %d\n", ret);
  447. }
  448. #ifdef CONFIG_SERIAL_8250_CONSOLE
  449. static int __init da830_evm_console_init(void)
  450. {
  451. return add_preferred_console("ttyS", 2, "115200");
  452. }
  453. console_initcall(da830_evm_console_init);
  454. #endif
  455. static __init void da830_evm_irq_init(void)
  456. {
  457. struct davinci_soc_info *soc_info = &davinci_soc_info;
  458. cp_intc_init((void __iomem *)DA8XX_CP_INTC_VIRT, DA830_N_CP_INTC_IRQ,
  459. soc_info->intc_irq_prios);
  460. }
  461. static void __init da830_evm_map_io(void)
  462. {
  463. da830_init();
  464. }
  465. MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
  466. .phys_io = IO_PHYS,
  467. .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
  468. .boot_params = (DA8XX_DDR_BASE + 0x100),
  469. .map_io = da830_evm_map_io,
  470. .init_irq = da830_evm_irq_init,
  471. .timer = &davinci_timer,
  472. .init_machine = da830_evm_init,
  473. MACHINE_END