irq_vectors.h 4.5 KB

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  1. #ifndef _ASM_IRQ_VECTORS_H
  2. #define _ASM_IRQ_VECTORS_H
  3. #include <linux/threads.h>
  4. #define NMI_VECTOR 0x02
  5. /*
  6. * IDT vectors usable for external interrupt sources start
  7. * at 0x20:
  8. */
  9. #define FIRST_EXTERNAL_VECTOR 0x20
  10. #ifdef CONFIG_X86_32
  11. # define SYSCALL_VECTOR 0x80
  12. #else
  13. # define IA32_SYSCALL_VECTOR 0x80
  14. #endif
  15. /*
  16. * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
  17. * cleanup after irq migration on 64 bit.
  18. */
  19. #define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
  20. /*
  21. * Vectors 0x20-0x2f are used for ISA interrupts on 32 bit.
  22. * Vectors 0x30-0x3f are used for ISA interrupts on 64 bit.
  23. */
  24. #ifdef CONFIG_X86_32
  25. #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR)
  26. #else
  27. #define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
  28. #endif
  29. #define IRQ1_VECTOR (IRQ0_VECTOR + 1)
  30. #define IRQ2_VECTOR (IRQ0_VECTOR + 2)
  31. #define IRQ3_VECTOR (IRQ0_VECTOR + 3)
  32. #define IRQ4_VECTOR (IRQ0_VECTOR + 4)
  33. #define IRQ5_VECTOR (IRQ0_VECTOR + 5)
  34. #define IRQ6_VECTOR (IRQ0_VECTOR + 6)
  35. #define IRQ7_VECTOR (IRQ0_VECTOR + 7)
  36. #define IRQ8_VECTOR (IRQ0_VECTOR + 8)
  37. #define IRQ9_VECTOR (IRQ0_VECTOR + 9)
  38. #define IRQ10_VECTOR (IRQ0_VECTOR + 10)
  39. #define IRQ11_VECTOR (IRQ0_VECTOR + 11)
  40. #define IRQ12_VECTOR (IRQ0_VECTOR + 12)
  41. #define IRQ13_VECTOR (IRQ0_VECTOR + 13)
  42. #define IRQ14_VECTOR (IRQ0_VECTOR + 14)
  43. #define IRQ15_VECTOR (IRQ0_VECTOR + 15)
  44. /*
  45. * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
  46. *
  47. * some of the following vectors are 'rare', they are merged
  48. * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
  49. * TLB, reschedule and local APIC vectors are performance-critical.
  50. *
  51. * Vectors 0xf0-0xfa are free (reserved for future Linux use).
  52. */
  53. #ifdef CONFIG_X86_32
  54. # define SPURIOUS_APIC_VECTOR 0xff
  55. # define ERROR_APIC_VECTOR 0xfe
  56. # define INVALIDATE_TLB_VECTOR 0xfd
  57. # define RESCHEDULE_VECTOR 0xfc
  58. # define CALL_FUNCTION_VECTOR 0xfb
  59. # define THERMAL_APIC_VECTOR 0xf0
  60. #else
  61. #define SPURIOUS_APIC_VECTOR 0xff
  62. #define ERROR_APIC_VECTOR 0xfe
  63. #define RESCHEDULE_VECTOR 0xfd
  64. #define CALL_FUNCTION_VECTOR 0xfc
  65. #define THERMAL_APIC_VECTOR 0xfa
  66. #define THRESHOLD_APIC_VECTOR 0xf9
  67. #define INVALIDATE_TLB_VECTOR_END 0xf7
  68. #define INVALIDATE_TLB_VECTOR_START 0xf0 /* f0-f7 used for TLB flush */
  69. #define NUM_INVALIDATE_TLB_VECTORS 8
  70. #endif
  71. /*
  72. * Local APIC timer IRQ vector is on a different priority level,
  73. * to work around the 'lost local interrupt if more than 2 IRQ
  74. * sources per level' errata.
  75. */
  76. #define LOCAL_TIMER_VECTOR 0xef
  77. /*
  78. * First APIC vector available to drivers: (vectors 0x30-0xee) we
  79. * start at 0x31(0x41) to spread out vectors evenly between priority
  80. * levels. (0x80 is the syscall vector)
  81. */
  82. #ifdef CONFIG_X86_32
  83. # define FIRST_DEVICE_VECTOR 0x31
  84. #else
  85. # define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
  86. #endif
  87. #define NR_VECTORS 256
  88. #define FPU_IRQ 13
  89. #define FIRST_VM86_IRQ 3
  90. #define LAST_VM86_IRQ 15
  91. #define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
  92. #if !defined(CONFIG_X86_VOYAGER)
  93. # if defined(CONFIG_X86_IO_APIC) || defined(CONFIG_PARAVIRT) || defined(CONFIG_X86_VISWS)
  94. # define NR_IRQS 224
  95. # if (224 >= 32 * NR_CPUS)
  96. # define NR_IRQ_VECTORS NR_IRQS
  97. # else
  98. # define NR_IRQ_VECTORS (32 * NR_CPUS)
  99. # endif
  100. # else /* IO_APIC || PARAVIRT */
  101. # define NR_IRQS 16
  102. # define NR_IRQ_VECTORS NR_IRQS
  103. # endif
  104. #else /* !VISWS && !VOYAGER */
  105. # define NR_IRQS 224
  106. # define NR_IRQ_VECTORS NR_IRQS
  107. #endif /* VISWS */
  108. /* Voyager specific defines */
  109. /* These define the CPIs we use in linux */
  110. #define VIC_CPI_LEVEL0 0
  111. #define VIC_CPI_LEVEL1 1
  112. /* now the fake CPIs */
  113. #define VIC_TIMER_CPI 2
  114. #define VIC_INVALIDATE_CPI 3
  115. #define VIC_RESCHEDULE_CPI 4
  116. #define VIC_ENABLE_IRQ_CPI 5
  117. #define VIC_CALL_FUNCTION_CPI 6
  118. /* Now the QIC CPIs: Since we don't need the two initial levels,
  119. * these are 2 less than the VIC CPIs */
  120. #define QIC_CPI_OFFSET 1
  121. #define QIC_TIMER_CPI (VIC_TIMER_CPI - QIC_CPI_OFFSET)
  122. #define QIC_INVALIDATE_CPI (VIC_INVALIDATE_CPI - QIC_CPI_OFFSET)
  123. #define QIC_RESCHEDULE_CPI (VIC_RESCHEDULE_CPI - QIC_CPI_OFFSET)
  124. #define QIC_ENABLE_IRQ_CPI (VIC_ENABLE_IRQ_CPI - QIC_CPI_OFFSET)
  125. #define QIC_CALL_FUNCTION_CPI (VIC_CALL_FUNCTION_CPI - QIC_CPI_OFFSET)
  126. #define VIC_START_FAKE_CPI VIC_TIMER_CPI
  127. #define VIC_END_FAKE_CPI VIC_CALL_FUNCTION_CPI
  128. /* this is the SYS_INT CPI. */
  129. #define VIC_SYS_INT 8
  130. #define VIC_CMN_INT 15
  131. /* This is the boot CPI for alternate processors. It gets overwritten
  132. * by the above once the system has activated all available processors */
  133. #define VIC_CPU_BOOT_CPI VIC_CPI_LEVEL0
  134. #define VIC_CPU_BOOT_ERRATA_CPI (VIC_CPI_LEVEL0 + 8)
  135. #endif /* _ASM_IRQ_VECTORS_H */