via-pmu.c 75 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. *
  14. * THIS DRIVER IS BECOMING A TOTAL MESS !
  15. * - Cleanup atomically disabling reply to PMU events after
  16. * a sleep or a freq. switch
  17. * - Move sleep code out of here to pmac_pm, merge into new
  18. * common PM infrastructure
  19. * - Move backlight code out as well
  20. * - Save/Restore PCI space properly
  21. *
  22. */
  23. #include <stdarg.h>
  24. #include <linux/config.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/kernel.h>
  28. #include <linux/delay.h>
  29. #include <linux/sched.h>
  30. #include <linux/miscdevice.h>
  31. #include <linux/blkdev.h>
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include <linux/poll.h>
  35. #include <linux/adb.h>
  36. #include <linux/pmu.h>
  37. #include <linux/cuda.h>
  38. #include <linux/smp_lock.h>
  39. #include <linux/module.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/pm.h>
  42. #include <linux/proc_fs.h>
  43. #include <linux/init.h>
  44. #include <linux/interrupt.h>
  45. #include <linux/device.h>
  46. #include <linux/sysdev.h>
  47. #include <linux/suspend.h>
  48. #include <linux/syscalls.h>
  49. #include <linux/cpu.h>
  50. #include <asm/prom.h>
  51. #include <asm/machdep.h>
  52. #include <asm/io.h>
  53. #include <asm/pgtable.h>
  54. #include <asm/system.h>
  55. #include <asm/sections.h>
  56. #include <asm/irq.h>
  57. #include <asm/pmac_feature.h>
  58. #include <asm/uaccess.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/cputable.h>
  61. #include <asm/time.h>
  62. #ifdef CONFIG_PMAC_BACKLIGHT
  63. #include <asm/backlight.h>
  64. #endif
  65. #ifdef CONFIG_PPC32
  66. #include <asm/open_pic.h>
  67. #endif
  68. /* Some compile options */
  69. #undef SUSPEND_USES_PMU
  70. #define DEBUG_SLEEP
  71. #undef HACKED_PCI_SAVE
  72. /* Misc minor number allocated for /dev/pmu */
  73. #define PMU_MINOR 154
  74. /* How many iterations between battery polls */
  75. #define BATTERY_POLLING_COUNT 2
  76. static volatile unsigned char __iomem *via;
  77. /* VIA registers - spaced 0x200 bytes apart */
  78. #define RS 0x200 /* skip between registers */
  79. #define B 0 /* B-side data */
  80. #define A RS /* A-side data */
  81. #define DIRB (2*RS) /* B-side direction (1=output) */
  82. #define DIRA (3*RS) /* A-side direction (1=output) */
  83. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  84. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  85. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  86. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  87. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  88. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  89. #define SR (10*RS) /* Shift register */
  90. #define ACR (11*RS) /* Auxiliary control register */
  91. #define PCR (12*RS) /* Peripheral control register */
  92. #define IFR (13*RS) /* Interrupt flag register */
  93. #define IER (14*RS) /* Interrupt enable register */
  94. #define ANH (15*RS) /* A-side data, no handshake */
  95. /* Bits in B data register: both active low */
  96. #define TACK 0x08 /* Transfer acknowledge (input) */
  97. #define TREQ 0x10 /* Transfer request (output) */
  98. /* Bits in ACR */
  99. #define SR_CTRL 0x1c /* Shift register control bits */
  100. #define SR_EXT 0x0c /* Shift on external clock */
  101. #define SR_OUT 0x10 /* Shift out if 1 */
  102. /* Bits in IFR and IER */
  103. #define IER_SET 0x80 /* set bits in IER */
  104. #define IER_CLR 0 /* clear bits in IER */
  105. #define SR_INT 0x04 /* Shift register full/empty */
  106. #define CB2_INT 0x08
  107. #define CB1_INT 0x10 /* transition on CB1 input */
  108. static volatile enum pmu_state {
  109. idle,
  110. sending,
  111. intack,
  112. reading,
  113. reading_intr,
  114. locked,
  115. } pmu_state;
  116. static volatile enum int_data_state {
  117. int_data_empty,
  118. int_data_fill,
  119. int_data_ready,
  120. int_data_flush
  121. } int_data_state[2] = { int_data_empty, int_data_empty };
  122. static struct adb_request *current_req;
  123. static struct adb_request *last_req;
  124. static struct adb_request *req_awaiting_reply;
  125. static unsigned char interrupt_data[2][32];
  126. static int interrupt_data_len[2];
  127. static int int_data_last;
  128. static unsigned char *reply_ptr;
  129. static int data_index;
  130. static int data_len;
  131. static volatile int adb_int_pending;
  132. static volatile int disable_poll;
  133. static struct adb_request bright_req_1, bright_req_2;
  134. static struct device_node *vias;
  135. static int pmu_kind = PMU_UNKNOWN;
  136. static int pmu_fully_inited = 0;
  137. static int pmu_has_adb;
  138. static unsigned char __iomem *gpio_reg = NULL;
  139. static int gpio_irq = -1;
  140. static int gpio_irq_enabled = -1;
  141. static volatile int pmu_suspended = 0;
  142. static spinlock_t pmu_lock;
  143. static u8 pmu_intr_mask;
  144. static int pmu_version;
  145. static int drop_interrupts;
  146. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  147. static int option_lid_wakeup = 1;
  148. static int sleep_in_progress;
  149. #endif /* CONFIG_PM && CONFIG_PPC32 */
  150. static unsigned long async_req_locks;
  151. static unsigned int pmu_irq_stats[11];
  152. static struct proc_dir_entry *proc_pmu_root;
  153. static struct proc_dir_entry *proc_pmu_info;
  154. static struct proc_dir_entry *proc_pmu_irqstats;
  155. static struct proc_dir_entry *proc_pmu_options;
  156. static int option_server_mode;
  157. int pmu_battery_count;
  158. int pmu_cur_battery;
  159. unsigned int pmu_power_flags;
  160. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  161. static int query_batt_timer = BATTERY_POLLING_COUNT;
  162. static struct adb_request batt_req;
  163. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  164. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  165. extern int disable_kernel_backlight;
  166. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  167. int __fake_sleep;
  168. int asleep;
  169. struct notifier_block *sleep_notifier_list;
  170. #ifdef CONFIG_ADB
  171. static int adb_dev_map = 0;
  172. static int pmu_adb_flags;
  173. static int pmu_probe(void);
  174. static int pmu_init(void);
  175. static int pmu_send_request(struct adb_request *req, int sync);
  176. static int pmu_adb_autopoll(int devs);
  177. static int pmu_adb_reset_bus(void);
  178. #endif /* CONFIG_ADB */
  179. static int init_pmu(void);
  180. static int pmu_queue_request(struct adb_request *req);
  181. static void pmu_start(void);
  182. static irqreturn_t via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs);
  183. static irqreturn_t gpio1_interrupt(int irq, void *arg, struct pt_regs *regs);
  184. static int proc_get_info(char *page, char **start, off_t off,
  185. int count, int *eof, void *data);
  186. static int proc_get_irqstats(char *page, char **start, off_t off,
  187. int count, int *eof, void *data);
  188. #ifdef CONFIG_PMAC_BACKLIGHT
  189. static int pmu_set_backlight_level(int level, void* data);
  190. static int pmu_set_backlight_enable(int on, int level, void* data);
  191. #endif /* CONFIG_PMAC_BACKLIGHT */
  192. static void pmu_pass_intr(unsigned char *data, int len);
  193. static int proc_get_batt(char *page, char **start, off_t off,
  194. int count, int *eof, void *data);
  195. static int proc_read_options(char *page, char **start, off_t off,
  196. int count, int *eof, void *data);
  197. static int proc_write_options(struct file *file, const char __user *buffer,
  198. unsigned long count, void *data);
  199. #ifdef CONFIG_ADB
  200. struct adb_driver via_pmu_driver = {
  201. "PMU",
  202. pmu_probe,
  203. pmu_init,
  204. pmu_send_request,
  205. pmu_adb_autopoll,
  206. pmu_poll_adb,
  207. pmu_adb_reset_bus
  208. };
  209. #endif /* CONFIG_ADB */
  210. extern void low_sleep_handler(void);
  211. extern void enable_kernel_altivec(void);
  212. extern void enable_kernel_fp(void);
  213. #ifdef DEBUG_SLEEP
  214. int pmu_polled_request(struct adb_request *req);
  215. int pmu_wink(struct adb_request *req);
  216. #endif
  217. /*
  218. * This table indicates for each PMU opcode:
  219. * - the number of data bytes to be sent with the command, or -1
  220. * if a length byte should be sent,
  221. * - the number of response bytes which the PMU will return, or
  222. * -1 if it will send a length byte.
  223. */
  224. static const s8 pmu_data_len[256][2] = {
  225. /* 0 1 2 3 4 5 6 7 */
  226. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  227. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  228. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  229. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  230. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  231. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  232. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  233. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  234. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  235. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  236. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  237. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  238. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  239. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  240. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  241. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  242. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  243. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  244. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  245. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  246. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  247. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  248. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  249. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  250. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  251. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  252. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  253. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  254. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  255. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  256. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  257. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  258. };
  259. static char *pbook_type[] = {
  260. "Unknown PowerBook",
  261. "PowerBook 2400/3400/3500(G3)",
  262. "PowerBook G3 Series",
  263. "1999 PowerBook G3",
  264. "Core99"
  265. };
  266. #ifdef CONFIG_PMAC_BACKLIGHT
  267. static struct backlight_controller pmu_backlight_controller = {
  268. pmu_set_backlight_enable,
  269. pmu_set_backlight_level
  270. };
  271. #endif /* CONFIG_PMAC_BACKLIGHT */
  272. int
  273. find_via_pmu(void)
  274. {
  275. if (via != 0)
  276. return 1;
  277. vias = find_devices("via-pmu");
  278. if (vias == 0)
  279. return 0;
  280. if (vias->next != 0)
  281. printk(KERN_WARNING "Warning: only using 1st via-pmu\n");
  282. if (vias->n_addrs < 1 || vias->n_intrs < 1) {
  283. printk(KERN_ERR "via-pmu: %d addresses, %d interrupts!\n",
  284. vias->n_addrs, vias->n_intrs);
  285. if (vias->n_addrs < 1 || vias->n_intrs < 1)
  286. return 0;
  287. }
  288. spin_lock_init(&pmu_lock);
  289. pmu_has_adb = 1;
  290. pmu_intr_mask = PMU_INT_PCEJECT |
  291. PMU_INT_SNDBRT |
  292. PMU_INT_ADB |
  293. PMU_INT_TICK;
  294. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  295. || device_is_compatible(vias->parent, "ohare")))
  296. pmu_kind = PMU_OHARE_BASED;
  297. else if (device_is_compatible(vias->parent, "paddington"))
  298. pmu_kind = PMU_PADDINGTON_BASED;
  299. else if (device_is_compatible(vias->parent, "heathrow"))
  300. pmu_kind = PMU_HEATHROW_BASED;
  301. else if (device_is_compatible(vias->parent, "Keylargo")
  302. || device_is_compatible(vias->parent, "K2-Keylargo")) {
  303. struct device_node *gpio, *gpiop;
  304. pmu_kind = PMU_KEYLARGO_BASED;
  305. pmu_has_adb = (find_type_devices("adb") != NULL);
  306. pmu_intr_mask = PMU_INT_PCEJECT |
  307. PMU_INT_SNDBRT |
  308. PMU_INT_ADB |
  309. PMU_INT_TICK |
  310. PMU_INT_ENVIRONMENT;
  311. gpiop = find_devices("gpio");
  312. if (gpiop && gpiop->n_addrs) {
  313. gpio_reg = ioremap(gpiop->addrs->address, 0x10);
  314. gpio = find_devices("extint-gpio1");
  315. if (gpio == NULL)
  316. gpio = find_devices("pmu-interrupt");
  317. if (gpio && gpio->parent == gpiop && gpio->n_intrs)
  318. gpio_irq = gpio->intrs[0].line;
  319. }
  320. } else
  321. pmu_kind = PMU_UNKNOWN;
  322. via = ioremap(vias->addrs->address, 0x2000);
  323. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  324. out_8(&via[IFR], 0x7f); /* clear IFR */
  325. pmu_state = idle;
  326. if (!init_pmu()) {
  327. via = NULL;
  328. return 0;
  329. }
  330. printk(KERN_INFO "PMU driver %d initialized for %s, firmware: %02x\n",
  331. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  332. sys_ctrler = SYS_CTRLER_PMU;
  333. return 1;
  334. }
  335. #ifdef CONFIG_ADB
  336. static int
  337. pmu_probe(void)
  338. {
  339. return vias == NULL? -ENODEV: 0;
  340. }
  341. static int __init
  342. pmu_init(void)
  343. {
  344. if (vias == NULL)
  345. return -ENODEV;
  346. return 0;
  347. }
  348. #endif /* CONFIG_ADB */
  349. /*
  350. * We can't wait until pmu_init gets called, that happens too late.
  351. * It happens after IDE and SCSI initialization, which can take a few
  352. * seconds, and by that time the PMU could have given up on us and
  353. * turned us off.
  354. * Thus this is called with arch_initcall rather than device_initcall.
  355. */
  356. static int __init via_pmu_start(void)
  357. {
  358. if (vias == NULL)
  359. return -ENODEV;
  360. bright_req_1.complete = 1;
  361. bright_req_2.complete = 1;
  362. batt_req.complete = 1;
  363. #if defined(CONFIG_PPC32) && !defined(CONFIG_PPC_MERGE)
  364. if (pmu_kind == PMU_KEYLARGO_BASED)
  365. openpic_set_irq_priority(vias->intrs[0].line,
  366. OPENPIC_PRIORITY_DEFAULT + 1);
  367. #endif
  368. if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
  369. (void *)0)) {
  370. printk(KERN_ERR "VIA-PMU: can't get irq %d\n",
  371. vias->intrs[0].line);
  372. return -EAGAIN;
  373. }
  374. if (pmu_kind == PMU_KEYLARGO_BASED && gpio_irq != -1) {
  375. if (request_irq(gpio_irq, gpio1_interrupt, 0, "GPIO1 ADB", (void *)0))
  376. printk(KERN_ERR "pmu: can't get irq %d (GPIO1)\n", gpio_irq);
  377. gpio_irq_enabled = 1;
  378. }
  379. /* Enable interrupts */
  380. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  381. pmu_fully_inited = 1;
  382. /* Make sure PMU settle down before continuing. This is _very_ important
  383. * since the IDE probe may shut interrupts down for quite a bit of time. If
  384. * a PMU communication is pending while this happens, the PMU may timeout
  385. * Not that on Core99 machines, the PMU keeps sending us environement
  386. * messages, we should find a way to either fix IDE or make it call
  387. * pmu_suspend() before masking interrupts. This can also happens while
  388. * scolling with some fbdevs.
  389. */
  390. do {
  391. pmu_poll();
  392. } while (pmu_state != idle);
  393. return 0;
  394. }
  395. arch_initcall(via_pmu_start);
  396. /*
  397. * This has to be done after pci_init, which is a subsys_initcall.
  398. */
  399. static int __init via_pmu_dev_init(void)
  400. {
  401. if (vias == NULL)
  402. return -ENODEV;
  403. #ifndef CONFIG_PPC64
  404. request_OF_resource(vias, 0, NULL);
  405. #endif
  406. #ifdef CONFIG_PMAC_BACKLIGHT
  407. /* Enable backlight */
  408. register_backlight_controller(&pmu_backlight_controller, NULL, "pmu");
  409. #endif /* CONFIG_PMAC_BACKLIGHT */
  410. #ifdef CONFIG_PPC32
  411. if (machine_is_compatible("AAPL,3400/2400") ||
  412. machine_is_compatible("AAPL,3500")) {
  413. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  414. NULL, PMAC_MB_INFO_MODEL, 0);
  415. pmu_battery_count = 1;
  416. if (mb == PMAC_TYPE_COMET)
  417. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  418. else
  419. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  420. } else if (machine_is_compatible("AAPL,PowerBook1998") ||
  421. machine_is_compatible("PowerBook1,1")) {
  422. pmu_battery_count = 2;
  423. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  424. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  425. } else {
  426. struct device_node* prim = find_devices("power-mgt");
  427. u32 *prim_info = NULL;
  428. if (prim)
  429. prim_info = (u32 *)get_property(prim, "prim-info", NULL);
  430. if (prim_info) {
  431. /* Other stuffs here yet unknown */
  432. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  433. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  434. if (pmu_battery_count > 1)
  435. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  436. }
  437. }
  438. #endif /* CONFIG_PPC32 */
  439. /* Create /proc/pmu */
  440. proc_pmu_root = proc_mkdir("pmu", NULL);
  441. if (proc_pmu_root) {
  442. long i;
  443. for (i=0; i<pmu_battery_count; i++) {
  444. char title[16];
  445. sprintf(title, "battery_%ld", i);
  446. proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
  447. proc_get_batt, (void *)i);
  448. }
  449. proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
  450. proc_get_info, NULL);
  451. proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root,
  452. proc_get_irqstats, NULL);
  453. proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
  454. if (proc_pmu_options) {
  455. proc_pmu_options->nlink = 1;
  456. proc_pmu_options->read_proc = proc_read_options;
  457. proc_pmu_options->write_proc = proc_write_options;
  458. }
  459. }
  460. return 0;
  461. }
  462. device_initcall(via_pmu_dev_init);
  463. static int
  464. init_pmu(void)
  465. {
  466. int timeout;
  467. struct adb_request req;
  468. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  469. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  470. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  471. timeout = 100000;
  472. while (!req.complete) {
  473. if (--timeout < 0) {
  474. printk(KERN_ERR "init_pmu: no response from PMU\n");
  475. return 0;
  476. }
  477. udelay(10);
  478. pmu_poll();
  479. }
  480. /* ack all pending interrupts */
  481. timeout = 100000;
  482. interrupt_data[0][0] = 1;
  483. while (interrupt_data[0][0] || pmu_state != idle) {
  484. if (--timeout < 0) {
  485. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  486. return 0;
  487. }
  488. if (pmu_state == idle)
  489. adb_int_pending = 1;
  490. via_pmu_interrupt(0, NULL, NULL);
  491. udelay(10);
  492. }
  493. /* Tell PMU we are ready. */
  494. if (pmu_kind == PMU_KEYLARGO_BASED) {
  495. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  496. while (!req.complete)
  497. pmu_poll();
  498. }
  499. /* Read PMU version */
  500. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  501. pmu_wait_complete(&req);
  502. if (req.reply_len > 0)
  503. pmu_version = req.reply[0];
  504. /* Read server mode setting */
  505. if (pmu_kind == PMU_KEYLARGO_BASED) {
  506. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  507. PMU_PWR_GET_POWERUP_EVENTS);
  508. pmu_wait_complete(&req);
  509. if (req.reply_len == 2) {
  510. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  511. option_server_mode = 1;
  512. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  513. option_server_mode ? "enabled" : "disabled");
  514. }
  515. }
  516. return 1;
  517. }
  518. int
  519. pmu_get_model(void)
  520. {
  521. return pmu_kind;
  522. }
  523. static void pmu_set_server_mode(int server_mode)
  524. {
  525. struct adb_request req;
  526. if (pmu_kind != PMU_KEYLARGO_BASED)
  527. return;
  528. option_server_mode = server_mode;
  529. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  530. pmu_wait_complete(&req);
  531. if (req.reply_len < 2)
  532. return;
  533. if (server_mode)
  534. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  535. PMU_PWR_SET_POWERUP_EVENTS,
  536. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  537. else
  538. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  539. PMU_PWR_CLR_POWERUP_EVENTS,
  540. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  541. pmu_wait_complete(&req);
  542. }
  543. /* This new version of the code for 2400/3400/3500 powerbooks
  544. * is inspired from the implementation in gkrellm-pmu
  545. */
  546. static void
  547. done_battery_state_ohare(struct adb_request* req)
  548. {
  549. /* format:
  550. * [0] : flags
  551. * 0x01 : AC indicator
  552. * 0x02 : charging
  553. * 0x04 : battery exist
  554. * 0x08 :
  555. * 0x10 :
  556. * 0x20 : full charged
  557. * 0x40 : pcharge reset
  558. * 0x80 : battery exist
  559. *
  560. * [1][2] : battery voltage
  561. * [3] : CPU temperature
  562. * [4] : battery temperature
  563. * [5] : current
  564. * [6][7] : pcharge
  565. * --tkoba
  566. */
  567. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  568. long pcharge, charge, vb, vmax, lmax;
  569. long vmax_charging, vmax_charged;
  570. long amperage, voltage, time, max;
  571. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  572. NULL, PMAC_MB_INFO_MODEL, 0);
  573. if (req->reply[0] & 0x01)
  574. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  575. else
  576. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  577. if (mb == PMAC_TYPE_COMET) {
  578. vmax_charged = 189;
  579. vmax_charging = 213;
  580. lmax = 6500;
  581. } else {
  582. vmax_charged = 330;
  583. vmax_charging = 330;
  584. lmax = 6500;
  585. }
  586. vmax = vmax_charged;
  587. /* If battery installed */
  588. if (req->reply[0] & 0x04) {
  589. bat_flags |= PMU_BATT_PRESENT;
  590. if (req->reply[0] & 0x02)
  591. bat_flags |= PMU_BATT_CHARGING;
  592. vb = (req->reply[1] << 8) | req->reply[2];
  593. voltage = (vb * 265 + 72665) / 10;
  594. amperage = req->reply[5];
  595. if ((req->reply[0] & 0x01) == 0) {
  596. if (amperage > 200)
  597. vb += ((amperage - 200) * 15)/100;
  598. } else if (req->reply[0] & 0x02) {
  599. vb = (vb * 97) / 100;
  600. vmax = vmax_charging;
  601. }
  602. charge = (100 * vb) / vmax;
  603. if (req->reply[0] & 0x40) {
  604. pcharge = (req->reply[6] << 8) + req->reply[7];
  605. if (pcharge > lmax)
  606. pcharge = lmax;
  607. pcharge *= 100;
  608. pcharge = 100 - pcharge / lmax;
  609. if (pcharge < charge)
  610. charge = pcharge;
  611. }
  612. if (amperage > 0)
  613. time = (charge * 16440) / amperage;
  614. else
  615. time = 0;
  616. max = 100;
  617. amperage = -amperage;
  618. } else
  619. charge = max = amperage = voltage = time = 0;
  620. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  621. pmu_batteries[pmu_cur_battery].charge = charge;
  622. pmu_batteries[pmu_cur_battery].max_charge = max;
  623. pmu_batteries[pmu_cur_battery].amperage = amperage;
  624. pmu_batteries[pmu_cur_battery].voltage = voltage;
  625. pmu_batteries[pmu_cur_battery].time_remaining = time;
  626. clear_bit(0, &async_req_locks);
  627. }
  628. static void
  629. done_battery_state_smart(struct adb_request* req)
  630. {
  631. /* format:
  632. * [0] : format of this structure (known: 3,4,5)
  633. * [1] : flags
  634. *
  635. * format 3 & 4:
  636. *
  637. * [2] : charge
  638. * [3] : max charge
  639. * [4] : current
  640. * [5] : voltage
  641. *
  642. * format 5:
  643. *
  644. * [2][3] : charge
  645. * [4][5] : max charge
  646. * [6][7] : current
  647. * [8][9] : voltage
  648. */
  649. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  650. int amperage;
  651. unsigned int capa, max, voltage;
  652. if (req->reply[1] & 0x01)
  653. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  654. else
  655. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  656. capa = max = amperage = voltage = 0;
  657. if (req->reply[1] & 0x04) {
  658. bat_flags |= PMU_BATT_PRESENT;
  659. switch(req->reply[0]) {
  660. case 3:
  661. case 4: capa = req->reply[2];
  662. max = req->reply[3];
  663. amperage = *((signed char *)&req->reply[4]);
  664. voltage = req->reply[5];
  665. break;
  666. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  667. max = (req->reply[4] << 8) | req->reply[5];
  668. amperage = *((signed short *)&req->reply[6]);
  669. voltage = (req->reply[8] << 8) | req->reply[9];
  670. break;
  671. default:
  672. printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
  673. req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
  674. break;
  675. }
  676. }
  677. if ((req->reply[1] & 0x01) && (amperage > 0))
  678. bat_flags |= PMU_BATT_CHARGING;
  679. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  680. pmu_batteries[pmu_cur_battery].charge = capa;
  681. pmu_batteries[pmu_cur_battery].max_charge = max;
  682. pmu_batteries[pmu_cur_battery].amperage = amperage;
  683. pmu_batteries[pmu_cur_battery].voltage = voltage;
  684. if (amperage) {
  685. if ((req->reply[1] & 0x01) && (amperage > 0))
  686. pmu_batteries[pmu_cur_battery].time_remaining
  687. = ((max-capa) * 3600) / amperage;
  688. else
  689. pmu_batteries[pmu_cur_battery].time_remaining
  690. = (capa * 3600) / (-amperage);
  691. } else
  692. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  693. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  694. clear_bit(0, &async_req_locks);
  695. }
  696. static void
  697. query_battery_state(void)
  698. {
  699. if (test_and_set_bit(0, &async_req_locks))
  700. return;
  701. if (pmu_kind == PMU_OHARE_BASED)
  702. pmu_request(&batt_req, done_battery_state_ohare,
  703. 1, PMU_BATTERY_STATE);
  704. else
  705. pmu_request(&batt_req, done_battery_state_smart,
  706. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  707. }
  708. static int
  709. proc_get_info(char *page, char **start, off_t off,
  710. int count, int *eof, void *data)
  711. {
  712. char* p = page;
  713. p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  714. p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
  715. p += sprintf(p, "AC Power : %d\n",
  716. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0));
  717. p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
  718. return p - page;
  719. }
  720. static int
  721. proc_get_irqstats(char *page, char **start, off_t off,
  722. int count, int *eof, void *data)
  723. {
  724. int i;
  725. char* p = page;
  726. static const char *irq_names[] = {
  727. "Total CB1 triggered events",
  728. "Total GPIO1 triggered events",
  729. "PC-Card eject button",
  730. "Sound/Brightness button",
  731. "ADB message",
  732. "Battery state change",
  733. "Environment interrupt",
  734. "Tick timer",
  735. "Ghost interrupt (zero len)",
  736. "Empty interrupt (empty mask)",
  737. "Max irqs in a row"
  738. };
  739. for (i=0; i<11; i++) {
  740. p += sprintf(p, " %2u: %10u (%s)\n",
  741. i, pmu_irq_stats[i], irq_names[i]);
  742. }
  743. return p - page;
  744. }
  745. static int
  746. proc_get_batt(char *page, char **start, off_t off,
  747. int count, int *eof, void *data)
  748. {
  749. long batnum = (long)data;
  750. char *p = page;
  751. p += sprintf(p, "\n");
  752. p += sprintf(p, "flags : %08x\n",
  753. pmu_batteries[batnum].flags);
  754. p += sprintf(p, "charge : %d\n",
  755. pmu_batteries[batnum].charge);
  756. p += sprintf(p, "max_charge : %d\n",
  757. pmu_batteries[batnum].max_charge);
  758. p += sprintf(p, "current : %d\n",
  759. pmu_batteries[batnum].amperage);
  760. p += sprintf(p, "voltage : %d\n",
  761. pmu_batteries[batnum].voltage);
  762. p += sprintf(p, "time rem. : %d\n",
  763. pmu_batteries[batnum].time_remaining);
  764. return p - page;
  765. }
  766. static int
  767. proc_read_options(char *page, char **start, off_t off,
  768. int count, int *eof, void *data)
  769. {
  770. char *p = page;
  771. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  772. if (pmu_kind == PMU_KEYLARGO_BASED &&
  773. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  774. p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
  775. #endif
  776. if (pmu_kind == PMU_KEYLARGO_BASED)
  777. p += sprintf(p, "server_mode=%d\n", option_server_mode);
  778. return p - page;
  779. }
  780. static int
  781. proc_write_options(struct file *file, const char __user *buffer,
  782. unsigned long count, void *data)
  783. {
  784. char tmp[33];
  785. char *label, *val;
  786. unsigned long fcount = count;
  787. if (!count)
  788. return -EINVAL;
  789. if (count > 32)
  790. count = 32;
  791. if (copy_from_user(tmp, buffer, count))
  792. return -EFAULT;
  793. tmp[count] = 0;
  794. label = tmp;
  795. while(*label == ' ')
  796. label++;
  797. val = label;
  798. while(*val && (*val != '=')) {
  799. if (*val == ' ')
  800. *val = 0;
  801. val++;
  802. }
  803. if ((*val) == 0)
  804. return -EINVAL;
  805. *(val++) = 0;
  806. while(*val == ' ')
  807. val++;
  808. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  809. if (pmu_kind == PMU_KEYLARGO_BASED &&
  810. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  811. if (!strcmp(label, "lid_wakeup"))
  812. option_lid_wakeup = ((*val) == '1');
  813. #endif
  814. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  815. int new_value;
  816. new_value = ((*val) == '1');
  817. if (new_value != option_server_mode)
  818. pmu_set_server_mode(new_value);
  819. }
  820. return fcount;
  821. }
  822. #ifdef CONFIG_ADB
  823. /* Send an ADB command */
  824. static int
  825. pmu_send_request(struct adb_request *req, int sync)
  826. {
  827. int i, ret;
  828. if ((vias == NULL) || (!pmu_fully_inited)) {
  829. req->complete = 1;
  830. return -ENXIO;
  831. }
  832. ret = -EINVAL;
  833. switch (req->data[0]) {
  834. case PMU_PACKET:
  835. for (i = 0; i < req->nbytes - 1; ++i)
  836. req->data[i] = req->data[i+1];
  837. --req->nbytes;
  838. if (pmu_data_len[req->data[0]][1] != 0) {
  839. req->reply[0] = ADB_RET_OK;
  840. req->reply_len = 1;
  841. } else
  842. req->reply_len = 0;
  843. ret = pmu_queue_request(req);
  844. break;
  845. case CUDA_PACKET:
  846. switch (req->data[1]) {
  847. case CUDA_GET_TIME:
  848. if (req->nbytes != 2)
  849. break;
  850. req->data[0] = PMU_READ_RTC;
  851. req->nbytes = 1;
  852. req->reply_len = 3;
  853. req->reply[0] = CUDA_PACKET;
  854. req->reply[1] = 0;
  855. req->reply[2] = CUDA_GET_TIME;
  856. ret = pmu_queue_request(req);
  857. break;
  858. case CUDA_SET_TIME:
  859. if (req->nbytes != 6)
  860. break;
  861. req->data[0] = PMU_SET_RTC;
  862. req->nbytes = 5;
  863. for (i = 1; i <= 4; ++i)
  864. req->data[i] = req->data[i+1];
  865. req->reply_len = 3;
  866. req->reply[0] = CUDA_PACKET;
  867. req->reply[1] = 0;
  868. req->reply[2] = CUDA_SET_TIME;
  869. ret = pmu_queue_request(req);
  870. break;
  871. }
  872. break;
  873. case ADB_PACKET:
  874. if (!pmu_has_adb)
  875. return -ENXIO;
  876. for (i = req->nbytes - 1; i > 1; --i)
  877. req->data[i+2] = req->data[i];
  878. req->data[3] = req->nbytes - 2;
  879. req->data[2] = pmu_adb_flags;
  880. /*req->data[1] = req->data[1];*/
  881. req->data[0] = PMU_ADB_CMD;
  882. req->nbytes += 2;
  883. req->reply_expected = 1;
  884. req->reply_len = 0;
  885. ret = pmu_queue_request(req);
  886. break;
  887. }
  888. if (ret) {
  889. req->complete = 1;
  890. return ret;
  891. }
  892. if (sync)
  893. while (!req->complete)
  894. pmu_poll();
  895. return 0;
  896. }
  897. /* Enable/disable autopolling */
  898. static int
  899. pmu_adb_autopoll(int devs)
  900. {
  901. struct adb_request req;
  902. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  903. return -ENXIO;
  904. if (devs) {
  905. adb_dev_map = devs;
  906. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  907. adb_dev_map >> 8, adb_dev_map);
  908. pmu_adb_flags = 2;
  909. } else {
  910. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  911. pmu_adb_flags = 0;
  912. }
  913. while (!req.complete)
  914. pmu_poll();
  915. return 0;
  916. }
  917. /* Reset the ADB bus */
  918. static int
  919. pmu_adb_reset_bus(void)
  920. {
  921. struct adb_request req;
  922. int save_autopoll = adb_dev_map;
  923. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  924. return -ENXIO;
  925. /* anyone got a better idea?? */
  926. pmu_adb_autopoll(0);
  927. req.nbytes = 5;
  928. req.done = NULL;
  929. req.data[0] = PMU_ADB_CMD;
  930. req.data[1] = 0;
  931. req.data[2] = ADB_BUSRESET;
  932. req.data[3] = 0;
  933. req.data[4] = 0;
  934. req.reply_len = 0;
  935. req.reply_expected = 1;
  936. if (pmu_queue_request(&req) != 0) {
  937. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  938. return -EIO;
  939. }
  940. pmu_wait_complete(&req);
  941. if (save_autopoll != 0)
  942. pmu_adb_autopoll(save_autopoll);
  943. return 0;
  944. }
  945. #endif /* CONFIG_ADB */
  946. /* Construct and send a pmu request */
  947. int
  948. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  949. int nbytes, ...)
  950. {
  951. va_list list;
  952. int i;
  953. if (vias == NULL)
  954. return -ENXIO;
  955. if (nbytes < 0 || nbytes > 32) {
  956. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  957. req->complete = 1;
  958. return -EINVAL;
  959. }
  960. req->nbytes = nbytes;
  961. req->done = done;
  962. va_start(list, nbytes);
  963. for (i = 0; i < nbytes; ++i)
  964. req->data[i] = va_arg(list, int);
  965. va_end(list);
  966. req->reply_len = 0;
  967. req->reply_expected = 0;
  968. return pmu_queue_request(req);
  969. }
  970. int
  971. pmu_queue_request(struct adb_request *req)
  972. {
  973. unsigned long flags;
  974. int nsend;
  975. if (via == NULL) {
  976. req->complete = 1;
  977. return -ENXIO;
  978. }
  979. if (req->nbytes <= 0) {
  980. req->complete = 1;
  981. return 0;
  982. }
  983. nsend = pmu_data_len[req->data[0]][0];
  984. if (nsend >= 0 && req->nbytes != nsend + 1) {
  985. req->complete = 1;
  986. return -EINVAL;
  987. }
  988. req->next = NULL;
  989. req->sent = 0;
  990. req->complete = 0;
  991. spin_lock_irqsave(&pmu_lock, flags);
  992. if (current_req != 0) {
  993. last_req->next = req;
  994. last_req = req;
  995. } else {
  996. current_req = req;
  997. last_req = req;
  998. if (pmu_state == idle)
  999. pmu_start();
  1000. }
  1001. spin_unlock_irqrestore(&pmu_lock, flags);
  1002. return 0;
  1003. }
  1004. static inline void
  1005. wait_for_ack(void)
  1006. {
  1007. /* Sightly increased the delay, I had one occurrence of the message
  1008. * reported
  1009. */
  1010. int timeout = 4000;
  1011. while ((in_8(&via[B]) & TACK) == 0) {
  1012. if (--timeout < 0) {
  1013. printk(KERN_ERR "PMU not responding (!ack)\n");
  1014. return;
  1015. }
  1016. udelay(10);
  1017. }
  1018. }
  1019. /* New PMU seems to be very sensitive to those timings, so we make sure
  1020. * PCI is flushed immediately */
  1021. static inline void
  1022. send_byte(int x)
  1023. {
  1024. volatile unsigned char __iomem *v = via;
  1025. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1026. out_8(&v[SR], x);
  1027. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1028. (void)in_8(&v[B]);
  1029. }
  1030. static inline void
  1031. recv_byte(void)
  1032. {
  1033. volatile unsigned char __iomem *v = via;
  1034. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1035. in_8(&v[SR]); /* resets SR */
  1036. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1037. (void)in_8(&v[B]);
  1038. }
  1039. static inline void
  1040. pmu_done(struct adb_request *req)
  1041. {
  1042. void (*done)(struct adb_request *) = req->done;
  1043. mb();
  1044. req->complete = 1;
  1045. /* Here, we assume that if the request has a done member, the
  1046. * struct request will survive to setting req->complete to 1
  1047. */
  1048. if (done)
  1049. (*done)(req);
  1050. }
  1051. static void
  1052. pmu_start(void)
  1053. {
  1054. struct adb_request *req;
  1055. /* assert pmu_state == idle */
  1056. /* get the packet to send */
  1057. req = current_req;
  1058. if (req == 0 || pmu_state != idle
  1059. || (/*req->reply_expected && */req_awaiting_reply))
  1060. return;
  1061. pmu_state = sending;
  1062. data_index = 1;
  1063. data_len = pmu_data_len[req->data[0]][0];
  1064. /* Sounds safer to make sure ACK is high before writing. This helped
  1065. * kill a problem with ADB and some iBooks
  1066. */
  1067. wait_for_ack();
  1068. /* set the shift register to shift out and send a byte */
  1069. send_byte(req->data[0]);
  1070. }
  1071. void
  1072. pmu_poll(void)
  1073. {
  1074. if (!via)
  1075. return;
  1076. if (disable_poll)
  1077. return;
  1078. via_pmu_interrupt(0, NULL, NULL);
  1079. }
  1080. void
  1081. pmu_poll_adb(void)
  1082. {
  1083. if (!via)
  1084. return;
  1085. if (disable_poll)
  1086. return;
  1087. /* Kicks ADB read when PMU is suspended */
  1088. adb_int_pending = 1;
  1089. do {
  1090. via_pmu_interrupt(0, NULL, NULL);
  1091. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1092. || req_awaiting_reply));
  1093. }
  1094. void
  1095. pmu_wait_complete(struct adb_request *req)
  1096. {
  1097. if (!via)
  1098. return;
  1099. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1100. via_pmu_interrupt(0, NULL, NULL);
  1101. }
  1102. /* This function loops until the PMU is idle and prevents it from
  1103. * anwsering to ADB interrupts. pmu_request can still be called.
  1104. * This is done to avoid spurrious shutdowns when we know we'll have
  1105. * interrupts switched off for a long time
  1106. */
  1107. void
  1108. pmu_suspend(void)
  1109. {
  1110. unsigned long flags;
  1111. #ifdef SUSPEND_USES_PMU
  1112. struct adb_request *req;
  1113. #endif
  1114. if (!via)
  1115. return;
  1116. spin_lock_irqsave(&pmu_lock, flags);
  1117. pmu_suspended++;
  1118. if (pmu_suspended > 1) {
  1119. spin_unlock_irqrestore(&pmu_lock, flags);
  1120. return;
  1121. }
  1122. do {
  1123. spin_unlock_irqrestore(&pmu_lock, flags);
  1124. if (req_awaiting_reply)
  1125. adb_int_pending = 1;
  1126. via_pmu_interrupt(0, NULL, NULL);
  1127. spin_lock_irqsave(&pmu_lock, flags);
  1128. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1129. #ifdef SUSPEND_USES_PMU
  1130. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1131. spin_unlock_irqrestore(&pmu_lock, flags);
  1132. while(!req.complete)
  1133. pmu_poll();
  1134. #else /* SUSPEND_USES_PMU */
  1135. if (gpio_irq >= 0)
  1136. disable_irq_nosync(gpio_irq);
  1137. out_8(&via[IER], CB1_INT | IER_CLR);
  1138. spin_unlock_irqrestore(&pmu_lock, flags);
  1139. #endif /* SUSPEND_USES_PMU */
  1140. break;
  1141. }
  1142. } while (1);
  1143. }
  1144. void
  1145. pmu_resume(void)
  1146. {
  1147. unsigned long flags;
  1148. if (!via || (pmu_suspended < 1))
  1149. return;
  1150. spin_lock_irqsave(&pmu_lock, flags);
  1151. pmu_suspended--;
  1152. if (pmu_suspended > 0) {
  1153. spin_unlock_irqrestore(&pmu_lock, flags);
  1154. return;
  1155. }
  1156. adb_int_pending = 1;
  1157. #ifdef SUSPEND_USES_PMU
  1158. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1159. spin_unlock_irqrestore(&pmu_lock, flags);
  1160. while(!req.complete)
  1161. pmu_poll();
  1162. #else /* SUSPEND_USES_PMU */
  1163. if (gpio_irq >= 0)
  1164. enable_irq(gpio_irq);
  1165. out_8(&via[IER], CB1_INT | IER_SET);
  1166. spin_unlock_irqrestore(&pmu_lock, flags);
  1167. pmu_poll();
  1168. #endif /* SUSPEND_USES_PMU */
  1169. }
  1170. /* Interrupt data could be the result data from an ADB cmd */
  1171. static void
  1172. pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
  1173. {
  1174. unsigned char ints, pirq;
  1175. int i = 0;
  1176. asleep = 0;
  1177. if (drop_interrupts || len < 1) {
  1178. adb_int_pending = 0;
  1179. pmu_irq_stats[8]++;
  1180. return;
  1181. }
  1182. /* Get PMU interrupt mask */
  1183. ints = data[0];
  1184. /* Record zero interrupts for stats */
  1185. if (ints == 0)
  1186. pmu_irq_stats[9]++;
  1187. /* Hack to deal with ADB autopoll flag */
  1188. if (ints & PMU_INT_ADB)
  1189. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1190. next:
  1191. if (ints == 0) {
  1192. if (i > pmu_irq_stats[10])
  1193. pmu_irq_stats[10] = i;
  1194. return;
  1195. }
  1196. for (pirq = 0; pirq < 8; pirq++)
  1197. if (ints & (1 << pirq))
  1198. break;
  1199. pmu_irq_stats[pirq]++;
  1200. i++;
  1201. ints &= ~(1 << pirq);
  1202. /* Note: for some reason, we get an interrupt with len=1,
  1203. * data[0]==0 after each normal ADB interrupt, at least
  1204. * on the Pismo. Still investigating... --BenH
  1205. */
  1206. if ((1 << pirq) & PMU_INT_ADB) {
  1207. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1208. struct adb_request *req = req_awaiting_reply;
  1209. if (req == 0) {
  1210. printk(KERN_ERR "PMU: extra ADB reply\n");
  1211. return;
  1212. }
  1213. req_awaiting_reply = NULL;
  1214. if (len <= 2)
  1215. req->reply_len = 0;
  1216. else {
  1217. memcpy(req->reply, data + 1, len - 1);
  1218. req->reply_len = len - 1;
  1219. }
  1220. pmu_done(req);
  1221. } else {
  1222. #if defined(CONFIG_XMON) && !defined(CONFIG_PPC64)
  1223. if (len == 4 && data[1] == 0x2c) {
  1224. extern int xmon_wants_key, xmon_adb_keycode;
  1225. if (xmon_wants_key) {
  1226. xmon_adb_keycode = data[2];
  1227. return;
  1228. }
  1229. }
  1230. #endif /* defined(CONFIG_XMON) && !defined(CONFIG_PPC64) */
  1231. #ifdef CONFIG_ADB
  1232. /*
  1233. * XXX On the [23]400 the PMU gives us an up
  1234. * event for keycodes 0x74 or 0x75 when the PC
  1235. * card eject buttons are released, so we
  1236. * ignore those events.
  1237. */
  1238. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1239. && data[1] == 0x2c && data[3] == 0xff
  1240. && (data[2] & ~1) == 0xf4))
  1241. adb_input(data+1, len-1, regs, 1);
  1242. #endif /* CONFIG_ADB */
  1243. }
  1244. }
  1245. /* Sound/brightness button pressed */
  1246. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1247. #ifdef CONFIG_PMAC_BACKLIGHT
  1248. if (len == 3)
  1249. #ifdef CONFIG_INPUT_ADBHID
  1250. if (!disable_kernel_backlight)
  1251. #endif /* CONFIG_INPUT_ADBHID */
  1252. set_backlight_level(data[1] >> 4);
  1253. #endif /* CONFIG_PMAC_BACKLIGHT */
  1254. }
  1255. /* Tick interrupt */
  1256. else if ((1 << pirq) & PMU_INT_TICK) {
  1257. /* Environement or tick interrupt, query batteries */
  1258. if (pmu_battery_count) {
  1259. if ((--query_batt_timer) == 0) {
  1260. query_battery_state();
  1261. query_batt_timer = BATTERY_POLLING_COUNT;
  1262. }
  1263. }
  1264. }
  1265. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1266. if (pmu_battery_count)
  1267. query_battery_state();
  1268. pmu_pass_intr(data, len);
  1269. } else {
  1270. pmu_pass_intr(data, len);
  1271. }
  1272. goto next;
  1273. }
  1274. static struct adb_request*
  1275. pmu_sr_intr(struct pt_regs *regs)
  1276. {
  1277. struct adb_request *req;
  1278. int bite = 0;
  1279. if (via[B] & TREQ) {
  1280. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1281. out_8(&via[IFR], SR_INT);
  1282. return NULL;
  1283. }
  1284. /* The ack may not yet be low when we get the interrupt */
  1285. while ((in_8(&via[B]) & TACK) != 0)
  1286. ;
  1287. /* if reading grab the byte, and reset the interrupt */
  1288. if (pmu_state == reading || pmu_state == reading_intr)
  1289. bite = in_8(&via[SR]);
  1290. /* reset TREQ and wait for TACK to go high */
  1291. out_8(&via[B], in_8(&via[B]) | TREQ);
  1292. wait_for_ack();
  1293. switch (pmu_state) {
  1294. case sending:
  1295. req = current_req;
  1296. if (data_len < 0) {
  1297. data_len = req->nbytes - 1;
  1298. send_byte(data_len);
  1299. break;
  1300. }
  1301. if (data_index <= data_len) {
  1302. send_byte(req->data[data_index++]);
  1303. break;
  1304. }
  1305. req->sent = 1;
  1306. data_len = pmu_data_len[req->data[0]][1];
  1307. if (data_len == 0) {
  1308. pmu_state = idle;
  1309. current_req = req->next;
  1310. if (req->reply_expected)
  1311. req_awaiting_reply = req;
  1312. else
  1313. return req;
  1314. } else {
  1315. pmu_state = reading;
  1316. data_index = 0;
  1317. reply_ptr = req->reply + req->reply_len;
  1318. recv_byte();
  1319. }
  1320. break;
  1321. case intack:
  1322. data_index = 0;
  1323. data_len = -1;
  1324. pmu_state = reading_intr;
  1325. reply_ptr = interrupt_data[int_data_last];
  1326. recv_byte();
  1327. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1328. enable_irq(gpio_irq);
  1329. gpio_irq_enabled = 1;
  1330. }
  1331. break;
  1332. case reading:
  1333. case reading_intr:
  1334. if (data_len == -1) {
  1335. data_len = bite;
  1336. if (bite > 32)
  1337. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1338. } else if (data_index < 32) {
  1339. reply_ptr[data_index++] = bite;
  1340. }
  1341. if (data_index < data_len) {
  1342. recv_byte();
  1343. break;
  1344. }
  1345. if (pmu_state == reading_intr) {
  1346. pmu_state = idle;
  1347. int_data_state[int_data_last] = int_data_ready;
  1348. interrupt_data_len[int_data_last] = data_len;
  1349. } else {
  1350. req = current_req;
  1351. /*
  1352. * For PMU sleep and freq change requests, we lock the
  1353. * PMU until it's explicitely unlocked. This avoids any
  1354. * spurrious event polling getting in
  1355. */
  1356. current_req = req->next;
  1357. req->reply_len += data_index;
  1358. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1359. pmu_state = locked;
  1360. else
  1361. pmu_state = idle;
  1362. return req;
  1363. }
  1364. break;
  1365. default:
  1366. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1367. pmu_state);
  1368. }
  1369. return NULL;
  1370. }
  1371. static irqreturn_t
  1372. via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
  1373. {
  1374. unsigned long flags;
  1375. int intr;
  1376. int nloop = 0;
  1377. int int_data = -1;
  1378. struct adb_request *req = NULL;
  1379. int handled = 0;
  1380. /* This is a bit brutal, we can probably do better */
  1381. spin_lock_irqsave(&pmu_lock, flags);
  1382. ++disable_poll;
  1383. for (;;) {
  1384. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1385. if (intr == 0)
  1386. break;
  1387. handled = 1;
  1388. if (++nloop > 1000) {
  1389. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1390. "intr=%x, ier=%x pmu_state=%d\n",
  1391. intr, in_8(&via[IER]), pmu_state);
  1392. break;
  1393. }
  1394. out_8(&via[IFR], intr);
  1395. if (intr & CB1_INT) {
  1396. adb_int_pending = 1;
  1397. pmu_irq_stats[0]++;
  1398. }
  1399. if (intr & SR_INT) {
  1400. req = pmu_sr_intr(regs);
  1401. if (req)
  1402. break;
  1403. }
  1404. }
  1405. recheck:
  1406. if (pmu_state == idle) {
  1407. if (adb_int_pending) {
  1408. if (int_data_state[0] == int_data_empty)
  1409. int_data_last = 0;
  1410. else if (int_data_state[1] == int_data_empty)
  1411. int_data_last = 1;
  1412. else
  1413. goto no_free_slot;
  1414. pmu_state = intack;
  1415. int_data_state[int_data_last] = int_data_fill;
  1416. /* Sounds safer to make sure ACK is high before writing.
  1417. * This helped kill a problem with ADB and some iBooks
  1418. */
  1419. wait_for_ack();
  1420. send_byte(PMU_INT_ACK);
  1421. adb_int_pending = 0;
  1422. } else if (current_req)
  1423. pmu_start();
  1424. }
  1425. no_free_slot:
  1426. /* Mark the oldest buffer for flushing */
  1427. if (int_data_state[!int_data_last] == int_data_ready) {
  1428. int_data_state[!int_data_last] = int_data_flush;
  1429. int_data = !int_data_last;
  1430. } else if (int_data_state[int_data_last] == int_data_ready) {
  1431. int_data_state[int_data_last] = int_data_flush;
  1432. int_data = int_data_last;
  1433. }
  1434. --disable_poll;
  1435. spin_unlock_irqrestore(&pmu_lock, flags);
  1436. /* Deal with completed PMU requests outside of the lock */
  1437. if (req) {
  1438. pmu_done(req);
  1439. req = NULL;
  1440. }
  1441. /* Deal with interrupt datas outside of the lock */
  1442. if (int_data >= 0) {
  1443. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data], regs);
  1444. spin_lock_irqsave(&pmu_lock, flags);
  1445. ++disable_poll;
  1446. int_data_state[int_data] = int_data_empty;
  1447. int_data = -1;
  1448. goto recheck;
  1449. }
  1450. return IRQ_RETVAL(handled);
  1451. }
  1452. void
  1453. pmu_unlock(void)
  1454. {
  1455. unsigned long flags;
  1456. spin_lock_irqsave(&pmu_lock, flags);
  1457. if (pmu_state == locked)
  1458. pmu_state = idle;
  1459. adb_int_pending = 1;
  1460. spin_unlock_irqrestore(&pmu_lock, flags);
  1461. }
  1462. static irqreturn_t
  1463. gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
  1464. {
  1465. unsigned long flags;
  1466. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1467. spin_lock_irqsave(&pmu_lock, flags);
  1468. if (gpio_irq_enabled > 0) {
  1469. disable_irq_nosync(gpio_irq);
  1470. gpio_irq_enabled = 0;
  1471. }
  1472. pmu_irq_stats[1]++;
  1473. adb_int_pending = 1;
  1474. spin_unlock_irqrestore(&pmu_lock, flags);
  1475. via_pmu_interrupt(0, NULL, NULL);
  1476. return IRQ_HANDLED;
  1477. }
  1478. return IRQ_NONE;
  1479. }
  1480. #ifdef CONFIG_PMAC_BACKLIGHT
  1481. static int backlight_to_bright[] = {
  1482. 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e,
  1483. 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e
  1484. };
  1485. static int
  1486. pmu_set_backlight_enable(int on, int level, void* data)
  1487. {
  1488. struct adb_request req;
  1489. if (vias == NULL)
  1490. return -ENODEV;
  1491. if (on) {
  1492. pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
  1493. backlight_to_bright[level]);
  1494. pmu_wait_complete(&req);
  1495. }
  1496. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1497. PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF));
  1498. pmu_wait_complete(&req);
  1499. return 0;
  1500. }
  1501. static void
  1502. pmu_bright_complete(struct adb_request *req)
  1503. {
  1504. if (req == &bright_req_1)
  1505. clear_bit(1, &async_req_locks);
  1506. if (req == &bright_req_2)
  1507. clear_bit(2, &async_req_locks);
  1508. }
  1509. static int
  1510. pmu_set_backlight_level(int level, void* data)
  1511. {
  1512. if (vias == NULL)
  1513. return -ENODEV;
  1514. if (test_and_set_bit(1, &async_req_locks))
  1515. return -EAGAIN;
  1516. pmu_request(&bright_req_1, pmu_bright_complete, 2, PMU_BACKLIGHT_BRIGHT,
  1517. backlight_to_bright[level]);
  1518. if (test_and_set_bit(2, &async_req_locks))
  1519. return -EAGAIN;
  1520. pmu_request(&bright_req_2, pmu_bright_complete, 2, PMU_POWER_CTRL,
  1521. PMU_POW_BACKLIGHT | (level > BACKLIGHT_OFF ?
  1522. PMU_POW_ON : PMU_POW_OFF));
  1523. return 0;
  1524. }
  1525. #endif /* CONFIG_PMAC_BACKLIGHT */
  1526. void
  1527. pmu_enable_irled(int on)
  1528. {
  1529. struct adb_request req;
  1530. if (vias == NULL)
  1531. return ;
  1532. if (pmu_kind == PMU_KEYLARGO_BASED)
  1533. return ;
  1534. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1535. (on ? PMU_POW_ON : PMU_POW_OFF));
  1536. pmu_wait_complete(&req);
  1537. }
  1538. void
  1539. pmu_restart(void)
  1540. {
  1541. struct adb_request req;
  1542. if (via == NULL)
  1543. return;
  1544. local_irq_disable();
  1545. drop_interrupts = 1;
  1546. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1547. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1548. PMU_INT_TICK );
  1549. while(!req.complete)
  1550. pmu_poll();
  1551. }
  1552. pmu_request(&req, NULL, 1, PMU_RESET);
  1553. pmu_wait_complete(&req);
  1554. for (;;)
  1555. ;
  1556. }
  1557. void
  1558. pmu_shutdown(void)
  1559. {
  1560. struct adb_request req;
  1561. if (via == NULL)
  1562. return;
  1563. local_irq_disable();
  1564. drop_interrupts = 1;
  1565. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1566. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1567. PMU_INT_TICK );
  1568. pmu_wait_complete(&req);
  1569. } else {
  1570. /* Disable server mode on shutdown or we'll just
  1571. * wake up again
  1572. */
  1573. pmu_set_server_mode(0);
  1574. }
  1575. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1576. 'M', 'A', 'T', 'T');
  1577. pmu_wait_complete(&req);
  1578. for (;;)
  1579. ;
  1580. }
  1581. int
  1582. pmu_present(void)
  1583. {
  1584. return via != 0;
  1585. }
  1586. struct pmu_i2c_hdr {
  1587. u8 bus;
  1588. u8 mode;
  1589. u8 bus2;
  1590. u8 address;
  1591. u8 sub_addr;
  1592. u8 comb_addr;
  1593. u8 count;
  1594. };
  1595. int
  1596. pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len)
  1597. {
  1598. struct adb_request req;
  1599. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1600. int retry;
  1601. int rc;
  1602. for (retry=0; retry<16; retry++) {
  1603. memset(&req, 0, sizeof(req));
  1604. hdr->bus = bus;
  1605. hdr->address = addr & 0xfe;
  1606. hdr->mode = PMU_I2C_MODE_COMBINED;
  1607. hdr->bus2 = 0;
  1608. hdr->sub_addr = subaddr;
  1609. hdr->comb_addr = addr | 1;
  1610. hdr->count = len;
  1611. req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
  1612. req.reply_expected = 0;
  1613. req.reply_len = 0;
  1614. req.data[0] = PMU_I2C_CMD;
  1615. req.reply[0] = 0xff;
  1616. rc = pmu_queue_request(&req);
  1617. if (rc)
  1618. return rc;
  1619. while(!req.complete)
  1620. pmu_poll();
  1621. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1622. break;
  1623. mdelay(15);
  1624. }
  1625. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1626. return -1;
  1627. for (retry=0; retry<16; retry++) {
  1628. memset(&req, 0, sizeof(req));
  1629. mdelay(15);
  1630. hdr->bus = PMU_I2C_BUS_STATUS;
  1631. req.reply[0] = 0xff;
  1632. req.nbytes = 2;
  1633. req.reply_expected = 0;
  1634. req.reply_len = 0;
  1635. req.data[0] = PMU_I2C_CMD;
  1636. rc = pmu_queue_request(&req);
  1637. if (rc)
  1638. return rc;
  1639. while(!req.complete)
  1640. pmu_poll();
  1641. if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
  1642. memcpy(data, &req.reply[1], req.reply_len - 1);
  1643. return req.reply_len - 1;
  1644. }
  1645. }
  1646. return -1;
  1647. }
  1648. int
  1649. pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len)
  1650. {
  1651. struct adb_request req;
  1652. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1653. int retry;
  1654. int rc;
  1655. for (retry=0; retry<16; retry++) {
  1656. memset(&req, 0, sizeof(req));
  1657. hdr->bus = bus;
  1658. hdr->address = addr & 0xfe;
  1659. hdr->mode = PMU_I2C_MODE_STDSUB;
  1660. hdr->bus2 = 0;
  1661. hdr->sub_addr = subaddr;
  1662. hdr->comb_addr = addr & 0xfe;
  1663. hdr->count = len;
  1664. req.data[0] = PMU_I2C_CMD;
  1665. memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
  1666. req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
  1667. req.reply_expected = 0;
  1668. req.reply_len = 0;
  1669. req.reply[0] = 0xff;
  1670. rc = pmu_queue_request(&req);
  1671. if (rc)
  1672. return rc;
  1673. while(!req.complete)
  1674. pmu_poll();
  1675. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1676. break;
  1677. mdelay(15);
  1678. }
  1679. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1680. return -1;
  1681. for (retry=0; retry<16; retry++) {
  1682. memset(&req, 0, sizeof(req));
  1683. mdelay(15);
  1684. hdr->bus = PMU_I2C_BUS_STATUS;
  1685. req.reply[0] = 0xff;
  1686. req.nbytes = 2;
  1687. req.reply_expected = 0;
  1688. req.reply_len = 0;
  1689. req.data[0] = PMU_I2C_CMD;
  1690. rc = pmu_queue_request(&req);
  1691. if (rc)
  1692. return rc;
  1693. while(!req.complete)
  1694. pmu_poll();
  1695. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1696. return len;
  1697. }
  1698. return -1;
  1699. }
  1700. int
  1701. pmu_i2c_simple_read(int bus, int addr, u8* data, int len)
  1702. {
  1703. struct adb_request req;
  1704. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1705. int retry;
  1706. int rc;
  1707. for (retry=0; retry<16; retry++) {
  1708. memset(&req, 0, sizeof(req));
  1709. hdr->bus = bus;
  1710. hdr->address = addr | 1;
  1711. hdr->mode = PMU_I2C_MODE_SIMPLE;
  1712. hdr->bus2 = 0;
  1713. hdr->sub_addr = 0;
  1714. hdr->comb_addr = 0;
  1715. hdr->count = len;
  1716. req.data[0] = PMU_I2C_CMD;
  1717. req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
  1718. req.reply_expected = 0;
  1719. req.reply_len = 0;
  1720. req.reply[0] = 0xff;
  1721. rc = pmu_queue_request(&req);
  1722. if (rc)
  1723. return rc;
  1724. while(!req.complete)
  1725. pmu_poll();
  1726. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1727. break;
  1728. mdelay(15);
  1729. }
  1730. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1731. return -1;
  1732. for (retry=0; retry<16; retry++) {
  1733. memset(&req, 0, sizeof(req));
  1734. mdelay(15);
  1735. hdr->bus = PMU_I2C_BUS_STATUS;
  1736. req.reply[0] = 0xff;
  1737. req.nbytes = 2;
  1738. req.reply_expected = 0;
  1739. req.reply_len = 0;
  1740. req.data[0] = PMU_I2C_CMD;
  1741. rc = pmu_queue_request(&req);
  1742. if (rc)
  1743. return rc;
  1744. while(!req.complete)
  1745. pmu_poll();
  1746. if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
  1747. memcpy(data, &req.reply[1], req.reply_len - 1);
  1748. return req.reply_len - 1;
  1749. }
  1750. }
  1751. return -1;
  1752. }
  1753. int
  1754. pmu_i2c_simple_write(int bus, int addr, u8* data, int len)
  1755. {
  1756. struct adb_request req;
  1757. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1758. int retry;
  1759. int rc;
  1760. for (retry=0; retry<16; retry++) {
  1761. memset(&req, 0, sizeof(req));
  1762. hdr->bus = bus;
  1763. hdr->address = addr & 0xfe;
  1764. hdr->mode = PMU_I2C_MODE_SIMPLE;
  1765. hdr->bus2 = 0;
  1766. hdr->sub_addr = 0;
  1767. hdr->comb_addr = 0;
  1768. hdr->count = len;
  1769. req.data[0] = PMU_I2C_CMD;
  1770. memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
  1771. req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
  1772. req.reply_expected = 0;
  1773. req.reply_len = 0;
  1774. req.reply[0] = 0xff;
  1775. rc = pmu_queue_request(&req);
  1776. if (rc)
  1777. return rc;
  1778. while(!req.complete)
  1779. pmu_poll();
  1780. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1781. break;
  1782. mdelay(15);
  1783. }
  1784. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1785. return -1;
  1786. for (retry=0; retry<16; retry++) {
  1787. memset(&req, 0, sizeof(req));
  1788. mdelay(15);
  1789. hdr->bus = PMU_I2C_BUS_STATUS;
  1790. req.reply[0] = 0xff;
  1791. req.nbytes = 2;
  1792. req.reply_expected = 0;
  1793. req.reply_len = 0;
  1794. req.data[0] = PMU_I2C_CMD;
  1795. rc = pmu_queue_request(&req);
  1796. if (rc)
  1797. return rc;
  1798. while(!req.complete)
  1799. pmu_poll();
  1800. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1801. return len;
  1802. }
  1803. return -1;
  1804. }
  1805. #ifdef CONFIG_PM
  1806. static LIST_HEAD(sleep_notifiers);
  1807. int
  1808. pmu_register_sleep_notifier(struct pmu_sleep_notifier *n)
  1809. {
  1810. struct list_head *list;
  1811. struct pmu_sleep_notifier *notifier;
  1812. for (list = sleep_notifiers.next; list != &sleep_notifiers;
  1813. list = list->next) {
  1814. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1815. if (n->priority > notifier->priority)
  1816. break;
  1817. }
  1818. __list_add(&n->list, list->prev, list);
  1819. return 0;
  1820. }
  1821. int
  1822. pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n)
  1823. {
  1824. if (n->list.next == 0)
  1825. return -ENOENT;
  1826. list_del(&n->list);
  1827. n->list.next = NULL;
  1828. return 0;
  1829. }
  1830. #endif /* CONFIG_PM */
  1831. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  1832. /* Sleep is broadcast last-to-first */
  1833. static int
  1834. broadcast_sleep(int when, int fallback)
  1835. {
  1836. int ret = PBOOK_SLEEP_OK;
  1837. struct list_head *list;
  1838. struct pmu_sleep_notifier *notifier;
  1839. for (list = sleep_notifiers.prev; list != &sleep_notifiers;
  1840. list = list->prev) {
  1841. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1842. ret = notifier->notifier_call(notifier, when);
  1843. if (ret != PBOOK_SLEEP_OK) {
  1844. printk(KERN_DEBUG "sleep %d rejected by %p (%p)\n",
  1845. when, notifier, notifier->notifier_call);
  1846. for (; list != &sleep_notifiers; list = list->next) {
  1847. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1848. notifier->notifier_call(notifier, fallback);
  1849. }
  1850. return ret;
  1851. }
  1852. }
  1853. return ret;
  1854. }
  1855. /* Wake is broadcast first-to-last */
  1856. static int
  1857. broadcast_wake(void)
  1858. {
  1859. int ret = PBOOK_SLEEP_OK;
  1860. struct list_head *list;
  1861. struct pmu_sleep_notifier *notifier;
  1862. for (list = sleep_notifiers.next; list != &sleep_notifiers;
  1863. list = list->next) {
  1864. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1865. notifier->notifier_call(notifier, PBOOK_WAKE);
  1866. }
  1867. return ret;
  1868. }
  1869. /*
  1870. * This struct is used to store config register values for
  1871. * PCI devices which may get powered off when we sleep.
  1872. */
  1873. static struct pci_save {
  1874. #ifndef HACKED_PCI_SAVE
  1875. u16 command;
  1876. u16 cache_lat;
  1877. u16 intr;
  1878. u32 rom_address;
  1879. #else
  1880. u32 config[16];
  1881. #endif
  1882. } *pbook_pci_saves;
  1883. static int pbook_npci_saves;
  1884. static void
  1885. pbook_alloc_pci_save(void)
  1886. {
  1887. int npci;
  1888. struct pci_dev *pd = NULL;
  1889. npci = 0;
  1890. while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
  1891. ++npci;
  1892. }
  1893. if (npci == 0)
  1894. return;
  1895. pbook_pci_saves = (struct pci_save *)
  1896. kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL);
  1897. pbook_npci_saves = npci;
  1898. }
  1899. static void
  1900. pbook_free_pci_save(void)
  1901. {
  1902. if (pbook_pci_saves == NULL)
  1903. return;
  1904. kfree(pbook_pci_saves);
  1905. pbook_pci_saves = NULL;
  1906. pbook_npci_saves = 0;
  1907. }
  1908. static void
  1909. pbook_pci_save(void)
  1910. {
  1911. struct pci_save *ps = pbook_pci_saves;
  1912. struct pci_dev *pd = NULL;
  1913. int npci = pbook_npci_saves;
  1914. if (ps == NULL)
  1915. return;
  1916. while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
  1917. if (npci-- == 0)
  1918. return;
  1919. #ifndef HACKED_PCI_SAVE
  1920. pci_read_config_word(pd, PCI_COMMAND, &ps->command);
  1921. pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
  1922. pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
  1923. pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address);
  1924. #else
  1925. int i;
  1926. for (i=1;i<16;i++)
  1927. pci_read_config_dword(pd, i<<4, &ps->config[i]);
  1928. #endif
  1929. ++ps;
  1930. }
  1931. }
  1932. /* For this to work, we must take care of a few things: If gmac was enabled
  1933. * during boot, it will be in the pci dev list. If it's disabled at this point
  1934. * (and it will probably be), then you can't access it's config space.
  1935. */
  1936. static void
  1937. pbook_pci_restore(void)
  1938. {
  1939. u16 cmd;
  1940. struct pci_save *ps = pbook_pci_saves - 1;
  1941. struct pci_dev *pd = NULL;
  1942. int npci = pbook_npci_saves;
  1943. int j;
  1944. while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
  1945. #ifdef HACKED_PCI_SAVE
  1946. int i;
  1947. if (npci-- == 0)
  1948. return;
  1949. ps++;
  1950. for (i=2;i<16;i++)
  1951. pci_write_config_dword(pd, i<<4, ps->config[i]);
  1952. pci_write_config_dword(pd, 4, ps->config[1]);
  1953. #else
  1954. if (npci-- == 0)
  1955. return;
  1956. ps++;
  1957. if (ps->command == 0)
  1958. continue;
  1959. pci_read_config_word(pd, PCI_COMMAND, &cmd);
  1960. if ((ps->command & ~cmd) == 0)
  1961. continue;
  1962. switch (pd->hdr_type) {
  1963. case PCI_HEADER_TYPE_NORMAL:
  1964. for (j = 0; j < 6; ++j)
  1965. pci_write_config_dword(pd,
  1966. PCI_BASE_ADDRESS_0 + j*4,
  1967. pd->resource[j].start);
  1968. pci_write_config_dword(pd, PCI_ROM_ADDRESS,
  1969. ps->rom_address);
  1970. pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
  1971. ps->cache_lat);
  1972. pci_write_config_word(pd, PCI_INTERRUPT_LINE,
  1973. ps->intr);
  1974. pci_write_config_word(pd, PCI_COMMAND, ps->command);
  1975. break;
  1976. }
  1977. #endif
  1978. }
  1979. }
  1980. #ifdef DEBUG_SLEEP
  1981. /* N.B. This doesn't work on the 3400 */
  1982. void
  1983. pmu_blink(int n)
  1984. {
  1985. struct adb_request req;
  1986. memset(&req, 0, sizeof(req));
  1987. for (; n > 0; --n) {
  1988. req.nbytes = 4;
  1989. req.done = NULL;
  1990. req.data[0] = 0xee;
  1991. req.data[1] = 4;
  1992. req.data[2] = 0;
  1993. req.data[3] = 1;
  1994. req.reply[0] = ADB_RET_OK;
  1995. req.reply_len = 1;
  1996. req.reply_expected = 0;
  1997. pmu_polled_request(&req);
  1998. mdelay(50);
  1999. req.nbytes = 4;
  2000. req.done = NULL;
  2001. req.data[0] = 0xee;
  2002. req.data[1] = 4;
  2003. req.data[2] = 0;
  2004. req.data[3] = 0;
  2005. req.reply[0] = ADB_RET_OK;
  2006. req.reply_len = 1;
  2007. req.reply_expected = 0;
  2008. pmu_polled_request(&req);
  2009. mdelay(50);
  2010. }
  2011. mdelay(50);
  2012. }
  2013. #endif
  2014. /*
  2015. * Put the powerbook to sleep.
  2016. */
  2017. static u32 save_via[8];
  2018. static void
  2019. save_via_state(void)
  2020. {
  2021. save_via[0] = in_8(&via[ANH]);
  2022. save_via[1] = in_8(&via[DIRA]);
  2023. save_via[2] = in_8(&via[B]);
  2024. save_via[3] = in_8(&via[DIRB]);
  2025. save_via[4] = in_8(&via[PCR]);
  2026. save_via[5] = in_8(&via[ACR]);
  2027. save_via[6] = in_8(&via[T1CL]);
  2028. save_via[7] = in_8(&via[T1CH]);
  2029. }
  2030. static void
  2031. restore_via_state(void)
  2032. {
  2033. out_8(&via[ANH], save_via[0]);
  2034. out_8(&via[DIRA], save_via[1]);
  2035. out_8(&via[B], save_via[2]);
  2036. out_8(&via[DIRB], save_via[3]);
  2037. out_8(&via[PCR], save_via[4]);
  2038. out_8(&via[ACR], save_via[5]);
  2039. out_8(&via[T1CL], save_via[6]);
  2040. out_8(&via[T1CH], save_via[7]);
  2041. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  2042. out_8(&via[IFR], 0x7f); /* clear IFR */
  2043. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  2044. }
  2045. static int
  2046. pmac_suspend_devices(void)
  2047. {
  2048. int ret;
  2049. pm_prepare_console();
  2050. /* Notify old-style device drivers & userland */
  2051. ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT);
  2052. if (ret != PBOOK_SLEEP_OK) {
  2053. printk(KERN_ERR "Sleep rejected by drivers\n");
  2054. return -EBUSY;
  2055. }
  2056. /* Sync the disks. */
  2057. /* XXX It would be nice to have some way to ensure that
  2058. * nobody is dirtying any new buffers while we wait. That
  2059. * could be achieved using the refrigerator for processes
  2060. * that swsusp uses
  2061. */
  2062. sys_sync();
  2063. /* Sleep can fail now. May not be very robust but useful for debugging */
  2064. ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE);
  2065. if (ret != PBOOK_SLEEP_OK) {
  2066. printk(KERN_ERR "Driver sleep failed\n");
  2067. return -EBUSY;
  2068. }
  2069. /* Send suspend call to devices, hold the device core's dpm_sem */
  2070. ret = device_suspend(PMSG_SUSPEND);
  2071. if (ret) {
  2072. broadcast_wake();
  2073. printk(KERN_ERR "Driver sleep failed\n");
  2074. return -EBUSY;
  2075. }
  2076. /* Disable clock spreading on some machines */
  2077. pmac_tweak_clock_spreading(0);
  2078. /* Stop preemption */
  2079. preempt_disable();
  2080. /* Make sure the decrementer won't interrupt us */
  2081. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  2082. /* Make sure any pending DEC interrupt occurring while we did
  2083. * the above didn't re-enable the DEC */
  2084. mb();
  2085. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  2086. /* We can now disable MSR_EE. This code of course works properly only
  2087. * on UP machines... For SMP, if we ever implement sleep, we'll have to
  2088. * stop the "other" CPUs way before we do all that stuff.
  2089. */
  2090. local_irq_disable();
  2091. /* Broadcast power down irq
  2092. * This isn't that useful in most cases (only directly wired devices can
  2093. * use this but still... This will take care of sysdev's as well, so
  2094. * we exit from here with local irqs disabled and PIC off.
  2095. */
  2096. ret = device_power_down(PMSG_SUSPEND);
  2097. if (ret) {
  2098. wakeup_decrementer();
  2099. local_irq_enable();
  2100. preempt_enable();
  2101. device_resume();
  2102. broadcast_wake();
  2103. printk(KERN_ERR "Driver powerdown failed\n");
  2104. return -EBUSY;
  2105. }
  2106. /* Wait for completion of async backlight requests */
  2107. while (!bright_req_1.complete || !bright_req_2.complete ||
  2108. !batt_req.complete)
  2109. pmu_poll();
  2110. /* Giveup the lazy FPU & vec so we don't have to back them
  2111. * up from the low level code
  2112. */
  2113. enable_kernel_fp();
  2114. #ifdef CONFIG_ALTIVEC
  2115. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  2116. enable_kernel_altivec();
  2117. #endif /* CONFIG_ALTIVEC */
  2118. return 0;
  2119. }
  2120. static int
  2121. pmac_wakeup_devices(void)
  2122. {
  2123. mdelay(100);
  2124. /* Power back up system devices (including the PIC) */
  2125. device_power_up();
  2126. /* Force a poll of ADB interrupts */
  2127. adb_int_pending = 1;
  2128. via_pmu_interrupt(0, NULL, NULL);
  2129. /* Restart jiffies & scheduling */
  2130. wakeup_decrementer();
  2131. /* Re-enable local CPU interrupts */
  2132. local_irq_enable();
  2133. mdelay(10);
  2134. preempt_enable();
  2135. /* Re-enable clock spreading on some machines */
  2136. pmac_tweak_clock_spreading(1);
  2137. /* Resume devices */
  2138. device_resume();
  2139. /* Notify old style drivers */
  2140. broadcast_wake();
  2141. pm_restore_console();
  2142. return 0;
  2143. }
  2144. #define GRACKLE_PM (1<<7)
  2145. #define GRACKLE_DOZE (1<<5)
  2146. #define GRACKLE_NAP (1<<4)
  2147. #define GRACKLE_SLEEP (1<<3)
  2148. int
  2149. powerbook_sleep_grackle(void)
  2150. {
  2151. unsigned long save_l2cr;
  2152. unsigned short pmcr1;
  2153. struct adb_request req;
  2154. int ret;
  2155. struct pci_dev *grackle;
  2156. grackle = pci_find_slot(0, 0);
  2157. if (!grackle)
  2158. return -ENODEV;
  2159. ret = pmac_suspend_devices();
  2160. if (ret) {
  2161. printk(KERN_ERR "Sleep rejected by devices\n");
  2162. return ret;
  2163. }
  2164. /* Turn off various things. Darwin does some retry tests here... */
  2165. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  2166. pmu_wait_complete(&req);
  2167. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  2168. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  2169. pmu_wait_complete(&req);
  2170. /* For 750, save backside cache setting and disable it */
  2171. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  2172. if (!__fake_sleep) {
  2173. /* Ask the PMU to put us to sleep */
  2174. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  2175. pmu_wait_complete(&req);
  2176. }
  2177. /* The VIA is supposed not to be restored correctly*/
  2178. save_via_state();
  2179. /* We shut down some HW */
  2180. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  2181. pci_read_config_word(grackle, 0x70, &pmcr1);
  2182. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  2183. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  2184. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  2185. pci_write_config_word(grackle, 0x70, pmcr1);
  2186. /* Call low-level ASM sleep handler */
  2187. if (__fake_sleep)
  2188. mdelay(5000);
  2189. else
  2190. low_sleep_handler();
  2191. /* We're awake again, stop grackle PM */
  2192. pci_read_config_word(grackle, 0x70, &pmcr1);
  2193. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  2194. pci_write_config_word(grackle, 0x70, pmcr1);
  2195. /* Make sure the PMU is idle */
  2196. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  2197. restore_via_state();
  2198. /* Restore L2 cache */
  2199. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  2200. _set_L2CR(save_l2cr);
  2201. /* Restore userland MMU context */
  2202. set_context(current->active_mm->context, current->active_mm->pgd);
  2203. /* Power things up */
  2204. pmu_unlock();
  2205. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  2206. pmu_wait_complete(&req);
  2207. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  2208. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  2209. pmu_wait_complete(&req);
  2210. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  2211. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  2212. pmu_wait_complete(&req);
  2213. pmac_wakeup_devices();
  2214. return 0;
  2215. }
  2216. static int
  2217. powerbook_sleep_Core99(void)
  2218. {
  2219. unsigned long save_l2cr;
  2220. unsigned long save_l3cr;
  2221. struct adb_request req;
  2222. int ret;
  2223. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  2224. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  2225. return -ENOSYS;
  2226. }
  2227. if (num_online_cpus() > 1 || cpu_is_offline(0))
  2228. return -EAGAIN;
  2229. ret = pmac_suspend_devices();
  2230. if (ret) {
  2231. printk(KERN_ERR "Sleep rejected by devices\n");
  2232. return ret;
  2233. }
  2234. /* Stop environment and ADB interrupts */
  2235. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  2236. pmu_wait_complete(&req);
  2237. /* Tell PMU what events will wake us up */
  2238. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  2239. 0xff, 0xff);
  2240. pmu_wait_complete(&req);
  2241. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  2242. 0, PMU_PWR_WAKEUP_KEY |
  2243. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  2244. pmu_wait_complete(&req);
  2245. /* Save the state of the L2 and L3 caches */
  2246. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  2247. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  2248. if (!__fake_sleep) {
  2249. /* Ask the PMU to put us to sleep */
  2250. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  2251. pmu_wait_complete(&req);
  2252. }
  2253. /* The VIA is supposed not to be restored correctly*/
  2254. save_via_state();
  2255. /* Shut down various ASICs. There's a chance that we can no longer
  2256. * talk to the PMU after this, so I moved it to _after_ sending the
  2257. * sleep command to it. Still need to be checked.
  2258. */
  2259. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  2260. /* Call low-level ASM sleep handler */
  2261. if (__fake_sleep)
  2262. mdelay(5000);
  2263. else
  2264. low_sleep_handler();
  2265. /* Restore Apple core ASICs state */
  2266. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  2267. /* Restore VIA */
  2268. restore_via_state();
  2269. /* tweak LPJ before cpufreq is there */
  2270. loops_per_jiffy *= 2;
  2271. /* Restore video */
  2272. pmac_call_early_video_resume();
  2273. /* Restore L2 cache */
  2274. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  2275. _set_L2CR(save_l2cr);
  2276. /* Restore L3 cache */
  2277. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  2278. _set_L3CR(save_l3cr);
  2279. /* Restore userland MMU context */
  2280. set_context(current->active_mm->context, current->active_mm->pgd);
  2281. /* Tell PMU we are ready */
  2282. pmu_unlock();
  2283. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2284. pmu_wait_complete(&req);
  2285. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  2286. pmu_wait_complete(&req);
  2287. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  2288. loops_per_jiffy /= 2;
  2289. pmac_wakeup_devices();
  2290. return 0;
  2291. }
  2292. #define PB3400_MEM_CTRL 0xf8000000
  2293. #define PB3400_MEM_CTRL_SLEEP 0x70
  2294. static int
  2295. powerbook_sleep_3400(void)
  2296. {
  2297. int ret, i, x;
  2298. unsigned int hid0;
  2299. unsigned long p;
  2300. struct adb_request sleep_req;
  2301. void __iomem *mem_ctrl;
  2302. unsigned int __iomem *mem_ctrl_sleep;
  2303. /* first map in the memory controller registers */
  2304. mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  2305. if (mem_ctrl == NULL) {
  2306. printk("powerbook_sleep_3400: ioremap failed\n");
  2307. return -ENOMEM;
  2308. }
  2309. mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  2310. /* Allocate room for PCI save */
  2311. pbook_alloc_pci_save();
  2312. ret = pmac_suspend_devices();
  2313. if (ret) {
  2314. pbook_free_pci_save();
  2315. printk(KERN_ERR "Sleep rejected by devices\n");
  2316. return ret;
  2317. }
  2318. /* Save the state of PCI config space for some slots */
  2319. pbook_pci_save();
  2320. /* Set the memory controller to keep the memory refreshed
  2321. while we're asleep */
  2322. for (i = 0x403f; i >= 0x4000; --i) {
  2323. out_be32(mem_ctrl_sleep, i);
  2324. do {
  2325. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  2326. } while (x == 0);
  2327. if (x >= 0x100)
  2328. break;
  2329. }
  2330. /* Ask the PMU to put us to sleep */
  2331. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  2332. while (!sleep_req.complete)
  2333. mb();
  2334. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  2335. /* displacement-flush the L2 cache - necessary? */
  2336. for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
  2337. i = *(volatile int *)p;
  2338. asleep = 1;
  2339. /* Put the CPU into sleep mode */
  2340. asm volatile("mfspr %0,1008" : "=r" (hid0) :);
  2341. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  2342. asm volatile("mtspr 1008,%0" : : "r" (hid0));
  2343. _nmask_and_or_msr(0, MSR_POW | MSR_EE);
  2344. udelay(10);
  2345. /* OK, we're awake again, start restoring things */
  2346. out_be32(mem_ctrl_sleep, 0x3f);
  2347. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  2348. pbook_pci_restore();
  2349. pmu_unlock();
  2350. /* wait for the PMU interrupt sequence to complete */
  2351. while (asleep)
  2352. mb();
  2353. pmac_wakeup_devices();
  2354. pbook_free_pci_save();
  2355. iounmap(mem_ctrl);
  2356. return 0;
  2357. }
  2358. #endif /* CONFIG_PM && CONFIG_PPC32 */
  2359. /*
  2360. * Support for /dev/pmu device
  2361. */
  2362. #define RB_SIZE 0x10
  2363. struct pmu_private {
  2364. struct list_head list;
  2365. int rb_get;
  2366. int rb_put;
  2367. struct rb_entry {
  2368. unsigned short len;
  2369. unsigned char data[16];
  2370. } rb_buf[RB_SIZE];
  2371. wait_queue_head_t wait;
  2372. spinlock_t lock;
  2373. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  2374. int backlight_locker;
  2375. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  2376. };
  2377. static LIST_HEAD(all_pmu_pvt);
  2378. static DEFINE_SPINLOCK(all_pvt_lock);
  2379. static void
  2380. pmu_pass_intr(unsigned char *data, int len)
  2381. {
  2382. struct pmu_private *pp;
  2383. struct list_head *list;
  2384. int i;
  2385. unsigned long flags;
  2386. if (len > sizeof(pp->rb_buf[0].data))
  2387. len = sizeof(pp->rb_buf[0].data);
  2388. spin_lock_irqsave(&all_pvt_lock, flags);
  2389. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  2390. pp = list_entry(list, struct pmu_private, list);
  2391. spin_lock(&pp->lock);
  2392. i = pp->rb_put + 1;
  2393. if (i >= RB_SIZE)
  2394. i = 0;
  2395. if (i != pp->rb_get) {
  2396. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  2397. rp->len = len;
  2398. memcpy(rp->data, data, len);
  2399. pp->rb_put = i;
  2400. wake_up_interruptible(&pp->wait);
  2401. }
  2402. spin_unlock(&pp->lock);
  2403. }
  2404. spin_unlock_irqrestore(&all_pvt_lock, flags);
  2405. }
  2406. static int
  2407. pmu_open(struct inode *inode, struct file *file)
  2408. {
  2409. struct pmu_private *pp;
  2410. unsigned long flags;
  2411. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  2412. if (pp == 0)
  2413. return -ENOMEM;
  2414. pp->rb_get = pp->rb_put = 0;
  2415. spin_lock_init(&pp->lock);
  2416. init_waitqueue_head(&pp->wait);
  2417. spin_lock_irqsave(&all_pvt_lock, flags);
  2418. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  2419. pp->backlight_locker = 0;
  2420. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  2421. list_add(&pp->list, &all_pmu_pvt);
  2422. spin_unlock_irqrestore(&all_pvt_lock, flags);
  2423. file->private_data = pp;
  2424. return 0;
  2425. }
  2426. static ssize_t
  2427. pmu_read(struct file *file, char __user *buf,
  2428. size_t count, loff_t *ppos)
  2429. {
  2430. struct pmu_private *pp = file->private_data;
  2431. DECLARE_WAITQUEUE(wait, current);
  2432. unsigned long flags;
  2433. int ret = 0;
  2434. if (count < 1 || pp == 0)
  2435. return -EINVAL;
  2436. if (!access_ok(VERIFY_WRITE, buf, count))
  2437. return -EFAULT;
  2438. spin_lock_irqsave(&pp->lock, flags);
  2439. add_wait_queue(&pp->wait, &wait);
  2440. current->state = TASK_INTERRUPTIBLE;
  2441. for (;;) {
  2442. ret = -EAGAIN;
  2443. if (pp->rb_get != pp->rb_put) {
  2444. int i = pp->rb_get;
  2445. struct rb_entry *rp = &pp->rb_buf[i];
  2446. ret = rp->len;
  2447. spin_unlock_irqrestore(&pp->lock, flags);
  2448. if (ret > count)
  2449. ret = count;
  2450. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  2451. ret = -EFAULT;
  2452. if (++i >= RB_SIZE)
  2453. i = 0;
  2454. spin_lock_irqsave(&pp->lock, flags);
  2455. pp->rb_get = i;
  2456. }
  2457. if (ret >= 0)
  2458. break;
  2459. if (file->f_flags & O_NONBLOCK)
  2460. break;
  2461. ret = -ERESTARTSYS;
  2462. if (signal_pending(current))
  2463. break;
  2464. spin_unlock_irqrestore(&pp->lock, flags);
  2465. schedule();
  2466. spin_lock_irqsave(&pp->lock, flags);
  2467. }
  2468. current->state = TASK_RUNNING;
  2469. remove_wait_queue(&pp->wait, &wait);
  2470. spin_unlock_irqrestore(&pp->lock, flags);
  2471. return ret;
  2472. }
  2473. static ssize_t
  2474. pmu_write(struct file *file, const char __user *buf,
  2475. size_t count, loff_t *ppos)
  2476. {
  2477. return 0;
  2478. }
  2479. static unsigned int
  2480. pmu_fpoll(struct file *filp, poll_table *wait)
  2481. {
  2482. struct pmu_private *pp = filp->private_data;
  2483. unsigned int mask = 0;
  2484. unsigned long flags;
  2485. if (pp == 0)
  2486. return 0;
  2487. poll_wait(filp, &pp->wait, wait);
  2488. spin_lock_irqsave(&pp->lock, flags);
  2489. if (pp->rb_get != pp->rb_put)
  2490. mask |= POLLIN;
  2491. spin_unlock_irqrestore(&pp->lock, flags);
  2492. return mask;
  2493. }
  2494. static int
  2495. pmu_release(struct inode *inode, struct file *file)
  2496. {
  2497. struct pmu_private *pp = file->private_data;
  2498. unsigned long flags;
  2499. lock_kernel();
  2500. if (pp != 0) {
  2501. file->private_data = NULL;
  2502. spin_lock_irqsave(&all_pvt_lock, flags);
  2503. list_del(&pp->list);
  2504. spin_unlock_irqrestore(&all_pvt_lock, flags);
  2505. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  2506. if (pp->backlight_locker) {
  2507. spin_lock_irqsave(&pmu_lock, flags);
  2508. disable_kernel_backlight--;
  2509. spin_unlock_irqrestore(&pmu_lock, flags);
  2510. }
  2511. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  2512. kfree(pp);
  2513. }
  2514. unlock_kernel();
  2515. return 0;
  2516. }
  2517. static int
  2518. pmu_ioctl(struct inode * inode, struct file *filp,
  2519. u_int cmd, u_long arg)
  2520. {
  2521. __u32 __user *argp = (__u32 __user *)arg;
  2522. int error = -EINVAL;
  2523. switch (cmd) {
  2524. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  2525. case PMU_IOC_SLEEP:
  2526. if (!capable(CAP_SYS_ADMIN))
  2527. return -EACCES;
  2528. if (sleep_in_progress)
  2529. return -EBUSY;
  2530. sleep_in_progress = 1;
  2531. switch (pmu_kind) {
  2532. case PMU_OHARE_BASED:
  2533. error = powerbook_sleep_3400();
  2534. break;
  2535. case PMU_HEATHROW_BASED:
  2536. case PMU_PADDINGTON_BASED:
  2537. error = powerbook_sleep_grackle();
  2538. break;
  2539. case PMU_KEYLARGO_BASED:
  2540. error = powerbook_sleep_Core99();
  2541. break;
  2542. default:
  2543. error = -ENOSYS;
  2544. }
  2545. sleep_in_progress = 0;
  2546. break;
  2547. case PMU_IOC_CAN_SLEEP:
  2548. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0)
  2549. return put_user(0, argp);
  2550. else
  2551. return put_user(1, argp);
  2552. #endif /* CONFIG_PM && CONFIG_PPC32 */
  2553. #ifdef CONFIG_PMAC_BACKLIGHT
  2554. /* Backlight should have its own device or go via
  2555. * the fbdev
  2556. */
  2557. case PMU_IOC_GET_BACKLIGHT:
  2558. if (sleep_in_progress)
  2559. return -EBUSY;
  2560. error = get_backlight_level();
  2561. if (error < 0)
  2562. return error;
  2563. return put_user(error, argp);
  2564. case PMU_IOC_SET_BACKLIGHT:
  2565. {
  2566. __u32 value;
  2567. if (sleep_in_progress)
  2568. return -EBUSY;
  2569. error = get_user(value, argp);
  2570. if (!error)
  2571. error = set_backlight_level(value);
  2572. break;
  2573. }
  2574. #ifdef CONFIG_INPUT_ADBHID
  2575. case PMU_IOC_GRAB_BACKLIGHT: {
  2576. struct pmu_private *pp = filp->private_data;
  2577. unsigned long flags;
  2578. if (pp->backlight_locker)
  2579. return 0;
  2580. pp->backlight_locker = 1;
  2581. spin_lock_irqsave(&pmu_lock, flags);
  2582. disable_kernel_backlight++;
  2583. spin_unlock_irqrestore(&pmu_lock, flags);
  2584. return 0;
  2585. }
  2586. #endif /* CONFIG_INPUT_ADBHID */
  2587. #endif /* CONFIG_PMAC_BACKLIGHT */
  2588. case PMU_IOC_GET_MODEL:
  2589. return put_user(pmu_kind, argp);
  2590. case PMU_IOC_HAS_ADB:
  2591. return put_user(pmu_has_adb, argp);
  2592. }
  2593. return error;
  2594. }
  2595. static struct file_operations pmu_device_fops = {
  2596. .read = pmu_read,
  2597. .write = pmu_write,
  2598. .poll = pmu_fpoll,
  2599. .ioctl = pmu_ioctl,
  2600. .open = pmu_open,
  2601. .release = pmu_release,
  2602. };
  2603. static struct miscdevice pmu_device = {
  2604. PMU_MINOR, "pmu", &pmu_device_fops
  2605. };
  2606. static int pmu_device_init(void)
  2607. {
  2608. if (!via)
  2609. return 0;
  2610. if (misc_register(&pmu_device) < 0)
  2611. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2612. return 0;
  2613. }
  2614. device_initcall(pmu_device_init);
  2615. #ifdef DEBUG_SLEEP
  2616. static inline void
  2617. polled_handshake(volatile unsigned char __iomem *via)
  2618. {
  2619. via[B] &= ~TREQ; eieio();
  2620. while ((via[B] & TACK) != 0)
  2621. ;
  2622. via[B] |= TREQ; eieio();
  2623. while ((via[B] & TACK) == 0)
  2624. ;
  2625. }
  2626. static inline void
  2627. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2628. {
  2629. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2630. via[SR] = x; eieio();
  2631. polled_handshake(via);
  2632. }
  2633. static inline int
  2634. polled_recv_byte(volatile unsigned char __iomem *via)
  2635. {
  2636. int x;
  2637. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2638. x = via[SR]; eieio();
  2639. polled_handshake(via);
  2640. x = via[SR]; eieio();
  2641. return x;
  2642. }
  2643. int
  2644. pmu_polled_request(struct adb_request *req)
  2645. {
  2646. unsigned long flags;
  2647. int i, l, c;
  2648. volatile unsigned char __iomem *v = via;
  2649. req->complete = 1;
  2650. c = req->data[0];
  2651. l = pmu_data_len[c][0];
  2652. if (l >= 0 && req->nbytes != l + 1)
  2653. return -EINVAL;
  2654. local_irq_save(flags);
  2655. while (pmu_state != idle)
  2656. pmu_poll();
  2657. while ((via[B] & TACK) == 0)
  2658. ;
  2659. polled_send_byte(v, c);
  2660. if (l < 0) {
  2661. l = req->nbytes - 1;
  2662. polled_send_byte(v, l);
  2663. }
  2664. for (i = 1; i <= l; ++i)
  2665. polled_send_byte(v, req->data[i]);
  2666. l = pmu_data_len[c][1];
  2667. if (l < 0)
  2668. l = polled_recv_byte(v);
  2669. for (i = 0; i < l; ++i)
  2670. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2671. if (req->done)
  2672. (*req->done)(req);
  2673. local_irq_restore(flags);
  2674. return 0;
  2675. }
  2676. #endif /* DEBUG_SLEEP */
  2677. /* FIXME: This is a temporary set of callbacks to enable us
  2678. * to do suspend-to-disk.
  2679. */
  2680. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  2681. static int pmu_sys_suspended = 0;
  2682. static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
  2683. {
  2684. if (state.event != PM_EVENT_SUSPEND || pmu_sys_suspended)
  2685. return 0;
  2686. /* Suspend PMU event interrupts */
  2687. pmu_suspend();
  2688. pmu_sys_suspended = 1;
  2689. return 0;
  2690. }
  2691. static int pmu_sys_resume(struct sys_device *sysdev)
  2692. {
  2693. struct adb_request req;
  2694. if (!pmu_sys_suspended)
  2695. return 0;
  2696. /* Tell PMU we are ready */
  2697. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2698. pmu_wait_complete(&req);
  2699. /* Resume PMU event interrupts */
  2700. pmu_resume();
  2701. pmu_sys_suspended = 0;
  2702. return 0;
  2703. }
  2704. #endif /* CONFIG_PM && CONFIG_PPC32 */
  2705. static struct sysdev_class pmu_sysclass = {
  2706. set_kset_name("pmu"),
  2707. };
  2708. static struct sys_device device_pmu = {
  2709. .id = 0,
  2710. .cls = &pmu_sysclass,
  2711. };
  2712. static struct sysdev_driver driver_pmu = {
  2713. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  2714. .suspend = &pmu_sys_suspend,
  2715. .resume = &pmu_sys_resume,
  2716. #endif /* CONFIG_PM && CONFIG_PPC32 */
  2717. };
  2718. static int __init init_pmu_sysfs(void)
  2719. {
  2720. int rc;
  2721. rc = sysdev_class_register(&pmu_sysclass);
  2722. if (rc) {
  2723. printk(KERN_ERR "Failed registering PMU sys class\n");
  2724. return -ENODEV;
  2725. }
  2726. rc = sysdev_register(&device_pmu);
  2727. if (rc) {
  2728. printk(KERN_ERR "Failed registering PMU sys device\n");
  2729. return -ENODEV;
  2730. }
  2731. rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
  2732. if (rc) {
  2733. printk(KERN_ERR "Failed registering PMU sys driver\n");
  2734. return -ENODEV;
  2735. }
  2736. return 0;
  2737. }
  2738. subsys_initcall(init_pmu_sysfs);
  2739. EXPORT_SYMBOL(pmu_request);
  2740. EXPORT_SYMBOL(pmu_poll);
  2741. EXPORT_SYMBOL(pmu_poll_adb);
  2742. EXPORT_SYMBOL(pmu_wait_complete);
  2743. EXPORT_SYMBOL(pmu_suspend);
  2744. EXPORT_SYMBOL(pmu_resume);
  2745. EXPORT_SYMBOL(pmu_unlock);
  2746. EXPORT_SYMBOL(pmu_i2c_combined_read);
  2747. EXPORT_SYMBOL(pmu_i2c_stdsub_write);
  2748. EXPORT_SYMBOL(pmu_i2c_simple_read);
  2749. EXPORT_SYMBOL(pmu_i2c_simple_write);
  2750. #if defined(CONFIG_PM) && defined(CONFIG_PPC32)
  2751. EXPORT_SYMBOL(pmu_register_sleep_notifier);
  2752. EXPORT_SYMBOL(pmu_unregister_sleep_notifier);
  2753. EXPORT_SYMBOL(pmu_enable_irled);
  2754. EXPORT_SYMBOL(pmu_battery_count);
  2755. EXPORT_SYMBOL(pmu_batteries);
  2756. EXPORT_SYMBOL(pmu_power_flags);
  2757. #endif /* CONFIG_PM && CONFIG_PPC32 */