s3c-pcm.c 12 KB

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  1. /* sound/soc/s3c24xx/s3c-pcm.c
  2. *
  3. * ALSA SoC Audio Layer - S3C PCM-Controller driver
  4. *
  5. * Copyright (c) 2009 Samsung Electronics Co. Ltd
  6. * Author: Jaswinder Singh <jassi.brar@samsung.com>
  7. * based upon I2S drivers by Ben Dooks.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/device.h>
  16. #include <linux/delay.h>
  17. #include <linux/clk.h>
  18. #include <linux/kernel.h>
  19. #include <linux/gpio.h>
  20. #include <linux/io.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/initval.h>
  25. #include <sound/soc.h>
  26. #include <plat/audio.h>
  27. #include <plat/dma.h>
  28. #include "s3c-dma.h"
  29. #include "s3c-pcm.h"
  30. static struct s3c2410_dma_client s3c_pcm_dma_client_out = {
  31. .name = "PCM Stereo out"
  32. };
  33. static struct s3c2410_dma_client s3c_pcm_dma_client_in = {
  34. .name = "PCM Stereo in"
  35. };
  36. static struct s3c_dma_params s3c_pcm_stereo_out[] = {
  37. [0] = {
  38. .client = &s3c_pcm_dma_client_out,
  39. .dma_size = 4,
  40. },
  41. [1] = {
  42. .client = &s3c_pcm_dma_client_out,
  43. .dma_size = 4,
  44. },
  45. };
  46. static struct s3c_dma_params s3c_pcm_stereo_in[] = {
  47. [0] = {
  48. .client = &s3c_pcm_dma_client_in,
  49. .dma_size = 4,
  50. },
  51. [1] = {
  52. .client = &s3c_pcm_dma_client_in,
  53. .dma_size = 4,
  54. },
  55. };
  56. static struct s3c_pcm_info s3c_pcm[2];
  57. static inline struct s3c_pcm_info *to_info(struct snd_soc_dai *cpu_dai)
  58. {
  59. return cpu_dai->private_data;
  60. }
  61. static void s3c_pcm_snd_txctrl(struct s3c_pcm_info *pcm, int on)
  62. {
  63. void __iomem *regs = pcm->regs;
  64. u32 ctl, clkctl;
  65. clkctl = readl(regs + S3C_PCM_CLKCTL);
  66. ctl = readl(regs + S3C_PCM_CTL);
  67. ctl &= ~(S3C_PCM_CTL_TXDIPSTICK_MASK
  68. << S3C_PCM_CTL_TXDIPSTICK_SHIFT);
  69. if (on) {
  70. ctl |= S3C_PCM_CTL_TXDMA_EN;
  71. ctl |= S3C_PCM_CTL_TXFIFO_EN;
  72. ctl |= S3C_PCM_CTL_ENABLE;
  73. ctl |= (0x20<<S3C_PCM_CTL_TXDIPSTICK_SHIFT);
  74. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  75. } else {
  76. ctl &= ~S3C_PCM_CTL_TXDMA_EN;
  77. ctl &= ~S3C_PCM_CTL_TXFIFO_EN;
  78. if (!(ctl & S3C_PCM_CTL_RXFIFO_EN)) {
  79. ctl &= ~S3C_PCM_CTL_ENABLE;
  80. if (!pcm->idleclk)
  81. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  82. }
  83. }
  84. writel(clkctl, regs + S3C_PCM_CLKCTL);
  85. writel(ctl, regs + S3C_PCM_CTL);
  86. }
  87. static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
  88. {
  89. void __iomem *regs = pcm->regs;
  90. u32 ctl, clkctl;
  91. ctl = readl(regs + S3C_PCM_CTL);
  92. clkctl = readl(regs + S3C_PCM_CLKCTL);
  93. if (on) {
  94. ctl |= S3C_PCM_CTL_RXDMA_EN;
  95. ctl |= S3C_PCM_CTL_RXFIFO_EN;
  96. ctl |= S3C_PCM_CTL_ENABLE;
  97. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  98. } else {
  99. ctl &= ~S3C_PCM_CTL_RXDMA_EN;
  100. ctl &= ~S3C_PCM_CTL_RXFIFO_EN;
  101. if (!(ctl & S3C_PCM_CTL_TXFIFO_EN)) {
  102. ctl &= ~S3C_PCM_CTL_ENABLE;
  103. if (!pcm->idleclk)
  104. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  105. }
  106. }
  107. writel(clkctl, regs + S3C_PCM_CLKCTL);
  108. writel(ctl, regs + S3C_PCM_CTL);
  109. }
  110. static int s3c_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
  111. struct snd_soc_dai *dai)
  112. {
  113. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  114. struct s3c_pcm_info *pcm = to_info(rtd->dai->cpu_dai);
  115. unsigned long flags;
  116. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  117. switch (cmd) {
  118. case SNDRV_PCM_TRIGGER_START:
  119. case SNDRV_PCM_TRIGGER_RESUME:
  120. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  121. spin_lock_irqsave(&pcm->lock, flags);
  122. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  123. s3c_pcm_snd_rxctrl(pcm, 1);
  124. else
  125. s3c_pcm_snd_txctrl(pcm, 1);
  126. spin_unlock_irqrestore(&pcm->lock, flags);
  127. break;
  128. case SNDRV_PCM_TRIGGER_STOP:
  129. case SNDRV_PCM_TRIGGER_SUSPEND:
  130. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  131. spin_lock_irqsave(&pcm->lock, flags);
  132. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  133. s3c_pcm_snd_rxctrl(pcm, 0);
  134. else
  135. s3c_pcm_snd_txctrl(pcm, 0);
  136. spin_unlock_irqrestore(&pcm->lock, flags);
  137. break;
  138. default:
  139. return -EINVAL;
  140. }
  141. return 0;
  142. }
  143. static int s3c_pcm_hw_params(struct snd_pcm_substream *substream,
  144. struct snd_pcm_hw_params *params,
  145. struct snd_soc_dai *socdai)
  146. {
  147. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  148. struct snd_soc_dai_link *dai = rtd->dai;
  149. struct s3c_pcm_info *pcm = to_info(dai->cpu_dai);
  150. struct s3c_dma_params *dma_data;
  151. void __iomem *regs = pcm->regs;
  152. struct clk *clk;
  153. int sclk_div, sync_div;
  154. unsigned long flags;
  155. u32 clkctl;
  156. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  157. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  158. dma_data = pcm->dma_playback;
  159. else
  160. dma_data = pcm->dma_capture;
  161. snd_soc_dai_set_dma_data(dai->cpu_dai, substream, dma_data);
  162. /* Strictly check for sample size */
  163. switch (params_format(params)) {
  164. case SNDRV_PCM_FORMAT_S16_LE:
  165. break;
  166. default:
  167. return -EINVAL;
  168. }
  169. spin_lock_irqsave(&pcm->lock, flags);
  170. /* Get hold of the PCMSOURCE_CLK */
  171. clkctl = readl(regs + S3C_PCM_CLKCTL);
  172. if (clkctl & S3C_PCM_CLKCTL_SERCLKSEL_PCLK)
  173. clk = pcm->pclk;
  174. else
  175. clk = pcm->cclk;
  176. /* Set the SCLK divider */
  177. sclk_div = clk_get_rate(clk) / pcm->sclk_per_fs /
  178. params_rate(params) / 2 - 1;
  179. clkctl &= ~(S3C_PCM_CLKCTL_SCLKDIV_MASK
  180. << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
  181. clkctl |= ((sclk_div & S3C_PCM_CLKCTL_SCLKDIV_MASK)
  182. << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
  183. /* Set the SYNC divider */
  184. sync_div = pcm->sclk_per_fs - 1;
  185. clkctl &= ~(S3C_PCM_CLKCTL_SYNCDIV_MASK
  186. << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
  187. clkctl |= ((sync_div & S3C_PCM_CLKCTL_SYNCDIV_MASK)
  188. << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
  189. writel(clkctl, regs + S3C_PCM_CLKCTL);
  190. spin_unlock_irqrestore(&pcm->lock, flags);
  191. dev_dbg(pcm->dev, "PCMSOURCE_CLK-%lu SCLK=%ufs SCLK_DIV=%d SYNC_DIV=%d\n",
  192. clk_get_rate(clk), pcm->sclk_per_fs,
  193. sclk_div, sync_div);
  194. return 0;
  195. }
  196. static int s3c_pcm_set_fmt(struct snd_soc_dai *cpu_dai,
  197. unsigned int fmt)
  198. {
  199. struct s3c_pcm_info *pcm = to_info(cpu_dai);
  200. void __iomem *regs = pcm->regs;
  201. unsigned long flags;
  202. int ret = 0;
  203. u32 ctl;
  204. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  205. spin_lock_irqsave(&pcm->lock, flags);
  206. ctl = readl(regs + S3C_PCM_CTL);
  207. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  208. case SND_SOC_DAIFMT_NB_NF:
  209. /* Nothing to do, NB_NF by default */
  210. break;
  211. default:
  212. dev_err(pcm->dev, "Unsupported clock inversion!\n");
  213. ret = -EINVAL;
  214. goto exit;
  215. }
  216. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  217. case SND_SOC_DAIFMT_CBS_CFS:
  218. /* Nothing to do, Master by default */
  219. break;
  220. default:
  221. dev_err(pcm->dev, "Unsupported master/slave format!\n");
  222. ret = -EINVAL;
  223. goto exit;
  224. }
  225. switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
  226. case SND_SOC_DAIFMT_CONT:
  227. pcm->idleclk = 1;
  228. break;
  229. case SND_SOC_DAIFMT_GATED:
  230. pcm->idleclk = 0;
  231. break;
  232. default:
  233. dev_err(pcm->dev, "Invalid Clock gating request!\n");
  234. ret = -EINVAL;
  235. goto exit;
  236. }
  237. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  238. case SND_SOC_DAIFMT_DSP_A:
  239. ctl |= S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
  240. ctl |= S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
  241. break;
  242. case SND_SOC_DAIFMT_DSP_B:
  243. ctl &= ~S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
  244. ctl &= ~S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
  245. break;
  246. default:
  247. dev_err(pcm->dev, "Unsupported data format!\n");
  248. ret = -EINVAL;
  249. goto exit;
  250. }
  251. writel(ctl, regs + S3C_PCM_CTL);
  252. exit:
  253. spin_unlock_irqrestore(&pcm->lock, flags);
  254. return ret;
  255. }
  256. static int s3c_pcm_set_clkdiv(struct snd_soc_dai *cpu_dai,
  257. int div_id, int div)
  258. {
  259. struct s3c_pcm_info *pcm = to_info(cpu_dai);
  260. switch (div_id) {
  261. case S3C_PCM_SCLK_PER_FS:
  262. pcm->sclk_per_fs = div;
  263. break;
  264. default:
  265. return -EINVAL;
  266. }
  267. return 0;
  268. }
  269. static int s3c_pcm_set_sysclk(struct snd_soc_dai *cpu_dai,
  270. int clk_id, unsigned int freq, int dir)
  271. {
  272. struct s3c_pcm_info *pcm = to_info(cpu_dai);
  273. void __iomem *regs = pcm->regs;
  274. u32 clkctl = readl(regs + S3C_PCM_CLKCTL);
  275. switch (clk_id) {
  276. case S3C_PCM_CLKSRC_PCLK:
  277. clkctl |= S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
  278. break;
  279. case S3C_PCM_CLKSRC_MUX:
  280. clkctl &= ~S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
  281. if (clk_get_rate(pcm->cclk) != freq)
  282. clk_set_rate(pcm->cclk, freq);
  283. break;
  284. default:
  285. return -EINVAL;
  286. }
  287. writel(clkctl, regs + S3C_PCM_CLKCTL);
  288. return 0;
  289. }
  290. static struct snd_soc_dai_ops s3c_pcm_dai_ops = {
  291. .set_sysclk = s3c_pcm_set_sysclk,
  292. .set_clkdiv = s3c_pcm_set_clkdiv,
  293. .trigger = s3c_pcm_trigger,
  294. .hw_params = s3c_pcm_hw_params,
  295. .set_fmt = s3c_pcm_set_fmt,
  296. };
  297. #define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000
  298. #define S3C_PCM_DECLARE(n) \
  299. { \
  300. .name = "samsung-pcm", \
  301. .id = (n), \
  302. .symmetric_rates = 1, \
  303. .ops = &s3c_pcm_dai_ops, \
  304. .playback = { \
  305. .channels_min = 2, \
  306. .channels_max = 2, \
  307. .rates = S3C_PCM_RATES, \
  308. .formats = SNDRV_PCM_FMTBIT_S16_LE, \
  309. }, \
  310. .capture = { \
  311. .channels_min = 2, \
  312. .channels_max = 2, \
  313. .rates = S3C_PCM_RATES, \
  314. .formats = SNDRV_PCM_FMTBIT_S16_LE, \
  315. }, \
  316. }
  317. struct snd_soc_dai s3c_pcm_dai[] = {
  318. S3C_PCM_DECLARE(0),
  319. S3C_PCM_DECLARE(1),
  320. };
  321. EXPORT_SYMBOL_GPL(s3c_pcm_dai);
  322. static __devinit int s3c_pcm_dev_probe(struct platform_device *pdev)
  323. {
  324. struct s3c_pcm_info *pcm;
  325. struct snd_soc_dai *dai;
  326. struct resource *mem_res, *dmatx_res, *dmarx_res;
  327. struct s3c_audio_pdata *pcm_pdata;
  328. int ret;
  329. /* Check for valid device index */
  330. if ((pdev->id < 0) || pdev->id >= ARRAY_SIZE(s3c_pcm)) {
  331. dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
  332. return -EINVAL;
  333. }
  334. pcm_pdata = pdev->dev.platform_data;
  335. /* Check for availability of necessary resource */
  336. dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  337. if (!dmatx_res) {
  338. dev_err(&pdev->dev, "Unable to get PCM-TX dma resource\n");
  339. return -ENXIO;
  340. }
  341. dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  342. if (!dmarx_res) {
  343. dev_err(&pdev->dev, "Unable to get PCM-RX dma resource\n");
  344. return -ENXIO;
  345. }
  346. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  347. if (!mem_res) {
  348. dev_err(&pdev->dev, "Unable to get register resource\n");
  349. return -ENXIO;
  350. }
  351. if (pcm_pdata && pcm_pdata->cfg_gpio && pcm_pdata->cfg_gpio(pdev)) {
  352. dev_err(&pdev->dev, "Unable to configure gpio\n");
  353. return -EINVAL;
  354. }
  355. pcm = &s3c_pcm[pdev->id];
  356. pcm->dev = &pdev->dev;
  357. spin_lock_init(&pcm->lock);
  358. dai = &s3c_pcm_dai[pdev->id];
  359. dai->dev = &pdev->dev;
  360. /* Default is 128fs */
  361. pcm->sclk_per_fs = 128;
  362. pcm->cclk = clk_get(&pdev->dev, "audio-bus");
  363. if (IS_ERR(pcm->cclk)) {
  364. dev_err(&pdev->dev, "failed to get audio-bus\n");
  365. ret = PTR_ERR(pcm->cclk);
  366. goto err1;
  367. }
  368. clk_enable(pcm->cclk);
  369. /* record our pcm structure for later use in the callbacks */
  370. dai->private_data = pcm;
  371. if (!request_mem_region(mem_res->start,
  372. resource_size(mem_res), "samsung-pcm")) {
  373. dev_err(&pdev->dev, "Unable to request register region\n");
  374. ret = -EBUSY;
  375. goto err2;
  376. }
  377. pcm->regs = ioremap(mem_res->start, 0x100);
  378. if (pcm->regs == NULL) {
  379. dev_err(&pdev->dev, "cannot ioremap registers\n");
  380. ret = -ENXIO;
  381. goto err3;
  382. }
  383. pcm->pclk = clk_get(&pdev->dev, "pcm");
  384. if (IS_ERR(pcm->pclk)) {
  385. dev_err(&pdev->dev, "failed to get pcm_clock\n");
  386. ret = -ENOENT;
  387. goto err4;
  388. }
  389. clk_enable(pcm->pclk);
  390. ret = snd_soc_register_dai(dai);
  391. if (ret != 0) {
  392. dev_err(&pdev->dev, "failed to get pcm_clock\n");
  393. goto err5;
  394. }
  395. s3c_pcm_stereo_in[pdev->id].dma_addr = mem_res->start
  396. + S3C_PCM_RXFIFO;
  397. s3c_pcm_stereo_out[pdev->id].dma_addr = mem_res->start
  398. + S3C_PCM_TXFIFO;
  399. s3c_pcm_stereo_in[pdev->id].channel = dmarx_res->start;
  400. s3c_pcm_stereo_out[pdev->id].channel = dmatx_res->start;
  401. pcm->dma_capture = &s3c_pcm_stereo_in[pdev->id];
  402. pcm->dma_playback = &s3c_pcm_stereo_out[pdev->id];
  403. return 0;
  404. err5:
  405. clk_disable(pcm->pclk);
  406. clk_put(pcm->pclk);
  407. err4:
  408. iounmap(pcm->regs);
  409. err3:
  410. release_mem_region(mem_res->start, resource_size(mem_res));
  411. err2:
  412. clk_disable(pcm->cclk);
  413. clk_put(pcm->cclk);
  414. err1:
  415. return ret;
  416. }
  417. static __devexit int s3c_pcm_dev_remove(struct platform_device *pdev)
  418. {
  419. struct s3c_pcm_info *pcm = &s3c_pcm[pdev->id];
  420. struct resource *mem_res;
  421. iounmap(pcm->regs);
  422. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  423. release_mem_region(mem_res->start, resource_size(mem_res));
  424. clk_disable(pcm->cclk);
  425. clk_disable(pcm->pclk);
  426. clk_put(pcm->pclk);
  427. clk_put(pcm->cclk);
  428. return 0;
  429. }
  430. static struct platform_driver s3c_pcm_driver = {
  431. .probe = s3c_pcm_dev_probe,
  432. .remove = s3c_pcm_dev_remove,
  433. .driver = {
  434. .name = "samsung-pcm",
  435. .owner = THIS_MODULE,
  436. },
  437. };
  438. static int __init s3c_pcm_init(void)
  439. {
  440. return platform_driver_register(&s3c_pcm_driver);
  441. }
  442. module_init(s3c_pcm_init);
  443. static void __exit s3c_pcm_exit(void)
  444. {
  445. platform_driver_unregister(&s3c_pcm_driver);
  446. }
  447. module_exit(s3c_pcm_exit);
  448. /* Module information */
  449. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  450. MODULE_DESCRIPTION("S3C PCM Controller Driver");
  451. MODULE_LICENSE("GPL");