wm8988.c 28 KB

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  1. /*
  2. * wm8988.c -- WM8988 ALSA SoC audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. * Copyright 2005 Openedhand Ltd.
  6. *
  7. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/spi/spi.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/slab.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/tlv.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/initval.h>
  29. #include "wm8988.h"
  30. /*
  31. * wm8988 register cache
  32. * We can't read the WM8988 register space when we
  33. * are using 2 wire for device control, so we cache them instead.
  34. */
  35. static const u16 wm8988_reg[] = {
  36. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  37. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  38. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  39. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  40. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  41. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  42. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  43. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  44. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  45. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  46. 0x0079, 0x0079, 0x0079, /* 40 */
  47. };
  48. /* codec private data */
  49. struct wm8988_priv {
  50. unsigned int sysclk;
  51. struct snd_soc_codec codec;
  52. struct snd_pcm_hw_constraint_list *sysclk_constraints;
  53. u16 reg_cache[WM8988_NUM_REG];
  54. };
  55. #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0)
  56. /*
  57. * WM8988 Controls
  58. */
  59. static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"};
  60. static const struct soc_enum bass_boost =
  61. SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt);
  62. static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  63. static const struct soc_enum bass_filter =
  64. SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt);
  65. static const char *treble_txt[] = {"8kHz", "4kHz"};
  66. static const struct soc_enum treble =
  67. SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt);
  68. static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"};
  69. static const struct soc_enum stereo_3d_lc =
  70. SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt);
  71. static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
  72. static const struct soc_enum stereo_3d_uc =
  73. SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt);
  74. static const char *stereo_3d_func_txt[] = {"Capture", "Playback"};
  75. static const struct soc_enum stereo_3d_func =
  76. SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt);
  77. static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"};
  78. static const struct soc_enum alc_func =
  79. SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt);
  80. static const char *ng_type_txt[] = {"Constant PGA Gain",
  81. "Mute ADC Output"};
  82. static const struct soc_enum ng_type =
  83. SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt);
  84. static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  85. static const struct soc_enum deemph =
  86. SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt);
  87. static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert",
  88. "L + R Invert"};
  89. static const struct soc_enum adcpol =
  90. SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt);
  91. static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0);
  92. static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
  93. static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
  94. static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
  95. static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
  96. static const struct snd_kcontrol_new wm8988_snd_controls[] = {
  97. SOC_ENUM("Bass Boost", bass_boost),
  98. SOC_ENUM("Bass Filter", bass_filter),
  99. SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1),
  100. SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0),
  101. SOC_ENUM("Treble Cut-off", treble),
  102. SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0),
  103. SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0),
  104. SOC_ENUM("3D Lower Cut-off", stereo_3d_lc),
  105. SOC_ENUM("3D Upper Cut-off", stereo_3d_uc),
  106. SOC_ENUM("3D Mode", stereo_3d_func),
  107. SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0),
  108. SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0),
  109. SOC_ENUM("ALC Capture Function", alc_func),
  110. SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0),
  111. SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0),
  112. SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0),
  113. SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0),
  114. SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0),
  115. SOC_ENUM("ALC Capture NG Type", ng_type),
  116. SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0),
  117. SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0),
  118. SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC,
  119. 0, 255, 0, adc_tlv),
  120. SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL,
  121. 0, 63, 0, pga_tlv),
  122. SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0),
  123. SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1),
  124. SOC_ENUM("Playback De-emphasis", deemph),
  125. SOC_ENUM("Capture Polarity", adcpol),
  126. SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0),
  127. SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0),
  128. SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv),
  129. SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1,
  130. bypass_tlv),
  131. SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1,
  132. bypass_tlv),
  133. SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1,
  134. bypass_tlv),
  135. SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1,
  136. bypass_tlv),
  137. SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V,
  138. WM8988_ROUT1V, 7, 1, 0),
  139. SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V,
  140. 0, 127, 0, out_tlv),
  141. SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V,
  142. WM8988_ROUT2V, 7, 1, 0),
  143. SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V,
  144. 0, 127, 0, out_tlv),
  145. };
  146. /*
  147. * DAPM Controls
  148. */
  149. static int wm8988_lrc_control(struct snd_soc_dapm_widget *w,
  150. struct snd_kcontrol *kcontrol, int event)
  151. {
  152. struct snd_soc_codec *codec = w->codec;
  153. u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2);
  154. /* Use the DAC to gate LRC if active, otherwise use ADC */
  155. if (snd_soc_read(codec, WM8988_PWR2) & 0x180)
  156. adctl2 &= ~0x4;
  157. else
  158. adctl2 |= 0x4;
  159. return snd_soc_write(codec, WM8988_ADCTL2, adctl2);
  160. }
  161. static const char *wm8988_line_texts[] = {
  162. "Line 1", "Line 2", "PGA", "Differential"};
  163. static const unsigned int wm8988_line_values[] = {
  164. 0, 1, 3, 4};
  165. static const struct soc_enum wm8988_lline_enum =
  166. SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7,
  167. ARRAY_SIZE(wm8988_line_texts),
  168. wm8988_line_texts,
  169. wm8988_line_values);
  170. static const struct snd_kcontrol_new wm8988_left_line_controls =
  171. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  172. static const struct soc_enum wm8988_rline_enum =
  173. SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7,
  174. ARRAY_SIZE(wm8988_line_texts),
  175. wm8988_line_texts,
  176. wm8988_line_values);
  177. static const struct snd_kcontrol_new wm8988_right_line_controls =
  178. SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum);
  179. /* Left Mixer */
  180. static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = {
  181. SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0),
  182. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0),
  183. SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0),
  184. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0),
  185. };
  186. /* Right Mixer */
  187. static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = {
  188. SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0),
  189. SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0),
  190. SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0),
  191. SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0),
  192. };
  193. static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"};
  194. static const unsigned int wm8988_pga_val[] = { 0, 1, 3 };
  195. /* Left PGA Mux */
  196. static const struct soc_enum wm8988_lpga_enum =
  197. SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3,
  198. ARRAY_SIZE(wm8988_pga_sel),
  199. wm8988_pga_sel,
  200. wm8988_pga_val);
  201. static const struct snd_kcontrol_new wm8988_left_pga_controls =
  202. SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum);
  203. /* Right PGA Mux */
  204. static const struct soc_enum wm8988_rpga_enum =
  205. SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3,
  206. ARRAY_SIZE(wm8988_pga_sel),
  207. wm8988_pga_sel,
  208. wm8988_pga_val);
  209. static const struct snd_kcontrol_new wm8988_right_pga_controls =
  210. SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum);
  211. /* Differential Mux */
  212. static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"};
  213. static const struct soc_enum diffmux =
  214. SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel);
  215. static const struct snd_kcontrol_new wm8988_diffmux_controls =
  216. SOC_DAPM_ENUM("Route", diffmux);
  217. /* Mono ADC Mux */
  218. static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)",
  219. "Mono (Right)", "Digital Mono"};
  220. static const struct soc_enum monomux =
  221. SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux);
  222. static const struct snd_kcontrol_new wm8988_monomux_controls =
  223. SOC_DAPM_ENUM("Route", monomux);
  224. static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = {
  225. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0),
  226. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  227. &wm8988_diffmux_controls),
  228. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  229. &wm8988_monomux_controls),
  230. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  231. &wm8988_monomux_controls),
  232. SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0,
  233. &wm8988_left_pga_controls),
  234. SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0,
  235. &wm8988_right_pga_controls),
  236. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  237. &wm8988_left_line_controls),
  238. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  239. &wm8988_right_line_controls),
  240. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0),
  241. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0),
  242. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0),
  243. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0),
  244. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  245. &wm8988_left_mixer_controls[0],
  246. ARRAY_SIZE(wm8988_left_mixer_controls)),
  247. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  248. &wm8988_right_mixer_controls[0],
  249. ARRAY_SIZE(wm8988_right_mixer_controls)),
  250. SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0),
  251. SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0),
  252. SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0),
  253. SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0),
  254. SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control),
  255. SND_SOC_DAPM_OUTPUT("LOUT1"),
  256. SND_SOC_DAPM_OUTPUT("ROUT1"),
  257. SND_SOC_DAPM_OUTPUT("LOUT2"),
  258. SND_SOC_DAPM_OUTPUT("ROUT2"),
  259. SND_SOC_DAPM_OUTPUT("VREF"),
  260. SND_SOC_DAPM_INPUT("LINPUT1"),
  261. SND_SOC_DAPM_INPUT("LINPUT2"),
  262. SND_SOC_DAPM_INPUT("RINPUT1"),
  263. SND_SOC_DAPM_INPUT("RINPUT2"),
  264. };
  265. static const struct snd_soc_dapm_route audio_map[] = {
  266. { "Left Line Mux", "Line 1", "LINPUT1" },
  267. { "Left Line Mux", "Line 2", "LINPUT2" },
  268. { "Left Line Mux", "PGA", "Left PGA Mux" },
  269. { "Left Line Mux", "Differential", "Differential Mux" },
  270. { "Right Line Mux", "Line 1", "RINPUT1" },
  271. { "Right Line Mux", "Line 2", "RINPUT2" },
  272. { "Right Line Mux", "PGA", "Right PGA Mux" },
  273. { "Right Line Mux", "Differential", "Differential Mux" },
  274. { "Left PGA Mux", "Line 1", "LINPUT1" },
  275. { "Left PGA Mux", "Line 2", "LINPUT2" },
  276. { "Left PGA Mux", "Differential", "Differential Mux" },
  277. { "Right PGA Mux", "Line 1", "RINPUT1" },
  278. { "Right PGA Mux", "Line 2", "RINPUT2" },
  279. { "Right PGA Mux", "Differential", "Differential Mux" },
  280. { "Differential Mux", "Line 1", "LINPUT1" },
  281. { "Differential Mux", "Line 1", "RINPUT1" },
  282. { "Differential Mux", "Line 2", "LINPUT2" },
  283. { "Differential Mux", "Line 2", "RINPUT2" },
  284. { "Left ADC Mux", "Stereo", "Left PGA Mux" },
  285. { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" },
  286. { "Left ADC Mux", "Digital Mono", "Left PGA Mux" },
  287. { "Right ADC Mux", "Stereo", "Right PGA Mux" },
  288. { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" },
  289. { "Right ADC Mux", "Digital Mono", "Right PGA Mux" },
  290. { "Left ADC", NULL, "Left ADC Mux" },
  291. { "Right ADC", NULL, "Right ADC Mux" },
  292. { "Left Line Mux", "Line 1", "LINPUT1" },
  293. { "Left Line Mux", "Line 2", "LINPUT2" },
  294. { "Left Line Mux", "PGA", "Left PGA Mux" },
  295. { "Left Line Mux", "Differential", "Differential Mux" },
  296. { "Right Line Mux", "Line 1", "RINPUT1" },
  297. { "Right Line Mux", "Line 2", "RINPUT2" },
  298. { "Right Line Mux", "PGA", "Right PGA Mux" },
  299. { "Right Line Mux", "Differential", "Differential Mux" },
  300. { "Left Mixer", "Playback Switch", "Left DAC" },
  301. { "Left Mixer", "Left Bypass Switch", "Left Line Mux" },
  302. { "Left Mixer", "Right Playback Switch", "Right DAC" },
  303. { "Left Mixer", "Right Bypass Switch", "Right Line Mux" },
  304. { "Right Mixer", "Left Playback Switch", "Left DAC" },
  305. { "Right Mixer", "Left Bypass Switch", "Left Line Mux" },
  306. { "Right Mixer", "Playback Switch", "Right DAC" },
  307. { "Right Mixer", "Right Bypass Switch", "Right Line Mux" },
  308. { "Left Out 1", NULL, "Left Mixer" },
  309. { "LOUT1", NULL, "Left Out 1" },
  310. { "Right Out 1", NULL, "Right Mixer" },
  311. { "ROUT1", NULL, "Right Out 1" },
  312. { "Left Out 2", NULL, "Left Mixer" },
  313. { "LOUT2", NULL, "Left Out 2" },
  314. { "Right Out 2", NULL, "Right Mixer" },
  315. { "ROUT2", NULL, "Right Out 2" },
  316. };
  317. struct _coeff_div {
  318. u32 mclk;
  319. u32 rate;
  320. u16 fs;
  321. u8 sr:5;
  322. u8 usb:1;
  323. };
  324. /* codec hifi mclk clock divider coefficients */
  325. static const struct _coeff_div coeff_div[] = {
  326. /* 8k */
  327. {12288000, 8000, 1536, 0x6, 0x0},
  328. {11289600, 8000, 1408, 0x16, 0x0},
  329. {18432000, 8000, 2304, 0x7, 0x0},
  330. {16934400, 8000, 2112, 0x17, 0x0},
  331. {12000000, 8000, 1500, 0x6, 0x1},
  332. /* 11.025k */
  333. {11289600, 11025, 1024, 0x18, 0x0},
  334. {16934400, 11025, 1536, 0x19, 0x0},
  335. {12000000, 11025, 1088, 0x19, 0x1},
  336. /* 16k */
  337. {12288000, 16000, 768, 0xa, 0x0},
  338. {18432000, 16000, 1152, 0xb, 0x0},
  339. {12000000, 16000, 750, 0xa, 0x1},
  340. /* 22.05k */
  341. {11289600, 22050, 512, 0x1a, 0x0},
  342. {16934400, 22050, 768, 0x1b, 0x0},
  343. {12000000, 22050, 544, 0x1b, 0x1},
  344. /* 32k */
  345. {12288000, 32000, 384, 0xc, 0x0},
  346. {18432000, 32000, 576, 0xd, 0x0},
  347. {12000000, 32000, 375, 0xa, 0x1},
  348. /* 44.1k */
  349. {11289600, 44100, 256, 0x10, 0x0},
  350. {16934400, 44100, 384, 0x11, 0x0},
  351. {12000000, 44100, 272, 0x11, 0x1},
  352. /* 48k */
  353. {12288000, 48000, 256, 0x0, 0x0},
  354. {18432000, 48000, 384, 0x1, 0x0},
  355. {12000000, 48000, 250, 0x0, 0x1},
  356. /* 88.2k */
  357. {11289600, 88200, 128, 0x1e, 0x0},
  358. {16934400, 88200, 192, 0x1f, 0x0},
  359. {12000000, 88200, 136, 0x1f, 0x1},
  360. /* 96k */
  361. {12288000, 96000, 128, 0xe, 0x0},
  362. {18432000, 96000, 192, 0xf, 0x0},
  363. {12000000, 96000, 125, 0xe, 0x1},
  364. };
  365. static inline int get_coeff(int mclk, int rate)
  366. {
  367. int i;
  368. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  369. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  370. return i;
  371. }
  372. return -EINVAL;
  373. }
  374. /* The set of rates we can generate from the above for each SYSCLK */
  375. static unsigned int rates_12288[] = {
  376. 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000,
  377. };
  378. static struct snd_pcm_hw_constraint_list constraints_12288 = {
  379. .count = ARRAY_SIZE(rates_12288),
  380. .list = rates_12288,
  381. };
  382. static unsigned int rates_112896[] = {
  383. 8000, 11025, 22050, 44100,
  384. };
  385. static struct snd_pcm_hw_constraint_list constraints_112896 = {
  386. .count = ARRAY_SIZE(rates_112896),
  387. .list = rates_112896,
  388. };
  389. static unsigned int rates_12[] = {
  390. 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000,
  391. 48000, 88235, 96000,
  392. };
  393. static struct snd_pcm_hw_constraint_list constraints_12 = {
  394. .count = ARRAY_SIZE(rates_12),
  395. .list = rates_12,
  396. };
  397. /*
  398. * Note that this should be called from init rather than from hw_params.
  399. */
  400. static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  401. int clk_id, unsigned int freq, int dir)
  402. {
  403. struct snd_soc_codec *codec = codec_dai->codec;
  404. struct wm8988_priv *wm8988 = codec->private_data;
  405. switch (freq) {
  406. case 11289600:
  407. case 18432000:
  408. case 22579200:
  409. case 36864000:
  410. wm8988->sysclk_constraints = &constraints_112896;
  411. wm8988->sysclk = freq;
  412. return 0;
  413. case 12288000:
  414. case 16934400:
  415. case 24576000:
  416. case 33868800:
  417. wm8988->sysclk_constraints = &constraints_12288;
  418. wm8988->sysclk = freq;
  419. return 0;
  420. case 12000000:
  421. case 24000000:
  422. wm8988->sysclk_constraints = &constraints_12;
  423. wm8988->sysclk = freq;
  424. return 0;
  425. }
  426. return -EINVAL;
  427. }
  428. static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai,
  429. unsigned int fmt)
  430. {
  431. struct snd_soc_codec *codec = codec_dai->codec;
  432. u16 iface = 0;
  433. /* set master/slave audio interface */
  434. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  435. case SND_SOC_DAIFMT_CBM_CFM:
  436. iface = 0x0040;
  437. break;
  438. case SND_SOC_DAIFMT_CBS_CFS:
  439. break;
  440. default:
  441. return -EINVAL;
  442. }
  443. /* interface format */
  444. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  445. case SND_SOC_DAIFMT_I2S:
  446. iface |= 0x0002;
  447. break;
  448. case SND_SOC_DAIFMT_RIGHT_J:
  449. break;
  450. case SND_SOC_DAIFMT_LEFT_J:
  451. iface |= 0x0001;
  452. break;
  453. case SND_SOC_DAIFMT_DSP_A:
  454. iface |= 0x0003;
  455. break;
  456. case SND_SOC_DAIFMT_DSP_B:
  457. iface |= 0x0013;
  458. break;
  459. default:
  460. return -EINVAL;
  461. }
  462. /* clock inversion */
  463. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  464. case SND_SOC_DAIFMT_NB_NF:
  465. break;
  466. case SND_SOC_DAIFMT_IB_IF:
  467. iface |= 0x0090;
  468. break;
  469. case SND_SOC_DAIFMT_IB_NF:
  470. iface |= 0x0080;
  471. break;
  472. case SND_SOC_DAIFMT_NB_IF:
  473. iface |= 0x0010;
  474. break;
  475. default:
  476. return -EINVAL;
  477. }
  478. snd_soc_write(codec, WM8988_IFACE, iface);
  479. return 0;
  480. }
  481. static int wm8988_pcm_startup(struct snd_pcm_substream *substream,
  482. struct snd_soc_dai *dai)
  483. {
  484. struct snd_soc_codec *codec = dai->codec;
  485. struct wm8988_priv *wm8988 = codec->private_data;
  486. /* The set of sample rates that can be supported depends on the
  487. * MCLK supplied to the CODEC - enforce this.
  488. */
  489. if (!wm8988->sysclk) {
  490. dev_err(codec->dev,
  491. "No MCLK configured, call set_sysclk() on init\n");
  492. return -EINVAL;
  493. }
  494. snd_pcm_hw_constraint_list(substream->runtime, 0,
  495. SNDRV_PCM_HW_PARAM_RATE,
  496. wm8988->sysclk_constraints);
  497. return 0;
  498. }
  499. static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream,
  500. struct snd_pcm_hw_params *params,
  501. struct snd_soc_dai *dai)
  502. {
  503. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  504. struct snd_soc_device *socdev = rtd->socdev;
  505. struct snd_soc_codec *codec = socdev->card->codec;
  506. struct wm8988_priv *wm8988 = codec->private_data;
  507. u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3;
  508. u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180;
  509. int coeff;
  510. coeff = get_coeff(wm8988->sysclk, params_rate(params));
  511. if (coeff < 0) {
  512. coeff = get_coeff(wm8988->sysclk / 2, params_rate(params));
  513. srate |= 0x40;
  514. }
  515. if (coeff < 0) {
  516. dev_err(codec->dev,
  517. "Unable to configure sample rate %dHz with %dHz MCLK\n",
  518. params_rate(params), wm8988->sysclk);
  519. return coeff;
  520. }
  521. /* bit size */
  522. switch (params_format(params)) {
  523. case SNDRV_PCM_FORMAT_S16_LE:
  524. break;
  525. case SNDRV_PCM_FORMAT_S20_3LE:
  526. iface |= 0x0004;
  527. break;
  528. case SNDRV_PCM_FORMAT_S24_LE:
  529. iface |= 0x0008;
  530. break;
  531. case SNDRV_PCM_FORMAT_S32_LE:
  532. iface |= 0x000c;
  533. break;
  534. }
  535. /* set iface & srate */
  536. snd_soc_write(codec, WM8988_IFACE, iface);
  537. if (coeff >= 0)
  538. snd_soc_write(codec, WM8988_SRATE, srate |
  539. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  540. return 0;
  541. }
  542. static int wm8988_mute(struct snd_soc_dai *dai, int mute)
  543. {
  544. struct snd_soc_codec *codec = dai->codec;
  545. u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7;
  546. if (mute)
  547. snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8);
  548. else
  549. snd_soc_write(codec, WM8988_ADCDAC, mute_reg);
  550. return 0;
  551. }
  552. static int wm8988_set_bias_level(struct snd_soc_codec *codec,
  553. enum snd_soc_bias_level level)
  554. {
  555. u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1;
  556. switch (level) {
  557. case SND_SOC_BIAS_ON:
  558. break;
  559. case SND_SOC_BIAS_PREPARE:
  560. /* VREF, VMID=2x50k, digital enabled */
  561. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0);
  562. break;
  563. case SND_SOC_BIAS_STANDBY:
  564. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  565. /* VREF, VMID=2x5k */
  566. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1);
  567. /* Charge caps */
  568. msleep(100);
  569. }
  570. /* VREF, VMID=2*500k, digital stopped */
  571. snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141);
  572. break;
  573. case SND_SOC_BIAS_OFF:
  574. snd_soc_write(codec, WM8988_PWR1, 0x0000);
  575. break;
  576. }
  577. codec->bias_level = level;
  578. return 0;
  579. }
  580. #define WM8988_RATES SNDRV_PCM_RATE_8000_96000
  581. #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  582. SNDRV_PCM_FMTBIT_S24_LE)
  583. static struct snd_soc_dai_ops wm8988_ops = {
  584. .startup = wm8988_pcm_startup,
  585. .hw_params = wm8988_pcm_hw_params,
  586. .set_fmt = wm8988_set_dai_fmt,
  587. .set_sysclk = wm8988_set_dai_sysclk,
  588. .digital_mute = wm8988_mute,
  589. };
  590. struct snd_soc_dai wm8988_dai = {
  591. .name = "WM8988",
  592. .playback = {
  593. .stream_name = "Playback",
  594. .channels_min = 1,
  595. .channels_max = 2,
  596. .rates = WM8988_RATES,
  597. .formats = WM8988_FORMATS,
  598. },
  599. .capture = {
  600. .stream_name = "Capture",
  601. .channels_min = 1,
  602. .channels_max = 2,
  603. .rates = WM8988_RATES,
  604. .formats = WM8988_FORMATS,
  605. },
  606. .ops = &wm8988_ops,
  607. .symmetric_rates = 1,
  608. };
  609. EXPORT_SYMBOL_GPL(wm8988_dai);
  610. static int wm8988_suspend(struct platform_device *pdev, pm_message_t state)
  611. {
  612. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  613. struct snd_soc_codec *codec = socdev->card->codec;
  614. wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF);
  615. return 0;
  616. }
  617. static int wm8988_resume(struct platform_device *pdev)
  618. {
  619. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  620. struct snd_soc_codec *codec = socdev->card->codec;
  621. int i;
  622. u8 data[2];
  623. u16 *cache = codec->reg_cache;
  624. /* Sync reg_cache with the hardware */
  625. for (i = 0; i < WM8988_NUM_REG; i++) {
  626. if (i == WM8988_RESET)
  627. continue;
  628. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  629. data[1] = cache[i] & 0x00ff;
  630. codec->hw_write(codec->control_data, data, 2);
  631. }
  632. wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  633. return 0;
  634. }
  635. static struct snd_soc_codec *wm8988_codec;
  636. static int wm8988_probe(struct platform_device *pdev)
  637. {
  638. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  639. struct snd_soc_codec *codec;
  640. int ret = 0;
  641. if (wm8988_codec == NULL) {
  642. dev_err(&pdev->dev, "Codec device not registered\n");
  643. return -ENODEV;
  644. }
  645. socdev->card->codec = wm8988_codec;
  646. codec = wm8988_codec;
  647. /* register pcms */
  648. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  649. if (ret < 0) {
  650. dev_err(codec->dev, "failed to create pcms: %d\n", ret);
  651. goto pcm_err;
  652. }
  653. snd_soc_add_controls(codec, wm8988_snd_controls,
  654. ARRAY_SIZE(wm8988_snd_controls));
  655. snd_soc_dapm_new_controls(codec, wm8988_dapm_widgets,
  656. ARRAY_SIZE(wm8988_dapm_widgets));
  657. snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
  658. return ret;
  659. pcm_err:
  660. return ret;
  661. }
  662. static int wm8988_remove(struct platform_device *pdev)
  663. {
  664. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  665. snd_soc_free_pcms(socdev);
  666. snd_soc_dapm_free(socdev);
  667. return 0;
  668. }
  669. struct snd_soc_codec_device soc_codec_dev_wm8988 = {
  670. .probe = wm8988_probe,
  671. .remove = wm8988_remove,
  672. .suspend = wm8988_suspend,
  673. .resume = wm8988_resume,
  674. };
  675. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8988);
  676. static int wm8988_register(struct wm8988_priv *wm8988,
  677. enum snd_soc_control_type control)
  678. {
  679. struct snd_soc_codec *codec = &wm8988->codec;
  680. int ret;
  681. u16 reg;
  682. if (wm8988_codec) {
  683. dev_err(codec->dev, "Another WM8988 is registered\n");
  684. ret = -EINVAL;
  685. goto err;
  686. }
  687. mutex_init(&codec->mutex);
  688. INIT_LIST_HEAD(&codec->dapm_widgets);
  689. INIT_LIST_HEAD(&codec->dapm_paths);
  690. codec->private_data = wm8988;
  691. codec->name = "WM8988";
  692. codec->owner = THIS_MODULE;
  693. codec->dai = &wm8988_dai;
  694. codec->num_dai = 1;
  695. codec->reg_cache_size = ARRAY_SIZE(wm8988->reg_cache);
  696. codec->reg_cache = &wm8988->reg_cache;
  697. codec->bias_level = SND_SOC_BIAS_OFF;
  698. codec->set_bias_level = wm8988_set_bias_level;
  699. memcpy(codec->reg_cache, wm8988_reg,
  700. sizeof(wm8988_reg));
  701. ret = snd_soc_codec_set_cache_io(codec, 7, 9, control);
  702. if (ret < 0) {
  703. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  704. goto err;
  705. }
  706. ret = wm8988_reset(codec);
  707. if (ret < 0) {
  708. dev_err(codec->dev, "Failed to issue reset\n");
  709. goto err;
  710. }
  711. /* set the update bits (we always update left then right) */
  712. reg = snd_soc_read(codec, WM8988_RADC);
  713. snd_soc_write(codec, WM8988_RADC, reg | 0x100);
  714. reg = snd_soc_read(codec, WM8988_RDAC);
  715. snd_soc_write(codec, WM8988_RDAC, reg | 0x0100);
  716. reg = snd_soc_read(codec, WM8988_ROUT1V);
  717. snd_soc_write(codec, WM8988_ROUT1V, reg | 0x0100);
  718. reg = snd_soc_read(codec, WM8988_ROUT2V);
  719. snd_soc_write(codec, WM8988_ROUT2V, reg | 0x0100);
  720. reg = snd_soc_read(codec, WM8988_RINVOL);
  721. snd_soc_write(codec, WM8988_RINVOL, reg | 0x0100);
  722. wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_STANDBY);
  723. wm8988_dai.dev = codec->dev;
  724. wm8988_codec = codec;
  725. ret = snd_soc_register_codec(codec);
  726. if (ret != 0) {
  727. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  728. goto err;
  729. }
  730. ret = snd_soc_register_dai(&wm8988_dai);
  731. if (ret != 0) {
  732. dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
  733. snd_soc_unregister_codec(codec);
  734. goto err_codec;
  735. }
  736. return 0;
  737. err_codec:
  738. snd_soc_unregister_codec(codec);
  739. err:
  740. kfree(wm8988);
  741. return ret;
  742. }
  743. static void wm8988_unregister(struct wm8988_priv *wm8988)
  744. {
  745. wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_OFF);
  746. snd_soc_unregister_dai(&wm8988_dai);
  747. snd_soc_unregister_codec(&wm8988->codec);
  748. kfree(wm8988);
  749. wm8988_codec = NULL;
  750. }
  751. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  752. static int wm8988_i2c_probe(struct i2c_client *i2c,
  753. const struct i2c_device_id *id)
  754. {
  755. struct wm8988_priv *wm8988;
  756. struct snd_soc_codec *codec;
  757. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  758. if (wm8988 == NULL)
  759. return -ENOMEM;
  760. codec = &wm8988->codec;
  761. i2c_set_clientdata(i2c, wm8988);
  762. codec->control_data = i2c;
  763. codec->dev = &i2c->dev;
  764. return wm8988_register(wm8988, SND_SOC_I2C);
  765. }
  766. static int wm8988_i2c_remove(struct i2c_client *client)
  767. {
  768. struct wm8988_priv *wm8988 = i2c_get_clientdata(client);
  769. wm8988_unregister(wm8988);
  770. return 0;
  771. }
  772. static const struct i2c_device_id wm8988_i2c_id[] = {
  773. { "wm8988", 0 },
  774. { }
  775. };
  776. MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id);
  777. static struct i2c_driver wm8988_i2c_driver = {
  778. .driver = {
  779. .name = "WM8988",
  780. .owner = THIS_MODULE,
  781. },
  782. .probe = wm8988_i2c_probe,
  783. .remove = wm8988_i2c_remove,
  784. .id_table = wm8988_i2c_id,
  785. };
  786. #endif
  787. #if defined(CONFIG_SPI_MASTER)
  788. static int __devinit wm8988_spi_probe(struct spi_device *spi)
  789. {
  790. struct wm8988_priv *wm8988;
  791. struct snd_soc_codec *codec;
  792. wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL);
  793. if (wm8988 == NULL)
  794. return -ENOMEM;
  795. codec = &wm8988->codec;
  796. codec->control_data = spi;
  797. codec->dev = &spi->dev;
  798. dev_set_drvdata(&spi->dev, wm8988);
  799. return wm8988_register(wm8988, SND_SOC_SPI);
  800. }
  801. static int __devexit wm8988_spi_remove(struct spi_device *spi)
  802. {
  803. struct wm8988_priv *wm8988 = dev_get_drvdata(&spi->dev);
  804. wm8988_unregister(wm8988);
  805. return 0;
  806. }
  807. static struct spi_driver wm8988_spi_driver = {
  808. .driver = {
  809. .name = "wm8988",
  810. .bus = &spi_bus_type,
  811. .owner = THIS_MODULE,
  812. },
  813. .probe = wm8988_spi_probe,
  814. .remove = __devexit_p(wm8988_spi_remove),
  815. };
  816. #endif
  817. static int __init wm8988_modinit(void)
  818. {
  819. int ret;
  820. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  821. ret = i2c_add_driver(&wm8988_i2c_driver);
  822. if (ret != 0)
  823. pr_err("WM8988: Unable to register I2C driver: %d\n", ret);
  824. #endif
  825. #if defined(CONFIG_SPI_MASTER)
  826. ret = spi_register_driver(&wm8988_spi_driver);
  827. if (ret != 0)
  828. pr_err("WM8988: Unable to register SPI driver: %d\n", ret);
  829. #endif
  830. return ret;
  831. }
  832. module_init(wm8988_modinit);
  833. static void __exit wm8988_exit(void)
  834. {
  835. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  836. i2c_del_driver(&wm8988_i2c_driver);
  837. #endif
  838. #if defined(CONFIG_SPI_MASTER)
  839. spi_unregister_driver(&wm8988_spi_driver);
  840. #endif
  841. }
  842. module_exit(wm8988_exit);
  843. MODULE_DESCRIPTION("ASoC WM8988 driver");
  844. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  845. MODULE_LICENSE("GPL");