psc-i2s.c 11 KB

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  1. /*
  2. * Au12x0/Au1550 PSC ALSA ASoC audio support.
  3. *
  4. * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
  5. * Manuel Lauss <manuel.lauss@gmail.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * Au1xxx-PSC I2S glue.
  12. *
  13. * NOTE: all of these drivers can only work with a SINGLE instance
  14. * of a PSC. Multiple independent audio devices are impossible
  15. * with ASoC v1.
  16. * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
  17. */
  18. #include <linux/init.h>
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/suspend.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/initval.h>
  25. #include <sound/soc.h>
  26. #include <asm/mach-au1x00/au1000.h>
  27. #include <asm/mach-au1x00/au1xxx_psc.h>
  28. #include "psc.h"
  29. /* supported I2S DAI hardware formats */
  30. #define AU1XPSC_I2S_DAIFMT \
  31. (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
  32. SND_SOC_DAIFMT_NB_NF)
  33. /* supported I2S direction */
  34. #define AU1XPSC_I2S_DIR \
  35. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  36. #define AU1XPSC_I2S_RATES \
  37. SNDRV_PCM_RATE_8000_192000
  38. #define AU1XPSC_I2S_FMTS \
  39. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
  40. #define I2SSTAT_BUSY(stype) \
  41. ((stype) == PCM_TX ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
  42. #define I2SPCR_START(stype) \
  43. ((stype) == PCM_TX ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
  44. #define I2SPCR_STOP(stype) \
  45. ((stype) == PCM_TX ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
  46. #define I2SPCR_CLRFIFO(stype) \
  47. ((stype) == PCM_TX ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
  48. /* instance data. There can be only one, MacLeod!!!! */
  49. static struct au1xpsc_audio_data *au1xpsc_i2s_workdata;
  50. static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
  51. unsigned int fmt)
  52. {
  53. struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
  54. unsigned long ct;
  55. int ret;
  56. ret = -EINVAL;
  57. ct = pscdata->cfg;
  58. ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
  59. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  60. case SND_SOC_DAIFMT_I2S:
  61. ct |= PSC_I2SCFG_XM; /* enable I2S mode */
  62. break;
  63. case SND_SOC_DAIFMT_MSB:
  64. break;
  65. case SND_SOC_DAIFMT_LSB:
  66. ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
  67. break;
  68. default:
  69. goto out;
  70. }
  71. ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
  72. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  73. case SND_SOC_DAIFMT_NB_NF:
  74. ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
  75. break;
  76. case SND_SOC_DAIFMT_NB_IF:
  77. ct |= PSC_I2SCFG_BI;
  78. break;
  79. case SND_SOC_DAIFMT_IB_NF:
  80. ct |= PSC_I2SCFG_WI;
  81. break;
  82. case SND_SOC_DAIFMT_IB_IF:
  83. break;
  84. default:
  85. goto out;
  86. }
  87. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  88. case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
  89. ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
  90. break;
  91. case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
  92. ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
  93. break;
  94. default:
  95. goto out;
  96. }
  97. pscdata->cfg = ct;
  98. ret = 0;
  99. out:
  100. return ret;
  101. }
  102. static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
  103. struct snd_pcm_hw_params *params,
  104. struct snd_soc_dai *dai)
  105. {
  106. struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
  107. int cfgbits;
  108. unsigned long stat;
  109. /* check if the PSC is already streaming data */
  110. stat = au_readl(I2S_STAT(pscdata));
  111. if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
  112. /* reject parameters not currently set up in hardware */
  113. cfgbits = au_readl(I2S_CFG(pscdata));
  114. if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
  115. (params_rate(params) != pscdata->rate))
  116. return -EINVAL;
  117. } else {
  118. /* set sample bitdepth */
  119. pscdata->cfg &= ~(0x1f << 4);
  120. pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
  121. /* remember current rate for other stream */
  122. pscdata->rate = params_rate(params);
  123. }
  124. return 0;
  125. }
  126. /* Configure PSC late: on my devel systems the codec is I2S master and
  127. * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
  128. * uses aggressive PM and switches the codec off when it is not in use
  129. * which also means the PSC unit doesn't get any clocks and is therefore
  130. * dead. That's why this chunk here gets called from the trigger callback
  131. * because I can be reasonably certain the codec is driving the clocks.
  132. */
  133. static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
  134. {
  135. unsigned long tmo;
  136. /* bring PSC out of sleep, and configure I2S unit */
  137. au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
  138. au_sync();
  139. tmo = 1000000;
  140. while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
  141. tmo--;
  142. if (!tmo)
  143. goto psc_err;
  144. au_writel(0, I2S_CFG(pscdata));
  145. au_sync();
  146. au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
  147. au_sync();
  148. /* wait for I2S controller to become ready */
  149. tmo = 1000000;
  150. while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
  151. tmo--;
  152. if (tmo)
  153. return 0;
  154. psc_err:
  155. au_writel(0, I2S_CFG(pscdata));
  156. au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
  157. au_sync();
  158. return -ETIMEDOUT;
  159. }
  160. static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
  161. {
  162. unsigned long tmo, stat;
  163. int ret;
  164. ret = 0;
  165. /* if both TX and RX are idle, configure the PSC */
  166. stat = au_readl(I2S_STAT(pscdata));
  167. if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
  168. ret = au1xpsc_i2s_configure(pscdata);
  169. if (ret)
  170. goto out;
  171. }
  172. au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
  173. au_sync();
  174. au_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
  175. au_sync();
  176. /* wait for start confirmation */
  177. tmo = 1000000;
  178. while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
  179. tmo--;
  180. if (!tmo) {
  181. au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
  182. au_sync();
  183. ret = -ETIMEDOUT;
  184. }
  185. out:
  186. return ret;
  187. }
  188. static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
  189. {
  190. unsigned long tmo, stat;
  191. au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
  192. au_sync();
  193. /* wait for stop confirmation */
  194. tmo = 1000000;
  195. while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
  196. tmo--;
  197. /* if both TX and RX are idle, disable PSC */
  198. stat = au_readl(I2S_STAT(pscdata));
  199. if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
  200. au_writel(0, I2S_CFG(pscdata));
  201. au_sync();
  202. au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
  203. au_sync();
  204. }
  205. return 0;
  206. }
  207. static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  208. struct snd_soc_dai *dai)
  209. {
  210. struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
  211. int ret, stype = SUBSTREAM_TYPE(substream);
  212. switch (cmd) {
  213. case SNDRV_PCM_TRIGGER_START:
  214. case SNDRV_PCM_TRIGGER_RESUME:
  215. ret = au1xpsc_i2s_start(pscdata, stype);
  216. break;
  217. case SNDRV_PCM_TRIGGER_STOP:
  218. case SNDRV_PCM_TRIGGER_SUSPEND:
  219. ret = au1xpsc_i2s_stop(pscdata, stype);
  220. break;
  221. default:
  222. ret = -EINVAL;
  223. }
  224. return ret;
  225. }
  226. static int au1xpsc_i2s_probe(struct platform_device *pdev,
  227. struct snd_soc_dai *dai)
  228. {
  229. return au1xpsc_i2s_workdata ? 0 : -ENODEV;
  230. }
  231. static void au1xpsc_i2s_remove(struct platform_device *pdev,
  232. struct snd_soc_dai *dai)
  233. {
  234. }
  235. static struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
  236. .trigger = au1xpsc_i2s_trigger,
  237. .hw_params = au1xpsc_i2s_hw_params,
  238. .set_fmt = au1xpsc_i2s_set_fmt,
  239. };
  240. struct snd_soc_dai au1xpsc_i2s_dai = {
  241. .name = "au1xpsc_i2s",
  242. .probe = au1xpsc_i2s_probe,
  243. .remove = au1xpsc_i2s_remove,
  244. .playback = {
  245. .rates = AU1XPSC_I2S_RATES,
  246. .formats = AU1XPSC_I2S_FMTS,
  247. .channels_min = 2,
  248. .channels_max = 8, /* 2 without external help */
  249. },
  250. .capture = {
  251. .rates = AU1XPSC_I2S_RATES,
  252. .formats = AU1XPSC_I2S_FMTS,
  253. .channels_min = 2,
  254. .channels_max = 8, /* 2 without external help */
  255. },
  256. .ops = &au1xpsc_i2s_dai_ops,
  257. };
  258. EXPORT_SYMBOL(au1xpsc_i2s_dai);
  259. static int __init au1xpsc_i2s_drvprobe(struct platform_device *pdev)
  260. {
  261. struct resource *r;
  262. unsigned long sel;
  263. int ret;
  264. struct au1xpsc_audio_data *wd;
  265. if (au1xpsc_i2s_workdata)
  266. return -EBUSY;
  267. wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
  268. if (!wd)
  269. return -ENOMEM;
  270. r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  271. if (!r) {
  272. ret = -ENODEV;
  273. goto out0;
  274. }
  275. ret = -EBUSY;
  276. wd->ioarea = request_mem_region(r->start, r->end - r->start + 1,
  277. "au1xpsc_i2s");
  278. if (!wd->ioarea)
  279. goto out0;
  280. wd->mmio = ioremap(r->start, 0xffff);
  281. if (!wd->mmio)
  282. goto out1;
  283. /* preserve PSC clock source set up by platform (dev.platform_data
  284. * is already occupied by soc layer)
  285. */
  286. sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
  287. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  288. au_sync();
  289. au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd));
  290. au_writel(0, I2S_CFG(wd));
  291. au_sync();
  292. /* preconfigure: set max rx/tx fifo depths */
  293. wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
  294. /* don't wait for I2S core to become ready now; clocks may not
  295. * be running yet; depending on clock input for PSC a wait might
  296. * time out.
  297. */
  298. ret = snd_soc_register_dai(&au1xpsc_i2s_dai);
  299. if (ret)
  300. goto out1;
  301. /* finally add the DMA device for this PSC */
  302. wd->dmapd = au1xpsc_pcm_add(pdev);
  303. if (wd->dmapd) {
  304. platform_set_drvdata(pdev, wd);
  305. au1xpsc_i2s_workdata = wd;
  306. return 0;
  307. }
  308. snd_soc_unregister_dai(&au1xpsc_i2s_dai);
  309. out1:
  310. release_resource(wd->ioarea);
  311. kfree(wd->ioarea);
  312. out0:
  313. kfree(wd);
  314. return ret;
  315. }
  316. static int __devexit au1xpsc_i2s_drvremove(struct platform_device *pdev)
  317. {
  318. struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
  319. if (wd->dmapd)
  320. au1xpsc_pcm_destroy(wd->dmapd);
  321. snd_soc_unregister_dai(&au1xpsc_i2s_dai);
  322. au_writel(0, I2S_CFG(wd));
  323. au_sync();
  324. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  325. au_sync();
  326. iounmap(wd->mmio);
  327. release_resource(wd->ioarea);
  328. kfree(wd->ioarea);
  329. kfree(wd);
  330. au1xpsc_i2s_workdata = NULL; /* MDEV */
  331. return 0;
  332. }
  333. #ifdef CONFIG_PM
  334. static int au1xpsc_i2s_drvsuspend(struct device *dev)
  335. {
  336. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  337. /* save interesting register and disable PSC */
  338. wd->pm[0] = au_readl(PSC_SEL(wd));
  339. au_writel(0, I2S_CFG(wd));
  340. au_sync();
  341. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  342. au_sync();
  343. return 0;
  344. }
  345. static int au1xpsc_i2s_drvresume(struct device *dev)
  346. {
  347. struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
  348. /* select I2S mode and PSC clock */
  349. au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
  350. au_sync();
  351. au_writel(0, PSC_SEL(wd));
  352. au_sync();
  353. au_writel(wd->pm[0], PSC_SEL(wd));
  354. au_sync();
  355. return 0;
  356. }
  357. static struct dev_pm_ops au1xpsci2s_pmops = {
  358. .suspend = au1xpsc_i2s_drvsuspend,
  359. .resume = au1xpsc_i2s_drvresume,
  360. };
  361. #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
  362. #else
  363. #define AU1XPSCI2S_PMOPS NULL
  364. #endif
  365. static struct platform_driver au1xpsc_i2s_driver = {
  366. .driver = {
  367. .name = "au1xpsc_i2s",
  368. .owner = THIS_MODULE,
  369. .pm = AU1XPSCI2S_PMOPS,
  370. },
  371. .probe = au1xpsc_i2s_drvprobe,
  372. .remove = __devexit_p(au1xpsc_i2s_drvremove),
  373. };
  374. static int __init au1xpsc_i2s_load(void)
  375. {
  376. au1xpsc_i2s_workdata = NULL;
  377. return platform_driver_register(&au1xpsc_i2s_driver);
  378. }
  379. static void __exit au1xpsc_i2s_unload(void)
  380. {
  381. platform_driver_unregister(&au1xpsc_i2s_driver);
  382. }
  383. module_init(au1xpsc_i2s_load);
  384. module_exit(au1xpsc_i2s_unload);
  385. MODULE_LICENSE("GPL");
  386. MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
  387. MODULE_AUTHOR("Manuel Lauss");