hpwdt.c 19 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/nmi.h>
  22. #include <linux/kernel.h>
  23. #include <linux/miscdevice.h>
  24. #include <linux/mm.h>
  25. #include <linux/module.h>
  26. #include <linux/kdebug.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/notifier.h>
  29. #include <linux/pci.h>
  30. #include <linux/pci_ids.h>
  31. #include <linux/reboot.h>
  32. #include <linux/sched.h>
  33. #include <linux/timer.h>
  34. #include <linux/types.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/watchdog.h>
  37. #include <linux/dmi.h>
  38. #include <linux/efi.h>
  39. #include <linux/string.h>
  40. #include <linux/bootmem.h>
  41. #include <asm/desc.h>
  42. #include <asm/cacheflush.h>
  43. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  44. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  45. #define PCI_BIOS32_PARAGRAPH_LEN 16
  46. #define PCI_ROM_BASE1 0x000F0000
  47. #define ROM_SIZE 0x10000
  48. #define HPWDT_VERSION "1.1.1"
  49. struct bios32_service_dir {
  50. u32 signature;
  51. u32 entry_point;
  52. u8 revision;
  53. u8 length;
  54. u8 checksum;
  55. u8 reserved[5];
  56. };
  57. /* type 212 */
  58. struct smbios_cru64_info {
  59. u8 type;
  60. u8 byte_length;
  61. u16 handle;
  62. u32 signature;
  63. u64 physical_address;
  64. u32 double_length;
  65. u32 double_offset;
  66. };
  67. #define SMBIOS_CRU64_INFORMATION 212
  68. struct cmn_registers {
  69. union {
  70. struct {
  71. u8 ral;
  72. u8 rah;
  73. u16 rea2;
  74. };
  75. u32 reax;
  76. } u1;
  77. union {
  78. struct {
  79. u8 rbl;
  80. u8 rbh;
  81. u8 reb2l;
  82. u8 reb2h;
  83. };
  84. u32 rebx;
  85. } u2;
  86. union {
  87. struct {
  88. u8 rcl;
  89. u8 rch;
  90. u16 rec2;
  91. };
  92. u32 recx;
  93. } u3;
  94. union {
  95. struct {
  96. u8 rdl;
  97. u8 rdh;
  98. u16 red2;
  99. };
  100. u32 redx;
  101. } u4;
  102. u32 resi;
  103. u32 redi;
  104. u16 rds;
  105. u16 res;
  106. u32 reflags;
  107. } __attribute__((packed));
  108. #define DEFAULT_MARGIN 30
  109. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  110. static unsigned int reload; /* the computed soft_margin */
  111. static int nowayout = WATCHDOG_NOWAYOUT;
  112. static char expect_release;
  113. static unsigned long hpwdt_is_open;
  114. static unsigned int allow_kdump;
  115. static unsigned int hpwdt_nmi_sourcing;
  116. static unsigned int priority; /* hpwdt at end of die_notify list */
  117. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  118. static unsigned long __iomem *hpwdt_timer_reg;
  119. static unsigned long __iomem *hpwdt_timer_con;
  120. static DEFINE_SPINLOCK(rom_lock);
  121. static void *cru_rom_addr;
  122. static struct cmn_registers cmn_regs;
  123. static struct pci_device_id hpwdt_devices[] = {
  124. { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
  125. { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
  126. {0}, /* terminate list */
  127. };
  128. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  129. extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
  130. unsigned long *pRomEntry);
  131. #ifndef CONFIG_X86_64
  132. /* --32 Bit Bios------------------------------------------------------------ */
  133. #define HPWDT_ARCH 32
  134. asm(".text \n\t"
  135. ".align 4 \n"
  136. "asminline_call: \n\t"
  137. "pushl %ebp \n\t"
  138. "movl %esp, %ebp \n\t"
  139. "pusha \n\t"
  140. "pushf \n\t"
  141. "push %es \n\t"
  142. "push %ds \n\t"
  143. "pop %es \n\t"
  144. "movl 8(%ebp),%eax \n\t"
  145. "movl 4(%eax),%ebx \n\t"
  146. "movl 8(%eax),%ecx \n\t"
  147. "movl 12(%eax),%edx \n\t"
  148. "movl 16(%eax),%esi \n\t"
  149. "movl 20(%eax),%edi \n\t"
  150. "movl (%eax),%eax \n\t"
  151. "push %cs \n\t"
  152. "call *12(%ebp) \n\t"
  153. "pushf \n\t"
  154. "pushl %eax \n\t"
  155. "movl 8(%ebp),%eax \n\t"
  156. "movl %ebx,4(%eax) \n\t"
  157. "movl %ecx,8(%eax) \n\t"
  158. "movl %edx,12(%eax) \n\t"
  159. "movl %esi,16(%eax) \n\t"
  160. "movl %edi,20(%eax) \n\t"
  161. "movw %ds,24(%eax) \n\t"
  162. "movw %es,26(%eax) \n\t"
  163. "popl %ebx \n\t"
  164. "movl %ebx,(%eax) \n\t"
  165. "popl %ebx \n\t"
  166. "movl %ebx,28(%eax) \n\t"
  167. "pop %es \n\t"
  168. "popf \n\t"
  169. "popa \n\t"
  170. "leave \n\t"
  171. "ret \n\t"
  172. ".previous");
  173. /*
  174. * cru_detect
  175. *
  176. * Routine Description:
  177. * This function uses the 32-bit BIOS Service Directory record to
  178. * search for a $CRU record.
  179. *
  180. * Return Value:
  181. * 0 : SUCCESS
  182. * <0 : FAILURE
  183. */
  184. static int __devinit cru_detect(unsigned long map_entry,
  185. unsigned long map_offset)
  186. {
  187. void *bios32_map;
  188. unsigned long *bios32_entrypoint;
  189. unsigned long cru_physical_address;
  190. unsigned long cru_length;
  191. unsigned long physical_bios_base = 0;
  192. unsigned long physical_bios_offset = 0;
  193. int retval = -ENODEV;
  194. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  195. if (bios32_map == NULL)
  196. return -ENODEV;
  197. bios32_entrypoint = bios32_map + map_offset;
  198. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  199. asminline_call(&cmn_regs, bios32_entrypoint);
  200. if (cmn_regs.u1.ral != 0) {
  201. printk(KERN_WARNING
  202. "hpwdt: Call succeeded but with an error: 0x%x\n",
  203. cmn_regs.u1.ral);
  204. } else {
  205. physical_bios_base = cmn_regs.u2.rebx;
  206. physical_bios_offset = cmn_regs.u4.redx;
  207. cru_length = cmn_regs.u3.recx;
  208. cru_physical_address =
  209. physical_bios_base + physical_bios_offset;
  210. /* If the values look OK, then map it in. */
  211. if ((physical_bios_base + physical_bios_offset)) {
  212. cru_rom_addr =
  213. ioremap(cru_physical_address, cru_length);
  214. if (cru_rom_addr)
  215. retval = 0;
  216. }
  217. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  218. physical_bios_base);
  219. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  220. physical_bios_offset);
  221. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  222. cru_length);
  223. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
  224. (unsigned int)&cru_rom_addr);
  225. }
  226. iounmap(bios32_map);
  227. return retval;
  228. }
  229. /*
  230. * bios_checksum
  231. */
  232. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  233. {
  234. char sum = 0;
  235. int i;
  236. /*
  237. * calculate checksum of size bytes. This should add up
  238. * to zero if we have a valid header.
  239. */
  240. for (i = 0; i < len; i++)
  241. sum += ptr[i];
  242. return ((sum == 0) && (len > 0));
  243. }
  244. /*
  245. * bios32_present
  246. *
  247. * Routine Description:
  248. * This function finds the 32-bit BIOS Service Directory
  249. *
  250. * Return Value:
  251. * 0 : SUCCESS
  252. * <0 : FAILURE
  253. */
  254. static int __devinit bios32_present(const char __iomem *p)
  255. {
  256. struct bios32_service_dir *bios_32_ptr;
  257. int length;
  258. unsigned long map_entry, map_offset;
  259. bios_32_ptr = (struct bios32_service_dir *) p;
  260. /*
  261. * Search for signature by checking equal to the swizzled value
  262. * instead of calling another routine to perform a strcmp.
  263. */
  264. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  265. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  266. if (bios_checksum(p, length)) {
  267. /*
  268. * According to the spec, we're looking for the
  269. * first 4KB-aligned address below the entrypoint
  270. * listed in the header. The Service Directory code
  271. * is guaranteed to occupy no more than 2 4KB pages.
  272. */
  273. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  274. map_offset = bios_32_ptr->entry_point - map_entry;
  275. return cru_detect(map_entry, map_offset);
  276. }
  277. }
  278. return -ENODEV;
  279. }
  280. static int __devinit detect_cru_service(void)
  281. {
  282. char __iomem *p, *q;
  283. int rc = -1;
  284. /*
  285. * Search from 0x0f0000 through 0x0fffff, inclusive.
  286. */
  287. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  288. if (p == NULL)
  289. return -ENOMEM;
  290. for (q = p; q < p + ROM_SIZE; q += 16) {
  291. rc = bios32_present(q);
  292. if (!rc)
  293. break;
  294. }
  295. iounmap(p);
  296. return rc;
  297. }
  298. #else
  299. /* --64 Bit Bios------------------------------------------------------------ */
  300. #define HPWDT_ARCH 64
  301. asm(".text \n\t"
  302. ".align 4 \n"
  303. "asminline_call: \n\t"
  304. "pushq %rbp \n\t"
  305. "movq %rsp, %rbp \n\t"
  306. "pushq %rax \n\t"
  307. "pushq %rbx \n\t"
  308. "pushq %rdx \n\t"
  309. "pushq %r12 \n\t"
  310. "pushq %r9 \n\t"
  311. "movq %rsi, %r12 \n\t"
  312. "movq %rdi, %r9 \n\t"
  313. "movl 4(%r9),%ebx \n\t"
  314. "movl 8(%r9),%ecx \n\t"
  315. "movl 12(%r9),%edx \n\t"
  316. "movl 16(%r9),%esi \n\t"
  317. "movl 20(%r9),%edi \n\t"
  318. "movl (%r9),%eax \n\t"
  319. "call *%r12 \n\t"
  320. "pushfq \n\t"
  321. "popq %r12 \n\t"
  322. "movl %eax, (%r9) \n\t"
  323. "movl %ebx, 4(%r9) \n\t"
  324. "movl %ecx, 8(%r9) \n\t"
  325. "movl %edx, 12(%r9) \n\t"
  326. "movl %esi, 16(%r9) \n\t"
  327. "movl %edi, 20(%r9) \n\t"
  328. "movq %r12, %rax \n\t"
  329. "movl %eax, 28(%r9) \n\t"
  330. "popq %r9 \n\t"
  331. "popq %r12 \n\t"
  332. "popq %rdx \n\t"
  333. "popq %rbx \n\t"
  334. "popq %rax \n\t"
  335. "leave \n\t"
  336. "ret \n\t"
  337. ".previous");
  338. /*
  339. * dmi_find_cru
  340. *
  341. * Routine Description:
  342. * This function checks whether or not a SMBIOS/DMI record is
  343. * the 64bit CRU info or not
  344. */
  345. static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
  346. {
  347. struct smbios_cru64_info *smbios_cru64_ptr;
  348. unsigned long cru_physical_address;
  349. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  350. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  351. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  352. cru_physical_address =
  353. smbios_cru64_ptr->physical_address +
  354. smbios_cru64_ptr->double_offset;
  355. cru_rom_addr = ioremap(cru_physical_address,
  356. smbios_cru64_ptr->double_length);
  357. set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
  358. smbios_cru64_ptr->double_length >> PAGE_SHIFT);
  359. }
  360. }
  361. }
  362. static int __devinit detect_cru_service(void)
  363. {
  364. cru_rom_addr = NULL;
  365. dmi_walk(dmi_find_cru, NULL);
  366. /* if cru_rom_addr has been set then we found a CRU service */
  367. return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
  368. }
  369. /* ------------------------------------------------------------------------- */
  370. #endif
  371. /*
  372. * Watchdog operations
  373. */
  374. static void hpwdt_start(void)
  375. {
  376. reload = (soft_margin * 1000) / 128;
  377. iowrite16(reload, hpwdt_timer_reg);
  378. iowrite16(0x85, hpwdt_timer_con);
  379. }
  380. static void hpwdt_stop(void)
  381. {
  382. unsigned long data;
  383. data = ioread16(hpwdt_timer_con);
  384. data &= 0xFE;
  385. iowrite16(data, hpwdt_timer_con);
  386. }
  387. static void hpwdt_ping(void)
  388. {
  389. iowrite16(reload, hpwdt_timer_reg);
  390. }
  391. static int hpwdt_change_timer(int new_margin)
  392. {
  393. /* Arbitrary, can't find the card's limits */
  394. if (new_margin < 5 || new_margin > 600) {
  395. printk(KERN_WARNING
  396. "hpwdt: New value passed in is invalid: %d seconds.\n",
  397. new_margin);
  398. return -EINVAL;
  399. }
  400. soft_margin = new_margin;
  401. printk(KERN_DEBUG
  402. "hpwdt: New timer passed in is %d seconds.\n",
  403. new_margin);
  404. reload = (soft_margin * 1000) / 128;
  405. return 0;
  406. }
  407. /*
  408. * NMI Handler
  409. */
  410. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  411. void *data)
  412. {
  413. unsigned long rom_pl;
  414. static int die_nmi_called;
  415. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  416. return NOTIFY_OK;
  417. if (hpwdt_nmi_sourcing) {
  418. spin_lock_irqsave(&rom_lock, rom_pl);
  419. if (!die_nmi_called)
  420. asminline_call(&cmn_regs, cru_rom_addr);
  421. die_nmi_called = 1;
  422. spin_unlock_irqrestore(&rom_lock, rom_pl);
  423. if (cmn_regs.u1.ral == 0) {
  424. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  425. "but unable to determine source.\n");
  426. } else {
  427. if (allow_kdump)
  428. hpwdt_stop();
  429. panic("An NMI occurred, please see the Integrated "
  430. "Management Log for details.\n");
  431. }
  432. }
  433. return NOTIFY_OK;
  434. }
  435. /*
  436. * /dev/watchdog handling
  437. */
  438. static int hpwdt_open(struct inode *inode, struct file *file)
  439. {
  440. /* /dev/watchdog can only be opened once */
  441. if (test_and_set_bit(0, &hpwdt_is_open))
  442. return -EBUSY;
  443. /* Start the watchdog */
  444. hpwdt_start();
  445. hpwdt_ping();
  446. return nonseekable_open(inode, file);
  447. }
  448. static int hpwdt_release(struct inode *inode, struct file *file)
  449. {
  450. /* Stop the watchdog */
  451. if (expect_release == 42) {
  452. hpwdt_stop();
  453. } else {
  454. printk(KERN_CRIT
  455. "hpwdt: Unexpected close, not stopping watchdog!\n");
  456. hpwdt_ping();
  457. }
  458. expect_release = 0;
  459. /* /dev/watchdog is being closed, make sure it can be re-opened */
  460. clear_bit(0, &hpwdt_is_open);
  461. return 0;
  462. }
  463. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  464. size_t len, loff_t *ppos)
  465. {
  466. /* See if we got the magic character 'V' and reload the timer */
  467. if (len) {
  468. if (!nowayout) {
  469. size_t i;
  470. /* note: just in case someone wrote the magic character
  471. * five months ago... */
  472. expect_release = 0;
  473. /* scan to see whether or not we got the magic char. */
  474. for (i = 0; i != len; i++) {
  475. char c;
  476. if (get_user(c, data + i))
  477. return -EFAULT;
  478. if (c == 'V')
  479. expect_release = 42;
  480. }
  481. }
  482. /* someone wrote to us, we should reload the timer */
  483. hpwdt_ping();
  484. }
  485. return len;
  486. }
  487. static const struct watchdog_info ident = {
  488. .options = WDIOF_SETTIMEOUT |
  489. WDIOF_KEEPALIVEPING |
  490. WDIOF_MAGICCLOSE,
  491. .identity = "HP iLO2 HW Watchdog Timer",
  492. };
  493. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  494. unsigned long arg)
  495. {
  496. void __user *argp = (void __user *)arg;
  497. int __user *p = argp;
  498. int new_margin;
  499. int ret = -ENOTTY;
  500. switch (cmd) {
  501. case WDIOC_GETSUPPORT:
  502. ret = 0;
  503. if (copy_to_user(argp, &ident, sizeof(ident)))
  504. ret = -EFAULT;
  505. break;
  506. case WDIOC_GETSTATUS:
  507. case WDIOC_GETBOOTSTATUS:
  508. ret = put_user(0, p);
  509. break;
  510. case WDIOC_KEEPALIVE:
  511. hpwdt_ping();
  512. ret = 0;
  513. break;
  514. case WDIOC_SETTIMEOUT:
  515. ret = get_user(new_margin, p);
  516. if (ret)
  517. break;
  518. ret = hpwdt_change_timer(new_margin);
  519. if (ret)
  520. break;
  521. hpwdt_ping();
  522. /* Fall */
  523. case WDIOC_GETTIMEOUT:
  524. ret = put_user(soft_margin, p);
  525. break;
  526. }
  527. return ret;
  528. }
  529. /*
  530. * Kernel interfaces
  531. */
  532. static const struct file_operations hpwdt_fops = {
  533. .owner = THIS_MODULE,
  534. .llseek = no_llseek,
  535. .write = hpwdt_write,
  536. .unlocked_ioctl = hpwdt_ioctl,
  537. .open = hpwdt_open,
  538. .release = hpwdt_release,
  539. };
  540. static struct miscdevice hpwdt_miscdev = {
  541. .minor = WATCHDOG_MINOR,
  542. .name = "watchdog",
  543. .fops = &hpwdt_fops,
  544. };
  545. static struct notifier_block die_notifier = {
  546. .notifier_call = hpwdt_pretimeout,
  547. .priority = 0,
  548. };
  549. /*
  550. * Init & Exit
  551. */
  552. #ifdef ARCH_HAS_NMI_WATCHDOG
  553. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  554. {
  555. /*
  556. * If nmi_watchdog is turned off then we can turn on
  557. * our nmi sourcing capability.
  558. */
  559. if (!nmi_watchdog_active())
  560. hpwdt_nmi_sourcing = 1;
  561. else
  562. dev_warn(&dev->dev, "NMI sourcing is disabled. To enable this "
  563. "functionality you must reboot with nmi_watchdog=0 "
  564. "and load the hpwdt driver with priority=1.\n");
  565. }
  566. #else
  567. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  568. {
  569. dev_warn(&dev->dev, "NMI sourcing is disabled. "
  570. "Your kernel does not support a NMI Watchdog.\n");
  571. }
  572. #endif
  573. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  574. const struct pci_device_id *ent)
  575. {
  576. int retval;
  577. /*
  578. * Check if we can do NMI sourcing or not
  579. */
  580. hpwdt_check_nmi_sourcing(dev);
  581. /*
  582. * First let's find out if we are on an iLO2 server. We will
  583. * not run on a legacy ASM box.
  584. * So we only support the G5 ProLiant servers and higher.
  585. */
  586. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  587. dev_warn(&dev->dev,
  588. "This server does not have an iLO2 ASIC.\n");
  589. return -ENODEV;
  590. }
  591. if (pci_enable_device(dev)) {
  592. dev_warn(&dev->dev,
  593. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  594. ent->vendor, ent->device);
  595. return -ENODEV;
  596. }
  597. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  598. if (!pci_mem_addr) {
  599. dev_warn(&dev->dev,
  600. "Unable to detect the iLO2 server memory.\n");
  601. retval = -ENOMEM;
  602. goto error_pci_iomap;
  603. }
  604. hpwdt_timer_reg = pci_mem_addr + 0x70;
  605. hpwdt_timer_con = pci_mem_addr + 0x72;
  606. /* Make sure that we have a valid soft_margin */
  607. if (hpwdt_change_timer(soft_margin))
  608. hpwdt_change_timer(DEFAULT_MARGIN);
  609. /*
  610. * We need to map the ROM to get the CRU service.
  611. * For 32 bit Operating Systems we need to go through the 32 Bit
  612. * BIOS Service Directory
  613. * For 64 bit Operating Systems we get that service through SMBIOS.
  614. */
  615. retval = detect_cru_service();
  616. if (retval < 0) {
  617. dev_warn(&dev->dev,
  618. "Unable to detect the %d Bit CRU Service.\n",
  619. HPWDT_ARCH);
  620. goto error_get_cru;
  621. }
  622. /*
  623. * We know this is the only CRU call we need to make so lets keep as
  624. * few instructions as possible once the NMI comes in.
  625. */
  626. cmn_regs.u1.rah = 0x0D;
  627. cmn_regs.u1.ral = 0x02;
  628. /*
  629. * If the priority is set to 1, then we will be put first on the
  630. * die notify list to handle a critical NMI. The default is to
  631. * be last so other users of the NMI signal can function.
  632. */
  633. if (priority)
  634. die_notifier.priority = 0x7FFFFFFF;
  635. retval = register_die_notifier(&die_notifier);
  636. if (retval != 0) {
  637. dev_warn(&dev->dev,
  638. "Unable to register a die notifier (err=%d).\n",
  639. retval);
  640. goto error_die_notifier;
  641. }
  642. retval = misc_register(&hpwdt_miscdev);
  643. if (retval < 0) {
  644. dev_warn(&dev->dev,
  645. "Unable to register miscdev on minor=%d (err=%d).\n",
  646. WATCHDOG_MINOR, retval);
  647. goto error_misc_register;
  648. }
  649. printk(KERN_INFO
  650. "hp Watchdog Timer Driver: %s"
  651. ", timer margin: %d seconds (nowayout=%d)"
  652. ", allow kernel dump: %s (default = 0/OFF)"
  653. ", priority: %s (default = 0/LAST).\n",
  654. HPWDT_VERSION, soft_margin, nowayout,
  655. (allow_kdump == 0) ? "OFF" : "ON",
  656. (priority == 0) ? "LAST" : "FIRST");
  657. return 0;
  658. error_misc_register:
  659. unregister_die_notifier(&die_notifier);
  660. error_die_notifier:
  661. if (cru_rom_addr)
  662. iounmap(cru_rom_addr);
  663. error_get_cru:
  664. pci_iounmap(dev, pci_mem_addr);
  665. error_pci_iomap:
  666. pci_disable_device(dev);
  667. return retval;
  668. }
  669. static void __devexit hpwdt_exit(struct pci_dev *dev)
  670. {
  671. if (!nowayout)
  672. hpwdt_stop();
  673. misc_deregister(&hpwdt_miscdev);
  674. unregister_die_notifier(&die_notifier);
  675. if (cru_rom_addr)
  676. iounmap(cru_rom_addr);
  677. pci_iounmap(dev, pci_mem_addr);
  678. pci_disable_device(dev);
  679. }
  680. static struct pci_driver hpwdt_driver = {
  681. .name = "hpwdt",
  682. .id_table = hpwdt_devices,
  683. .probe = hpwdt_init_one,
  684. .remove = __devexit_p(hpwdt_exit),
  685. };
  686. static void __exit hpwdt_cleanup(void)
  687. {
  688. pci_unregister_driver(&hpwdt_driver);
  689. }
  690. static int __init hpwdt_init(void)
  691. {
  692. return pci_register_driver(&hpwdt_driver);
  693. }
  694. MODULE_AUTHOR("Tom Mingarelli");
  695. MODULE_DESCRIPTION("hp watchdog driver");
  696. MODULE_LICENSE("GPL");
  697. MODULE_VERSION(HPWDT_VERSION);
  698. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  699. module_param(soft_margin, int, 0);
  700. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  701. module_param(allow_kdump, int, 0);
  702. MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
  703. module_param(nowayout, int, 0);
  704. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  705. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  706. module_param(priority, int, 0);
  707. MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
  708. " (default = 0/Last)\n");
  709. module_init(hpwdt_init);
  710. module_exit(hpwdt_cleanup);