lh7a40x_udc.c 50 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152
  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include "lh7a40x_udc.h"
  26. //#define DEBUG printk
  27. //#define DEBUG_EP0 printk
  28. //#define DEBUG_SETUP printk
  29. #ifndef DEBUG_EP0
  30. # define DEBUG_EP0(fmt,args...)
  31. #endif
  32. #ifndef DEBUG_SETUP
  33. # define DEBUG_SETUP(fmt,args...)
  34. #endif
  35. #ifndef DEBUG
  36. # define NO_STATES
  37. # define DEBUG(fmt,args...)
  38. #endif
  39. #define DRIVER_DESC "LH7A40x USB Device Controller"
  40. #define DRIVER_VERSION __DATE__
  41. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  42. #define _BIT(x) (1<<(x))
  43. #endif
  44. struct lh7a40x_udc *the_controller;
  45. static const char driver_name[] = "lh7a40x_udc";
  46. static const char driver_desc[] = DRIVER_DESC;
  47. static const char ep0name[] = "ep0-control";
  48. /*
  49. Local definintions.
  50. */
  51. #ifndef NO_STATES
  52. static char *state_names[] = {
  53. "WAIT_FOR_SETUP",
  54. "DATA_STATE_XMIT",
  55. "DATA_STATE_NEED_ZLP",
  56. "WAIT_FOR_OUT_STATUS",
  57. "DATA_STATE_RECV"
  58. };
  59. #endif
  60. /*
  61. Local declarations.
  62. */
  63. static int lh7a40x_ep_enable(struct usb_ep *ep,
  64. const struct usb_endpoint_descriptor *);
  65. static int lh7a40x_ep_disable(struct usb_ep *ep);
  66. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  67. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  68. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  69. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  70. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  71. static int lh7a40x_fifo_status(struct usb_ep *ep);
  72. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  73. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  74. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  75. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  76. int status);
  77. static void pio_irq_enable(int bEndpointAddress);
  78. static void pio_irq_disable(int bEndpointAddress);
  79. static void stop_activity(struct lh7a40x_udc *dev,
  80. struct usb_gadget_driver *driver);
  81. static void flush(struct lh7a40x_ep *ep);
  82. static void udc_enable(struct lh7a40x_udc *dev);
  83. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  84. static struct usb_ep_ops lh7a40x_ep_ops = {
  85. .enable = lh7a40x_ep_enable,
  86. .disable = lh7a40x_ep_disable,
  87. .alloc_request = lh7a40x_alloc_request,
  88. .free_request = lh7a40x_free_request,
  89. .queue = lh7a40x_queue,
  90. .dequeue = lh7a40x_dequeue,
  91. .set_halt = lh7a40x_set_halt,
  92. .fifo_status = lh7a40x_fifo_status,
  93. .fifo_flush = lh7a40x_fifo_flush,
  94. };
  95. /* Inline code */
  96. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  97. struct lh7a40x_request *req, int max)
  98. {
  99. u8 *buf;
  100. int length, count;
  101. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  102. buf = req->req.buf + req->req.actual;
  103. prefetch(buf);
  104. length = req->req.length - req->req.actual;
  105. length = min(length, max);
  106. req->req.actual += length;
  107. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  108. count = length;
  109. while (count--) {
  110. *fifo = *buf++;
  111. }
  112. return length;
  113. }
  114. static __inline__ void usb_set_index(u32 ep)
  115. {
  116. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  117. }
  118. static __inline__ u32 usb_read(u32 port)
  119. {
  120. return *(volatile u32 *)io_p2v(port);
  121. }
  122. static __inline__ void usb_write(u32 val, u32 port)
  123. {
  124. *(volatile u32 *)io_p2v(port) = val;
  125. }
  126. static __inline__ void usb_set(u32 val, u32 port)
  127. {
  128. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  129. u32 after = (*ioport) | val;
  130. *ioport = after;
  131. }
  132. static __inline__ void usb_clear(u32 val, u32 port)
  133. {
  134. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  135. u32 after = (*ioport) & ~val;
  136. *ioport = after;
  137. }
  138. /*-------------------------------------------------------------------------*/
  139. #define GPIO_PORTC_DR (0x80000E08)
  140. #define GPIO_PORTC_DDR (0x80000E18)
  141. #define GPIO_PORTC_PDR (0x80000E70)
  142. /* get port C pin data register */
  143. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  144. /* get port C data direction register */
  145. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  146. /* set port C data register */
  147. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  148. /* set port C data direction register */
  149. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  150. /*
  151. * LPD7A404 GPIO's:
  152. * Port C bit 1 = USB Port 1 Power Enable
  153. * Port C bit 2 = USB Port 1 Data Carrier Detect
  154. */
  155. #define is_usb_connected() get_portc_pdr(2)
  156. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  157. static const char proc_node_name[] = "driver/udc";
  158. static int
  159. udc_proc_read(char *page, char **start, off_t off, int count,
  160. int *eof, void *_dev)
  161. {
  162. char *buf = page;
  163. struct lh7a40x_udc *dev = _dev;
  164. char *next = buf;
  165. unsigned size = count;
  166. unsigned long flags;
  167. int t;
  168. if (off != 0)
  169. return 0;
  170. local_irq_save(flags);
  171. /* basic device status */
  172. t = scnprintf(next, size,
  173. DRIVER_DESC "\n"
  174. "%s version: %s\n"
  175. "Gadget driver: %s\n"
  176. "Host: %s\n\n",
  177. driver_name, DRIVER_VERSION,
  178. dev->driver ? dev->driver->driver.name : "(none)",
  179. is_usb_connected()? "full speed" : "disconnected");
  180. size -= t;
  181. next += t;
  182. t = scnprintf(next, size,
  183. "GPIO:\n"
  184. " Port C bit 1: %d, dir %d\n"
  185. " Port C bit 2: %d, dir %d\n\n",
  186. get_portc_pdr(1), get_portc_ddr(1),
  187. get_portc_pdr(2), get_portc_ddr(2)
  188. );
  189. size -= t;
  190. next += t;
  191. t = scnprintf(next, size,
  192. "DCP pullup: %d\n\n",
  193. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  194. size -= t;
  195. next += t;
  196. local_irq_restore(flags);
  197. *eof = 1;
  198. return count - size;
  199. }
  200. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  201. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  202. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  203. #define create_proc_files() do {} while (0)
  204. #define remove_proc_files() do {} while (0)
  205. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  206. /*
  207. * udc_disable - disable USB device controller
  208. */
  209. static void udc_disable(struct lh7a40x_udc *dev)
  210. {
  211. DEBUG("%s, %p\n", __func__, dev);
  212. udc_set_address(dev, 0);
  213. /* Disable interrupts */
  214. usb_write(0, USB_IN_INT_EN);
  215. usb_write(0, USB_OUT_INT_EN);
  216. usb_write(0, USB_INT_EN);
  217. /* Disable the USB */
  218. usb_write(0, USB_PM);
  219. #ifdef CONFIG_ARCH_LH7A404
  220. /* Disable USB power */
  221. set_portc_dr(1, 0);
  222. #endif
  223. /* if hardware supports it, disconnect from usb */
  224. /* make_usb_disappear(); */
  225. dev->ep0state = WAIT_FOR_SETUP;
  226. dev->gadget.speed = USB_SPEED_UNKNOWN;
  227. dev->usb_address = 0;
  228. }
  229. /*
  230. * udc_reinit - initialize software state
  231. */
  232. static void udc_reinit(struct lh7a40x_udc *dev)
  233. {
  234. u32 i;
  235. DEBUG("%s, %p\n", __func__, dev);
  236. /* device/ep0 records init */
  237. INIT_LIST_HEAD(&dev->gadget.ep_list);
  238. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  239. dev->ep0state = WAIT_FOR_SETUP;
  240. /* basic endpoint records init */
  241. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  242. struct lh7a40x_ep *ep = &dev->ep[i];
  243. if (i != 0)
  244. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  245. ep->desc = 0;
  246. ep->stopped = 0;
  247. INIT_LIST_HEAD(&ep->queue);
  248. ep->pio_irqs = 0;
  249. }
  250. /* the rest was statically initialized, and is read-only */
  251. }
  252. #define BYTES2MAXP(x) (x / 8)
  253. #define MAXP2BYTES(x) (x * 8)
  254. /* until it's enabled, this UDC should be completely invisible
  255. * to any USB host.
  256. */
  257. static void udc_enable(struct lh7a40x_udc *dev)
  258. {
  259. int ep;
  260. DEBUG("%s, %p\n", __func__, dev);
  261. dev->gadget.speed = USB_SPEED_UNKNOWN;
  262. #ifdef CONFIG_ARCH_LH7A404
  263. /* Set Port C bit 1 & 2 as output */
  264. set_portc_ddr(1, 1);
  265. set_portc_ddr(2, 1);
  266. /* Enable USB power */
  267. set_portc_dr(1, 0);
  268. #endif
  269. /*
  270. * C.f Chapter 18.1.3.1 Initializing the USB
  271. */
  272. /* Disable the USB */
  273. usb_clear(PM_USB_ENABLE, USB_PM);
  274. /* Reset APB & I/O sides of the USB */
  275. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  276. mdelay(5);
  277. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  278. /* Set MAXP values for each */
  279. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  280. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  281. u32 csr;
  282. usb_set_index(ep);
  283. switch (ep_reg->ep_type) {
  284. case ep_bulk_in:
  285. case ep_interrupt:
  286. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  287. ep_reg->csr2);
  288. /* Fall through */
  289. case ep_control:
  290. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  291. USB_IN_MAXP);
  292. break;
  293. case ep_bulk_out:
  294. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  295. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  296. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  297. USB_OUT_MAXP);
  298. break;
  299. }
  300. /* Read & Write CSR1, just in case */
  301. csr = usb_read(ep_reg->csr1);
  302. usb_write(csr, ep_reg->csr1);
  303. flush(ep_reg);
  304. }
  305. /* Disable interrupts */
  306. usb_write(0, USB_IN_INT_EN);
  307. usb_write(0, USB_OUT_INT_EN);
  308. usb_write(0, USB_INT_EN);
  309. /* Enable interrupts */
  310. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  311. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  312. /* Dont enable rest of the interrupts */
  313. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  314. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  315. /* Enable SUSPEND */
  316. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  317. /* Enable the USB */
  318. usb_set(PM_USB_ENABLE, USB_PM);
  319. #ifdef CONFIG_ARCH_LH7A404
  320. /* NOTE: DOES NOT WORK! */
  321. /* Let host detect UDC:
  322. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  323. * transistor on and pull the USBDP pin HIGH.
  324. */
  325. /* usb_clear(PM_USB_DCP, USB_PM);
  326. usb_set(PM_USB_DCP, USB_PM); */
  327. #endif
  328. }
  329. /*
  330. Register entry point for the peripheral controller driver.
  331. */
  332. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  333. {
  334. struct lh7a40x_udc *dev = the_controller;
  335. int retval;
  336. DEBUG("%s: %s\n", __func__, driver->driver.name);
  337. if (!driver
  338. || driver->speed != USB_SPEED_FULL
  339. || !driver->bind
  340. || !driver->disconnect
  341. || !driver->setup)
  342. return -EINVAL;
  343. if (!dev)
  344. return -ENODEV;
  345. if (dev->driver)
  346. return -EBUSY;
  347. /* first hook up the driver ... */
  348. dev->driver = driver;
  349. dev->gadget.dev.driver = &driver->driver;
  350. device_add(&dev->gadget.dev);
  351. retval = driver->bind(&dev->gadget);
  352. if (retval) {
  353. printk(KERN_WARNING "%s: bind to driver %s --> error %d\n",
  354. dev->gadget.name, driver->driver.name, retval);
  355. device_del(&dev->gadget.dev);
  356. dev->driver = 0;
  357. dev->gadget.dev.driver = 0;
  358. return retval;
  359. }
  360. /* ... then enable host detection and ep0; and we're ready
  361. * for set_configuration as well as eventual disconnect.
  362. * NOTE: this shouldn't power up until later.
  363. */
  364. printk(KERN_WARNING "%s: registered gadget driver '%s'\n",
  365. dev->gadget.name, driver->driver.name);
  366. udc_enable(dev);
  367. return 0;
  368. }
  369. EXPORT_SYMBOL(usb_gadget_register_driver);
  370. /*
  371. Unregister entry point for the peripheral controller driver.
  372. */
  373. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  374. {
  375. struct lh7a40x_udc *dev = the_controller;
  376. unsigned long flags;
  377. if (!dev)
  378. return -ENODEV;
  379. if (!driver || driver != dev->driver || !driver->unbind)
  380. return -EINVAL;
  381. spin_lock_irqsave(&dev->lock, flags);
  382. dev->driver = 0;
  383. stop_activity(dev, driver);
  384. spin_unlock_irqrestore(&dev->lock, flags);
  385. driver->unbind(&dev->gadget);
  386. dev->gadget.dev.driver = NULL;
  387. device_del(&dev->gadget.dev);
  388. udc_disable(dev);
  389. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  390. return 0;
  391. }
  392. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  393. /*-------------------------------------------------------------------------*/
  394. /** Write request to FIFO (max write == maxp size)
  395. * Return: 0 = still running, 1 = completed, negative = errno
  396. * NOTE: INDEX register must be set for EP
  397. */
  398. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  399. {
  400. u32 max;
  401. u32 csr;
  402. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  403. csr = usb_read(ep->csr1);
  404. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  405. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  406. unsigned count;
  407. int is_last, is_short;
  408. count = write_packet(ep, req, max);
  409. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  410. /* last packet is usually short (or a zlp) */
  411. if (unlikely(count != max))
  412. is_last = is_short = 1;
  413. else {
  414. if (likely(req->req.length != req->req.actual)
  415. || req->req.zero)
  416. is_last = 0;
  417. else
  418. is_last = 1;
  419. /* interrupt/iso maxpacket may not fill the fifo */
  420. is_short = unlikely(max < ep_maxpacket(ep));
  421. }
  422. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__,
  423. ep->ep.name, count,
  424. is_last ? "/L" : "", is_short ? "/S" : "",
  425. req->req.length - req->req.actual, req);
  426. /* requests complete when all IN data is in the FIFO */
  427. if (is_last) {
  428. done(ep, req, 0);
  429. if (list_empty(&ep->queue)) {
  430. pio_irq_disable(ep_index(ep));
  431. }
  432. return 1;
  433. }
  434. } else {
  435. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  436. }
  437. return 0;
  438. }
  439. /** Read to request from FIFO (max read == bytes in fifo)
  440. * Return: 0 = still running, 1 = completed, negative = errno
  441. * NOTE: INDEX register must be set for EP
  442. */
  443. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  444. {
  445. u32 csr;
  446. u8 *buf;
  447. unsigned bufferspace, count, is_short;
  448. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  449. /* make sure there's a packet in the FIFO. */
  450. csr = usb_read(ep->csr1);
  451. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  452. DEBUG("%s: Packet NOT ready!\n", __func__);
  453. return -EINVAL;
  454. }
  455. buf = req->req.buf + req->req.actual;
  456. prefetchw(buf);
  457. bufferspace = req->req.length - req->req.actual;
  458. /* read all bytes from this packet */
  459. count = usb_read(USB_OUT_FIFO_WC1);
  460. req->req.actual += min(count, bufferspace);
  461. is_short = (count < ep->ep.maxpacket);
  462. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  463. ep->ep.name, csr, count,
  464. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  465. while (likely(count-- != 0)) {
  466. u8 byte = (u8) (*fifo & 0xff);
  467. if (unlikely(bufferspace == 0)) {
  468. /* this happens when the driver's buffer
  469. * is smaller than what the host sent.
  470. * discard the extra data.
  471. */
  472. if (req->req.status != -EOVERFLOW)
  473. printk(KERN_WARNING "%s overflow %d\n",
  474. ep->ep.name, count);
  475. req->req.status = -EOVERFLOW;
  476. } else {
  477. *buf++ = byte;
  478. bufferspace--;
  479. }
  480. }
  481. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  482. /* completion */
  483. if (is_short || req->req.actual == req->req.length) {
  484. done(ep, req, 0);
  485. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  486. if (list_empty(&ep->queue))
  487. pio_irq_disable(ep_index(ep));
  488. return 1;
  489. }
  490. /* finished that packet. the next one may be waiting... */
  491. return 0;
  492. }
  493. /*
  494. * done - retire a request; caller blocked irqs
  495. * INDEX register is preserved to keep same
  496. */
  497. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  498. {
  499. unsigned int stopped = ep->stopped;
  500. u32 index;
  501. DEBUG("%s, %p\n", __func__, ep);
  502. list_del_init(&req->queue);
  503. if (likely(req->req.status == -EINPROGRESS))
  504. req->req.status = status;
  505. else
  506. status = req->req.status;
  507. if (status && status != -ESHUTDOWN)
  508. DEBUG("complete %s req %p stat %d len %u/%u\n",
  509. ep->ep.name, &req->req, status,
  510. req->req.actual, req->req.length);
  511. /* don't modify queue heads during completion callback */
  512. ep->stopped = 1;
  513. /* Read current index (completion may modify it) */
  514. index = usb_read(USB_INDEX);
  515. spin_unlock(&ep->dev->lock);
  516. req->req.complete(&ep->ep, &req->req);
  517. spin_lock(&ep->dev->lock);
  518. /* Restore index */
  519. usb_set_index(index);
  520. ep->stopped = stopped;
  521. }
  522. /** Enable EP interrupt */
  523. static void pio_irq_enable(int ep)
  524. {
  525. DEBUG("%s: %d\n", __func__, ep);
  526. switch (ep) {
  527. case 1:
  528. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  529. break;
  530. case 2:
  531. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  532. break;
  533. case 3:
  534. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  535. break;
  536. default:
  537. DEBUG("Unknown endpoint: %d\n", ep);
  538. break;
  539. }
  540. }
  541. /** Disable EP interrupt */
  542. static void pio_irq_disable(int ep)
  543. {
  544. DEBUG("%s: %d\n", __func__, ep);
  545. switch (ep) {
  546. case 1:
  547. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  548. break;
  549. case 2:
  550. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  551. break;
  552. case 3:
  553. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  554. break;
  555. default:
  556. DEBUG("Unknown endpoint: %d\n", ep);
  557. break;
  558. }
  559. }
  560. /*
  561. * nuke - dequeue ALL requests
  562. */
  563. void nuke(struct lh7a40x_ep *ep, int status)
  564. {
  565. struct lh7a40x_request *req;
  566. DEBUG("%s, %p\n", __func__, ep);
  567. /* Flush FIFO */
  568. flush(ep);
  569. /* called with irqs blocked */
  570. while (!list_empty(&ep->queue)) {
  571. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  572. done(ep, req, status);
  573. }
  574. /* Disable IRQ if EP is enabled (has descriptor) */
  575. if (ep->desc)
  576. pio_irq_disable(ep_index(ep));
  577. }
  578. /*
  579. void nuke_all(struct lh7a40x_udc *dev)
  580. {
  581. int n;
  582. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  583. struct lh7a40x_ep *ep = &dev->ep[n];
  584. usb_set_index(n);
  585. nuke(ep, 0);
  586. }
  587. }*/
  588. /*
  589. static void flush_all(struct lh7a40x_udc *dev)
  590. {
  591. int n;
  592. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  593. {
  594. struct lh7a40x_ep *ep = &dev->ep[n];
  595. flush(ep);
  596. }
  597. }
  598. */
  599. /** Flush EP
  600. * NOTE: INDEX register must be set before this call
  601. */
  602. static void flush(struct lh7a40x_ep *ep)
  603. {
  604. DEBUG("%s, %p\n", __func__, ep);
  605. switch (ep->ep_type) {
  606. case ep_control:
  607. /* check, by implication c.f. 15.1.2.11 */
  608. break;
  609. case ep_bulk_in:
  610. case ep_interrupt:
  611. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  612. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  613. break;
  614. case ep_bulk_out:
  615. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  616. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  617. break;
  618. }
  619. }
  620. /**
  621. * lh7a40x_in_epn - handle IN interrupt
  622. */
  623. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  624. {
  625. u32 csr;
  626. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  627. struct lh7a40x_request *req;
  628. usb_set_index(ep_idx);
  629. csr = usb_read(ep->csr1);
  630. DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr);
  631. if (csr & USB_IN_CSR1_SENT_STALL) {
  632. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  633. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  634. ep->csr1);
  635. return;
  636. }
  637. if (!ep->desc) {
  638. DEBUG("%s: NO EP DESC\n", __func__);
  639. return;
  640. }
  641. if (list_empty(&ep->queue))
  642. req = 0;
  643. else
  644. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  645. DEBUG("req: %p\n", req);
  646. if (!req)
  647. return;
  648. write_fifo(ep, req);
  649. }
  650. /* ********************************************************************************************* */
  651. /* Bulk OUT (recv)
  652. */
  653. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  654. {
  655. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  656. struct lh7a40x_request *req;
  657. DEBUG("%s: %d\n", __func__, ep_idx);
  658. usb_set_index(ep_idx);
  659. if (ep->desc) {
  660. u32 csr;
  661. csr = usb_read(ep->csr1);
  662. while ((csr =
  663. usb_read(ep->
  664. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  665. USB_OUT_CSR1_SENT_STALL)) {
  666. DEBUG("%s: %x\n", __func__, csr);
  667. if (csr & USB_OUT_CSR1_SENT_STALL) {
  668. DEBUG("%s: stall sent, flush fifo\n",
  669. __func__);
  670. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  671. flush(ep);
  672. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  673. if (list_empty(&ep->queue))
  674. req = 0;
  675. else
  676. req =
  677. list_entry(ep->queue.next,
  678. struct lh7a40x_request,
  679. queue);
  680. if (!req) {
  681. printk(KERN_WARNING
  682. "%s: NULL REQ %d\n",
  683. __func__, ep_idx);
  684. flush(ep);
  685. break;
  686. } else {
  687. read_fifo(ep, req);
  688. }
  689. }
  690. }
  691. } else {
  692. /* Throw packet away.. */
  693. printk(KERN_WARNING "%s: No descriptor?!?\n", __func__);
  694. flush(ep);
  695. }
  696. }
  697. static void stop_activity(struct lh7a40x_udc *dev,
  698. struct usb_gadget_driver *driver)
  699. {
  700. int i;
  701. /* don't disconnect drivers more than once */
  702. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  703. driver = 0;
  704. dev->gadget.speed = USB_SPEED_UNKNOWN;
  705. /* prevent new request submissions, kill any outstanding requests */
  706. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  707. struct lh7a40x_ep *ep = &dev->ep[i];
  708. ep->stopped = 1;
  709. usb_set_index(i);
  710. nuke(ep, -ESHUTDOWN);
  711. }
  712. /* report disconnect; the driver is already quiesced */
  713. if (driver) {
  714. spin_unlock(&dev->lock);
  715. driver->disconnect(&dev->gadget);
  716. spin_lock(&dev->lock);
  717. }
  718. /* re-init driver-visible data structures */
  719. udc_reinit(dev);
  720. }
  721. /** Handle USB RESET interrupt
  722. */
  723. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  724. {
  725. #if 0 /* def CONFIG_ARCH_LH7A404 */
  726. /* Does not work always... */
  727. DEBUG("%s: %d\n", __func__, dev->usb_address);
  728. if (!dev->usb_address) {
  729. /*usb_set(USB_RESET_IO, USB_RESET);
  730. mdelay(5);
  731. usb_clear(USB_RESET_IO, USB_RESET); */
  732. return;
  733. }
  734. /* Put the USB controller into reset. */
  735. usb_set(USB_RESET_IO, USB_RESET);
  736. /* Set Device ID to 0 */
  737. udc_set_address(dev, 0);
  738. /* Let PLL2 settle down */
  739. mdelay(5);
  740. /* Release the USB controller from reset */
  741. usb_clear(USB_RESET_IO, USB_RESET);
  742. /* Re-enable UDC */
  743. udc_enable(dev);
  744. #endif
  745. dev->gadget.speed = USB_SPEED_FULL;
  746. }
  747. /*
  748. * lh7a40x usb client interrupt handler.
  749. */
  750. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  751. {
  752. struct lh7a40x_udc *dev = _dev;
  753. DEBUG("\n\n");
  754. spin_lock(&dev->lock);
  755. for (;;) {
  756. u32 intr_in = usb_read(USB_IN_INT);
  757. u32 intr_out = usb_read(USB_OUT_INT);
  758. u32 intr_int = usb_read(USB_INT);
  759. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  760. u32 in_en = usb_read(USB_IN_INT_EN);
  761. u32 out_en = usb_read(USB_OUT_INT_EN);
  762. if (!intr_out && !intr_in && !intr_int)
  763. break;
  764. DEBUG("%s (on state %s)\n", __func__,
  765. state_names[dev->ep0state]);
  766. DEBUG("intr_out = %x\n", intr_out);
  767. DEBUG("intr_in = %x\n", intr_in);
  768. DEBUG("intr_int = %x\n", intr_int);
  769. if (intr_in) {
  770. usb_write(intr_in, USB_IN_INT);
  771. if ((intr_in & USB_IN_INT_EP1)
  772. && (in_en & USB_IN_INT_EP1)) {
  773. DEBUG("USB_IN_INT_EP1\n");
  774. lh7a40x_in_epn(dev, 1, intr_in);
  775. }
  776. if ((intr_in & USB_IN_INT_EP3)
  777. && (in_en & USB_IN_INT_EP3)) {
  778. DEBUG("USB_IN_INT_EP3\n");
  779. lh7a40x_in_epn(dev, 3, intr_in);
  780. }
  781. if (intr_in & USB_IN_INT_EP0) {
  782. DEBUG("USB_IN_INT_EP0 (control)\n");
  783. lh7a40x_handle_ep0(dev, intr_in);
  784. }
  785. }
  786. if (intr_out) {
  787. usb_write(intr_out, USB_OUT_INT);
  788. if ((intr_out & USB_OUT_INT_EP2)
  789. && (out_en & USB_OUT_INT_EP2)) {
  790. DEBUG("USB_OUT_INT_EP2\n");
  791. lh7a40x_out_epn(dev, 2, intr_out);
  792. }
  793. }
  794. if (intr_int) {
  795. usb_write(intr_int, USB_INT);
  796. if (intr_int & USB_INT_RESET_INT) {
  797. lh7a40x_reset_intr(dev);
  798. }
  799. if (intr_int & USB_INT_RESUME_INT) {
  800. DEBUG("USB resume\n");
  801. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  802. && dev->driver
  803. && dev->driver->resume
  804. && is_usb_connected()) {
  805. dev->driver->resume(&dev->gadget);
  806. }
  807. }
  808. if (intr_int & USB_INT_SUSPEND_INT) {
  809. DEBUG("USB suspend%s\n",
  810. is_usb_connected()? "" : "+disconnect");
  811. if (!is_usb_connected()) {
  812. stop_activity(dev, dev->driver);
  813. } else if (dev->gadget.speed !=
  814. USB_SPEED_UNKNOWN && dev->driver
  815. && dev->driver->suspend) {
  816. dev->driver->suspend(&dev->gadget);
  817. }
  818. }
  819. }
  820. }
  821. spin_unlock(&dev->lock);
  822. return IRQ_HANDLED;
  823. }
  824. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  825. const struct usb_endpoint_descriptor *desc)
  826. {
  827. struct lh7a40x_ep *ep;
  828. struct lh7a40x_udc *dev;
  829. unsigned long flags;
  830. DEBUG("%s, %p\n", __func__, _ep);
  831. ep = container_of(_ep, struct lh7a40x_ep, ep);
  832. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  833. || desc->bDescriptorType != USB_DT_ENDPOINT
  834. || ep->bEndpointAddress != desc->bEndpointAddress
  835. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  836. DEBUG("%s, bad ep or descriptor\n", __func__);
  837. return -EINVAL;
  838. }
  839. /* xfer types must match, except that interrupt ~= bulk */
  840. if (ep->bmAttributes != desc->bmAttributes
  841. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  842. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  843. DEBUG("%s, %s type mismatch\n", __func__, _ep->name);
  844. return -EINVAL;
  845. }
  846. /* hardware _could_ do smaller, but driver doesn't */
  847. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  848. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  849. || !desc->wMaxPacketSize) {
  850. DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name);
  851. return -ERANGE;
  852. }
  853. dev = ep->dev;
  854. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  855. DEBUG("%s, bogus device state\n", __func__);
  856. return -ESHUTDOWN;
  857. }
  858. spin_lock_irqsave(&ep->dev->lock, flags);
  859. ep->stopped = 0;
  860. ep->desc = desc;
  861. ep->pio_irqs = 0;
  862. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  863. spin_unlock_irqrestore(&ep->dev->lock, flags);
  864. /* Reset halt state (does flush) */
  865. lh7a40x_set_halt(_ep, 0);
  866. DEBUG("%s: enabled %s\n", __func__, _ep->name);
  867. return 0;
  868. }
  869. /** Disable EP
  870. * NOTE: Sets INDEX register
  871. */
  872. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  873. {
  874. struct lh7a40x_ep *ep;
  875. unsigned long flags;
  876. DEBUG("%s, %p\n", __func__, _ep);
  877. ep = container_of(_ep, struct lh7a40x_ep, ep);
  878. if (!_ep || !ep->desc) {
  879. DEBUG("%s, %s not enabled\n", __func__,
  880. _ep ? ep->ep.name : NULL);
  881. return -EINVAL;
  882. }
  883. spin_lock_irqsave(&ep->dev->lock, flags);
  884. usb_set_index(ep_index(ep));
  885. /* Nuke all pending requests (does flush) */
  886. nuke(ep, -ESHUTDOWN);
  887. /* Disable ep IRQ */
  888. pio_irq_disable(ep_index(ep));
  889. ep->desc = 0;
  890. ep->stopped = 1;
  891. spin_unlock_irqrestore(&ep->dev->lock, flags);
  892. DEBUG("%s: disabled %s\n", __func__, _ep->name);
  893. return 0;
  894. }
  895. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  896. gfp_t gfp_flags)
  897. {
  898. struct lh7a40x_request *req;
  899. DEBUG("%s, %p\n", __func__, ep);
  900. req = kzalloc(sizeof(*req), gfp_flags);
  901. if (!req)
  902. return 0;
  903. INIT_LIST_HEAD(&req->queue);
  904. return &req->req;
  905. }
  906. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  907. {
  908. struct lh7a40x_request *req;
  909. DEBUG("%s, %p\n", __func__, ep);
  910. req = container_of(_req, struct lh7a40x_request, req);
  911. WARN_ON(!list_empty(&req->queue));
  912. kfree(req);
  913. }
  914. /** Queue one request
  915. * Kickstart transfer if needed
  916. * NOTE: Sets INDEX register
  917. */
  918. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  919. gfp_t gfp_flags)
  920. {
  921. struct lh7a40x_request *req;
  922. struct lh7a40x_ep *ep;
  923. struct lh7a40x_udc *dev;
  924. unsigned long flags;
  925. DEBUG("\n\n\n%s, %p\n", __func__, _ep);
  926. req = container_of(_req, struct lh7a40x_request, req);
  927. if (unlikely
  928. (!_req || !_req->complete || !_req->buf
  929. || !list_empty(&req->queue))) {
  930. DEBUG("%s, bad params\n", __func__);
  931. return -EINVAL;
  932. }
  933. ep = container_of(_ep, struct lh7a40x_ep, ep);
  934. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  935. DEBUG("%s, bad ep\n", __func__);
  936. return -EINVAL;
  937. }
  938. dev = ep->dev;
  939. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  940. DEBUG("%s, bogus device state %p\n", __func__, dev->driver);
  941. return -ESHUTDOWN;
  942. }
  943. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  944. _req->buf);
  945. spin_lock_irqsave(&dev->lock, flags);
  946. _req->status = -EINPROGRESS;
  947. _req->actual = 0;
  948. /* kickstart this i/o queue? */
  949. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  950. ep->stopped);
  951. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  952. u32 csr;
  953. if (unlikely(ep_index(ep) == 0)) {
  954. /* EP0 */
  955. list_add_tail(&req->queue, &ep->queue);
  956. lh7a40x_ep0_kick(dev, ep);
  957. req = 0;
  958. } else if (ep_is_in(ep)) {
  959. /* EP1 & EP3 */
  960. usb_set_index(ep_index(ep));
  961. csr = usb_read(ep->csr1);
  962. pio_irq_enable(ep_index(ep));
  963. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  964. if (write_fifo(ep, req) == 1)
  965. req = 0;
  966. }
  967. } else {
  968. /* EP2 */
  969. usb_set_index(ep_index(ep));
  970. csr = usb_read(ep->csr1);
  971. pio_irq_enable(ep_index(ep));
  972. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  973. if (read_fifo(ep, req) == 1)
  974. req = 0;
  975. }
  976. }
  977. }
  978. /* pio or dma irq handler advances the queue. */
  979. if (likely(req != 0))
  980. list_add_tail(&req->queue, &ep->queue);
  981. spin_unlock_irqrestore(&dev->lock, flags);
  982. return 0;
  983. }
  984. /* dequeue JUST ONE request */
  985. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  986. {
  987. struct lh7a40x_ep *ep;
  988. struct lh7a40x_request *req;
  989. unsigned long flags;
  990. DEBUG("%s, %p\n", __func__, _ep);
  991. ep = container_of(_ep, struct lh7a40x_ep, ep);
  992. if (!_ep || ep->ep.name == ep0name)
  993. return -EINVAL;
  994. spin_lock_irqsave(&ep->dev->lock, flags);
  995. /* make sure it's actually queued on this endpoint */
  996. list_for_each_entry(req, &ep->queue, queue) {
  997. if (&req->req == _req)
  998. break;
  999. }
  1000. if (&req->req != _req) {
  1001. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1002. return -EINVAL;
  1003. }
  1004. done(ep, req, -ECONNRESET);
  1005. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1006. return 0;
  1007. }
  1008. /** Halt specific EP
  1009. * Return 0 if success
  1010. * NOTE: Sets INDEX register to EP !
  1011. */
  1012. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1013. {
  1014. struct lh7a40x_ep *ep;
  1015. unsigned long flags;
  1016. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1017. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1018. DEBUG("%s, bad ep\n", __func__);
  1019. return -EINVAL;
  1020. }
  1021. usb_set_index(ep_index(ep));
  1022. DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value);
  1023. spin_lock_irqsave(&ep->dev->lock, flags);
  1024. if (ep_index(ep) == 0) {
  1025. /* EP0 */
  1026. usb_set(EP0_SEND_STALL, ep->csr1);
  1027. } else if (ep_is_in(ep)) {
  1028. u32 csr = usb_read(ep->csr1);
  1029. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1030. || !list_empty(&ep->queue))) {
  1031. /*
  1032. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1033. * if any transfer requests are still queued, or if the controller
  1034. * FIFO still holds bytes that the host hasn't collected.
  1035. */
  1036. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1037. DEBUG
  1038. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1039. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1040. !list_empty(&ep->queue));
  1041. return -EAGAIN;
  1042. }
  1043. flush(ep);
  1044. if (value)
  1045. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1046. else {
  1047. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1048. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1049. }
  1050. } else {
  1051. flush(ep);
  1052. if (value)
  1053. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1054. else {
  1055. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1056. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1057. }
  1058. }
  1059. if (value) {
  1060. ep->stopped = 1;
  1061. } else {
  1062. ep->stopped = 0;
  1063. }
  1064. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1065. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1066. return 0;
  1067. }
  1068. /** Return bytes in EP FIFO
  1069. * NOTE: Sets INDEX register to EP
  1070. */
  1071. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1072. {
  1073. u32 csr;
  1074. int count = 0;
  1075. struct lh7a40x_ep *ep;
  1076. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1077. if (!_ep) {
  1078. DEBUG("%s, bad ep\n", __func__);
  1079. return -ENODEV;
  1080. }
  1081. DEBUG("%s, %d\n", __func__, ep_index(ep));
  1082. /* LPD can't report unclaimed bytes from IN fifos */
  1083. if (ep_is_in(ep))
  1084. return -EOPNOTSUPP;
  1085. usb_set_index(ep_index(ep));
  1086. csr = usb_read(ep->csr1);
  1087. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1088. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1089. count = usb_read(USB_OUT_FIFO_WC1);
  1090. }
  1091. return count;
  1092. }
  1093. /** Flush EP FIFO
  1094. * NOTE: Sets INDEX register to EP
  1095. */
  1096. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1097. {
  1098. struct lh7a40x_ep *ep;
  1099. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1100. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1101. DEBUG("%s, bad ep\n", __func__);
  1102. return;
  1103. }
  1104. usb_set_index(ep_index(ep));
  1105. flush(ep);
  1106. }
  1107. /****************************************************************/
  1108. /* End Point 0 related functions */
  1109. /****************************************************************/
  1110. /* return: 0 = still running, 1 = completed, negative = errno */
  1111. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1112. {
  1113. u32 max;
  1114. unsigned count;
  1115. int is_last;
  1116. max = ep_maxpacket(ep);
  1117. DEBUG_EP0("%s\n", __func__);
  1118. count = write_packet(ep, req, max);
  1119. /* last packet is usually short (or a zlp) */
  1120. if (unlikely(count != max))
  1121. is_last = 1;
  1122. else {
  1123. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1124. is_last = 0;
  1125. else
  1126. is_last = 1;
  1127. }
  1128. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
  1129. ep->ep.name, count,
  1130. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1131. /* requests complete when all IN data is in the FIFO */
  1132. if (is_last) {
  1133. done(ep, req, 0);
  1134. return 1;
  1135. }
  1136. return 0;
  1137. }
  1138. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1139. unsigned char *cp, int max)
  1140. {
  1141. int bytes;
  1142. int count = usb_read(USB_OUT_FIFO_WC1);
  1143. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1144. if (count > max)
  1145. count = max;
  1146. bytes = count;
  1147. while (count--)
  1148. *cp++ = *fifo & 0xFF;
  1149. return bytes;
  1150. }
  1151. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1152. unsigned char *cp, int count)
  1153. {
  1154. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1155. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1156. while (count--)
  1157. *fifo = *cp++;
  1158. }
  1159. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1160. {
  1161. u32 csr;
  1162. u8 *buf;
  1163. unsigned bufferspace, count, is_short;
  1164. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1165. DEBUG_EP0("%s\n", __func__);
  1166. csr = usb_read(USB_EP0_CSR);
  1167. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1168. return 0;
  1169. buf = req->req.buf + req->req.actual;
  1170. prefetchw(buf);
  1171. bufferspace = req->req.length - req->req.actual;
  1172. /* read all bytes from this packet */
  1173. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1174. count = usb_read(USB_OUT_FIFO_WC1);
  1175. req->req.actual += min(count, bufferspace);
  1176. } else /* zlp */
  1177. count = 0;
  1178. is_short = (count < ep->ep.maxpacket);
  1179. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1180. ep->ep.name, csr, count,
  1181. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1182. while (likely(count-- != 0)) {
  1183. u8 byte = (u8) (*fifo & 0xff);
  1184. if (unlikely(bufferspace == 0)) {
  1185. /* this happens when the driver's buffer
  1186. * is smaller than what the host sent.
  1187. * discard the extra data.
  1188. */
  1189. if (req->req.status != -EOVERFLOW)
  1190. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1191. count);
  1192. req->req.status = -EOVERFLOW;
  1193. } else {
  1194. *buf++ = byte;
  1195. bufferspace--;
  1196. }
  1197. }
  1198. /* completion */
  1199. if (is_short || req->req.actual == req->req.length) {
  1200. done(ep, req, 0);
  1201. return 1;
  1202. }
  1203. /* finished that packet. the next one may be waiting... */
  1204. return 0;
  1205. }
  1206. /**
  1207. * udc_set_address - set the USB address for this device
  1208. * @address:
  1209. *
  1210. * Called from control endpoint function after it decodes a set address setup packet.
  1211. */
  1212. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1213. {
  1214. DEBUG_EP0("%s: %d\n", __func__, address);
  1215. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1216. dev->usb_address = address;
  1217. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1218. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1219. /* usb_read(USB_FA); */
  1220. }
  1221. /*
  1222. * DATA_STATE_RECV (OUT_PKT_RDY)
  1223. * - if error
  1224. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1225. * - else
  1226. * set EP0_CLR_OUT bit
  1227. if last set EP0_DATA_END bit
  1228. */
  1229. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1230. {
  1231. struct lh7a40x_request *req;
  1232. struct lh7a40x_ep *ep = &dev->ep[0];
  1233. int ret;
  1234. DEBUG_EP0("%s: %x\n", __func__, csr);
  1235. if (list_empty(&ep->queue))
  1236. req = 0;
  1237. else
  1238. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1239. if (req) {
  1240. if (req->req.length == 0) {
  1241. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1242. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1243. dev->ep0state = WAIT_FOR_SETUP;
  1244. return;
  1245. }
  1246. ret = read_fifo_ep0(ep, req);
  1247. if (ret) {
  1248. /* Done! */
  1249. DEBUG_EP0("%s: finished, waiting for status\n",
  1250. __func__);
  1251. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1252. dev->ep0state = WAIT_FOR_SETUP;
  1253. } else {
  1254. /* Not done yet.. */
  1255. DEBUG_EP0("%s: not finished\n", __func__);
  1256. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1257. }
  1258. } else {
  1259. DEBUG_EP0("NO REQ??!\n");
  1260. }
  1261. }
  1262. /*
  1263. * DATA_STATE_XMIT
  1264. */
  1265. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1266. {
  1267. struct lh7a40x_request *req;
  1268. struct lh7a40x_ep *ep = &dev->ep[0];
  1269. int ret, need_zlp = 0;
  1270. DEBUG_EP0("%s: %x\n", __func__, csr);
  1271. if (list_empty(&ep->queue))
  1272. req = 0;
  1273. else
  1274. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1275. if (!req) {
  1276. DEBUG_EP0("%s: NULL REQ\n", __func__);
  1277. return 0;
  1278. }
  1279. if (req->req.length == 0) {
  1280. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1281. dev->ep0state = WAIT_FOR_SETUP;
  1282. return 1;
  1283. }
  1284. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1285. /* Next write will end with the packet size, */
  1286. /* so we need Zero-length-packet */
  1287. need_zlp = 1;
  1288. }
  1289. ret = write_fifo_ep0(ep, req);
  1290. if (ret == 1 && !need_zlp) {
  1291. /* Last packet */
  1292. DEBUG_EP0("%s: finished, waiting for status\n", __func__);
  1293. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1294. dev->ep0state = WAIT_FOR_SETUP;
  1295. } else {
  1296. DEBUG_EP0("%s: not finished\n", __func__);
  1297. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1298. }
  1299. if (need_zlp) {
  1300. DEBUG_EP0("%s: Need ZLP!\n", __func__);
  1301. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1302. dev->ep0state = DATA_STATE_NEED_ZLP;
  1303. }
  1304. return 1;
  1305. }
  1306. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1307. struct usb_ctrlrequest *ctrl)
  1308. {
  1309. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1310. struct lh7a40x_ep *qep;
  1311. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1312. u16 val = 0;
  1313. if (reqtype == USB_RECIP_INTERFACE) {
  1314. /* This is not supported.
  1315. * And according to the USB spec, this one does nothing..
  1316. * Just return 0
  1317. */
  1318. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1319. } else if (reqtype == USB_RECIP_DEVICE) {
  1320. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1321. val |= (1 << 0); /* Self powered */
  1322. /*val |= (1<<1); *//* Remote wakeup */
  1323. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1324. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1325. DEBUG_SETUP
  1326. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1327. ep_num, ctrl->wLength);
  1328. if (ctrl->wLength > 2 || ep_num > 3)
  1329. return -EOPNOTSUPP;
  1330. qep = &dev->ep[ep_num];
  1331. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1332. && ep_index(qep) != 0) {
  1333. return -EOPNOTSUPP;
  1334. }
  1335. usb_set_index(ep_index(qep));
  1336. /* Return status on next IN token */
  1337. switch (qep->ep_type) {
  1338. case ep_control:
  1339. val =
  1340. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1341. EP0_SEND_STALL;
  1342. break;
  1343. case ep_bulk_in:
  1344. case ep_interrupt:
  1345. val =
  1346. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1347. USB_IN_CSR1_SEND_STALL;
  1348. break;
  1349. case ep_bulk_out:
  1350. val =
  1351. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1352. USB_OUT_CSR1_SEND_STALL;
  1353. break;
  1354. }
  1355. /* Back to EP0 index */
  1356. usb_set_index(0);
  1357. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1358. ctrl->wIndex, val);
  1359. } else {
  1360. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1361. return -EOPNOTSUPP;
  1362. }
  1363. /* Clear "out packet ready" */
  1364. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1365. /* Put status to FIFO */
  1366. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1367. /* Issue "In packet ready" */
  1368. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1369. return 0;
  1370. }
  1371. /*
  1372. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1373. * - read data packet from EP0 FIFO
  1374. * - decode command
  1375. * - if error
  1376. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1377. * - else
  1378. * set EP0_CLR_OUT | EP0_DATA_END bits
  1379. */
  1380. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1381. {
  1382. struct lh7a40x_ep *ep = &dev->ep[0];
  1383. struct usb_ctrlrequest ctrl;
  1384. int i, bytes, is_in;
  1385. DEBUG_SETUP("%s: %x\n", __func__, csr);
  1386. /* Nuke all previous transfers */
  1387. nuke(ep, -EPROTO);
  1388. /* read control req from fifo (8 bytes) */
  1389. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1390. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1391. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1392. ctrl.bRequestType == USB_DIR_IN);
  1393. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1394. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1395. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1396. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1397. /* Set direction of EP0 */
  1398. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1399. ep->bEndpointAddress |= USB_DIR_IN;
  1400. is_in = 1;
  1401. } else {
  1402. ep->bEndpointAddress &= ~USB_DIR_IN;
  1403. is_in = 0;
  1404. }
  1405. dev->req_pending = 1;
  1406. /* Handle some SETUP packets ourselves */
  1407. switch (ctrl.bRequest) {
  1408. case USB_REQ_SET_ADDRESS:
  1409. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1410. break;
  1411. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1412. udc_set_address(dev, ctrl.wValue);
  1413. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1414. return;
  1415. case USB_REQ_GET_STATUS:{
  1416. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1417. return;
  1418. case USB_REQ_CLEAR_FEATURE:
  1419. case USB_REQ_SET_FEATURE:
  1420. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1421. struct lh7a40x_ep *qep;
  1422. int ep_num = (ctrl.wIndex & 0x0f);
  1423. /* Support only HALT feature */
  1424. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1425. || ep_num > 3 || ep_num < 1)
  1426. break;
  1427. qep = &dev->ep[ep_num];
  1428. spin_unlock(&dev->lock);
  1429. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1430. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1431. ep_num);
  1432. lh7a40x_set_halt(&qep->ep, 1);
  1433. } else {
  1434. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1435. ep_num);
  1436. lh7a40x_set_halt(&qep->ep, 0);
  1437. }
  1438. spin_lock(&dev->lock);
  1439. usb_set_index(0);
  1440. /* Reply with a ZLP on next IN token */
  1441. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1442. USB_EP0_CSR);
  1443. return;
  1444. }
  1445. break;
  1446. }
  1447. default:
  1448. break;
  1449. }
  1450. if (likely(dev->driver)) {
  1451. /* device-2-host (IN) or no data setup command, process immediately */
  1452. spin_unlock(&dev->lock);
  1453. i = dev->driver->setup(&dev->gadget, &ctrl);
  1454. spin_lock(&dev->lock);
  1455. if (i < 0) {
  1456. /* setup processing failed, force stall */
  1457. DEBUG_SETUP
  1458. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1459. i);
  1460. usb_set_index(0);
  1461. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1462. USB_EP0_CSR);
  1463. /* ep->stopped = 1; */
  1464. dev->ep0state = WAIT_FOR_SETUP;
  1465. }
  1466. }
  1467. }
  1468. /*
  1469. * DATA_STATE_NEED_ZLP
  1470. */
  1471. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1472. {
  1473. DEBUG_EP0("%s: %x\n", __func__, csr);
  1474. /* c.f. Table 15-14 */
  1475. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1476. dev->ep0state = WAIT_FOR_SETUP;
  1477. }
  1478. /*
  1479. * handle ep0 interrupt
  1480. */
  1481. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1482. {
  1483. struct lh7a40x_ep *ep = &dev->ep[0];
  1484. u32 csr;
  1485. /* Set index 0 */
  1486. usb_set_index(0);
  1487. csr = usb_read(USB_EP0_CSR);
  1488. DEBUG_EP0("%s: csr = %x\n", __func__, csr);
  1489. /*
  1490. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1491. * We will follow that outline here modified by our own global state
  1492. * indication which provides hints as to what we think should be
  1493. * happening..
  1494. */
  1495. /*
  1496. * if SENT_STALL is set
  1497. * - clear the SENT_STALL bit
  1498. */
  1499. if (csr & EP0_SENT_STALL) {
  1500. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr);
  1501. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1502. nuke(ep, -ECONNABORTED);
  1503. dev->ep0state = WAIT_FOR_SETUP;
  1504. return;
  1505. }
  1506. /*
  1507. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1508. * - fill EP0 FIFO
  1509. * - if last packet
  1510. * - set IN_PKT_RDY | DATA_END
  1511. * - else
  1512. * set IN_PKT_RDY
  1513. */
  1514. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1515. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1516. __func__);
  1517. switch (dev->ep0state) {
  1518. case DATA_STATE_XMIT:
  1519. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1520. lh7a40x_ep0_in(dev, csr);
  1521. return;
  1522. case DATA_STATE_NEED_ZLP:
  1523. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1524. lh7a40x_ep0_in_zlp(dev, csr);
  1525. return;
  1526. default:
  1527. /* Stall? */
  1528. DEBUG_EP0("Odd state!! state = %s\n",
  1529. state_names[dev->ep0state]);
  1530. dev->ep0state = WAIT_FOR_SETUP;
  1531. /* nuke(ep, 0); */
  1532. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1533. break;
  1534. }
  1535. }
  1536. /*
  1537. * if SETUP_END is set
  1538. * - abort the last transfer
  1539. * - set SERVICED_SETUP_END_BIT
  1540. */
  1541. if (csr & EP0_SETUP_END) {
  1542. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr);
  1543. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1544. nuke(ep, 0);
  1545. dev->ep0state = WAIT_FOR_SETUP;
  1546. }
  1547. /*
  1548. * if EP0_OUT_PKT_RDY is set
  1549. * - read data packet from EP0 FIFO
  1550. * - decode command
  1551. * - if error
  1552. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1553. * - else
  1554. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1555. */
  1556. if (csr & EP0_OUT_PKT_RDY) {
  1557. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__,
  1558. csr);
  1559. switch (dev->ep0state) {
  1560. case WAIT_FOR_SETUP:
  1561. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1562. lh7a40x_ep0_setup(dev, csr);
  1563. break;
  1564. case DATA_STATE_RECV:
  1565. DEBUG_EP0("DATA_STATE_RECV\n");
  1566. lh7a40x_ep0_out(dev, csr);
  1567. break;
  1568. default:
  1569. /* send stall? */
  1570. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1571. dev->ep0state);
  1572. break;
  1573. }
  1574. }
  1575. }
  1576. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1577. {
  1578. u32 csr;
  1579. usb_set_index(0);
  1580. csr = usb_read(USB_EP0_CSR);
  1581. DEBUG_EP0("%s: %x\n", __func__, csr);
  1582. /* Clear "out packet ready" */
  1583. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1584. if (ep_is_in(ep)) {
  1585. dev->ep0state = DATA_STATE_XMIT;
  1586. lh7a40x_ep0_in(dev, csr);
  1587. } else {
  1588. dev->ep0state = DATA_STATE_RECV;
  1589. lh7a40x_ep0_out(dev, csr);
  1590. }
  1591. }
  1592. /* ---------------------------------------------------------------------------
  1593. * device-scoped parts of the api to the usb controller hardware
  1594. * ---------------------------------------------------------------------------
  1595. */
  1596. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1597. {
  1598. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1599. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1600. DEBUG("%s, %p\n", __func__, _gadget);
  1601. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1602. }
  1603. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1604. {
  1605. /* host may not have enabled remote wakeup */
  1606. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1607. return -EHOSTUNREACH;
  1608. udc_set_mask_UDCCR(UDCCR_RSM); */
  1609. return -ENOTSUPP;
  1610. }
  1611. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1612. .get_frame = lh7a40x_udc_get_frame,
  1613. .wakeup = lh7a40x_udc_wakeup,
  1614. /* current versions must always be self-powered */
  1615. };
  1616. static void nop_release(struct device *dev)
  1617. {
  1618. DEBUG("%s %s\n", __func__, dev_name(dev));
  1619. }
  1620. static struct lh7a40x_udc memory = {
  1621. .usb_address = 0,
  1622. .gadget = {
  1623. .ops = &lh7a40x_udc_ops,
  1624. .ep0 = &memory.ep[0].ep,
  1625. .name = driver_name,
  1626. .dev = {
  1627. .init_name = "gadget",
  1628. .release = nop_release,
  1629. },
  1630. },
  1631. /* control endpoint */
  1632. .ep[0] = {
  1633. .ep = {
  1634. .name = ep0name,
  1635. .ops = &lh7a40x_ep_ops,
  1636. .maxpacket = EP0_PACKETSIZE,
  1637. },
  1638. .dev = &memory,
  1639. .bEndpointAddress = 0,
  1640. .bmAttributes = 0,
  1641. .ep_type = ep_control,
  1642. .fifo = io_p2v(USB_EP0_FIFO),
  1643. .csr1 = USB_EP0_CSR,
  1644. .csr2 = USB_EP0_CSR,
  1645. },
  1646. /* first group of endpoints */
  1647. .ep[1] = {
  1648. .ep = {
  1649. .name = "ep1in-bulk",
  1650. .ops = &lh7a40x_ep_ops,
  1651. .maxpacket = 64,
  1652. },
  1653. .dev = &memory,
  1654. .bEndpointAddress = USB_DIR_IN | 1,
  1655. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1656. .ep_type = ep_bulk_in,
  1657. .fifo = io_p2v(USB_EP1_FIFO),
  1658. .csr1 = USB_IN_CSR1,
  1659. .csr2 = USB_IN_CSR2,
  1660. },
  1661. .ep[2] = {
  1662. .ep = {
  1663. .name = "ep2out-bulk",
  1664. .ops = &lh7a40x_ep_ops,
  1665. .maxpacket = 64,
  1666. },
  1667. .dev = &memory,
  1668. .bEndpointAddress = 2,
  1669. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1670. .ep_type = ep_bulk_out,
  1671. .fifo = io_p2v(USB_EP2_FIFO),
  1672. .csr1 = USB_OUT_CSR1,
  1673. .csr2 = USB_OUT_CSR2,
  1674. },
  1675. .ep[3] = {
  1676. .ep = {
  1677. .name = "ep3in-int",
  1678. .ops = &lh7a40x_ep_ops,
  1679. .maxpacket = 64,
  1680. },
  1681. .dev = &memory,
  1682. .bEndpointAddress = USB_DIR_IN | 3,
  1683. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1684. .ep_type = ep_interrupt,
  1685. .fifo = io_p2v(USB_EP3_FIFO),
  1686. .csr1 = USB_IN_CSR1,
  1687. .csr2 = USB_IN_CSR2,
  1688. },
  1689. };
  1690. /*
  1691. * probe - binds to the platform device
  1692. */
  1693. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1694. {
  1695. struct lh7a40x_udc *dev = &memory;
  1696. int retval;
  1697. DEBUG("%s: %p\n", __func__, pdev);
  1698. spin_lock_init(&dev->lock);
  1699. dev->dev = &pdev->dev;
  1700. device_initialize(&dev->gadget.dev);
  1701. dev->gadget.dev.parent = &pdev->dev;
  1702. the_controller = dev;
  1703. platform_set_drvdata(pdev, dev);
  1704. udc_disable(dev);
  1705. udc_reinit(dev);
  1706. /* irq setup after old hardware state is cleaned up */
  1707. retval =
  1708. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1709. dev);
  1710. if (retval != 0) {
  1711. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1712. IRQ_USBINTR, retval);
  1713. return -EBUSY;
  1714. }
  1715. create_proc_files();
  1716. return retval;
  1717. }
  1718. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1719. {
  1720. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1721. DEBUG("%s: %p\n", __func__, pdev);
  1722. if (dev->driver)
  1723. return -EBUSY;
  1724. udc_disable(dev);
  1725. remove_proc_files();
  1726. free_irq(IRQ_USBINTR, dev);
  1727. platform_set_drvdata(pdev, 0);
  1728. the_controller = 0;
  1729. return 0;
  1730. }
  1731. /*-------------------------------------------------------------------------*/
  1732. static struct platform_driver udc_driver = {
  1733. .probe = lh7a40x_udc_probe,
  1734. .remove = lh7a40x_udc_remove,
  1735. /* FIXME power management support */
  1736. /* .suspend = ... disable UDC */
  1737. /* .resume = ... re-enable UDC */
  1738. .driver = {
  1739. .name = (char *)driver_name,
  1740. .owner = THIS_MODULE,
  1741. },
  1742. };
  1743. static int __init udc_init(void)
  1744. {
  1745. DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION);
  1746. return platform_driver_register(&udc_driver);
  1747. }
  1748. static void __exit udc_exit(void)
  1749. {
  1750. platform_driver_unregister(&udc_driver);
  1751. }
  1752. module_init(udc_init);
  1753. module_exit(udc_exit);
  1754. MODULE_DESCRIPTION(DRIVER_DESC);
  1755. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1756. MODULE_LICENSE("GPL");
  1757. MODULE_ALIAS("platform:lh7a40x_udc");