wm831x-dcdc.c 26 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046
  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/slab.h>
  24. #include <linux/mfd/wm831x/core.h>
  25. #include <linux/mfd/wm831x/regulator.h>
  26. #include <linux/mfd/wm831x/pdata.h>
  27. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  28. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  29. #define WM831X_DCDC_MODE_FAST 0
  30. #define WM831X_DCDC_MODE_NORMAL 1
  31. #define WM831X_DCDC_MODE_IDLE 2
  32. #define WM831X_DCDC_MODE_STANDBY 3
  33. #define WM831X_DCDC_MAX_NAME 6
  34. /* Register offsets in control block */
  35. #define WM831X_DCDC_CONTROL_1 0
  36. #define WM831X_DCDC_CONTROL_2 1
  37. #define WM831X_DCDC_ON_CONFIG 2
  38. #define WM831X_DCDC_SLEEP_CONTROL 3
  39. #define WM831X_DCDC_DVS_CONTROL 4
  40. /*
  41. * Shared
  42. */
  43. struct wm831x_dcdc {
  44. char name[WM831X_DCDC_MAX_NAME];
  45. struct regulator_desc desc;
  46. int base;
  47. struct wm831x *wm831x;
  48. struct regulator_dev *regulator;
  49. int dvs_gpio;
  50. int dvs_gpio_state;
  51. int on_vsel;
  52. int dvs_vsel;
  53. };
  54. static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
  55. {
  56. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  57. struct wm831x *wm831x = dcdc->wm831x;
  58. int mask = 1 << rdev_get_id(rdev);
  59. int reg;
  60. reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
  61. if (reg < 0)
  62. return reg;
  63. if (reg & mask)
  64. return 1;
  65. else
  66. return 0;
  67. }
  68. static int wm831x_dcdc_enable(struct regulator_dev *rdev)
  69. {
  70. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  71. struct wm831x *wm831x = dcdc->wm831x;
  72. int mask = 1 << rdev_get_id(rdev);
  73. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
  74. }
  75. static int wm831x_dcdc_disable(struct regulator_dev *rdev)
  76. {
  77. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  78. struct wm831x *wm831x = dcdc->wm831x;
  79. int mask = 1 << rdev_get_id(rdev);
  80. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
  81. }
  82. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  83. {
  84. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  85. struct wm831x *wm831x = dcdc->wm831x;
  86. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  87. int val;
  88. val = wm831x_reg_read(wm831x, reg);
  89. if (val < 0)
  90. return val;
  91. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  92. switch (val) {
  93. case WM831X_DCDC_MODE_FAST:
  94. return REGULATOR_MODE_FAST;
  95. case WM831X_DCDC_MODE_NORMAL:
  96. return REGULATOR_MODE_NORMAL;
  97. case WM831X_DCDC_MODE_STANDBY:
  98. return REGULATOR_MODE_STANDBY;
  99. case WM831X_DCDC_MODE_IDLE:
  100. return REGULATOR_MODE_IDLE;
  101. default:
  102. BUG();
  103. }
  104. }
  105. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  106. unsigned int mode)
  107. {
  108. int val;
  109. switch (mode) {
  110. case REGULATOR_MODE_FAST:
  111. val = WM831X_DCDC_MODE_FAST;
  112. break;
  113. case REGULATOR_MODE_NORMAL:
  114. val = WM831X_DCDC_MODE_NORMAL;
  115. break;
  116. case REGULATOR_MODE_STANDBY:
  117. val = WM831X_DCDC_MODE_STANDBY;
  118. break;
  119. case REGULATOR_MODE_IDLE:
  120. val = WM831X_DCDC_MODE_IDLE;
  121. break;
  122. default:
  123. return -EINVAL;
  124. }
  125. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  126. val << WM831X_DC1_ON_MODE_SHIFT);
  127. }
  128. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  129. {
  130. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  131. struct wm831x *wm831x = dcdc->wm831x;
  132. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  133. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  134. }
  135. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  136. unsigned int mode)
  137. {
  138. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  139. struct wm831x *wm831x = dcdc->wm831x;
  140. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  141. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  142. }
  143. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  144. {
  145. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  146. struct wm831x *wm831x = dcdc->wm831x;
  147. int ret;
  148. /* First, check for errors */
  149. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  150. if (ret < 0)
  151. return ret;
  152. if (ret & (1 << rdev_get_id(rdev))) {
  153. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  154. rdev_get_id(rdev) + 1);
  155. return REGULATOR_STATUS_ERROR;
  156. }
  157. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  158. if (rdev_get_id(rdev) < 2) {
  159. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  160. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  161. rdev_get_id(rdev) + 1);
  162. return REGULATOR_STATUS_ERROR;
  163. }
  164. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  165. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  166. rdev_get_id(rdev) + 1);
  167. return REGULATOR_STATUS_ERROR;
  168. }
  169. }
  170. /* Is the regulator on? */
  171. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  172. if (ret < 0)
  173. return ret;
  174. if (!(ret & (1 << rdev_get_id(rdev))))
  175. return REGULATOR_STATUS_OFF;
  176. /* TODO: When we handle hardware control modes so we can report the
  177. * current mode. */
  178. return REGULATOR_STATUS_ON;
  179. }
  180. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  181. {
  182. struct wm831x_dcdc *dcdc = data;
  183. regulator_notifier_call_chain(dcdc->regulator,
  184. REGULATOR_EVENT_UNDER_VOLTAGE,
  185. NULL);
  186. return IRQ_HANDLED;
  187. }
  188. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  189. {
  190. struct wm831x_dcdc *dcdc = data;
  191. regulator_notifier_call_chain(dcdc->regulator,
  192. REGULATOR_EVENT_OVER_CURRENT,
  193. NULL);
  194. return IRQ_HANDLED;
  195. }
  196. /*
  197. * BUCKV specifics
  198. */
  199. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  200. unsigned selector)
  201. {
  202. if (selector <= 0x8)
  203. return 600000;
  204. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  205. return 600000 + ((selector - 0x8) * 12500);
  206. return -EINVAL;
  207. }
  208. static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
  209. int min_uV, int max_uV)
  210. {
  211. u16 vsel;
  212. if (min_uV < 600000)
  213. vsel = 0;
  214. else if (min_uV <= 1800000)
  215. vsel = ((min_uV - 600000) / 12500) + 8;
  216. else
  217. return -EINVAL;
  218. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  219. return -EINVAL;
  220. return vsel;
  221. }
  222. static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
  223. int min_uV, int max_uV)
  224. {
  225. u16 vsel;
  226. if (max_uV < 600000 || max_uV > 1800000)
  227. return -EINVAL;
  228. vsel = ((max_uV - 600000) / 12500) + 8;
  229. if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
  230. wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
  231. return -EINVAL;
  232. return vsel;
  233. }
  234. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  235. {
  236. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  237. if (state == dcdc->dvs_gpio_state)
  238. return 0;
  239. dcdc->dvs_gpio_state = state;
  240. gpio_set_value(dcdc->dvs_gpio, state);
  241. /* Should wait for DVS state change to be asserted if we have
  242. * a GPIO for it, for now assume the device is configured
  243. * for the fastest possible transition.
  244. */
  245. return 0;
  246. }
  247. static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
  248. int min_uV, int max_uV)
  249. {
  250. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  251. struct wm831x *wm831x = dcdc->wm831x;
  252. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  253. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  254. int vsel, ret;
  255. vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
  256. if (vsel < 0)
  257. return vsel;
  258. /* If this value is already set then do a GPIO update if we can */
  259. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  260. return wm831x_buckv_set_dvs(rdev, 0);
  261. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  262. return wm831x_buckv_set_dvs(rdev, 1);
  263. /* Always set the ON status to the minimum voltage */
  264. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  265. if (ret < 0)
  266. return ret;
  267. dcdc->on_vsel = vsel;
  268. if (!dcdc->dvs_gpio)
  269. return ret;
  270. /* Kick the voltage transition now */
  271. ret = wm831x_buckv_set_dvs(rdev, 0);
  272. if (ret < 0)
  273. return ret;
  274. /* Set the high voltage as the DVS voltage. This is optimised
  275. * for CPUfreq usage, most processors will keep the maximum
  276. * voltage constant and lower the minimum with the frequency. */
  277. vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
  278. if (vsel < 0) {
  279. /* This should never happen - at worst the same vsel
  280. * should be chosen */
  281. WARN_ON(vsel < 0);
  282. return 0;
  283. }
  284. /* Don't bother if it's the same VSEL we're already using */
  285. if (vsel == dcdc->on_vsel)
  286. return 0;
  287. ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
  288. if (ret == 0)
  289. dcdc->dvs_vsel = vsel;
  290. else
  291. dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
  292. ret);
  293. return 0;
  294. }
  295. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  296. int uV)
  297. {
  298. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  299. struct wm831x *wm831x = dcdc->wm831x;
  300. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  301. int vsel;
  302. vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
  303. if (vsel < 0)
  304. return vsel;
  305. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  306. }
  307. static int wm831x_buckv_get_voltage(struct regulator_dev *rdev)
  308. {
  309. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  310. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  311. return wm831x_buckv_list_voltage(rdev, dcdc->dvs_vsel);
  312. else
  313. return wm831x_buckv_list_voltage(rdev, dcdc->on_vsel);
  314. }
  315. /* Current limit options */
  316. static u16 wm831x_dcdc_ilim[] = {
  317. 125, 250, 375, 500, 625, 750, 875, 1000
  318. };
  319. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  320. int min_uA, int max_uA)
  321. {
  322. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  323. struct wm831x *wm831x = dcdc->wm831x;
  324. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  325. int i;
  326. for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
  327. if (max_uA <= wm831x_dcdc_ilim[i])
  328. break;
  329. }
  330. if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
  331. return -EINVAL;
  332. return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
  333. }
  334. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  335. {
  336. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  337. struct wm831x *wm831x = dcdc->wm831x;
  338. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  339. int val;
  340. val = wm831x_reg_read(wm831x, reg);
  341. if (val < 0)
  342. return val;
  343. return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];
  344. }
  345. static struct regulator_ops wm831x_buckv_ops = {
  346. .set_voltage = wm831x_buckv_set_voltage,
  347. .get_voltage = wm831x_buckv_get_voltage,
  348. .list_voltage = wm831x_buckv_list_voltage,
  349. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  350. .set_current_limit = wm831x_buckv_set_current_limit,
  351. .get_current_limit = wm831x_buckv_get_current_limit,
  352. .is_enabled = wm831x_dcdc_is_enabled,
  353. .enable = wm831x_dcdc_enable,
  354. .disable = wm831x_dcdc_disable,
  355. .get_status = wm831x_dcdc_get_status,
  356. .get_mode = wm831x_dcdc_get_mode,
  357. .set_mode = wm831x_dcdc_set_mode,
  358. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  359. };
  360. /*
  361. * Set up DVS control. We just log errors since we can still run
  362. * (with reduced performance) if we fail.
  363. */
  364. static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  365. struct wm831x_buckv_pdata *pdata)
  366. {
  367. struct wm831x *wm831x = dcdc->wm831x;
  368. int ret;
  369. u16 ctrl;
  370. if (!pdata || !pdata->dvs_gpio)
  371. return;
  372. switch (pdata->dvs_control_src) {
  373. case 1:
  374. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  375. break;
  376. case 2:
  377. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  378. break;
  379. default:
  380. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  381. pdata->dvs_control_src, dcdc->name);
  382. return;
  383. }
  384. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  385. WM831X_DC1_DVS_SRC_MASK, ctrl);
  386. if (ret < 0) {
  387. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  388. dcdc->name, ret);
  389. return;
  390. }
  391. ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
  392. if (ret < 0) {
  393. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  394. dcdc->name, ret);
  395. return;
  396. }
  397. /* gpiolib won't let us read the GPIO status so pick the higher
  398. * of the two existing voltages so we take it as platform data.
  399. */
  400. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  401. ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
  402. if (ret < 0) {
  403. dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
  404. dcdc->name, ret);
  405. gpio_free(pdata->dvs_gpio);
  406. return;
  407. }
  408. dcdc->dvs_gpio = pdata->dvs_gpio;
  409. }
  410. static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
  411. {
  412. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  413. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  414. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  415. struct wm831x_dcdc *dcdc;
  416. struct resource *res;
  417. int ret, irq;
  418. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  419. if (pdata == NULL || pdata->dcdc[id] == NULL)
  420. return -ENODEV;
  421. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  422. if (dcdc == NULL) {
  423. dev_err(&pdev->dev, "Unable to allocate private data\n");
  424. return -ENOMEM;
  425. }
  426. dcdc->wm831x = wm831x;
  427. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  428. if (res == NULL) {
  429. dev_err(&pdev->dev, "No I/O resource\n");
  430. ret = -EINVAL;
  431. goto err;
  432. }
  433. dcdc->base = res->start;
  434. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  435. dcdc->desc.name = dcdc->name;
  436. dcdc->desc.id = id;
  437. dcdc->desc.type = REGULATOR_VOLTAGE;
  438. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  439. dcdc->desc.ops = &wm831x_buckv_ops;
  440. dcdc->desc.owner = THIS_MODULE;
  441. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  442. if (ret < 0) {
  443. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  444. goto err;
  445. }
  446. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  447. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  448. if (ret < 0) {
  449. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  450. goto err;
  451. }
  452. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  453. if (pdata->dcdc[id])
  454. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  455. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  456. pdata->dcdc[id], dcdc);
  457. if (IS_ERR(dcdc->regulator)) {
  458. ret = PTR_ERR(dcdc->regulator);
  459. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  460. id + 1, ret);
  461. goto err;
  462. }
  463. irq = platform_get_irq_byname(pdev, "UV");
  464. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  465. IRQF_TRIGGER_RISING, dcdc->name,
  466. dcdc);
  467. if (ret != 0) {
  468. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  469. irq, ret);
  470. goto err_regulator;
  471. }
  472. irq = platform_get_irq_byname(pdev, "HC");
  473. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_oc_irq,
  474. IRQF_TRIGGER_RISING, dcdc->name,
  475. dcdc);
  476. if (ret != 0) {
  477. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  478. irq, ret);
  479. goto err_uv;
  480. }
  481. platform_set_drvdata(pdev, dcdc);
  482. return 0;
  483. err_uv:
  484. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  485. err_regulator:
  486. regulator_unregister(dcdc->regulator);
  487. err:
  488. if (dcdc->dvs_gpio)
  489. gpio_free(dcdc->dvs_gpio);
  490. kfree(dcdc);
  491. return ret;
  492. }
  493. static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
  494. {
  495. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  496. struct wm831x *wm831x = dcdc->wm831x;
  497. platform_set_drvdata(pdev, NULL);
  498. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
  499. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  500. regulator_unregister(dcdc->regulator);
  501. if (dcdc->dvs_gpio)
  502. gpio_free(dcdc->dvs_gpio);
  503. kfree(dcdc);
  504. return 0;
  505. }
  506. static struct platform_driver wm831x_buckv_driver = {
  507. .probe = wm831x_buckv_probe,
  508. .remove = __devexit_p(wm831x_buckv_remove),
  509. .driver = {
  510. .name = "wm831x-buckv",
  511. .owner = THIS_MODULE,
  512. },
  513. };
  514. /*
  515. * BUCKP specifics
  516. */
  517. static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
  518. unsigned selector)
  519. {
  520. if (selector <= WM831X_BUCKP_MAX_SELECTOR)
  521. return 850000 + (selector * 25000);
  522. else
  523. return -EINVAL;
  524. }
  525. static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
  526. int min_uV, int max_uV)
  527. {
  528. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  529. struct wm831x *wm831x = dcdc->wm831x;
  530. u16 vsel;
  531. if (min_uV <= 34000000)
  532. vsel = (min_uV - 850000) / 25000;
  533. else
  534. return -EINVAL;
  535. if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
  536. return -EINVAL;
  537. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
  538. }
  539. static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
  540. int min_uV, int max_uV)
  541. {
  542. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  543. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  544. return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV);
  545. }
  546. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
  547. int uV)
  548. {
  549. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  550. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  551. return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV);
  552. }
  553. static int wm831x_buckp_get_voltage(struct regulator_dev *rdev)
  554. {
  555. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  556. struct wm831x *wm831x = dcdc->wm831x;
  557. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  558. int val;
  559. val = wm831x_reg_read(wm831x, reg);
  560. if (val < 0)
  561. return val;
  562. return wm831x_buckp_list_voltage(rdev, val & WM831X_DC3_ON_VSEL_MASK);
  563. }
  564. static struct regulator_ops wm831x_buckp_ops = {
  565. .set_voltage = wm831x_buckp_set_voltage,
  566. .get_voltage = wm831x_buckp_get_voltage,
  567. .list_voltage = wm831x_buckp_list_voltage,
  568. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  569. .is_enabled = wm831x_dcdc_is_enabled,
  570. .enable = wm831x_dcdc_enable,
  571. .disable = wm831x_dcdc_disable,
  572. .get_status = wm831x_dcdc_get_status,
  573. .get_mode = wm831x_dcdc_get_mode,
  574. .set_mode = wm831x_dcdc_set_mode,
  575. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  576. };
  577. static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
  578. {
  579. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  580. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  581. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  582. struct wm831x_dcdc *dcdc;
  583. struct resource *res;
  584. int ret, irq;
  585. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  586. if (pdata == NULL || pdata->dcdc[id] == NULL)
  587. return -ENODEV;
  588. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  589. if (dcdc == NULL) {
  590. dev_err(&pdev->dev, "Unable to allocate private data\n");
  591. return -ENOMEM;
  592. }
  593. dcdc->wm831x = wm831x;
  594. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  595. if (res == NULL) {
  596. dev_err(&pdev->dev, "No I/O resource\n");
  597. ret = -EINVAL;
  598. goto err;
  599. }
  600. dcdc->base = res->start;
  601. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  602. dcdc->desc.name = dcdc->name;
  603. dcdc->desc.id = id;
  604. dcdc->desc.type = REGULATOR_VOLTAGE;
  605. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  606. dcdc->desc.ops = &wm831x_buckp_ops;
  607. dcdc->desc.owner = THIS_MODULE;
  608. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  609. pdata->dcdc[id], dcdc);
  610. if (IS_ERR(dcdc->regulator)) {
  611. ret = PTR_ERR(dcdc->regulator);
  612. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  613. id + 1, ret);
  614. goto err;
  615. }
  616. irq = platform_get_irq_byname(pdev, "UV");
  617. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  618. IRQF_TRIGGER_RISING, dcdc->name,
  619. dcdc);
  620. if (ret != 0) {
  621. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  622. irq, ret);
  623. goto err_regulator;
  624. }
  625. platform_set_drvdata(pdev, dcdc);
  626. return 0;
  627. err_regulator:
  628. regulator_unregister(dcdc->regulator);
  629. err:
  630. kfree(dcdc);
  631. return ret;
  632. }
  633. static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
  634. {
  635. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  636. struct wm831x *wm831x = dcdc->wm831x;
  637. platform_set_drvdata(pdev, NULL);
  638. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  639. regulator_unregister(dcdc->regulator);
  640. kfree(dcdc);
  641. return 0;
  642. }
  643. static struct platform_driver wm831x_buckp_driver = {
  644. .probe = wm831x_buckp_probe,
  645. .remove = __devexit_p(wm831x_buckp_remove),
  646. .driver = {
  647. .name = "wm831x-buckp",
  648. .owner = THIS_MODULE,
  649. },
  650. };
  651. /*
  652. * DCDC boost convertors
  653. */
  654. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  655. {
  656. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  657. struct wm831x *wm831x = dcdc->wm831x;
  658. int ret;
  659. /* First, check for errors */
  660. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  661. if (ret < 0)
  662. return ret;
  663. if (ret & (1 << rdev_get_id(rdev))) {
  664. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  665. rdev_get_id(rdev) + 1);
  666. return REGULATOR_STATUS_ERROR;
  667. }
  668. /* Is the regulator on? */
  669. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  670. if (ret < 0)
  671. return ret;
  672. if (ret & (1 << rdev_get_id(rdev)))
  673. return REGULATOR_STATUS_ON;
  674. else
  675. return REGULATOR_STATUS_OFF;
  676. }
  677. static struct regulator_ops wm831x_boostp_ops = {
  678. .get_status = wm831x_boostp_get_status,
  679. .is_enabled = wm831x_dcdc_is_enabled,
  680. .enable = wm831x_dcdc_enable,
  681. .disable = wm831x_dcdc_disable,
  682. };
  683. static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
  684. {
  685. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  686. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  687. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  688. struct wm831x_dcdc *dcdc;
  689. struct resource *res;
  690. int ret, irq;
  691. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  692. if (pdata == NULL || pdata->dcdc[id] == NULL)
  693. return -ENODEV;
  694. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  695. if (dcdc == NULL) {
  696. dev_err(&pdev->dev, "Unable to allocate private data\n");
  697. return -ENOMEM;
  698. }
  699. dcdc->wm831x = wm831x;
  700. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  701. if (res == NULL) {
  702. dev_err(&pdev->dev, "No I/O resource\n");
  703. ret = -EINVAL;
  704. goto err;
  705. }
  706. dcdc->base = res->start;
  707. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  708. dcdc->desc.name = dcdc->name;
  709. dcdc->desc.id = id;
  710. dcdc->desc.type = REGULATOR_VOLTAGE;
  711. dcdc->desc.ops = &wm831x_boostp_ops;
  712. dcdc->desc.owner = THIS_MODULE;
  713. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  714. pdata->dcdc[id], dcdc);
  715. if (IS_ERR(dcdc->regulator)) {
  716. ret = PTR_ERR(dcdc->regulator);
  717. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  718. id + 1, ret);
  719. goto err;
  720. }
  721. irq = platform_get_irq_byname(pdev, "UV");
  722. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  723. IRQF_TRIGGER_RISING, dcdc->name,
  724. dcdc);
  725. if (ret != 0) {
  726. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  727. irq, ret);
  728. goto err_regulator;
  729. }
  730. platform_set_drvdata(pdev, dcdc);
  731. return 0;
  732. err_regulator:
  733. regulator_unregister(dcdc->regulator);
  734. err:
  735. kfree(dcdc);
  736. return ret;
  737. }
  738. static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
  739. {
  740. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  741. struct wm831x *wm831x = dcdc->wm831x;
  742. platform_set_drvdata(pdev, NULL);
  743. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  744. regulator_unregister(dcdc->regulator);
  745. kfree(dcdc);
  746. return 0;
  747. }
  748. static struct platform_driver wm831x_boostp_driver = {
  749. .probe = wm831x_boostp_probe,
  750. .remove = __devexit_p(wm831x_boostp_remove),
  751. .driver = {
  752. .name = "wm831x-boostp",
  753. .owner = THIS_MODULE,
  754. },
  755. };
  756. /*
  757. * External Power Enable
  758. *
  759. * These aren't actually DCDCs but look like them in hardware so share
  760. * code.
  761. */
  762. #define WM831X_EPE_BASE 6
  763. static struct regulator_ops wm831x_epe_ops = {
  764. .is_enabled = wm831x_dcdc_is_enabled,
  765. .enable = wm831x_dcdc_enable,
  766. .disable = wm831x_dcdc_disable,
  767. .get_status = wm831x_dcdc_get_status,
  768. };
  769. static __devinit int wm831x_epe_probe(struct platform_device *pdev)
  770. {
  771. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  772. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  773. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  774. struct wm831x_dcdc *dcdc;
  775. int ret;
  776. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  777. if (pdata == NULL || pdata->epe[id] == NULL)
  778. return -ENODEV;
  779. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  780. if (dcdc == NULL) {
  781. dev_err(&pdev->dev, "Unable to allocate private data\n");
  782. return -ENOMEM;
  783. }
  784. dcdc->wm831x = wm831x;
  785. /* For current parts this is correct; probably need to revisit
  786. * in future.
  787. */
  788. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  789. dcdc->desc.name = dcdc->name;
  790. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  791. dcdc->desc.ops = &wm831x_epe_ops;
  792. dcdc->desc.type = REGULATOR_VOLTAGE;
  793. dcdc->desc.owner = THIS_MODULE;
  794. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  795. pdata->epe[id], dcdc);
  796. if (IS_ERR(dcdc->regulator)) {
  797. ret = PTR_ERR(dcdc->regulator);
  798. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  799. id + 1, ret);
  800. goto err;
  801. }
  802. platform_set_drvdata(pdev, dcdc);
  803. return 0;
  804. err:
  805. kfree(dcdc);
  806. return ret;
  807. }
  808. static __devexit int wm831x_epe_remove(struct platform_device *pdev)
  809. {
  810. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  811. platform_set_drvdata(pdev, NULL);
  812. regulator_unregister(dcdc->regulator);
  813. kfree(dcdc);
  814. return 0;
  815. }
  816. static struct platform_driver wm831x_epe_driver = {
  817. .probe = wm831x_epe_probe,
  818. .remove = __devexit_p(wm831x_epe_remove),
  819. .driver = {
  820. .name = "wm831x-epe",
  821. .owner = THIS_MODULE,
  822. },
  823. };
  824. static int __init wm831x_dcdc_init(void)
  825. {
  826. int ret;
  827. ret = platform_driver_register(&wm831x_buckv_driver);
  828. if (ret != 0)
  829. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  830. ret = platform_driver_register(&wm831x_buckp_driver);
  831. if (ret != 0)
  832. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  833. ret = platform_driver_register(&wm831x_boostp_driver);
  834. if (ret != 0)
  835. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  836. ret = platform_driver_register(&wm831x_epe_driver);
  837. if (ret != 0)
  838. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  839. return 0;
  840. }
  841. subsys_initcall(wm831x_dcdc_init);
  842. static void __exit wm831x_dcdc_exit(void)
  843. {
  844. platform_driver_unregister(&wm831x_epe_driver);
  845. platform_driver_unregister(&wm831x_boostp_driver);
  846. platform_driver_unregister(&wm831x_buckp_driver);
  847. platform_driver_unregister(&wm831x_buckv_driver);
  848. }
  849. module_exit(wm831x_dcdc_exit);
  850. /* Module information */
  851. MODULE_AUTHOR("Mark Brown");
  852. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  853. MODULE_LICENSE("GPL");
  854. MODULE_ALIAS("platform:wm831x-buckv");
  855. MODULE_ALIAS("platform:wm831x-buckp");