pci-sysfs.c 29 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include <linux/slab.h>
  25. #include "pci.h"
  26. static int sysfs_initialized; /* = 0 */
  27. /* show configuration fields */
  28. #define pci_config_attr(field, format_string) \
  29. static ssize_t \
  30. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  31. { \
  32. struct pci_dev *pdev; \
  33. \
  34. pdev = to_pci_dev (dev); \
  35. return sprintf (buf, format_string, pdev->field); \
  36. }
  37. pci_config_attr(vendor, "0x%04x\n");
  38. pci_config_attr(device, "0x%04x\n");
  39. pci_config_attr(subsystem_vendor, "0x%04x\n");
  40. pci_config_attr(subsystem_device, "0x%04x\n");
  41. pci_config_attr(class, "0x%06x\n");
  42. pci_config_attr(irq, "%u\n");
  43. static ssize_t broken_parity_status_show(struct device *dev,
  44. struct device_attribute *attr,
  45. char *buf)
  46. {
  47. struct pci_dev *pdev = to_pci_dev(dev);
  48. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  49. }
  50. static ssize_t broken_parity_status_store(struct device *dev,
  51. struct device_attribute *attr,
  52. const char *buf, size_t count)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. unsigned long val;
  56. if (strict_strtoul(buf, 0, &val) < 0)
  57. return -EINVAL;
  58. pdev->broken_parity_status = !!val;
  59. return count;
  60. }
  61. static ssize_t local_cpus_show(struct device *dev,
  62. struct device_attribute *attr, char *buf)
  63. {
  64. const struct cpumask *mask;
  65. int len;
  66. #ifdef CONFIG_NUMA
  67. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  68. cpumask_of_node(dev_to_node(dev));
  69. #else
  70. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  71. #endif
  72. len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  73. buf[len++] = '\n';
  74. buf[len] = '\0';
  75. return len;
  76. }
  77. static ssize_t local_cpulist_show(struct device *dev,
  78. struct device_attribute *attr, char *buf)
  79. {
  80. const struct cpumask *mask;
  81. int len;
  82. #ifdef CONFIG_NUMA
  83. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  84. cpumask_of_node(dev_to_node(dev));
  85. #else
  86. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  87. #endif
  88. len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
  89. buf[len++] = '\n';
  90. buf[len] = '\0';
  91. return len;
  92. }
  93. /* show resources */
  94. static ssize_t
  95. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  96. {
  97. struct pci_dev * pci_dev = to_pci_dev(dev);
  98. char * str = buf;
  99. int i;
  100. int max;
  101. resource_size_t start, end;
  102. if (pci_dev->subordinate)
  103. max = DEVICE_COUNT_RESOURCE;
  104. else
  105. max = PCI_BRIDGE_RESOURCES;
  106. for (i = 0; i < max; i++) {
  107. struct resource *res = &pci_dev->resource[i];
  108. pci_resource_to_user(pci_dev, i, res, &start, &end);
  109. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  110. (unsigned long long)start,
  111. (unsigned long long)end,
  112. (unsigned long long)res->flags);
  113. }
  114. return (str - buf);
  115. }
  116. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  117. {
  118. struct pci_dev *pci_dev = to_pci_dev(dev);
  119. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  120. pci_dev->vendor, pci_dev->device,
  121. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  122. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  123. (u8)(pci_dev->class));
  124. }
  125. static ssize_t is_enabled_store(struct device *dev,
  126. struct device_attribute *attr, const char *buf,
  127. size_t count)
  128. {
  129. struct pci_dev *pdev = to_pci_dev(dev);
  130. unsigned long val;
  131. ssize_t result = strict_strtoul(buf, 0, &val);
  132. if (result < 0)
  133. return result;
  134. /* this can crash the machine when done on the "wrong" device */
  135. if (!capable(CAP_SYS_ADMIN))
  136. return -EPERM;
  137. if (!val) {
  138. if (pci_is_enabled(pdev))
  139. pci_disable_device(pdev);
  140. else
  141. result = -EIO;
  142. } else
  143. result = pci_enable_device(pdev);
  144. return result < 0 ? result : count;
  145. }
  146. static ssize_t is_enabled_show(struct device *dev,
  147. struct device_attribute *attr, char *buf)
  148. {
  149. struct pci_dev *pdev;
  150. pdev = to_pci_dev (dev);
  151. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  152. }
  153. #ifdef CONFIG_NUMA
  154. static ssize_t
  155. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  156. {
  157. return sprintf (buf, "%d\n", dev->numa_node);
  158. }
  159. #endif
  160. static ssize_t
  161. dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
  162. {
  163. struct pci_dev *pdev = to_pci_dev(dev);
  164. return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
  165. }
  166. static ssize_t
  167. consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
  168. char *buf)
  169. {
  170. return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
  171. }
  172. static ssize_t
  173. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  174. {
  175. struct pci_dev *pdev = to_pci_dev(dev);
  176. if (!pdev->subordinate)
  177. return 0;
  178. return sprintf (buf, "%u\n",
  179. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  180. }
  181. static ssize_t
  182. msi_bus_store(struct device *dev, struct device_attribute *attr,
  183. const char *buf, size_t count)
  184. {
  185. struct pci_dev *pdev = to_pci_dev(dev);
  186. unsigned long val;
  187. if (strict_strtoul(buf, 0, &val) < 0)
  188. return -EINVAL;
  189. /* bad things may happen if the no_msi flag is changed
  190. * while some drivers are loaded */
  191. if (!capable(CAP_SYS_ADMIN))
  192. return -EPERM;
  193. /* Maybe pci devices without subordinate busses shouldn't even have this
  194. * attribute in the first place? */
  195. if (!pdev->subordinate)
  196. return count;
  197. /* Is the flag going to change, or keep the value it already had? */
  198. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  199. !!val) {
  200. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  201. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  202. " bad things could happen\n", val ? "" : " not");
  203. }
  204. return count;
  205. }
  206. #ifdef CONFIG_HOTPLUG
  207. static DEFINE_MUTEX(pci_remove_rescan_mutex);
  208. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  209. size_t count)
  210. {
  211. unsigned long val;
  212. struct pci_bus *b = NULL;
  213. if (strict_strtoul(buf, 0, &val) < 0)
  214. return -EINVAL;
  215. if (val) {
  216. mutex_lock(&pci_remove_rescan_mutex);
  217. while ((b = pci_find_next_bus(b)) != NULL)
  218. pci_rescan_bus(b);
  219. mutex_unlock(&pci_remove_rescan_mutex);
  220. }
  221. return count;
  222. }
  223. struct bus_attribute pci_bus_attrs[] = {
  224. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
  225. __ATTR_NULL
  226. };
  227. static ssize_t
  228. dev_rescan_store(struct device *dev, struct device_attribute *attr,
  229. const char *buf, size_t count)
  230. {
  231. unsigned long val;
  232. struct pci_dev *pdev = to_pci_dev(dev);
  233. if (strict_strtoul(buf, 0, &val) < 0)
  234. return -EINVAL;
  235. if (val) {
  236. mutex_lock(&pci_remove_rescan_mutex);
  237. pci_rescan_bus(pdev->bus);
  238. mutex_unlock(&pci_remove_rescan_mutex);
  239. }
  240. return count;
  241. }
  242. static void remove_callback(struct device *dev)
  243. {
  244. struct pci_dev *pdev = to_pci_dev(dev);
  245. mutex_lock(&pci_remove_rescan_mutex);
  246. pci_remove_bus_device(pdev);
  247. mutex_unlock(&pci_remove_rescan_mutex);
  248. }
  249. static ssize_t
  250. remove_store(struct device *dev, struct device_attribute *dummy,
  251. const char *buf, size_t count)
  252. {
  253. int ret = 0;
  254. unsigned long val;
  255. if (strict_strtoul(buf, 0, &val) < 0)
  256. return -EINVAL;
  257. /* An attribute cannot be unregistered by one of its own methods,
  258. * so we have to use this roundabout approach.
  259. */
  260. if (val)
  261. ret = device_schedule_callback(dev, remove_callback);
  262. if (ret)
  263. count = ret;
  264. return count;
  265. }
  266. #endif
  267. struct device_attribute pci_dev_attrs[] = {
  268. __ATTR_RO(resource),
  269. __ATTR_RO(vendor),
  270. __ATTR_RO(device),
  271. __ATTR_RO(subsystem_vendor),
  272. __ATTR_RO(subsystem_device),
  273. __ATTR_RO(class),
  274. __ATTR_RO(irq),
  275. __ATTR_RO(local_cpus),
  276. __ATTR_RO(local_cpulist),
  277. __ATTR_RO(modalias),
  278. #ifdef CONFIG_NUMA
  279. __ATTR_RO(numa_node),
  280. #endif
  281. __ATTR_RO(dma_mask_bits),
  282. __ATTR_RO(consistent_dma_mask_bits),
  283. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  284. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  285. broken_parity_status_show,broken_parity_status_store),
  286. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  287. #ifdef CONFIG_HOTPLUG
  288. __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
  289. __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
  290. #endif
  291. __ATTR_NULL,
  292. };
  293. static ssize_t
  294. boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
  295. {
  296. struct pci_dev *pdev = to_pci_dev(dev);
  297. return sprintf(buf, "%u\n",
  298. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  299. IORESOURCE_ROM_SHADOW));
  300. }
  301. struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  302. static ssize_t
  303. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  304. char *buf, loff_t off, size_t count)
  305. {
  306. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  307. unsigned int size = 64;
  308. loff_t init_off = off;
  309. u8 *data = (u8*) buf;
  310. /* Several chips lock up trying to read undefined config space */
  311. if (capable(CAP_SYS_ADMIN)) {
  312. size = dev->cfg_size;
  313. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  314. size = 128;
  315. }
  316. if (off > size)
  317. return 0;
  318. if (off + count > size) {
  319. size -= off;
  320. count = size;
  321. } else {
  322. size = count;
  323. }
  324. if ((off & 1) && size) {
  325. u8 val;
  326. pci_user_read_config_byte(dev, off, &val);
  327. data[off - init_off] = val;
  328. off++;
  329. size--;
  330. }
  331. if ((off & 3) && size > 2) {
  332. u16 val;
  333. pci_user_read_config_word(dev, off, &val);
  334. data[off - init_off] = val & 0xff;
  335. data[off - init_off + 1] = (val >> 8) & 0xff;
  336. off += 2;
  337. size -= 2;
  338. }
  339. while (size > 3) {
  340. u32 val;
  341. pci_user_read_config_dword(dev, off, &val);
  342. data[off - init_off] = val & 0xff;
  343. data[off - init_off + 1] = (val >> 8) & 0xff;
  344. data[off - init_off + 2] = (val >> 16) & 0xff;
  345. data[off - init_off + 3] = (val >> 24) & 0xff;
  346. off += 4;
  347. size -= 4;
  348. }
  349. if (size >= 2) {
  350. u16 val;
  351. pci_user_read_config_word(dev, off, &val);
  352. data[off - init_off] = val & 0xff;
  353. data[off - init_off + 1] = (val >> 8) & 0xff;
  354. off += 2;
  355. size -= 2;
  356. }
  357. if (size > 0) {
  358. u8 val;
  359. pci_user_read_config_byte(dev, off, &val);
  360. data[off - init_off] = val;
  361. off++;
  362. --size;
  363. }
  364. return count;
  365. }
  366. static ssize_t
  367. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  368. char *buf, loff_t off, size_t count)
  369. {
  370. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  371. unsigned int size = count;
  372. loff_t init_off = off;
  373. u8 *data = (u8*) buf;
  374. if (off > dev->cfg_size)
  375. return 0;
  376. if (off + count > dev->cfg_size) {
  377. size = dev->cfg_size - off;
  378. count = size;
  379. }
  380. if ((off & 1) && size) {
  381. pci_user_write_config_byte(dev, off, data[off - init_off]);
  382. off++;
  383. size--;
  384. }
  385. if ((off & 3) && size > 2) {
  386. u16 val = data[off - init_off];
  387. val |= (u16) data[off - init_off + 1] << 8;
  388. pci_user_write_config_word(dev, off, val);
  389. off += 2;
  390. size -= 2;
  391. }
  392. while (size > 3) {
  393. u32 val = data[off - init_off];
  394. val |= (u32) data[off - init_off + 1] << 8;
  395. val |= (u32) data[off - init_off + 2] << 16;
  396. val |= (u32) data[off - init_off + 3] << 24;
  397. pci_user_write_config_dword(dev, off, val);
  398. off += 4;
  399. size -= 4;
  400. }
  401. if (size >= 2) {
  402. u16 val = data[off - init_off];
  403. val |= (u16) data[off - init_off + 1] << 8;
  404. pci_user_write_config_word(dev, off, val);
  405. off += 2;
  406. size -= 2;
  407. }
  408. if (size) {
  409. pci_user_write_config_byte(dev, off, data[off - init_off]);
  410. off++;
  411. --size;
  412. }
  413. return count;
  414. }
  415. static ssize_t
  416. read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  417. char *buf, loff_t off, size_t count)
  418. {
  419. struct pci_dev *dev =
  420. to_pci_dev(container_of(kobj, struct device, kobj));
  421. if (off > bin_attr->size)
  422. count = 0;
  423. else if (count > bin_attr->size - off)
  424. count = bin_attr->size - off;
  425. return pci_read_vpd(dev, off, count, buf);
  426. }
  427. static ssize_t
  428. write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
  429. char *buf, loff_t off, size_t count)
  430. {
  431. struct pci_dev *dev =
  432. to_pci_dev(container_of(kobj, struct device, kobj));
  433. if (off > bin_attr->size)
  434. count = 0;
  435. else if (count > bin_attr->size - off)
  436. count = bin_attr->size - off;
  437. return pci_write_vpd(dev, off, count, buf);
  438. }
  439. #ifdef HAVE_PCI_LEGACY
  440. /**
  441. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  442. * @kobj: kobject corresponding to file to read from
  443. * @bin_attr: struct bin_attribute for this file
  444. * @buf: buffer to store results
  445. * @off: offset into legacy I/O port space
  446. * @count: number of bytes to read
  447. *
  448. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  449. * callback routine (pci_legacy_read).
  450. */
  451. static ssize_t
  452. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  453. char *buf, loff_t off, size_t count)
  454. {
  455. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  456. struct device,
  457. kobj));
  458. /* Only support 1, 2 or 4 byte accesses */
  459. if (count != 1 && count != 2 && count != 4)
  460. return -EINVAL;
  461. return pci_legacy_read(bus, off, (u32 *)buf, count);
  462. }
  463. /**
  464. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  465. * @kobj: kobject corresponding to file to read from
  466. * @bin_attr: struct bin_attribute for this file
  467. * @buf: buffer containing value to be written
  468. * @off: offset into legacy I/O port space
  469. * @count: number of bytes to write
  470. *
  471. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  472. * callback routine (pci_legacy_write).
  473. */
  474. static ssize_t
  475. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  476. char *buf, loff_t off, size_t count)
  477. {
  478. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  479. struct device,
  480. kobj));
  481. /* Only support 1, 2 or 4 byte accesses */
  482. if (count != 1 && count != 2 && count != 4)
  483. return -EINVAL;
  484. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  485. }
  486. /**
  487. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  488. * @kobj: kobject corresponding to device to be mapped
  489. * @attr: struct bin_attribute for this file
  490. * @vma: struct vm_area_struct passed to mmap
  491. *
  492. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  493. * legacy memory space (first meg of bus space) into application virtual
  494. * memory space.
  495. */
  496. static int
  497. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  498. struct vm_area_struct *vma)
  499. {
  500. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  501. struct device,
  502. kobj));
  503. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  504. }
  505. /**
  506. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  507. * @kobj: kobject corresponding to device to be mapped
  508. * @attr: struct bin_attribute for this file
  509. * @vma: struct vm_area_struct passed to mmap
  510. *
  511. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  512. * legacy IO space (first meg of bus space) into application virtual
  513. * memory space. Returns -ENOSYS if the operation isn't supported
  514. */
  515. static int
  516. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  517. struct vm_area_struct *vma)
  518. {
  519. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  520. struct device,
  521. kobj));
  522. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  523. }
  524. /**
  525. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  526. * @b: bus to create files under
  527. * @mmap_type: I/O port or memory
  528. *
  529. * Stub implementation. Can be overridden by arch if necessary.
  530. */
  531. void __weak
  532. pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
  533. {
  534. return;
  535. }
  536. /**
  537. * pci_create_legacy_files - create legacy I/O port and memory files
  538. * @b: bus to create files under
  539. *
  540. * Some platforms allow access to legacy I/O port and ISA memory space on
  541. * a per-bus basis. This routine creates the files and ties them into
  542. * their associated read, write and mmap files from pci-sysfs.c
  543. *
  544. * On error unwind, but don't propogate the error to the caller
  545. * as it is ok to set up the PCI bus without these files.
  546. */
  547. void pci_create_legacy_files(struct pci_bus *b)
  548. {
  549. int error;
  550. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  551. GFP_ATOMIC);
  552. if (!b->legacy_io)
  553. goto kzalloc_err;
  554. sysfs_bin_attr_init(b->legacy_io);
  555. b->legacy_io->attr.name = "legacy_io";
  556. b->legacy_io->size = 0xffff;
  557. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  558. b->legacy_io->read = pci_read_legacy_io;
  559. b->legacy_io->write = pci_write_legacy_io;
  560. b->legacy_io->mmap = pci_mmap_legacy_io;
  561. pci_adjust_legacy_attr(b, pci_mmap_io);
  562. error = device_create_bin_file(&b->dev, b->legacy_io);
  563. if (error)
  564. goto legacy_io_err;
  565. /* Allocated above after the legacy_io struct */
  566. b->legacy_mem = b->legacy_io + 1;
  567. sysfs_bin_attr_init(b->legacy_mem);
  568. b->legacy_mem->attr.name = "legacy_mem";
  569. b->legacy_mem->size = 1024*1024;
  570. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  571. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  572. pci_adjust_legacy_attr(b, pci_mmap_mem);
  573. error = device_create_bin_file(&b->dev, b->legacy_mem);
  574. if (error)
  575. goto legacy_mem_err;
  576. return;
  577. legacy_mem_err:
  578. device_remove_bin_file(&b->dev, b->legacy_io);
  579. legacy_io_err:
  580. kfree(b->legacy_io);
  581. b->legacy_io = NULL;
  582. kzalloc_err:
  583. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  584. "and ISA memory resources to sysfs\n");
  585. return;
  586. }
  587. void pci_remove_legacy_files(struct pci_bus *b)
  588. {
  589. if (b->legacy_io) {
  590. device_remove_bin_file(&b->dev, b->legacy_io);
  591. device_remove_bin_file(&b->dev, b->legacy_mem);
  592. kfree(b->legacy_io); /* both are allocated here */
  593. }
  594. }
  595. #endif /* HAVE_PCI_LEGACY */
  596. #ifdef HAVE_PCI_MMAP
  597. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  598. {
  599. unsigned long nr, start, size;
  600. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  601. start = vma->vm_pgoff;
  602. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  603. if (start < size && size - start >= nr)
  604. return 1;
  605. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  606. current->comm, start, start+nr, pci_name(pdev), resno, size);
  607. return 0;
  608. }
  609. /**
  610. * pci_mmap_resource - map a PCI resource into user memory space
  611. * @kobj: kobject for mapping
  612. * @attr: struct bin_attribute for the file being mapped
  613. * @vma: struct vm_area_struct passed into the mmap
  614. * @write_combine: 1 for write_combine mapping
  615. *
  616. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  617. */
  618. static int
  619. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  620. struct vm_area_struct *vma, int write_combine)
  621. {
  622. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  623. struct device, kobj));
  624. struct resource *res = (struct resource *)attr->private;
  625. enum pci_mmap_state mmap_type;
  626. resource_size_t start, end;
  627. int i;
  628. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  629. if (res == &pdev->resource[i])
  630. break;
  631. if (i >= PCI_ROM_RESOURCE)
  632. return -ENODEV;
  633. if (!pci_mmap_fits(pdev, i, vma))
  634. return -EINVAL;
  635. /* pci_mmap_page_range() expects the same kind of entry as coming
  636. * from /proc/bus/pci/ which is a "user visible" value. If this is
  637. * different from the resource itself, arch will do necessary fixup.
  638. */
  639. pci_resource_to_user(pdev, i, res, &start, &end);
  640. vma->vm_pgoff += start >> PAGE_SHIFT;
  641. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  642. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  643. return -EINVAL;
  644. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  645. }
  646. static int
  647. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  648. struct vm_area_struct *vma)
  649. {
  650. return pci_mmap_resource(kobj, attr, vma, 0);
  651. }
  652. static int
  653. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  654. struct vm_area_struct *vma)
  655. {
  656. return pci_mmap_resource(kobj, attr, vma, 1);
  657. }
  658. /**
  659. * pci_remove_resource_files - cleanup resource files
  660. * @pdev: dev to cleanup
  661. *
  662. * If we created resource files for @pdev, remove them from sysfs and
  663. * free their resources.
  664. */
  665. static void
  666. pci_remove_resource_files(struct pci_dev *pdev)
  667. {
  668. int i;
  669. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  670. struct bin_attribute *res_attr;
  671. res_attr = pdev->res_attr[i];
  672. if (res_attr) {
  673. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  674. kfree(res_attr);
  675. }
  676. res_attr = pdev->res_attr_wc[i];
  677. if (res_attr) {
  678. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  679. kfree(res_attr);
  680. }
  681. }
  682. }
  683. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  684. {
  685. /* allocate attribute structure, piggyback attribute name */
  686. int name_len = write_combine ? 13 : 10;
  687. struct bin_attribute *res_attr;
  688. int retval;
  689. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  690. if (res_attr) {
  691. char *res_attr_name = (char *)(res_attr + 1);
  692. sysfs_bin_attr_init(res_attr);
  693. if (write_combine) {
  694. pdev->res_attr_wc[num] = res_attr;
  695. sprintf(res_attr_name, "resource%d_wc", num);
  696. res_attr->mmap = pci_mmap_resource_wc;
  697. } else {
  698. pdev->res_attr[num] = res_attr;
  699. sprintf(res_attr_name, "resource%d", num);
  700. res_attr->mmap = pci_mmap_resource_uc;
  701. }
  702. res_attr->attr.name = res_attr_name;
  703. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  704. res_attr->size = pci_resource_len(pdev, num);
  705. res_attr->private = &pdev->resource[num];
  706. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  707. } else
  708. retval = -ENOMEM;
  709. return retval;
  710. }
  711. /**
  712. * pci_create_resource_files - create resource files in sysfs for @dev
  713. * @pdev: dev in question
  714. *
  715. * Walk the resources in @pdev creating files for each resource available.
  716. */
  717. static int pci_create_resource_files(struct pci_dev *pdev)
  718. {
  719. int i;
  720. int retval;
  721. /* Expose the PCI resources from this device as files */
  722. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  723. /* skip empty resources */
  724. if (!pci_resource_len(pdev, i))
  725. continue;
  726. retval = pci_create_attr(pdev, i, 0);
  727. /* for prefetchable resources, create a WC mappable file */
  728. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  729. retval = pci_create_attr(pdev, i, 1);
  730. if (retval) {
  731. pci_remove_resource_files(pdev);
  732. return retval;
  733. }
  734. }
  735. return 0;
  736. }
  737. #else /* !HAVE_PCI_MMAP */
  738. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  739. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  740. #endif /* HAVE_PCI_MMAP */
  741. /**
  742. * pci_write_rom - used to enable access to the PCI ROM display
  743. * @kobj: kernel object handle
  744. * @bin_attr: struct bin_attribute for this file
  745. * @buf: user input
  746. * @off: file offset
  747. * @count: number of byte in input
  748. *
  749. * writing anything except 0 enables it
  750. */
  751. static ssize_t
  752. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  753. char *buf, loff_t off, size_t count)
  754. {
  755. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  756. if ((off == 0) && (*buf == '0') && (count == 2))
  757. pdev->rom_attr_enabled = 0;
  758. else
  759. pdev->rom_attr_enabled = 1;
  760. return count;
  761. }
  762. /**
  763. * pci_read_rom - read a PCI ROM
  764. * @kobj: kernel object handle
  765. * @bin_attr: struct bin_attribute for this file
  766. * @buf: where to put the data we read from the ROM
  767. * @off: file offset
  768. * @count: number of bytes to read
  769. *
  770. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  771. * device corresponding to @kobj.
  772. */
  773. static ssize_t
  774. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  775. char *buf, loff_t off, size_t count)
  776. {
  777. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  778. void __iomem *rom;
  779. size_t size;
  780. if (!pdev->rom_attr_enabled)
  781. return -EINVAL;
  782. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  783. if (!rom || !size)
  784. return -EIO;
  785. if (off >= size)
  786. count = 0;
  787. else {
  788. if (off + count > size)
  789. count = size - off;
  790. memcpy_fromio(buf, rom + off, count);
  791. }
  792. pci_unmap_rom(pdev, rom);
  793. return count;
  794. }
  795. static struct bin_attribute pci_config_attr = {
  796. .attr = {
  797. .name = "config",
  798. .mode = S_IRUGO | S_IWUSR,
  799. },
  800. .size = PCI_CFG_SPACE_SIZE,
  801. .read = pci_read_config,
  802. .write = pci_write_config,
  803. };
  804. static struct bin_attribute pcie_config_attr = {
  805. .attr = {
  806. .name = "config",
  807. .mode = S_IRUGO | S_IWUSR,
  808. },
  809. .size = PCI_CFG_SPACE_EXP_SIZE,
  810. .read = pci_read_config,
  811. .write = pci_write_config,
  812. };
  813. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  814. {
  815. return 0;
  816. }
  817. static ssize_t reset_store(struct device *dev,
  818. struct device_attribute *attr, const char *buf,
  819. size_t count)
  820. {
  821. struct pci_dev *pdev = to_pci_dev(dev);
  822. unsigned long val;
  823. ssize_t result = strict_strtoul(buf, 0, &val);
  824. if (result < 0)
  825. return result;
  826. if (val != 1)
  827. return -EINVAL;
  828. return pci_reset_function(pdev);
  829. }
  830. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  831. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  832. {
  833. int retval;
  834. struct bin_attribute *attr;
  835. /* If the device has VPD, try to expose it in sysfs. */
  836. if (dev->vpd) {
  837. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  838. if (!attr)
  839. return -ENOMEM;
  840. sysfs_bin_attr_init(attr);
  841. attr->size = dev->vpd->len;
  842. attr->attr.name = "vpd";
  843. attr->attr.mode = S_IRUSR | S_IWUSR;
  844. attr->read = read_vpd_attr;
  845. attr->write = write_vpd_attr;
  846. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  847. if (retval) {
  848. kfree(dev->vpd->attr);
  849. return retval;
  850. }
  851. dev->vpd->attr = attr;
  852. }
  853. /* Active State Power Management */
  854. pcie_aspm_create_sysfs_dev_files(dev);
  855. if (!pci_probe_reset_function(dev)) {
  856. retval = device_create_file(&dev->dev, &reset_attr);
  857. if (retval)
  858. goto error;
  859. dev->reset_fn = 1;
  860. }
  861. return 0;
  862. error:
  863. pcie_aspm_remove_sysfs_dev_files(dev);
  864. if (dev->vpd && dev->vpd->attr) {
  865. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  866. kfree(dev->vpd->attr);
  867. }
  868. return retval;
  869. }
  870. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  871. {
  872. int retval;
  873. int rom_size = 0;
  874. struct bin_attribute *attr;
  875. if (!sysfs_initialized)
  876. return -EACCES;
  877. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  878. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  879. else
  880. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  881. if (retval)
  882. goto err;
  883. retval = pci_create_resource_files(pdev);
  884. if (retval)
  885. goto err_config_file;
  886. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  887. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  888. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  889. rom_size = 0x20000;
  890. /* If the device has a ROM, try to expose it in sysfs. */
  891. if (rom_size) {
  892. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  893. if (!attr) {
  894. retval = -ENOMEM;
  895. goto err_resource_files;
  896. }
  897. sysfs_bin_attr_init(attr);
  898. attr->size = rom_size;
  899. attr->attr.name = "rom";
  900. attr->attr.mode = S_IRUSR;
  901. attr->read = pci_read_rom;
  902. attr->write = pci_write_rom;
  903. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  904. if (retval) {
  905. kfree(attr);
  906. goto err_resource_files;
  907. }
  908. pdev->rom_attr = attr;
  909. }
  910. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
  911. retval = device_create_file(&pdev->dev, &vga_attr);
  912. if (retval)
  913. goto err_rom_file;
  914. }
  915. /* add platform-specific attributes */
  916. retval = pcibios_add_platform_entries(pdev);
  917. if (retval)
  918. goto err_vga_file;
  919. /* add sysfs entries for various capabilities */
  920. retval = pci_create_capabilities_sysfs(pdev);
  921. if (retval)
  922. goto err_vga_file;
  923. return 0;
  924. err_vga_file:
  925. if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
  926. device_remove_file(&pdev->dev, &vga_attr);
  927. err_rom_file:
  928. if (rom_size) {
  929. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  930. kfree(pdev->rom_attr);
  931. pdev->rom_attr = NULL;
  932. }
  933. err_resource_files:
  934. pci_remove_resource_files(pdev);
  935. err_config_file:
  936. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  937. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  938. else
  939. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  940. err:
  941. return retval;
  942. }
  943. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  944. {
  945. if (dev->vpd && dev->vpd->attr) {
  946. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  947. kfree(dev->vpd->attr);
  948. }
  949. pcie_aspm_remove_sysfs_dev_files(dev);
  950. if (dev->reset_fn) {
  951. device_remove_file(&dev->dev, &reset_attr);
  952. dev->reset_fn = 0;
  953. }
  954. }
  955. /**
  956. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  957. * @pdev: device whose entries we should free
  958. *
  959. * Cleanup when @pdev is removed from sysfs.
  960. */
  961. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  962. {
  963. int rom_size = 0;
  964. if (!sysfs_initialized)
  965. return;
  966. pci_remove_capabilities_sysfs(pdev);
  967. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  968. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  969. else
  970. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  971. pci_remove_resource_files(pdev);
  972. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  973. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  974. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  975. rom_size = 0x20000;
  976. if (rom_size && pdev->rom_attr) {
  977. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  978. kfree(pdev->rom_attr);
  979. }
  980. }
  981. static int __init pci_sysfs_init(void)
  982. {
  983. struct pci_dev *pdev = NULL;
  984. int retval;
  985. sysfs_initialized = 1;
  986. for_each_pci_dev(pdev) {
  987. retval = pci_create_sysfs_dev_files(pdev);
  988. if (retval) {
  989. pci_dev_put(pdev);
  990. return retval;
  991. }
  992. }
  993. return 0;
  994. }
  995. late_initcall(pci_sysfs_init);